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Posted to commits@nuttx.apache.org by pk...@apache.org on 2022/04/29 06:30:16 UTC
[incubator-nuttx] 02/10: stm32l4 RCC SW/SWS comment fixes
This is an automated email from the ASF dual-hosted git repository.
pkarashchenko pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 9850766d075123ac0774dea93168c760f9afa651
Author: Sergey Nikitenko <s....@me.com>
AuthorDate: Sat Mar 6 13:10:23 2021 +0300
stm32l4 RCC SW/SWS comment fixes
---
arch/arm/src/stm32l4/hardware/stm32l4x3xx_rcc.h | 16 ++++++++--------
arch/arm/src/stm32l4/hardware/stm32l4x5xx_rcc.h | 16 ++++++++--------
arch/arm/src/stm32l4/hardware/stm32l4x6xx_rcc.h | 16 ++++++++--------
arch/arm/src/stm32l4/hardware/stm32l4xrxx_rcc.h | 16 ++++++++--------
4 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x3xx_rcc.h b/arch/arm/src/stm32l4/hardware/stm32l4x3xx_rcc.h
index ac8e85913d..2eab55f609 100644
--- a/arch/arm/src/stm32l4/hardware/stm32l4x3xx_rcc.h
+++ b/arch/arm/src/stm32l4/hardware/stm32l4x3xx_rcc.h
@@ -157,17 +157,17 @@
#define RCC_CFGR_SW_SHIFT (0) /* Bits 0-1: System clock Switch */
#define RCC_CFGR_SW_MASK (3 << RCC_CFGR_SW_SHIFT)
-# define RCC_CFGR_SW_MSI (0 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
-# define RCC_CFGR_SW_HSI (1 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
-# define RCC_CFGR_SW_HSE (2 << RCC_CFGR_SW_SHIFT) /* 01: HSE selected as system clock */
-# define RCC_CFGR_SW_PLL (3 << RCC_CFGR_SW_SHIFT) /* 10: PLL selected as system clock */
+# define RCC_CFGR_SW_MSI (0 << RCC_CFGR_SW_SHIFT) /* 00: MSI selected as system clock */
+# define RCC_CFGR_SW_HSI (1 << RCC_CFGR_SW_SHIFT) /* 01: HSI selected as system clock */
+# define RCC_CFGR_SW_HSE (2 << RCC_CFGR_SW_SHIFT) /* 10: HSE selected as system clock */
+# define RCC_CFGR_SW_PLL (3 << RCC_CFGR_SW_SHIFT) /* 11: PLL selected as system clock */
#define RCC_CFGR_SWS_SHIFT (2) /* Bits 2-3: System Clock Switch Status */
#define RCC_CFGR_SWS_MASK (3 << RCC_CFGR_SWS_SHIFT)
-# define RCC_CFGR_SWS_MSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
-# define RCC_CFGR_SWS_HSI (1 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
-# define RCC_CFGR_SWS_HSE (2 << RCC_CFGR_SWS_SHIFT) /* 01: HSE oscillator used as system clock */
-# define RCC_CFGR_SWS_PLL (3 << RCC_CFGR_SWS_SHIFT) /* 10: PLL used as system clock */
+# define RCC_CFGR_SWS_MSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: MSI oscillator used as system clock */
+# define RCC_CFGR_SWS_HSI (1 << RCC_CFGR_SWS_SHIFT) /* 01: HSI oscillator used as system clock */
+# define RCC_CFGR_SWS_HSE (2 << RCC_CFGR_SWS_SHIFT) /* 10: HSE oscillator used as system clock */
+# define RCC_CFGR_SWS_PLL (3 << RCC_CFGR_SWS_SHIFT) /* 11: PLL used as system clock */
#define RCC_CFGR_HPRE_SHIFT (4) /* Bits 4-7: AHB prescaler */
#define RCC_CFGR_HPRE_MASK (0x0f << RCC_CFGR_HPRE_SHIFT)
diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x5xx_rcc.h b/arch/arm/src/stm32l4/hardware/stm32l4x5xx_rcc.h
index 1b2f4ed91d..29e87eb505 100644
--- a/arch/arm/src/stm32l4/hardware/stm32l4x5xx_rcc.h
+++ b/arch/arm/src/stm32l4/hardware/stm32l4x5xx_rcc.h
@@ -152,17 +152,17 @@
#define RCC_CFGR_SW_SHIFT (0) /* Bits 0-1: System clock Switch */
#define RCC_CFGR_SW_MASK (3 << RCC_CFGR_SW_SHIFT)
-# define RCC_CFGR_SW_MSI (0 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
-# define RCC_CFGR_SW_HSI (1 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
-# define RCC_CFGR_SW_HSE (2 << RCC_CFGR_SW_SHIFT) /* 01: HSE selected as system clock */
-# define RCC_CFGR_SW_PLL (3 << RCC_CFGR_SW_SHIFT) /* 10: PLL selected as system clock */
+# define RCC_CFGR_SW_MSI (0 << RCC_CFGR_SW_SHIFT) /* 00: MSI selected as system clock */
+# define RCC_CFGR_SW_HSI (1 << RCC_CFGR_SW_SHIFT) /* 01: HSI selected as system clock */
+# define RCC_CFGR_SW_HSE (2 << RCC_CFGR_SW_SHIFT) /* 10: HSE selected as system clock */
+# define RCC_CFGR_SW_PLL (3 << RCC_CFGR_SW_SHIFT) /* 11: PLL selected as system clock */
#define RCC_CFGR_SWS_SHIFT (2) /* Bits 2-3: System Clock Switch Status */
#define RCC_CFGR_SWS_MASK (3 << RCC_CFGR_SWS_SHIFT)
-# define RCC_CFGR_SWS_MSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
-# define RCC_CFGR_SWS_HSI (1 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
-# define RCC_CFGR_SWS_HSE (2 << RCC_CFGR_SWS_SHIFT) /* 01: HSE oscillator used as system clock */
-# define RCC_CFGR_SWS_PLL (3 << RCC_CFGR_SWS_SHIFT) /* 10: PLL used as system clock */
+# define RCC_CFGR_SWS_MSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: MSI oscillator used as system clock */
+# define RCC_CFGR_SWS_HSI (1 << RCC_CFGR_SWS_SHIFT) /* 01: HSI oscillator used as system clock */
+# define RCC_CFGR_SWS_HSE (2 << RCC_CFGR_SWS_SHIFT) /* 10: HSE oscillator used as system clock */
+# define RCC_CFGR_SWS_PLL (3 << RCC_CFGR_SWS_SHIFT) /* 11: PLL used as system clock */
#define RCC_CFGR_HPRE_SHIFT (4) /* Bits 4-7: AHB prescaler */
#define RCC_CFGR_HPRE_MASK (0x0f << RCC_CFGR_HPRE_SHIFT)
diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x6xx_rcc.h b/arch/arm/src/stm32l4/hardware/stm32l4x6xx_rcc.h
index 45a0c7fdb2..07ada5ba21 100644
--- a/arch/arm/src/stm32l4/hardware/stm32l4x6xx_rcc.h
+++ b/arch/arm/src/stm32l4/hardware/stm32l4x6xx_rcc.h
@@ -157,17 +157,17 @@
#define RCC_CFGR_SW_SHIFT (0) /* Bits 0-1: System clock Switch */
#define RCC_CFGR_SW_MASK (3 << RCC_CFGR_SW_SHIFT)
-# define RCC_CFGR_SW_MSI (0 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
-# define RCC_CFGR_SW_HSI (1 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
-# define RCC_CFGR_SW_HSE (2 << RCC_CFGR_SW_SHIFT) /* 01: HSE selected as system clock */
-# define RCC_CFGR_SW_PLL (3 << RCC_CFGR_SW_SHIFT) /* 10: PLL selected as system clock */
+# define RCC_CFGR_SW_MSI (0 << RCC_CFGR_SW_SHIFT) /* 00: MSI selected as system clock */
+# define RCC_CFGR_SW_HSI (1 << RCC_CFGR_SW_SHIFT) /* 01: HSI selected as system clock */
+# define RCC_CFGR_SW_HSE (2 << RCC_CFGR_SW_SHIFT) /* 10: HSE selected as system clock */
+# define RCC_CFGR_SW_PLL (3 << RCC_CFGR_SW_SHIFT) /* 11: PLL selected as system clock */
#define RCC_CFGR_SWS_SHIFT (2) /* Bits 2-3: System Clock Switch Status */
#define RCC_CFGR_SWS_MASK (3 << RCC_CFGR_SWS_SHIFT)
-# define RCC_CFGR_SWS_MSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
-# define RCC_CFGR_SWS_HSI (1 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
-# define RCC_CFGR_SWS_HSE (2 << RCC_CFGR_SWS_SHIFT) /* 01: HSE oscillator used as system clock */
-# define RCC_CFGR_SWS_PLL (3 << RCC_CFGR_SWS_SHIFT) /* 10: PLL used as system clock */
+# define RCC_CFGR_SWS_MSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: MSI oscillator used as system clock */
+# define RCC_CFGR_SWS_HSI (1 << RCC_CFGR_SWS_SHIFT) /* 01: HSI oscillator used as system clock */
+# define RCC_CFGR_SWS_HSE (2 << RCC_CFGR_SWS_SHIFT) /* 10: HSE oscillator used as system clock */
+# define RCC_CFGR_SWS_PLL (3 << RCC_CFGR_SWS_SHIFT) /* 11: PLL used as system clock */
#define RCC_CFGR_HPRE_SHIFT (4) /* Bits 4-7: AHB prescaler */
#define RCC_CFGR_HPRE_MASK (0x0f << RCC_CFGR_HPRE_SHIFT)
diff --git a/arch/arm/src/stm32l4/hardware/stm32l4xrxx_rcc.h b/arch/arm/src/stm32l4/hardware/stm32l4xrxx_rcc.h
index e0fb535040..9a2598f6a1 100644
--- a/arch/arm/src/stm32l4/hardware/stm32l4xrxx_rcc.h
+++ b/arch/arm/src/stm32l4/hardware/stm32l4xrxx_rcc.h
@@ -157,17 +157,17 @@
#define RCC_CFGR_SW_SHIFT (0) /* Bits 0-1: System clock Switch */
#define RCC_CFGR_SW_MASK (3 << RCC_CFGR_SW_SHIFT)
-# define RCC_CFGR_SW_MSI (0 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
-# define RCC_CFGR_SW_HSI (1 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */
-# define RCC_CFGR_SW_HSE (2 << RCC_CFGR_SW_SHIFT) /* 01: HSE selected as system clock */
-# define RCC_CFGR_SW_PLL (3 << RCC_CFGR_SW_SHIFT) /* 10: PLL selected as system clock */
+# define RCC_CFGR_SW_MSI (0 << RCC_CFGR_SW_SHIFT) /* 00: MSI selected as system clock */
+# define RCC_CFGR_SW_HSI (1 << RCC_CFGR_SW_SHIFT) /* 01: HSI selected as system clock */
+# define RCC_CFGR_SW_HSE (2 << RCC_CFGR_SW_SHIFT) /* 10: HSE selected as system clock */
+# define RCC_CFGR_SW_PLL (3 << RCC_CFGR_SW_SHIFT) /* 11: PLL selected as system clock */
#define RCC_CFGR_SWS_SHIFT (2) /* Bits 2-3: System Clock Switch Status */
#define RCC_CFGR_SWS_MASK (3 << RCC_CFGR_SWS_SHIFT)
-# define RCC_CFGR_SWS_MSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
-# define RCC_CFGR_SWS_HSI (1 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */
-# define RCC_CFGR_SWS_HSE (2 << RCC_CFGR_SWS_SHIFT) /* 01: HSE oscillator used as system clock */
-# define RCC_CFGR_SWS_PLL (3 << RCC_CFGR_SWS_SHIFT) /* 10: PLL used as system clock */
+# define RCC_CFGR_SWS_MSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: MSI oscillator used as system clock */
+# define RCC_CFGR_SWS_HSI (1 << RCC_CFGR_SWS_SHIFT) /* 01: HSI oscillator used as system clock */
+# define RCC_CFGR_SWS_HSE (2 << RCC_CFGR_SWS_SHIFT) /* 10: HSE oscillator used as system clock */
+# define RCC_CFGR_SWS_PLL (3 << RCC_CFGR_SWS_SHIFT) /* 11: PLL used as system clock */
#define RCC_CFGR_HPRE_SHIFT (4) /* Bits 4-7: AHB prescaler */
#define RCC_CFGR_HPRE_MASK (0x0f << RCC_CFGR_HPRE_SHIFT)