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Posted to commits@mynewt.apache.org by an...@apache.org on 2019/01/08 12:35:25 UTC
[mynewt-core] branch master updated: pins on P1 need to be properly
configured
This is an automated email from the ASF dual-hosted git repository.
andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new c7afece pins on P1 need to be properly configured
c7afece is described below
commit c7afecee3eba230e9a6420d6bf98e104f0ae9f75
Author: Fabien Lepoutre <fa...@culvertengineering.com>
AuthorDate: Fri Jan 4 15:05:09 2019 -0800
pins on P1 need to be properly configured
---
hw/mcu/nordic/nrf52xxx/src/hal_i2c.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c b/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c
index cb23a0f..dde19ff 100644
--- a/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c
+++ b/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c
@@ -297,8 +297,8 @@ hal_i2c_init(uint8_t i2c_num, void *usercfg)
scl_port = HAL_GPIO_PORT(cfg->scl_pin);
sda_port = HAL_GPIO_PORT(cfg->sda_pin);
- scl_port->PIN_CNF[cfg->scl_pin] = NRF52_SCL_PIN_CONF;
- sda_port->PIN_CNF[cfg->sda_pin] = NRF52_SDA_PIN_CONF;
+ scl_port->PIN_CNF[HAL_GPIO_INDEX(cfg->scl_pin)] = NRF52_SCL_PIN_CONF;
+ sda_port->PIN_CNF[HAL_GPIO_INDEX(cfg->sda_pin)] = NRF52_SDA_PIN_CONF;
regs->PSELSCL = cfg->scl_pin;
regs->PSELSDA = cfg->sda_pin;