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Posted to commits@mynewt.apache.org by GitBox <gi...@apache.org> on 2020/09/21 07:53:01 UTC
[GitHub] [mynewt-nimble] apache-mynewt-bot removed a comment on pull request #859: Enable NimBLE on Dialog CMAC
apache-mynewt-bot removed a comment on pull request #859:
URL: https://github.com/apache/mynewt-nimble/pull/859#issuecomment-686345889
<!-- style-bot -->
## Style check summary
### Our coding style is [here!](https://github.com/apache/mynewt-core/blob/master/CODING_STANDARDS.md)
#### nimble/drivers/dialog_cmac/src/ble_hw.c
<details>
```diff
@@ -258,7 +258,7 @@
: [ptr] "+l" (src)
: [reg] "i" (&CMAC->CM_CRYPTO_KEY_31_0_REG)
: "r1", "r2", "r3", "r4", "memory"
- );
+ );
CMAC->CM_EV_SET_REG = CMAC_CM_EV_SET_REG_EV_CRYPTO_START_Msk;
}
```
</details>
#### nimble/drivers/dialog_cmac/src/ble_phy.c
<details>
```diff
@@ -42,36 +42,36 @@
/* Statistics */
STATS_SECT_START(ble_phy_stats)
- STATS_SECT_ENTRY(phy_isrs)
- STATS_SECT_ENTRY(tx_good)
- STATS_SECT_ENTRY(tx_fail)
- STATS_SECT_ENTRY(tx_late)
- STATS_SECT_ENTRY(tx_bytes)
- STATS_SECT_ENTRY(rx_starts)
- STATS_SECT_ENTRY(rx_aborts)
- STATS_SECT_ENTRY(rx_valid)
- STATS_SECT_ENTRY(rx_crc_err)
- STATS_SECT_ENTRY(rx_late)
- STATS_SECT_ENTRY(radio_state_errs)
- STATS_SECT_ENTRY(rx_hw_err)
- STATS_SECT_ENTRY(tx_hw_err)
+STATS_SECT_ENTRY(phy_isrs)
+STATS_SECT_ENTRY(tx_good)
+STATS_SECT_ENTRY(tx_fail)
+STATS_SECT_ENTRY(tx_late)
+STATS_SECT_ENTRY(tx_bytes)
+STATS_SECT_ENTRY(rx_starts)
+STATS_SECT_ENTRY(rx_aborts)
+STATS_SECT_ENTRY(rx_valid)
+STATS_SECT_ENTRY(rx_crc_err)
+STATS_SECT_ENTRY(rx_late)
+STATS_SECT_ENTRY(radio_state_errs)
+STATS_SECT_ENTRY(rx_hw_err)
+STATS_SECT_ENTRY(tx_hw_err)
STATS_SECT_END
STATS_SECT_DECL(ble_phy_stats) ble_phy_stats;
STATS_NAME_START(ble_phy_stats)
- STATS_NAME(ble_phy_stats, phy_isrs)
- STATS_NAME(ble_phy_stats, tx_good)
- STATS_NAME(ble_phy_stats, tx_fail)
- STATS_NAME(ble_phy_stats, tx_late)
- STATS_NAME(ble_phy_stats, tx_bytes)
- STATS_NAME(ble_phy_stats, rx_starts)
- STATS_NAME(ble_phy_stats, rx_aborts)
- STATS_NAME(ble_phy_stats, rx_valid)
- STATS_NAME(ble_phy_stats, rx_crc_err)
- STATS_NAME(ble_phy_stats, rx_late)
- STATS_NAME(ble_phy_stats, radio_state_errs)
- STATS_NAME(ble_phy_stats, rx_hw_err)
- STATS_NAME(ble_phy_stats, tx_hw_err)
+STATS_NAME(ble_phy_stats, phy_isrs)
+STATS_NAME(ble_phy_stats, tx_good)
+STATS_NAME(ble_phy_stats, tx_fail)
+STATS_NAME(ble_phy_stats, tx_late)
+STATS_NAME(ble_phy_stats, tx_bytes)
+STATS_NAME(ble_phy_stats, rx_starts)
+STATS_NAME(ble_phy_stats, rx_aborts)
+STATS_NAME(ble_phy_stats, rx_valid)
+STATS_NAME(ble_phy_stats, rx_crc_err)
+STATS_NAME(ble_phy_stats, rx_late)
+STATS_NAME(ble_phy_stats, radio_state_errs)
+STATS_NAME(ble_phy_stats, rx_hw_err)
+STATS_NAME(ble_phy_stats, tx_hw_err)
STATS_NAME_END(ble_phy_stats)
#if MYNEWT_VAL(BLE_LL_CFG_FEAT_LE_CODED_PHY)
@@ -103,50 +103,50 @@
(0 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(0 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_TX_DATA_SRC_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos) | \
(g_ble_phy_data.phy_mode_pre_len << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_SIZE_M1_Pos)
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_SIZE_M1_Pos)
#define FIELD_CTRL_REG_TX_ACCESS_ADDR \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EXC_ON_EXP_Pos) | \
(0 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CRC_Pos) | \
(0 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(0 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_TX_DATA_SRC_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos) | \
(31 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_SIZE_M1_Pos)
#define FIELD_CTRL_REG_TX_PAYLOAD \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CRC_Pos) | \
(PHY_WHITENING << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_DMA_MEM_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos);
#define FIELD_CTRL_REG_TX_ENC_PAYLOAD \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CRC_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_DMA_CRYPTO_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos)
#define FIELD_CTRL_REG_TX_MIC \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CRC_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_DMA_CRYPTO_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos)
#define FIELD_CTRL_REG_TX_CRC \
(0 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CRC_Pos) | \
(PHY_WHITENING << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_TX_DATA_SRC_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_LAST_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_MSB_FIRST_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos) | \
(23 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_SIZE_M1_Pos)
#define FIELD_CTRL_REG_RX_ACCESS_ADDR \
@@ -154,7 +154,7 @@
(0 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(0 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_TX_DATA_SRC_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CORR_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos) | \
(31 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_SIZE_M1_Pos)
@@ -162,28 +162,28 @@
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EXC_ON_EXP_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CRC_Pos) | \
(PHY_WHITENING << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_DMA_MEM_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos)
#define FIELD_CTRL_REG_RX_CRC \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CRC_Pos) | \
(PHY_WHITENING << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_LAST_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_MSB_FIRST_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_DMA_MEM_Pos)
#define FIELD_CTRL_REG_RX_PAYLOAD \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_CRC_Pos) | \
(PHY_WHITENING << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_DMA_MEM_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos)
#define FIELD_CTRL_REG_RX_PAYLOAD_WITH_EXC \
FIELD_CTRL_REG_RX_PAYLOAD | \
@@ -193,7 +193,7 @@
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_WHITENING_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_XL_DMA_CRYPTO_Pos) | \
(g_ble_phy_data.phy_mode_evpsym << \
- CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
+ CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_EVPSYMBOL_LUT_Pos) | \
(1 << CMAC_CM_FIELD_PUSH_CTRL_REG_FIELD_VALID_Pos)
/* RF power up/down delays */
@@ -216,16 +216,16 @@
/* Measured and pre-calculated offsets for transitions */
static const uint8_t g_ble_phy_frame_offset_txrx[4] = {
- ((BLE_LL_IFS) - (PHY_DELAY_TX_RX) + (4)), /* 2M/1M */
- ((BLE_LL_IFS) - (PHY_DELAY_TX_RX) + (5)), /* 1M/1M */
- ((BLE_LL_IFS) - (PHY_DELAY_TX_RX) + (4)), /* 2M/2M */
- ((BLE_LL_IFS) - (PHY_DELAY_TX_RX) + (5)), /* 1M/2M */
+ ((BLE_LL_IFS) -(PHY_DELAY_TX_RX) +(4)), /* 2M/1M */
+ ((BLE_LL_IFS) -(PHY_DELAY_TX_RX) +(5)), /* 1M/1M */
+ ((BLE_LL_IFS) -(PHY_DELAY_TX_RX) +(4)), /* 2M/2M */
+ ((BLE_LL_IFS) -(PHY_DELAY_TX_RX) +(5)), /* 1M/2M */
};
static const uint8_t g_ble_phy_frame_offset_rxtx[4] = {
- ((BLE_LL_IFS) - (PHY_DELAY_RX_TX) - (5)), /* 2M/1M */
- ((BLE_LL_IFS) - (PHY_DELAY_RX_TX) - (6)), /* 1M/1M */
- ((BLE_LL_IFS) - (PHY_DELAY_RX_TX) - (3)), /* 2M/2M */
- ((BLE_LL_IFS) - (PHY_DELAY_RX_TX) - (5)), /* 1M/2M */
+ ((BLE_LL_IFS) -(PHY_DELAY_RX_TX) -(5)), /* 2M/1M */
+ ((BLE_LL_IFS) -(PHY_DELAY_RX_TX) -(6)), /* 1M/1M */
+ ((BLE_LL_IFS) -(PHY_DELAY_RX_TX) -(3)), /* 2M/2M */
+ ((BLE_LL_IFS) -(PHY_DELAY_RX_TX) -(5)), /* 1M/2M */
};
/* packet start offsets (in usecs) */
@@ -264,8 +264,7 @@
#if MYNEWT_VAL(BLE_LL_CFG_FEAT_LE_ENCRYPTION)
/* Encryption related variables */
-struct ble_phy_encrypt_obj
-{
+struct ble_phy_encrypt_obj {
uint8_t key[16];
uint8_t b0[16];
uint8_t b1[16];
@@ -288,7 +287,7 @@
/* Channel index to RF channel mapping */
static const uint8_t g_ble_phy_chan_to_rf[BLE_PHY_NUM_CHANS] = {
- 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, /* 0-9 */
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, /* 0-9 */
11, 13, 14, 15, 16, 17, 18, 19, 20, 21, /* 10-19 */
22, 23, 24, 25, 26, 27, 28, 29, 30, 31, /* 20-29 */
32, 33, 34, 35, 36, 37, 38, 0, 12, 39, /* 30-39 */
@@ -384,7 +383,8 @@
MCU_DIAG_SER('f');
}
-void SW_MAC_IRQHandler(void)
+void
+SW_MAC_IRQHandler(void)
{
uint8_t exc;
int rc;
@@ -571,7 +571,7 @@
* timer wrapped the 11 bits and we need to adjust the LL timer value.
*/
llt_10_0_mask = (CMAC_CM_TS1_REG_TS1_TIMER1_9_0_Msk |
- CMAC_CM_TS1_REG_TS1_TIMER1_10_Msk);
+ CMAC_CM_TS1_REG_TS1_TIMER1_10_Msk);
timestamp &= llt_10_0_mask;
llt_10_0 = llt32 & llt_10_0_mask;
llt32 &= ~llt_10_0_mask;
@@ -675,7 +675,7 @@
ble_phy_rx_setup_fields();
} else {
CMAC->CM_EV_LINKUP_REG = CMAC_CM_EV_LINKUP_REG_LU_PHY_TO_IDLE_2_EXC_Msk |
- CMAC_CM_EV_LINKUP_REG_LU_FRAME_START_2_NONE_Msk;
+ CMAC_CM_EV_LINKUP_REG_LU_FRAME_START_2_NONE_Msk;
}
if (g_ble_phy_data.txend_cb) {
@@ -1037,13 +1037,13 @@
{
#if (BLE_LL_BT5_PHY_SUPPORTED == 1)
switch (g_ble_phy_data.phy_mode_cur) {
- case BLE_PHY_MODE_1M:
- return BLE_PHY_1M;
- case BLE_PHY_MODE_2M:
- return BLE_PHY_2M;
- default:
- assert(0);
- return -1;
+ case BLE_PHY_MODE_1M:
+ return BLE_PHY_1M;
+ case BLE_PHY_MODE_2M:
+ return BLE_PHY_2M;
+ default:
+ assert(0);
+ return -1;
}
#else
return BLE_PHY_1M;
@@ -1110,10 +1110,10 @@
" adds %[src], %[src], r4 \n"
" adds %[dst], %[dst], r4 \n"
: [dst] "+l" (dst), [src] "+l" (src),
- [len] "+l" (copy_len)
+ [len] "+l" (copy_len)
:
: "r3", "r4", "memory"
- );
+ );
if ((rem_len < 4) && (block_rem_len >= rem_len)) {
break;
@@ -1135,7 +1135,7 @@
: [len] "+l" (rem_len)
: [dst] "l" (dst), [src] "l" (src)
: "r3", "memory"
- );
+ );
/* Copy header */
memcpy(BLE_MBUF_HDR_PTR(rxpdu), &g_ble_phy_data.rxhdr,
@@ -1555,10 +1555,10 @@
CMAC->CM_CRYPTO_CTRL_REG = CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_SW_REQ_ABORT_Msk;
CMAC->CM_CRYPTO_CTRL_REG = CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_IN_SEL_Msk |
- CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_CTR_MAC_EN_Msk |
- CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_CTR_PLD_EN_Msk |
- CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_AUTH_EN_Msk |
- CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_ENC_DECN_Msk;
+ CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_CTR_MAC_EN_Msk |
+ CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_CTR_PLD_EN_Msk |
+ CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_AUTH_EN_Msk |
+ CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_ENC_DECN_Msk;
/* Start crypto */
CMAC->CM_EV_SET_REG = CMAC_CM_EV_SET_REG_EV_CRYPTO_START_Msk;
@@ -1575,12 +1575,12 @@
/* XXX: should we check for busy? */
/* XXX: might not be needed, but for now terminate any crypto operations. */
- //CMAC->CM_CRYPTO_CTRL_REG = CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_SW_REQ_ABORT_Msk;
+ /*CMAC->CM_CRYPTO_CTRL_REG = CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_SW_REQ_ABORT_Msk; */
CMAC->CM_CRYPTO_CTRL_REG = CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_OUT_SEL_Msk |
- CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_CTR_MAC_EN_Msk |
- CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_CTR_PLD_EN_Msk |
- CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_AUTH_EN_Msk;
+ CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_CTR_MAC_EN_Msk |
+ CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_CTR_PLD_EN_Msk |
+ CMAC_CM_CRYPTO_CTRL_REG_CM_CRYPTO_AUTH_EN_Msk;
/* Start crypto */
CMAC->CM_EV_SET_REG = CMAC_CM_EV_SET_REG_EV_CRYPTO_START_Msk;
```
</details>
#### nimble/transport/dialog_cmac/cmac_driver/diag/src/cmac_diag.c
<details>
```diff
@@ -48,16 +48,16 @@
void
cmac_diag_setup_cmac(void)
{
- MCU_DIAG_MAP( 0, 4, DSER);
- MCU_DIAG_MAP( 1, 6, CMAC_ON_ERROR);
- MCU_DIAG_MAP( 2, 2, PHY_TX_EN);
- MCU_DIAG_MAP( 3, 2, PHY_RX_EN);
- MCU_DIAG_MAP( 4, 2, PHY_TXRX_DATA_COMB);
- MCU_DIAG_MAP( 5, 2, PHY_TXRX_DATA_EN_COMB);
- MCU_DIAG_MAP( 6, 5, EV1US_FRAME_START);
- MCU_DIAG_MAP( 7, 5, EV_BS_START);
- MCU_DIAG_MAP( 8, 5, EV1C_BS_STOP);
- MCU_DIAG_MAP( 9, 5, EV1US_PHY_TO_IDLE);
+ MCU_DIAG_MAP(0, 4, DSER);
+ MCU_DIAG_MAP(1, 6, CMAC_ON_ERROR);
+ MCU_DIAG_MAP(2, 2, PHY_TX_EN);
+ MCU_DIAG_MAP(3, 2, PHY_RX_EN);
+ MCU_DIAG_MAP(4, 2, PHY_TXRX_DATA_COMB);
+ MCU_DIAG_MAP(5, 2, PHY_TXRX_DATA_EN_COMB);
+ MCU_DIAG_MAP(6, 5, EV1US_FRAME_START);
+ MCU_DIAG_MAP(7, 5, EV_BS_START);
+ MCU_DIAG_MAP(8, 5, EV1C_BS_STOP);
+ MCU_DIAG_MAP(9, 5, EV1US_PHY_TO_IDLE);
MCU_DIAG_MAP(10, 9, CALLBACK_IRQ);
MCU_DIAG_MAP(11, 9, FIELD_IRQ);
MCU_DIAG_MAP(12, 9, FRAME_IRQ);
```
</details>
#### nimble/transport/dialog_cmac/cmac_driver/include/cmac_driver/cmac_shared.h
<details>
```diff
@@ -44,8 +44,7 @@
*/
#define CMAC_RAND_BUF_ELEMS (16)
-struct cmac_rand
-{
+struct cmac_rand {
int cmr_active;
int cmr_in;
int cmr_out;
```
</details>
#### nimble/transport/dialog_cmac/cmac_driver/src/cmac_host.c
<details>
```diff
@@ -92,7 +92,7 @@
assert_file = cd->assert_file + MCU_MEM_SYSRAM_START_ADDRESS +
MEMCTRL->CMI_CODE_BASE_REG;
console_printf(" %s:%d\n", assert_file,
- (unsigned)cd->assert_line);
+ (unsigned)cd->assert_line);
}
}
console_printf(" 0x%08lx CM_ERROR_REG\n", cd->CM_ERROR_REG);
@@ -102,7 +102,9 @@
/* Spin if debugger is connected to CMAC to avoid resetting it */
if (cd->CM_STAT_REG & 0x20) {
- for (;;);
+ for (;;) {
+ ;
+ }
}
#endif
/* XXX CMAC is in error state, need to recover */
@@ -197,7 +199,7 @@
#if MYNEWT_VAL(CMAC_DEBUG_SWD_ENABLE)
/* Enable CMAC debugger */
- CRG_TOP->SYS_CTRL_REG |= 0x40; //CRG_TOP_SYS_CTRL_REG_CMAC_DEBUGGER_ENABLE_Msk;
+ CRG_TOP->SYS_CTRL_REG |= 0x40; /*CRG_TOP_SYS_CTRL_REG_CMAC_DEBUGGER_ENABLE_Msk; */
#endif
/*
```
</details>
#### nimble/transport/dialog_cmac/cmac_driver/src/cmac_mbox.c
<details>
```diff
@@ -85,7 +85,8 @@
rd_off += len;
chunk -= len;
- };
+ }
+ ;
mbox->rd_off = rd_off == mbox_size ? 0 : rd_off;
} while ((mbox->rd_off != mbox->wr_off) && (len >= 0));
```
</details>
#### nimble/transport/dialog_cmac/src/ble_hci_cmac_common.c
<details>
```diff
@@ -38,7 +38,7 @@
#endif
#define POOL_ACL_BLOCK_SIZE \
- OS_ALIGN(MYNEWT_VAL(BLE_ACL_BUF_SIZE) + \
+ OS_ALIGN(MYNEWT_VAL(BLE_ACL_BUF_SIZE) + \
BLE_MBUF_MEMBLOCK_OVERHEAD + \
BLE_HCI_DATA_HDR_SZ, OS_ALIGNMENT)
@@ -87,7 +87,7 @@
if (buf) {
break;
}
- /* no break */
+ /* no break */
case BLE_HCI_TRANS_BUF_EVT_LO:
buf = os_memblock_get(&ble_hci_pool_evt_lo_mempool);
break;
```
</details>
#### nimble/transport/dialog_cmac/src/ble_hci_trans_h4.c
<details>
```diff
@@ -283,7 +283,7 @@
ble_hci_trans_h4_rxs_start(rxs, ib.buf[0]);
ble_hci_trans_h4_ib_adjust(&ib, 1);
rxs->state = RXS_STATE_W4_HEADER;
- /* no break */
+ /* no break */
case RXS_STATE_W4_HEADER:
rc = ble_hci_trans_h4_rx_state_w4_header(rxs, &ib);
@@ -291,7 +291,7 @@
break;
}
rxs->state = RXS_STATE_W4_PAYLOAD;
- /* no break */
+ /* no break */
case RXS_STATE_W4_PAYLOAD:
rc = ble_hci_trans_h4_rx_state_w4_payload(rxs, &ib);
@@ -299,7 +299,7 @@
break;
}
rxs->state = RXS_STATE_COMPLETED;
- /* no break */
+ /* no break */
case RXS_STATE_COMPLETED:
ble_hci_trans_h4_rx_state_completed(rxs, frame_cb);
```
</details>
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