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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/02/13 08:32:47 UTC

[incubator-nuttx] 02/03: b-u585i-iot02a: Board Support

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit 6086f42bfb0dfe946ddd3393fd1c76fb7f73468a
Author: Michael Jung <mi...@gmx.net>
AuthorDate: Sat Feb 12 08:23:02 2022 +0100

    b-u585i-iot02a: Board Support
    
    Support for the STMicroelectronics B-U585I-IOT02A development board. This
    is a proof-of-concept port that demonstrates running NuttX as the
    Non-Secure TrustZone domain companion to TrustedFirmware-M.
    
    Signed-off-by: Michael Jung <mi...@gmx.net>
---
 boards/Kconfig                                     |  14 +-
 boards/arm/stm32u5/b-u585i-iot02a/Kconfig          |   8 +
 boards/arm/stm32u5/b-u585i-iot02a/README.txt       | 143 +++++++++++++
 .../stm32u5/b-u585i-iot02a/configs/nsh/defconfig   |  69 +++++++
 boards/arm/stm32u5/b-u585i-iot02a/include/board.h  | 222 +++++++++++++++++++++
 .../arm/stm32u5/b-u585i-iot02a/scripts/Make.defs   |  63 ++++++
 .../arm/stm32u5/b-u585i-iot02a/scripts/tfm-ns.ld   | 114 +++++++++++
 boards/arm/stm32u5/b-u585i-iot02a/src/.gitignore   |   2 +
 boards/arm/stm32u5/b-u585i-iot02a/src/Makefile     |  34 ++++
 .../stm32u5/b-u585i-iot02a/src/b-u585i-iot02a.h    | 101 ++++++++++
 .../arm/stm32u5/b-u585i-iot02a/src/stm32_appinit.c |  71 +++++++
 boards/arm/stm32u5/b-u585i-iot02a/src/stm32_boot.c |  81 ++++++++
 .../arm/stm32u5/b-u585i-iot02a/src/stm32_bringup.c |  80 ++++++++
 .../stm32u5/b-u585i-iot02a/src/stm32_clockconfig.c |  48 +++++
 boards/arm/stm32u5/b-u585i-iot02a/src/stm32_spi.c  | 184 +++++++++++++++++
 boards/arm/stm32u5/drivers/Kconfig                 |   4 +
 16 files changed, 1237 insertions(+), 1 deletion(-)

diff --git a/boards/Kconfig b/boards/Kconfig
index 184f862..c8dec96 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -1967,7 +1967,7 @@ config ARCH_BOARD_B_L072Z_LRWAN1
 		STMicro STM32L0 Discovery kit with LoRa/SigFox based on STM32L072CZ MCU.
 
 config ARCH_BOARD_B_L475E_IOT01A
-	bool "STMicro IoT Discovery kit"
+	bool "STMicro IoT Discovery kit (B-L475E-IOT01A)"
 	depends on ARCH_CHIP_STM32L475VG
 	select ARCH_HAVE_LEDS
 	---help---
@@ -1975,6 +1975,14 @@ config ARCH_BOARD_B_L475E_IOT01A
 		MCU. The STM32L475VG is a Cortex-M4 optimised for low-power operation
 		at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
 
+config ARCH_BOARD_B_U585I_IOT02A
+	bool "STMicro IoT Discovery kit (B-U585-IOT02A)"
+	depends on ARCH_CHIP_STM32U585AI
+	---help---
+		STMicro IoT development board featuring the STM32U585AI
+		MCU. The STM32U585AI is a Cortex-M33 optimised for low-power operation
+		at up to 160MHz operation with 2048Kb Flash memory and 768Kb SRAM.
+
 config ARCH_BOARD_STM32L476VG_DISCO
 	bool "STMicro STM32L476VG -Discovery board"
 	depends on ARCH_CHIP_STM32L476RG
@@ -2582,6 +2590,7 @@ config ARCH_BOARD
 	default "nucleo-g431rb"            if ARCH_BOARD_NUCLEO_G431RB
 	default "b-l072z-lrwan1"           if ARCH_BOARD_B_L072Z_LRWAN1
 	default "b-l475e-iot01a"           if ARCH_BOARD_B_L475E_IOT01A
+	default "b-u585i-iot02a"           if ARCH_BOARD_B_U585I_IOT02A
 	default "stm32l476vg-disco"        if ARCH_BOARD_STM32L476VG_DISCO
 	default "stm32l476-mdk"            if ARCH_BOARD_STM32L476_MDK
 	default "stm32l4r9ai-disco"        if ARCH_BOARD_STM32L4R9AI_DISCO
@@ -2985,6 +2994,9 @@ endif
 if ARCH_BOARD_B_L475E_IOT01A
 source "boards/arm/stm32l4/b-l475e-iot01a/Kconfig"
 endif
+if ARCH_BOARD_B_U585I_IOT02A
+source "boards/arm/stm32u5/b-u585i-iot02a/Kconfig"
+endif
 if ARCH_BOARD_NUCLEO_L432KC
 source "boards/arm/stm32l4/nucleo-l432kc/Kconfig"
 endif
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/Kconfig b/boards/arm/stm32u5/b-u585i-iot02a/Kconfig
new file mode 100644
index 0000000..393258d
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_B_U585I_IOT02A
+
+endif
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/README.txt b/boards/arm/stm32u5/b-u585i-iot02a/README.txt
new file mode 100644
index 0000000..8a37659
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/README.txt
@@ -0,0 +1,143 @@
+B-U585I-IOT02A README
+======================
+
+  This README file discusses the port of NuttX to the STMicroelectronics
+  B-U585I-IOT02A board.  That board features the STM32U585AII6QU MCU with 2MiB
+  of Flash and 768KiB of SRAM.
+
+  This port is a proof-of-concept to demonstrate running NuttX in the Non-
+  Secure TrustZone domain as a companion to TrustedFirmware-M (TFM).  Running
+  NuttX on the B-U585I-IOT02A without TFM is currently not supported.
+
+Contents
+========
+
+  - Status
+  - Serial Console
+  - Configurations
+
+Status
+======
+  2022-02-13: With TrustedFirmware-M from STM32CubeU5 and signing the Apache
+    NuttX binary image to get a tfm_ns_init.bin, the board now boots and the
+    basic NSH configuration works with Apache NuttX as the OS running in the
+    non-secure world.
+
+Clock Source
+============
+
+  Only the low speed external (LSE) 32.768kHz crystal (X2) is installed in
+  default configurations.
+
+    FUNC      GPIO
+    --------- ----
+    OSC32_IN  PC14
+    OSC32_OUT PC15
+    --------- ----
+
+Arduino Connector
+=================
+
+  CN13 / SPI1 / D10 - D13
+
+    FUNC      GPIO
+    --------- ----
+    SPI1_NSS  PE12
+    SPI1_SCK  PE13
+    SPI1_MISO PE14
+    SPI1_MOSI PE15
+    --------- ----
+
+Serial Consoles
+===============
+
+  Virtual COM Port on USART1
+  --------------------------
+
+  Default board is configured to use USART1 as console.  USART1 is connected
+  to the ST-LINKV3E Virtual COM port as well as made available on connector
+  CN9.
+
+  Pins and Connectors:
+
+    FUNC GPIO   Connector
+                Pin    NAME
+    ---- ----   ------ --------
+    TXD: PA9    CN9 14 T.VCP_TX
+    RXD: PA10   CN9 13 T.VCP_RX
+    ---- ----   ------ --------
+
+Configurations
+==============
+
+  Information Common to All Configurations
+  ----------------------------------------
+  Each configuration is maintained in a sub-directory and can be
+  selected as follow:
+
+    tools/configure.sh b-u585i-iot02a:<subdir>
+
+  Before building, make sure the PATH environment variable includes the
+  correct path to the directory than holds your toolchain binaries.
+
+  And then build NuttX by simply typing the following.  At the conclusion of
+  the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
+
+    make oldconfig
+    make
+
+  The <subdir> that is provided above as an argument to the tools/configure.sh
+  must be is one of the following.
+
+  NOTES:
+
+    1. These configurations use the mconf-based configuration tool.  To
+      change any of these configurations using that tool, you should:
+
+      a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+         see additional README.txt files in the NuttX tools repository.
+
+      b. Execute 'make menuconfig' in nuttx/ in order to start the
+         reconfiguration process.
+
+    2. Unless stated otherwise, all configurations generate console
+       output on USART3, as described above under "Serial Console".  The
+       elevant configuration settings are listed below:
+
+         CONFIG_STM32L5_USART3=y
+         CONFIG_STM32L5_USART3_SERIALDRIVER=y
+         CONFIG_STM32L5_USART=y
+
+         CONFIG_USART3_SERIALDRIVER=y
+         CONFIG_USART3_SERIAL_CONSOLE=y
+
+         CONFIG_USART3_RXBUFSIZE=256
+         CONFIG_USART3_TXBUFSIZE=256
+         CONFIG_USART3_BAUD=115200
+         CONFIG_USART3_BITS=8
+         CONFIG_USART3_PARITY=0
+         CONFIG_USART3_2STOP=0
+
+  3. All of these configurations are set up to build under Linux using the
+     "GNU Tools for ARM Embedded Processors" that is maintained by ARM
+     (unless stated otherwise in the description of the configuration).
+
+       https://developer.arm.com/open-source/gnu-toolchain/gnu-rm
+
+     That toolchain selection can easily be reconfigured using
+     'make menuconfig'.  Here are the relevant current settings:
+
+     Build Setup:
+       CONFIG_HOST_LINUX=y                 : Linux environment
+
+     System Type -> Toolchain:
+       CONFIG_ARMV8M_TOOLCHAIN_GNU_EABIL=y : GNU ARM EABI toolchain
+
+  Configuration sub-directories
+  -----------------------------
+
+  nsh:
+
+    Configures the NuttShell (nsh) located at examples/nsh.  This
+    configuration is focused on low level, command-line driver testing.
+
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig b/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig
new file mode 100644
index 0000000..7a6f93f
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig
@@ -0,0 +1,69 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDPARMS is not set
+# CONFIG_STANDARD_SERIAL is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="b-u585i-iot02a"
+CONFIG_ARCH_BOARD_B_U585I_IOT02A=y
+CONFIG_ARCH_BOARD_STM32U5_CUSTOM_CLOCKCONFIG=y
+CONFIG_ARCH_CHIP="stm32u5"
+CONFIG_ARCH_CHIP_STM32U585AI=y
+CONFIG_ARCH_CHIP_STM32U5=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_TRUSTZONE_NONSECURE=y
+CONFIG_ARMV8M_LAZYFPU=y
+CONFIG_ARMV8M_TOOLCHAIN_BUILDROOT=y
+CONFIG_ARMV8M_USEBASEPRI=y
+CONFIG_BOARD_LOOPSPERMSEC=4230
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_ASSERTIONS=y
+CONFIG_DEBUG_CONTACTLESS=y
+CONFIG_DEBUG_CONTACTLESS_ERROR=y
+CONFIG_DEBUG_CONTACTLESS_INFO=y
+CONFIG_DEBUG_CONTACTLESS_WARN=y
+CONFIG_DEBUG_ERROR=y
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEBUG_WARN=y
+CONFIG_DRIVERS_CONTACTLESS=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_INIT_ENTRYNAME="nsh"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INPUT=y
+CONFIG_LIBM=y
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=131072
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_STACK_COLORATION=y
+CONFIG_STM32U5_PWR=y
+CONFIG_STM32U5_SPI1=y
+CONFIG_STM32U5_SRAM1=y
+CONFIG_STM32U5_SRAM3=y
+CONFIG_STM32U5_SRAM4=y
+CONFIG_STM32U5_USART1=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_SPITOOL=y
+CONFIG_SYSTEM_STACKMONITOR=y
+CONFIG_SYSTEM_TEE=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART1_SERIAL_CONSOLE=y
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/include/board.h b/boards/arm/stm32u5/b-u585i-iot02a/include/board.h
new file mode 100644
index 0000000..81a6972
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/include/board.h
@@ -0,0 +1,222 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/include/board.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32U5_B_U585I_IOT02A_INCLUDE_BOARD_H
+#define __BOARDS_ARM_STM32U5_B_U585I_IOT02A_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <stm32_gpio.h>
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* The B-U585I-IOT02A board supports both HSE and LSE crystals (X1 and X2).
+ * However, as shipped, the X1 crystal is not populated.  Therefore the board
+ * will need to run off the 32kHz-sync'ed MSIS.
+ *
+ *   System Clock source : PLL (MSIS)
+ *   SYSCLK(Hz)          : 160000000   Determined by PLL configuration
+ *   HCLK(Hz)            : 160000000    (STM32_RCC_CFGR_HPRE)  (Max 160MHz)
+ *   AHB Prescaler       : 1            (STM32_RCC_CFGR_HPRE)  (Max 160MHz)
+ *   APB1 Prescaler      : 1            (STM32_RCC_CFGR_PPRE1) (Max 160MHz)
+ *   APB2 Prescaler      : 1            (STM32_RCC_CFGR_PPRE2) (Max 160MHz)
+ *   APB3 Prescaler      : 1            (STM32_RCC_CFGR_PPRE2) (Max 160MHz)
+ *   MSIS Frequency(Hz)  : 4000000      (nominal)
+ *   MSIK Frequency(Hz)  : 4000000      (nominal)
+ *   PLL_MBOOST          : 1
+ *   PLLM                : 1            (STM32_PLLCFG_PLLM)
+ *   PLLN                : 80           (STM32_PLLCFG_PLLN)
+ *   PLLP                : 2            (STM32_PLLCFG_PLLP)
+ *   PLLQ                : 2            (STM32_PLLCFG_PLLQ)
+ *   PLLR                : 2            (STM32_PLLCFG_PLLR)
+ *   Flash Latency(WS)   : 4
+ */
+
+/* HSI - 16 MHz RC factory-trimmed
+ * LSI - 32 KHz RC
+ * MSI - 4 MHz, autotrimmed via LSE
+ * HSE - not installed
+ * LSE - 32.768 kHz installed
+ */
+
+#define STM32_HSI_FREQUENCY     16000000ul
+#define STM32_LSI_FREQUENCY     32000
+#define STM32_LSE_FREQUENCY     32768
+
+#define STM32_BOARD_USEMSI      1
+#define STM32_BOARD_MSIRANGE    RCC_CR_MSIRANGE_4M
+
+/* prescaler common to all PLL inputs */
+
+#define STM32_PLLCFG_PLLM             RCC_PLLCFG_PLLM(1)
+
+/* 'main' PLL config; we use this to generate our system clock */
+
+#define STM32_PLLCFG_PLLN             RCC_PLLCFG_PLLN(55)
+#define STM32_PLLCFG_PLLP             0
+#undef  STM32_PLLCFG_PLLP_ENABLED
+#define STM32_PLLCFG_PLLQ             0
+#undef STM32_PLLCFG_PLLQ_ENABLED
+#define STM32_PLLCFG_PLLR             RCC_PLLCFG_PLLR_2
+#define STM32_PLLCFG_PLLR_ENABLED
+
+/* 'SAIPLL1' is not used in this application */
+
+#define STM32_PLLSAI1CFG_PLLN         RCC_PLLSAI1CFG_PLLN(24)
+#define STM32_PLLSAI1CFG_PLLP         0
+#undef  STM32_PLLSAI1CFG_PLLP_ENABLED
+#define STM32_PLLSAI1CFG_PLLQ         0
+#undef STM32_PLLSAI1CFG_PLLQ_ENABLED
+#define STM32_PLLSAI1CFG_PLLR         0
+#undef  STM32_PLLSAI1CFG_PLLR_ENABLED
+
+/* 'SAIPLL2' is not used in this application */
+
+#define STM32_PLLSAI2CFG_PLLN         RCC_PLLSAI2CFG_PLLN(8)
+#define STM32_PLLSAI2CFG_PLLP         0
+#undef  STM32_PLLSAI2CFG_PLLP_ENABLED
+#define STM32_PLLSAI2CFG_PLLR         0
+#undef  STM32_PLLSAI2CFG_PLLR_ENABLED
+
+#define STM32_SYSCLK_FREQUENCY  160000000ul
+
+/* Enable CLK48; get it from HSI48 */
+
+#if defined(CONFIG_STM32U5_USBFS) || defined(CONFIG_STM32U5_RNG)
+#  define STM32_USE_CLK48       1
+#  define STM32_CLK48_SEL       RCC_CCIPR_CLK48SEL_HSI48
+#  define STM32_HSI48_SYNCSRC   SYNCSRC_NONE
+#endif
+
+/* Enable LSE (for the RTC and for MSI autotrimming) */
+
+#define STM32_USE_LSE           1
+
+/* Configure the HCLK divisor (for the AHB bus, core, memory, and DMA */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK      /* HCLK  = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY    STM32_SYSCLK_FREQUENCY
+
+/* Configure the APB1 prescaler */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLK       /* PCLK1 = HCLK / 1 */
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY / 1)
+
+#define STM32_APB1_TIM2_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (STM32_PCLK1_FREQUENCY)
+
+/* Configure the APB2 prescaler */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLK       /* PCLK2 = HCLK / 1 */
+#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY / 1)
+
+#define STM32_APB2_TIM1_CLKIN   (STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM15_CLKIN  (STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM16_CLKIN  (STM32_PCLK2_FREQUENCY)
+
+/* The timer clock frequencies are automatically defined by hardware.  If the
+ * APB prescaler equals 1, the timer clock frequencies are set to the same
+ * frequency as that of the APB domain. Otherwise they are set to twice.
+ * Note: TIM1,15,16 are on APB2, others on APB1
+ */
+
+#define BOARD_TIM1_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM3_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM4_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM5_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM6_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM7_FREQUENCY    STM32_HCLK_FREQUENCY
+#define BOARD_TIM15_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_TIM16_FREQUENCY   STM32_HCLK_FREQUENCY
+#define BOARD_LPTIM1_FREQUENCY  STM32_HCLK_FREQUENCY
+#define BOARD_LPTIM2_FREQUENCY  STM32_HCLK_FREQUENCY
+
+/* DMA Channel/Stream Selections ********************************************/
+
+/* Alternate function pin selections ****************************************/
+
+/* USART1: Connected to STLink VCP and to CN9. */
+
+#define GPIO_USART1_RX   GPIO_USART1_RX_1    /* PA10 */
+#define GPIO_USART1_TX   GPIO_USART1_TX_1    /* PA9  */
+
+/* SPI1: Arduino Connector CN13 */
+
+#define GPIO_SPI1_NSS   (GPIO_OUTPUT|GPIO_SPEED_2MHZ| \
+                         GPIO_PUSHPULL|GPIO_OUTPUT_SET| \
+                         GPIO_PORTE|GPIO_PIN12)             /* PE12 */
+#define GPIO_SPI1_SCK   (GPIO_SPI1_SCK_4|GPIO_SPEED_25MHZ)  /* PE13 */
+#define GPIO_SPI1_MISO  (GPIO_SPI1_MISO_4)                  /* PE14 */
+#define GPIO_SPI1_MOSI  (GPIO_SPI1_MOSI_4|GPIO_SPEED_25MHZ) /* PE15 */
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_board_initialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.
+ *   This entry point is called early in the initialization -- after all
+ *   memory has been configured and mapped but before any devices
+ *   have been initialized.
+ *
+ ****************************************************************************/
+
+void stm32_board_initialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __BOARDS_ARM_STM32U5_B_U585I_IOT02A_INCLUDE_BOARD_H */
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/scripts/Make.defs b/boards/arm/stm32u5/b-u585i-iot02a/scripts/Make.defs
new file mode 100644
index 0000000..ea473aa
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/scripts/Make.defs
@@ -0,0 +1,63 @@
+##############################################################################
+# boards/arm/stm32u5/nucleo-l552ze/scripts/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+##############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv8-m/Toolchain.defs
+
+ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
+  ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)tfm-ns.ld}"
+else
+  ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)tfm-ns.ld
+endif
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+# enable precise stack overflow tracking
+ifeq ($(CONFIG_ARMV8M_STACKCHECK),y)
+  INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) $(INSTRUMENTATIONDEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) $(INSTRUMENTATIONDEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS := $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/scripts/tfm-ns.ld b/boards/arm/stm32u5/b-u585i-iot02a/scripts/tfm-ns.ld
new file mode 100644
index 0000000..347ffc3
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/scripts/tfm-ns.ld
@@ -0,0 +1,114 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/scripts/tfm-ns.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* This linker script supports running NuttX in  the 'Non-Secure' (ns) domain
+ * in conjunction with TrustedFirmware-M (tfm).
+ *
+ * NuttX will run as the 'Non secure application' in the 'Non-Secure image
+ * primary primary slot Area 1' in internal flash.  Compare [UM2851],
+ * Figure 7.  Furthermore, see Figure 18 for the SRAM1 area used for 'Non-
+ * Secure application volatile data'
+ *
+ * While the 'Non-Secure Image primary slot Area 1' is actually 640KiB large
+ * in the referenced setup, the image will be enriched with a header of 0x400
+ * bytes and a trailer of 0x2000 bytes.  Thus the 'flash' statement in the
+ * MEMORY definition below.
+ *
+ * References
+ * [UM2851] STMicroelectronics. UM2851: Getting started with STM32CubeU5 TFM
+ * application, Rev 1, June 2021
+ */
+
+MEMORY
+{
+  flash (rx) : ORIGIN = 0x08052400, LENGTH = 0x9DC00
+  sram (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > flash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > flash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > flash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > flash
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > sram AT > flash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = ABSOLUTE(.);
+    } > sram
+
+    /* Stabs debugging sections. */
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/src/.gitignore b/boards/arm/stm32u5/b-u585i-iot02a/src/.gitignore
new file mode 100644
index 0000000..726d936
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/src/.gitignore
@@ -0,0 +1,2 @@
+/.depend
+/Make.dep
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/src/Makefile b/boards/arm/stm32u5/b-u585i-iot02a/src/Makefile
new file mode 100644
index 0000000..79db7e3
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/src/Makefile
@@ -0,0 +1,34 @@
+##############################################################################
+# boards/arm/stm32u5/b-u585i-iot02a/src/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+##############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c
+
+ifeq ($(CONFIG_BOARDCTL),y)
+CSRCS += stm32_appinit.c
+endif
+
+ifeq ($(CONFIG_ARCH_BOARD_STM32U5_CUSTOM_CLOCKCONFIG),y)
+CSRCS += stm32_clockconfig.c
+endif
+
+include $(TOPDIR)/boards/Board.mk
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/src/b-u585i-iot02a.h b/boards/arm/stm32u5/b-u585i-iot02a/src/b-u585i-iot02a.h
new file mode 100644
index 0000000..b8580c1
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/src/b-u585i-iot02a.h
@@ -0,0 +1,101 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/src/b-u585i-iot02a.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32U5_B_U585I_IOT02A_SRC_B_U585I_IOT02A_H
+#define __BOARDS_ARM_STM32U5_B_U585I_IOT02A_SRC_B_U585I_IOT02A_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+#include "stm32_gpio.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#define HAVE_PROC             1
+#define HAVE_RTC_DRIVER       1
+
+#if !defined(CONFIG_FS_PROCFS)
+#  undef HAVE_PROC
+#endif
+
+#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
+#  warning Mountpoints disabled.  No procfs support
+#  undef HAVE_PROC
+#endif
+
+/* Check if we can support the RTC driver */
+
+#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER)
+#  undef HAVE_RTC_DRIVER
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Function Declarations
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI
+void stm32_spidev_initialize(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y :
+ *     Called from board_late_initialize().
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_ARM_STM32U5_B_U585I_IOT02A_SRC_B_U585I_IOT02A_H */
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_appinit.c b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_appinit.c
new file mode 100644
index 0000000..4ae5325
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_appinit.c
@@ -0,0 +1,71 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/src/stm32_appinit.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include "b-u585i-iot02a.h"
+
+#include <nuttx/board.h>
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initialization logic and the
+ *         matching application logic.  The value cold be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+  /* Did we already initialize via board_late_initialize()? */
+
+#ifndef CONFIG_BOARD_LATE_INITIALIZE
+  return stm32_bringup();
+#else
+  return OK;
+#endif
+}
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_boot.c b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_boot.c
new file mode 100644
index 0000000..df04b1c
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_boot.c
@@ -0,0 +1,81 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/src/stm32_boot.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/board.h>
+
+#include "arm_arch.h"
+#include "b-u585i-iot02a.h"
+
+#include <arch/board/board.h>
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_board_initialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This
+ *   entry point is called early in the initialization -- after all memory
+ *   has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void stm32_board_initialize(void)
+{
+#ifdef CONFIG_SPI
+  /* Configure SPI chip selects */
+
+  stm32_spidev_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_late_initialize().  board_late_initialize() will
+ *   be called immediately after up_initialize() is called and just before
+ *   the initial application is started.  This additional initialization
+ *   phase may be used, for example, to initialize board-specific device
+ *   drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+  /* Perform board-specific initialization here if so configured */
+
+  (void)stm32_bringup();
+}
+#endif
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_bringup.c b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_bringup.c
new file mode 100644
index 0000000..c328554
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_bringup.c
@@ -0,0 +1,80 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/src/stm32_bringup.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/mount.h>
+#include <sys/types.h>
+#include <debug.h>
+
+#include <nuttx/input/buttons.h>
+#include <nuttx/leds/userled.h>
+#include <nuttx/spi/spi_transfer.h>
+#include <nuttx/board.h>
+
+#include "b-u585i-iot02a.h"
+
+#include <arch/board/board.h>
+
+#include <stm32_spi.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y :
+ *     Called from board_late_initialize().
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void)
+{
+  int ret;
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = mount(NULL, "/proc", "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      ferr("ERROR: Failed to mount procfs at /proc: %d\n", ret);
+    }
+#endif
+
+  UNUSED(ret);
+  return OK;
+}
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_clockconfig.c b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_clockconfig.c
new file mode 100644
index 0000000..4b615c4
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_clockconfig.c
@@ -0,0 +1,48 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/src/stm32_clockconfig.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_board_clockconfig
+ *
+ * Description:
+ *   Currently the B-U585I-IOT02A board support is restricted to running
+ *   NuttX in the Non-Secure domain together with TrustedFirmware-M (TFM).
+ *   In this setup the clock configuration is done by TFM, not by NuttX.
+ *   Thus, the board's configuration sets
+ *   CONFIG_ARCH_BOARD_STM32L5_CUSTOM_CLOCKCONFIG to avoid the standard clock
+ *   config logic to run and instead do just nothing in this function.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_ARCH_BOARD_STM32U5_CUSTOM_CLOCKCONFIG)
+void stm32_board_clockconfig(void)
+{
+}
+#endif
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_spi.c b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_spi.c
new file mode 100644
index 0000000..41862f1
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/src/stm32_spi.c
@@ -0,0 +1,184 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/src/stm32_spi.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/spi/spi.h>
+
+#include "arm_arch.h"
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_spi.h"
+
+#include "b-u585i-iot02a.h"
+#include <arch/board/board.h>
+
+#ifdef CONFIG_STM32U5_SPI
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the B-U585I-IOT02A
+ *    board.
+ *
+ ****************************************************************************/
+
+void stm32_spidev_initialize(void)
+{
+  /* NOTE: Clocking for SPI1 and/or SPI3 was already provided in stm32_rcc.c.
+   *       Configurations of SPI pins is performed in stm32_spi.c.
+   *       Here, we only initialize chip select pins unique to the board
+   *       architecture.
+   */
+
+#ifdef CONFIG_STM32U5_SPI1
+  stm32_configgpio(GPIO_SPI1_NSS);
+#endif
+}
+
+/****************************************************************************
+ * Name:  stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status
+ *
+ * Description:
+ *   The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
+ *   must be provided by board-specific logic.  They are implementations of
+ *   the select and status methods of the SPI interface defined by struct
+ *   spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
+ *   stm32_spibus_initialize()) are provided by common STM32 logic.  To use
+ *   this common SPI logic on your board:
+ *
+ *   1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
+ *      in your board-specific logic.  These functions will perform chip
+ *      selection and status operations using GPIOs in the way your board is
+ *      configured.
+ *   3. Add a calls to stm32_spibus_initialize() in your low level
+ *      application initialization logic
+ *   4. The handle returned by stm32_spibus_initialize() may then be used
+ *      to bind the SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32U5_SPI1
+void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
+                      bool selected)
+{
+  spiinfo("devid: %08lx CS: %s\n",
+          (unsigned long)devid, selected ? "assert" : "de-assert");
+
+  stm32_gpiowrite(GPIO_SPI1_NSS, !selected);
+}
+
+uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32U5_SPI2
+void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
+                      bool selected)
+{
+  spiinfo("devid: %08lx CS: %s\n",
+          (unsigned long)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32U5_SPI3
+void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
+                      bool selected)
+{
+  spiinfo("devid: %08lx CS: %s\n",
+          (unsigned long)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_spi1cmddata
+ *
+ * Description:
+ *   This function must be provided by platform-specific logic. This is an
+ *   implementation of the cmddata method of the SPI interface defined by
+ *   struct spi_ops_s (see include/nuttx/spi/spi.h).
+ *
+ * Input Parameters:
+ *
+ *   spi - SPI device that controls the bus the device that requires the CMD/
+ *         DATA selection.
+ *   devid - If there are multiple devices on the bus, this selects which one
+ *         to select cmd or data.  NOTE:  This design restricts, for example,
+ *         one one SPI display per SPI bus.
+ *   cmd - true: select command; false: select data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+#ifdef CONFIG_STM32U5_SPI1
+int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32U5_SPI2
+int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32U5_SPI3
+int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+#endif /* CONFIG_SPI_CMDDATA */
+#endif /* CONFIG_STM32U5_SPI */
diff --git a/boards/arm/stm32u5/drivers/Kconfig b/boards/arm/stm32u5/drivers/Kconfig
new file mode 100644
index 0000000..f72f3c0
--- /dev/null
+++ b/boards/arm/stm32u5/drivers/Kconfig
@@ -0,0 +1,4 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#