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Posted to commits@tvm.apache.org by "apeskov (via GitHub)" <gi...@apache.org> on 2023/03/20 14:28:03 UTC
[GitHub] [tvm] apeskov opened a new pull request, #14345: Adapt some hexagon intrinsics for high vector lanes
apeskov opened a new pull request, #14345:
URL: https://github.com/apache/tvm/pull/14345
Goal is to allow to apply intrinsics "q_multiply_shift" and "q_multiply_shift_per_axis" for vector type i32x128. Originally it supports only "i32x32" which is natively supported by platform (1024 bit vector).
**Motivation**
There are situation than we have to use vector size slightly more than supported by platform. As example consider sequence of element-wise operators: add<i32> -> q_multiply_shift<i32> -> cast<i8>. To achieve performance we have to squash it into one single loop (`sch.compute_at(...)`). First two operators would like to be vectorised with using data type "int32x32". last one cast operator want to use i32x128 as src and i8x128 as dst. As result we have to adapt all this operator to accept vector size "??x128" to successfully vectorise entire loop.
This change allows to achieve significant performance speedup for tuning tasks like `conv -> add -> qnn.requantize -> cast_i8`.
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[GitHub] [tvm] masahi commented on pull request #14345: [Hexagon] Adapt some intrinsics for high vector lanes
Posted by "masahi (via GitHub)" <gi...@apache.org>.
masahi commented on PR #14345:
URL: https://github.com/apache/tvm/pull/14345#issuecomment-1483309633
@tvm-bot rerun
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[GitHub] [tvm] ibsidorenko commented on pull request #14345: [Hexagon] Adapt some intrinsics for high vector lanes
Posted by "ibsidorenko (via GitHub)" <gi...@apache.org>.
ibsidorenko commented on PR #14345:
URL: https://github.com/apache/tvm/pull/14345#issuecomment-1484213339
@tvm-bot rerun
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[GitHub] [tvm] tvm-bot commented on pull request #14345: Adapt some hexagon intrinsics for high vector lanes
Posted by "tvm-bot (via GitHub)" <gi...@apache.org>.
tvm-bot commented on PR #14345:
URL: https://github.com/apache/tvm/pull/14345#issuecomment-1476336190
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[GitHub] [tvm] ibsidorenko commented on pull request #14345: [Hexagon] Adapt some intrinsics for high vector lanes
Posted by "ibsidorenko (via GitHub)" <gi...@apache.org>.
ibsidorenko commented on PR #14345:
URL: https://github.com/apache/tvm/pull/14345#issuecomment-1484059270
@tvm-bot rerun
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[GitHub] [tvm] apeskov commented on pull request #14345: [Hexagon] Adapt some intrinsics for high vector lanes
Posted by "apeskov (via GitHub)" <gi...@apache.org>.
apeskov commented on PR #14345:
URL: https://github.com/apache/tvm/pull/14345#issuecomment-1477611762
@masahi @kparzysz-quic @jverma-quic Previously you reviewed patches like this. Could you please take a look on this one?
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[GitHub] [tvm] masahi merged pull request #14345: [Hexagon] Adapt some intrinsics for high vector lanes
Posted by "masahi (via GitHub)" <gi...@apache.org>.
masahi merged PR #14345:
URL: https://github.com/apache/tvm/pull/14345
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[GitHub] [tvm] masahi commented on a diff in pull request #14345: [Hexagon] Adapt some intrinsics for high vector lanes
Posted by "masahi (via GitHub)" <gi...@apache.org>.
masahi commented on code in PR #14345:
URL: https://github.com/apache/tvm/pull/14345#discussion_r1143913949
##########
python/tvm/topi/hexagon/tensor_intrin.py:
##########
@@ -22,44 +22,164 @@
from tvm import te
+def get_lanes(dtype: str):
+ if "x" not in dtype:
+ return 1
+
+ _, lanes = dtype.split("x")
+ return int(lanes)
+
+
+def is_vector_type(dtype: str):
+ return get_lanes(dtype) != 1
+
+
+def is_power_of_2(n: int):
+ return (n & (n - 1) == 0) and n != 0
+
+
+def _adopt_to_highest_lanes(*args, intrinsic=None, intrinsic_lanes: int = 0):
+ """Enhance original lowering intrinsic to high vector lanes.
+ Will accept vector lanes equal orig_vec_lanes * 2**n for n in [0,1,2...]
+
+ Ada is equivalent of splitting input args to chunk with lanes equal orig_vec_lanes,
+ execution provided low_intrinsic for each of them and concatenate back.
+
+ Parameters
+ ----------
+ args: List[PrimExpr]
+ Args to adapt to
+
+ intrinsic: callable
+ Intrinsic implementation to adapt
+
+ intrinsic_lanes: int
+ Args lanes supported by provided intrinsic
Review Comment:
Arg lanes?
##########
python/tvm/topi/hexagon/tensor_intrin.py:
##########
@@ -22,44 +22,164 @@
from tvm import te
+def get_lanes(dtype: str):
+ if "x" not in dtype:
+ return 1
+
+ _, lanes = dtype.split("x")
+ return int(lanes)
+
+
+def is_vector_type(dtype: str):
+ return get_lanes(dtype) != 1
+
+
+def is_power_of_2(n: int):
+ return (n & (n - 1) == 0) and n != 0
+
+
+def _adopt_to_highest_lanes(*args, intrinsic=None, intrinsic_lanes: int = 0):
+ """Enhance original lowering intrinsic to high vector lanes.
+ Will accept vector lanes equal orig_vec_lanes * 2**n for n in [0,1,2...]
+
+ Ada is equivalent of splitting input args to chunk with lanes equal orig_vec_lanes,
+ execution provided low_intrinsic for each of them and concatenate back.
Review Comment:
Ada?
##########
python/tvm/topi/hexagon/tensor_intrin.py:
##########
@@ -22,44 +22,164 @@
from tvm import te
+def get_lanes(dtype: str):
+ if "x" not in dtype:
+ return 1
+
+ _, lanes = dtype.split("x")
+ return int(lanes)
+
+
+def is_vector_type(dtype: str):
+ return get_lanes(dtype) != 1
+
+
+def is_power_of_2(n: int):
+ return (n & (n - 1) == 0) and n != 0
+
+
+def _adopt_to_highest_lanes(*args, intrinsic=None, intrinsic_lanes: int = 0):
+ """Enhance original lowering intrinsic to high vector lanes.
+ Will accept vector lanes equal orig_vec_lanes * 2**n for n in [0,1,2...]
+
+ Ada is equivalent of splitting input args to chunk with lanes equal orig_vec_lanes,
+ execution provided low_intrinsic for each of them and concatenate back.
Review Comment:
Also please polish this sentence, it is broken.
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[GitHub] [tvm] apeskov commented on pull request #14345: Adapt some hexagon intrinsics for high vector lanes
Posted by "apeskov (via GitHub)" <gi...@apache.org>.
apeskov commented on PR #14345:
URL: https://github.com/apache/tvm/pull/14345#issuecomment-1476337588
@ibsidorenko FYI
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