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Posted to commits@nuttx.apache.org by da...@apache.org on 2020/08/28 21:45:19 UTC
[incubator-nuttx] branch master updated: stm32 - Fix two wrong
comments in memory map
This is an automated email from the ASF dual-hosted git repository.
davids5 pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new cb27b77 stm32 - Fix two wrong comments in memory map
cb27b77 is described below
commit cb27b77d6c63657bbee27ca236cabe877251b875
Author: Nathan Hartman <59...@users.noreply.github.com>
AuthorDate: Fri Aug 28 13:59:51 2020 -0400
stm32 - Fix two wrong comments in memory map
Comments only. No functional changes. See STM32G474 Reference Manual
(RM0440 Rev 4), section 3.4.1, Table 11, "Option byte organization."
arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h:
* STM32_OPTION_BASE: The comment incorrectly said the range was
0x1fff7800-0x1fff780f for a total of 16 Option Bytes. Corrected
this to 0x1fff7800-0x1fff782f, as the device has 48 Option Bytes
for this option block.
* STM32_OPTION_BASE2: The comment incorrectly said the range was
0x1ffff800-0x1ffff80f for a total of 16 Option Bytes. Corrected
this to 0x1ffff800-0x1ffff82f, as the device has 48 Option Bytes
for this option block.
---
arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h b/arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h
index 0b82c7d..04d8bb4 100644
--- a/arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h
+++ b/arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h
@@ -53,12 +53,12 @@
#define STM32_SYSMEM_BASE 0x1fff0000 /* 0x1fff0000-0x1fff6fff: 28Kb System memory */
#define STM32_OTP_AREA_BASE 0x1fff7000 /* 0x1fff7000-0x1fff73ff: 1Kb OTP area */
/* 0x1fff7400-0x1fff77ff: Reserved */
-#define STM32_OPTION_BASE 0x1fff7800 /* 0x1fff7800-0x1fff780f: 16 Option bytes */
- /* 0x1fff7810-0x1fff7fff: Reserved */
+#define STM32_OPTION_BASE 0x1fff7800 /* 0x1fff7800-0x1fff782f: 48 Option bytes */
+ /* 0x1fff7830-0x1fff7fff: Reserved */
#define STM32_SYSMEM_BASE2 0x1fff8000 /* 0x1fff8000-0x1fffefff: 28Kb System memory */
/* 0x1ffff000-0x1ffff7ff: Reserved */
-#define STM32_OPTION_BASE2 0x1ffff800 /* 0x1ffff800-0x1ffff80f: 16 Option bytes */
- /* 0x1fff7810-0x1fff7fff: Reserved */
+#define STM32_OPTION_BASE2 0x1ffff800 /* 0x1ffff800-0x1ffff82f: 48 Option bytes */
+ /* 0x1fff7830-0x1fff7fff: Reserved */
/* System Memory Addresses **************************************************************************/