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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/12/29 17:30:15 UTC
[incubator-nuttx] branch master updated: Add backtrace to risc-v common sources
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 091322b Add backtrace to risc-v common sources
091322b is described below
commit 091322ba4a6846746fa8292dc167d30184f4afc8
Author: Norman Rasmussen <no...@rasmussen.co.za>
AuthorDate: Wed Dec 29 06:47:45 2021 -0800
Add backtrace to risc-v common sources
---
arch/risc-v/src/bl602/Make.defs | 4 ++++
arch/risc-v/src/c906/Make.defs | 4 ++++
arch/risc-v/src/esp32c3/Make.defs | 4 ++++
arch/risc-v/src/fe310/Make.defs | 4 ++++
arch/risc-v/src/k210/Make.defs | 4 ++++
arch/risc-v/src/litex/Make.defs | 4 ++++
arch/risc-v/src/mpfs/Make.defs | 4 ++++
arch/risc-v/src/qemu-rv32/Make.defs | 4 ++++
arch/risc-v/src/rv32m1/Make.defs | 4 ++++
9 files changed, 36 insertions(+)
diff --git a/arch/risc-v/src/bl602/Make.defs b/arch/risc-v/src/bl602/Make.defs
index c6600b2..cd1a8c7 100644
--- a/arch/risc-v/src/bl602/Make.defs
+++ b/arch/risc-v/src/bl602/Make.defs
@@ -36,6 +36,10 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif
diff --git a/arch/risc-v/src/c906/Make.defs b/arch/risc-v/src/c906/Make.defs
index 7b86eee..421392b 100644
--- a/arch/risc-v/src/c906/Make.defs
+++ b/arch/risc-v/src/c906/Make.defs
@@ -37,6 +37,10 @@ CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
CMN_CSRCS += riscv_mdelay.c riscv_copyfullstate.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif
diff --git a/arch/risc-v/src/esp32c3/Make.defs b/arch/risc-v/src/esp32c3/Make.defs
index 513852d..5e8e843 100644
--- a/arch/risc-v/src/esp32c3/Make.defs
+++ b/arch/risc-v/src/esp32c3/Make.defs
@@ -37,6 +37,10 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif
diff --git a/arch/risc-v/src/fe310/Make.defs b/arch/risc-v/src/fe310/Make.defs
index afe6a9f..c70ff62 100644
--- a/arch/risc-v/src/fe310/Make.defs
+++ b/arch/risc-v/src/fe310/Make.defs
@@ -36,6 +36,10 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif
diff --git a/arch/risc-v/src/k210/Make.defs b/arch/risc-v/src/k210/Make.defs
index 56c986d..4f69c52 100644
--- a/arch/risc-v/src/k210/Make.defs
+++ b/arch/risc-v/src/k210/Make.defs
@@ -37,6 +37,10 @@ CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
CMN_CSRCS += riscv_mdelay.c riscv_copyfullstate.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif
diff --git a/arch/risc-v/src/litex/Make.defs b/arch/risc-v/src/litex/Make.defs
index c1b5510..04f1850 100644
--- a/arch/risc-v/src/litex/Make.defs
+++ b/arch/risc-v/src/litex/Make.defs
@@ -36,6 +36,10 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif
diff --git a/arch/risc-v/src/mpfs/Make.defs b/arch/risc-v/src/mpfs/Make.defs
index 416ab83..2f4be08 100755
--- a/arch/risc-v/src/mpfs/Make.defs
+++ b/arch/risc-v/src/mpfs/Make.defs
@@ -37,6 +37,10 @@ CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
CMN_CSRCS += riscv_mdelay.c riscv_udelay.c riscv_copyfullstate.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif
diff --git a/arch/risc-v/src/qemu-rv32/Make.defs b/arch/risc-v/src/qemu-rv32/Make.defs
index 6f2b38e..01bfb18 100644
--- a/arch/risc-v/src/qemu-rv32/Make.defs
+++ b/arch/risc-v/src/qemu-rv32/Make.defs
@@ -36,6 +36,10 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif
diff --git a/arch/risc-v/src/rv32m1/Make.defs b/arch/risc-v/src/rv32m1/Make.defs
index cc0db88..cab15a6 100644
--- a/arch/risc-v/src/rv32m1/Make.defs
+++ b/arch/risc-v/src/rv32m1/Make.defs
@@ -34,6 +34,10 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
+
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += riscv_checkstack.c
endif