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Posted to commits@mynewt.apache.org by vi...@apache.org on 2019/07/18 19:19:35 UTC
[mynewt-core] branch master updated: Correct mask of EN_LPFP and
LPFP_CFG bits (#1919)
This is an automated email from the ASF dual-hosted git repository.
vipulrahane pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new 5294019 Correct mask of EN_LPFP and LPFP_CFG bits (#1919)
5294019 is described below
commit 5294019bd84b238cf1c627e860497c68a7b205d2
Author: jorajacobi <47...@users.noreply.github.com>
AuthorDate: Thu Jul 18 12:19:31 2019 -0700
Correct mask of EN_LPFP and LPFP_CFG bits (#1919)
The masks were incorrect, so attempts to write LPFP_CFG would clear the SIM and BDU bits.
---
hw/drivers/sensors/lps33hw/src/lps33hw_priv.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/drivers/sensors/lps33hw/src/lps33hw_priv.h b/hw/drivers/sensors/lps33hw/src/lps33hw_priv.h
index 0bfb327..0644ff0 100644
--- a/hw/drivers/sensors/lps33hw/src/lps33hw_priv.h
+++ b/hw/drivers/sensors/lps33hw/src/lps33hw_priv.h
@@ -66,8 +66,8 @@ LPS33HW_REGISTER_VALUE(LPS33HW_INTERRUPT_CFG, LPS33HW_INTERRUPT_CFG_PLE, 1, 0x02
LPS33HW_REGISTER_VALUE(LPS33HW_INTERRUPT_CFG, LPS33HW_INTERRUPT_CFG_PHE, 0, 0x01);
LPS33HW_REGISTER_VALUE(LPS33HW_CTRL_REG1, LPS33HW_CTRL_REG1_ODR, 4, 0x70);
-LPS33HW_REGISTER_VALUE(LPS33HW_CTRL_REG1, LPS33HW_CTRL_REG1_EN_LPFP, 3, 0x04);
-LPS33HW_REGISTER_VALUE(LPS33HW_CTRL_REG1, LPS33HW_CTRL_REG1_LPFP_CFG, 2, 0x03);
+LPS33HW_REGISTER_VALUE(LPS33HW_CTRL_REG1, LPS33HW_CTRL_REG1_EN_LPFP, 3, 0x08);
+LPS33HW_REGISTER_VALUE(LPS33HW_CTRL_REG1, LPS33HW_CTRL_REG1_LPFP_CFG, 2, 0x04);
LPS33HW_REGISTER_VALUE(LPS33HW_CTRL_REG1, LPS33HW_CTRL_REG1_BDU, 1, 0x02);
LPS33HW_REGISTER_VALUE(LPS33HW_CTRL_REG1, LPS33HW_CTRL_REG1_SIM, 0, 0x01);