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Posted to commits@nuttx.apache.org by ac...@apache.org on 2026/03/17 21:46:04 UTC
(nuttx) 04/06: arch/xtensa/espressif: Add AES accelerator support
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 77f2f7989d6d0f7dca08bde7b6abe6e243f47b85
Author: Eren Terzioglu <er...@espressif.com>
AuthorDate: Wed Jan 21 12:33:11 2026 +0100
arch/xtensa/espressif: Add AES accelerator support
Add AES accelerator support for esp32[-s2|-s3]
Signed-off-by: Eren Terzioglu <er...@espressif.com>
---
arch/xtensa/src/common/espressif/Kconfig | 7 +
arch/xtensa/src/common/espressif/Make.defs | 7 +
.../esp32s3_aes.c => common/espressif/esp_aes.c} | 228 +++++++++------------
.../esp32s3_aes.h => common/espressif/esp_aes.h} | 81 ++++----
arch/xtensa/src/common/espressif/esp_crypto.c | 51 +++++
arch/xtensa/src/esp32s2/hal.mk | 1 +
arch/xtensa/src/esp32s3/Kconfig | 6 +-
arch/xtensa/src/esp32s3/Make.defs | 4 -
arch/xtensa/src/esp32s3/hal.mk | 1 +
9 files changed, 219 insertions(+), 167 deletions(-)
diff --git a/arch/xtensa/src/common/espressif/Kconfig b/arch/xtensa/src/common/espressif/Kconfig
index d2f1a0c41bb..9e3171aee12 100644
--- a/arch/xtensa/src/common/espressif/Kconfig
+++ b/arch/xtensa/src/common/espressif/Kconfig
@@ -115,6 +115,13 @@ config ESPRESSIF_SHA_ACCELERATOR
---help---
Enable SHA accelerator support.
+config ESPRESSIF_AES_ACCELERATOR
+ bool "AES Accelerator"
+ depends on !ARCH_CHIP_ESP32
+ default n
+ ---help---
+ Enable AES accelerator support.
+
config ESPRESSIF_I2S
bool
default n
diff --git a/arch/xtensa/src/common/espressif/Make.defs b/arch/xtensa/src/common/espressif/Make.defs
index e254c8860f5..9c70fa621a4 100644
--- a/arch/xtensa/src/common/espressif/Make.defs
+++ b/arch/xtensa/src/common/espressif/Make.defs
@@ -86,6 +86,13 @@ endif
ifeq ($(CONFIG_ESPRESSIF_SHA_ACCELERATOR),y)
CHIP_CSRCS += esp_sha.c
+endif
+
+ifeq ($(CONFIG_ESPRESSIF_AES_ACCELERATOR),y)
+CHIP_CSRCS += esp_aes.c
+endif
+
+ifeq ($(CONFIG_ARCH_CHIP_ESP32),)
ifeq ($(CONFIG_CRYPTO_CRYPTODEV_HARDWARE),y)
CHIP_CSRCS += esp_crypto.c
endif
diff --git a/arch/xtensa/src/esp32s3/esp32s3_aes.c b/arch/xtensa/src/common/espressif/esp_aes.c
similarity index 81%
rename from arch/xtensa/src/esp32s3/esp32s3_aes.c
rename to arch/xtensa/src/common/espressif/esp_aes.c
index 85a4d954d2b..b4a4bf62d51 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_aes.c
+++ b/arch/xtensa/src/common/espressif/esp_aes.c
@@ -1,5 +1,7 @@
/****************************************************************************
- * arch/xtensa/src/esp32s3/esp32s3_aes.c
+ * arch/xtensa/src/common/espressif/esp_aes.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -32,11 +34,16 @@
#include <nuttx/mutex.h>
#include <nuttx/crypto/crypto.h>
-#include "xtensa.h"
-#include "esp32s3_aes.h"
+#include "chip.h"
+#include "esp_aes.h"
-#include "hardware/esp32s3_aes.h"
-#include "hardware/esp32s3_system.h"
+#include "esp_private/periph_ctrl.h"
+#include "esp_private/esp_crypto_lock_internal.h"
+#include "soc/periph_defs.h"
+#include "hal/aes_hal.h"
+#include "hal/aes_ll.h"
+#include "soc/soc_caps.h"
+#include "rom/cache.h"
/****************************************************************************
* Pre-processor Definitions
@@ -44,10 +51,6 @@
#define AES_BLK_SIZE (16)
-#define AES_MODE_DECRYPT (BIT(2))
-
-#define AES_IDLE_STATE (0)
-
/****************************************************************************
* Private Data
****************************************************************************/
@@ -74,19 +77,9 @@ static mutex_t g_aes_lock = NXMUTEX_INITIALIZER;
*
****************************************************************************/
-static void aes_hw_setkey(struct esp32s3_aes_s *aes, bool encrypt)
+static void aes_hw_setkey(struct esp_aes_s *aes, bool encrypt)
{
- int i;
- uint32_t cryptbits = encrypt ? 0 : AES_MODE_DECRYPT;
- uint32_t keybits = (aes->keybits / 64) - 2;
- uint32_t keywords = aes->keybits / 32;
-
- putreg32(cryptbits | keybits, AES_MODE_REG);
-
- for (i = 0; i < keywords; ++i)
- {
- putreg32(aes->key[i], AES_KEY_0_REG + i * 4);
- }
+ aes_hal_setkey((uint8_t *)aes->key, aes->keybits / 8, encrypt);
}
/****************************************************************************
@@ -106,27 +99,7 @@ static void aes_hw_setkey(struct esp32s3_aes_s *aes, bool encrypt)
static void aes_hw_cypher(const uint8_t *s, uint8_t *d)
{
- uint32_t buffer[AES_BLK_SIZE / 4];
-
- memcpy(buffer, s, AES_BLK_SIZE);
-
- putreg32(buffer[0], AES_TEXT_IN_0_REG + 0);
- putreg32(buffer[1], AES_TEXT_IN_0_REG + 4);
- putreg32(buffer[2], AES_TEXT_IN_0_REG + 8);
- putreg32(buffer[3], AES_TEXT_IN_0_REG + 12);
-
- putreg32(AES_TRIGGER_M, AES_TRIGGER_REG);
-
- while (getreg32(AES_STATE_REG) != AES_IDLE_STATE)
- {
- }
-
- buffer[0] = getreg32(AES_TEXT_OUT_0_REG + 0);
- buffer[1] = getreg32(AES_TEXT_OUT_0_REG + 4);
- buffer[2] = getreg32(AES_TEXT_OUT_0_REG + 8);
- buffer[3] = getreg32(AES_TEXT_OUT_0_REG + 12);
-
- memcpy(d, buffer, AES_BLK_SIZE);
+ aes_hal_transform_block(s, d);
}
/****************************************************************************
@@ -159,12 +132,11 @@ static void gf128mul_x_ble(uint8_t *d, const uint8_t *s)
}
#ifdef CONFIG_ESP32S3_AES_ACCELERATOR_TEST
-
/****************************************************************************
- * Name: esp32s3_aes_ecb_test
+ * Name: esp_aes_ecb_test
*
* Description:
- * ESP32-S3 AES-ECB test.
+ * AES-ECB test for Espressif device.
*
* Input Parameters:
* None
@@ -174,14 +146,14 @@ static void gf128mul_x_ble(uint8_t *d, const uint8_t *s)
*
****************************************************************************/
-static void esp32s3_aes_ecb_test(void)
+static void esp_aes_ecb_test(void)
{
int ret;
int i;
int keybits;
uint8_t encrypt_buf[16];
uint8_t decrypt_buf[16];
- struct esp32s3_aes_s aes;
+ struct esp_aes_s aes;
const int size = 16;
const uint32_t input[8] =
@@ -215,10 +187,10 @@ static void esp32s3_aes_ecb_test(void)
{
keybits = i * 128 + 128;
- ret = esp32s3_aes_setkey(&aes, key, keybits);
+ ret = esp_aes_setkey(&aes, key, keybits);
DEBUGASSERT(ret == 0);
- ret = esp32s3_aes_ecb_cypher(&aes, 1, input, encrypt_buf, size);
+ ret = esp_aes_ecb_cypher(&aes, 1, input, encrypt_buf, size);
DEBUGASSERT(ret == 0);
if (memcmp(encrypt_buf, result[i], size))
@@ -226,7 +198,7 @@ static void esp32s3_aes_ecb_test(void)
DEBUGASSERT(0);
}
- ret = esp32s3_aes_ecb_cypher(&aes, 0, encrypt_buf, decrypt_buf, size);
+ ret = esp_aes_ecb_cypher(&aes, 0, encrypt_buf, decrypt_buf, size);
DEBUGASSERT(ret == 0);
if (memcmp(decrypt_buf, input, size))
@@ -239,10 +211,10 @@ static void esp32s3_aes_ecb_test(void)
}
/****************************************************************************
- * Name: esp32s3_aes_cbc_test
+ * Name: esp_aes_cbc_test
*
* Description:
- * ESP32-S3 AES-CBC test.
+ * AES-CBC test for Espressif device.
*
* Input Parameters:
* None
@@ -252,7 +224,7 @@ static void esp32s3_aes_ecb_test(void)
*
****************************************************************************/
-static void esp32s3_aes_cbc_test(void)
+static void esp_aes_cbc_test(void)
{
int ret;
int i;
@@ -260,7 +232,7 @@ static void esp32s3_aes_cbc_test(void)
uint8_t encrypt_buf[32];
uint8_t decrypt_buf[32];
uint8_t iv_buf[16];
- struct esp32s3_aes_s aes;
+ struct esp_aes_s aes;
const int size = 32;
const uint32_t input[8] =
@@ -301,11 +273,11 @@ static void esp32s3_aes_cbc_test(void)
{
keybits = i * 128 + 128;
- ret = esp32s3_aes_setkey(&aes, key, keybits);
+ ret = esp_aes_setkey(&aes, key, keybits);
DEBUGASSERT(ret == 0);
memcpy(iv_buf, iv, 16);
- ret = esp32s3_aes_cbc_cypher(&aes, 1, iv_buf, input,
+ ret = esp_aes_cbc_cypher(&aes, 1, iv_buf, input,
encrypt_buf, size);
DEBUGASSERT(ret == 0);
@@ -315,7 +287,7 @@ static void esp32s3_aes_cbc_test(void)
}
memcpy(iv_buf, iv, 16);
- ret = esp32s3_aes_cbc_cypher(&aes, 0, iv_buf, encrypt_buf,
+ ret = esp_aes_cbc_cypher(&aes, 0, iv_buf, encrypt_buf,
decrypt_buf, size);
DEBUGASSERT(ret == 0);
@@ -329,10 +301,10 @@ static void esp32s3_aes_cbc_test(void)
}
/****************************************************************************
- * Name: esp32s3_aes_ctr_test
+ * Name: esp_aes_ctr_test
*
* Description:
- * ESP32-S3 AES-CTR test.
+ * AES-CTR test for Espressif device.
*
* Input Parameters:
* None
@@ -342,7 +314,7 @@ static void esp32s3_aes_cbc_test(void)
*
****************************************************************************/
-static void esp32s3_aes_ctr_test(void)
+static void esp_aes_ctr_test(void)
{
int ret;
int i;
@@ -352,7 +324,7 @@ static void esp32s3_aes_ctr_test(void)
uint8_t cnt_buf[16];
uint8_t cache_buf[16];
uint32_t nc_off;
- struct esp32s3_aes_s aes;
+ struct esp_aes_s aes;
const int size = 32;
const uint32_t input[8] =
@@ -393,12 +365,12 @@ static void esp32s3_aes_ctr_test(void)
{
keybits = i * 128 + 128;
- ret = esp32s3_aes_setkey(&aes, key, keybits);
+ ret = esp_aes_setkey(&aes, key, keybits);
DEBUGASSERT(ret == 0);
nc_off = 0;
memcpy(cnt_buf, cnt, 16);
- ret = esp32s3_aes_ctr_cypher(&aes, &nc_off, cnt_buf, cache_buf,
+ ret = esp_aes_ctr_cypher(&aes, &nc_off, cnt_buf, cache_buf,
input, encrypt_buf, size);
DEBUGASSERT(ret == 0);
@@ -409,7 +381,7 @@ static void esp32s3_aes_ctr_test(void)
nc_off = 0;
memcpy(cnt_buf, cnt, 16);
- ret = esp32s3_aes_ctr_cypher(&aes, &nc_off, cnt_buf, cache_buf,
+ ret = esp_aes_ctr_cypher(&aes, &nc_off, cnt_buf, cache_buf,
encrypt_buf, decrypt_buf, size);
DEBUGASSERT(ret == 0);
@@ -423,10 +395,10 @@ static void esp32s3_aes_ctr_test(void)
}
/****************************************************************************
- * Name: esp32s3_aes_xts_test
+ * Name: esp_aes_xts_test
*
* Description:
- * ESP32-S3 AES-XTS test.
+ * AES-XTS test for Espressif device.
*
* Input Parameters:
* None
@@ -436,7 +408,7 @@ static void esp32s3_aes_ctr_test(void)
*
****************************************************************************/
-static void esp32s3_aes_xts_test(void)
+static void esp_aes_xts_test(void)
{
int ret;
int i;
@@ -444,7 +416,7 @@ static void esp32s3_aes_xts_test(void)
uint8_t encrypt_buf[32];
uint8_t decrypt_buf[32];
uint8_t unit_buf[16];
- struct esp32s3_aes_xts_s aes;
+ struct esp_aes_xts_s aes;
int size;
const uint32_t input[8] =
@@ -504,7 +476,7 @@ static void esp32s3_aes_xts_test(void)
{
keybits = i * 256 + 256;
- ret = esp32s3_aes_xts_setkey(&aes, key, keybits);
+ ret = esp_aes_xts_setkey(&aes, key, keybits);
DEBUGASSERT(ret == 0);
/* Encrypt/Decrypt 32 bytes */
@@ -512,7 +484,7 @@ static void esp32s3_aes_xts_test(void)
size = 32;
memcpy(unit_buf, unit, 16);
- ret = esp32s3_aes_xts_cypher(&aes, true, unit_buf, input,
+ ret = esp_aes_xts_cypher(&aes, true, unit_buf, input,
encrypt_buf, size);
DEBUGASSERT(ret == 0);
@@ -522,7 +494,7 @@ static void esp32s3_aes_xts_test(void)
}
memcpy(unit_buf, unit, 16);
- ret = esp32s3_aes_xts_cypher(&aes, false, unit_buf, encrypt_buf,
+ ret = esp_aes_xts_cypher(&aes, false, unit_buf, encrypt_buf,
decrypt_buf, size);
DEBUGASSERT(ret == 0);
@@ -536,7 +508,7 @@ static void esp32s3_aes_xts_test(void)
size = 30;
memcpy(unit_buf, unit, 16);
- ret = esp32s3_aes_xts_cypher(&aes, true, unit_buf, input,
+ ret = esp_aes_xts_cypher(&aes, true, unit_buf, input,
encrypt_buf, size);
DEBUGASSERT(ret == 0);
@@ -546,7 +518,7 @@ static void esp32s3_aes_xts_test(void)
}
memcpy(unit_buf, unit, 16);
- ret = esp32s3_aes_xts_cypher(&aes, false, unit_buf, encrypt_buf,
+ ret = esp_aes_xts_cypher(&aes, false, unit_buf, encrypt_buf,
decrypt_buf, size);
DEBUGASSERT(ret == 0);
@@ -559,14 +531,14 @@ static void esp32s3_aes_xts_test(void)
}
}
-#endif
+#endif /* CONFIG_ESP32S3_AES_ACCELERATOR_TEST */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
- * Name: esp32s3_aes_ecb_cypher
+ * Name: esp_aes_ecb_cypher
*
* Description:
* Process AES ECB encryption/decryption.
@@ -583,8 +555,8 @@ static void esp32s3_aes_xts_test(void)
*
****************************************************************************/
-int esp32s3_aes_ecb_cypher(struct esp32s3_aes_s *aes, bool encrypt,
- const void *input, void *output, uint32_t size)
+int esp_aes_ecb_cypher(struct esp_aes_s *aes, bool encrypt,
+ const void *input, void *output, uint32_t size)
{
int ret;
uint32_t i;
@@ -620,7 +592,7 @@ int esp32s3_aes_ecb_cypher(struct esp32s3_aes_s *aes, bool encrypt,
}
/****************************************************************************
- * Name: esp32s3_aes_cbc_cypher
+ * Name: esp_aes_cbc_cypher
*
* Description:
* Process AES CBC encryption/decryption.
@@ -638,9 +610,9 @@ int esp32s3_aes_ecb_cypher(struct esp32s3_aes_s *aes, bool encrypt,
*
****************************************************************************/
-int esp32s3_aes_cbc_cypher(struct esp32s3_aes_s *aes, bool encrypt,
- void *ivptr, const void *input, void *output,
- uint32_t size)
+int esp_aes_cbc_cypher(struct esp_aes_s *aes, bool encrypt,
+ void *ivptr, const void *input, void *output,
+ uint32_t size)
{
int ret;
uint32_t i;
@@ -699,7 +671,7 @@ int esp32s3_aes_cbc_cypher(struct esp32s3_aes_s *aes, bool encrypt,
}
/****************************************************************************
- * Name: esp32s3_aes_ctr_cypher
+ * Name: esp_aes_ctr_cypher
*
* Description:
* Process AES CTR encryption/decryption.
@@ -718,9 +690,9 @@ int esp32s3_aes_cbc_cypher(struct esp32s3_aes_s *aes, bool encrypt,
*
****************************************************************************/
-int esp32s3_aes_ctr_cypher(struct esp32s3_aes_s *aes, uint32_t *offptr,
- void *cntptr, void *cacheptr, const void *input,
- void *output, uint32_t size)
+int esp_aes_ctr_cypher(struct esp_aes_s *aes, uint32_t *offptr,
+ void *cntptr, void *cacheptr, const void *input,
+ void *output, uint32_t size)
{
int ret;
uint32_t i;
@@ -775,7 +747,7 @@ int esp32s3_aes_ctr_cypher(struct esp32s3_aes_s *aes, uint32_t *offptr,
}
/****************************************************************************
- * Name: esp32s3_aes_xts_cypher
+ * Name: esp_aes_xts_cypher
*
* Description:
* Process AES XTS encryption/decryption.
@@ -793,9 +765,9 @@ int esp32s3_aes_ctr_cypher(struct esp32s3_aes_s *aes, uint32_t *offptr,
*
****************************************************************************/
-int esp32s3_aes_xts_cypher(struct esp32s3_aes_xts_s *aes, bool encrypt,
- void *unitptr, const void *input, void *output,
- uint32_t size)
+int esp_aes_xts_cypher(struct esp_aes_xts_s *aes, bool encrypt,
+ void *unitptr, const void *input, void *output,
+ uint32_t size)
{
int ret;
uint32_t i;
@@ -892,7 +864,7 @@ int esp32s3_aes_xts_cypher(struct esp32s3_aes_xts_s *aes, bool encrypt,
}
/****************************************************************************
- * Name: esp32s3_aes_setkey
+ * Name: esp_aes_setkey
*
* Description:
* Configure AES key.
@@ -907,8 +879,8 @@ int esp32s3_aes_xts_cypher(struct esp32s3_aes_xts_s *aes, bool encrypt,
*
****************************************************************************/
-int esp32s3_aes_setkey(struct esp32s3_aes_s *aes, const void *keyptr,
- uint16_t keybits)
+int esp_aes_setkey(struct esp_aes_s *aes, const void *keyptr,
+ uint16_t keybits)
{
DEBUGASSERT(aes && keyptr);
@@ -924,7 +896,7 @@ int esp32s3_aes_setkey(struct esp32s3_aes_s *aes, const void *keyptr,
}
/****************************************************************************
- * Name: esp32s3_aes_xts_setkey
+ * Name: esp_aes_xts_setkey
*
* Description:
* Configure AES XTS key.
@@ -939,8 +911,8 @@ int esp32s3_aes_setkey(struct esp32s3_aes_s *aes, const void *keyptr,
*
****************************************************************************/
-int esp32s3_aes_xts_setkey(struct esp32s3_aes_xts_s *aes, const void *keyptr,
- uint16_t keybits)
+int esp_aes_xts_setkey(struct esp_aes_xts_s *aes, const void *keyptr,
+ uint16_t keybits)
{
const uint8_t *key = (const uint8_t *)keyptr;
uint16_t half_keybits = keybits / 2;
@@ -962,10 +934,10 @@ int esp32s3_aes_xts_setkey(struct esp32s3_aes_xts_s *aes, const void *keyptr,
}
/****************************************************************************
- * Name: esp32s3_aes_init
+ * Name: esp_aes_init
*
* Description:
- * Initialize ESP32-S3 AES hardware.
+ * Initialize ESP device AES hardware.
*
* Input Parameters:
* None
@@ -975,22 +947,22 @@ int esp32s3_aes_xts_setkey(struct esp32s3_aes_xts_s *aes, const void *keyptr,
*
****************************************************************************/
-int esp32s3_aes_init(void)
+int esp_aes_init(void)
{
- if (g_aes_inited == false)
+ if (!g_aes_inited)
{
- modifyreg32(SYSTEM_PERIP_CLK_EN1_REG, 0, SYSTEM_CRYPTO_AES_CLK_EN);
- modifyreg32(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_CRYPTO_AES_RST, 0);
+ AES_RCC_ATOMIC()
+ {
+ aes_ll_enable_bus_clock(true);
+ aes_ll_reset_register();
+ }
+
g_aes_inited = true;
}
return OK;
}
-/****************************************************************************
- * Name: aes_cypher
- ****************************************************************************/
-
#ifdef CONFIG_CRYPTO_AES
int aes_cypher(void *out, const void *in, size_t size,
@@ -1001,18 +973,13 @@ int aes_cypher(void *out, const void *in, size_t size,
uint8_t iv_buf[AES_BLK_SIZE];
uint8_t cache_buf[AES_BLK_SIZE];
uint32_t nc_off;
- struct esp32s3_aes_s aes;
+ struct esp_aes_s aes;
if ((size & (AES_BLK_SIZE - 1)) != 0)
{
return -EINVAL;
}
- if (mode == AES_MODE_CTR)
- {
- keysize -= 4;
- }
-
if (keysize != 16 && keysize != 32)
{
return -EINVAL;
@@ -1025,13 +992,13 @@ int aes_cypher(void *out, const void *in, size_t size,
return -EINVAL;
}
- ret = esp32s3_aes_init();
+ ret = esp_aes_init();
if (ret < 0)
{
return ret;
}
- ret = esp32s3_aes_setkey(&aes, key, keysize * 8);
+ ret = esp_aes_setkey(&aes, key, keysize * 8);
if (ret < 0)
{
return ret;
@@ -1040,17 +1007,17 @@ int aes_cypher(void *out, const void *in, size_t size,
switch (mode)
{
case AES_MODE_ECB:
- ret = esp32s3_aes_ecb_cypher(&aes, encrypt, in, out, size);
+ ret = esp_aes_ecb_cypher(&aes, encrypt, in, out, size);
break;
case AES_MODE_CBC:
memcpy(iv_buf, iv, AES_BLK_SIZE);
- ret = esp32s3_aes_cbc_cypher(&aes, encrypt, iv_buf, in, out, size);
+ ret = esp_aes_cbc_cypher(&aes, encrypt, iv_buf, in, out, size);
break;
case AES_MODE_CTR:
nc_off = 0;
memcpy(iv_buf, iv, AES_BLK_SIZE);
- ret = esp32s3_aes_ctr_cypher(&aes, &nc_off, iv_buf, cache_buf,
- in, out, size);
+ ret = esp_aes_ctr_cypher(&aes, &nc_off, iv_buf, cache_buf,
+ in, out, size);
break;
default:
ret = -EINVAL;
@@ -1059,22 +1026,31 @@ int aes_cypher(void *out, const void *in, size_t size,
return ret;
}
-
-#endif
+#endif /* CONFIG_CRYPTO_AES */
#ifdef CONFIG_ESP32S3_AES_ACCELERATOR_TEST
/****************************************************************************
- * Name: esp32s3_aes_test
+ * Name: esp_aes_test
+ *
+ * Description:
+ * Test AES implementation
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
****************************************************************************/
-void esp32s3_aes_test(void)
+void esp_aes_test(void)
{
- esp32s3_aes_ecb_test();
- esp32s3_aes_cbc_test();
- esp32s3_aes_ctr_test();
- esp32s3_aes_xts_test();
+ esp_aes_ecb_test();
+ esp_aes_cbc_test();
+ esp_aes_ctr_test();
+ esp_aes_xts_test();
syslog(LOG_INFO, "\nAES hardware accelerate test done.\n");
}
-#endif
+#endif /* CONFIG_ESP32S3_AES_ACCELERATOR_TEST */
diff --git a/arch/xtensa/src/esp32s3/esp32s3_aes.h b/arch/xtensa/src/common/espressif/esp_aes.h
similarity index 77%
rename from arch/xtensa/src/esp32s3/esp32s3_aes.h
rename to arch/xtensa/src/common/espressif/esp_aes.h
index 22d1f4fe3e7..2445c2481d6 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_aes.h
+++ b/arch/xtensa/src/common/espressif/esp_aes.h
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/xtensa/src/esp32s3/esp32s3_aes.h
+ * arch/xtensa/src/common/espressif/esp_aes.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -22,8 +22,8 @@
* Included Files
****************************************************************************/
-#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_AES_H
-#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_AES_H
+#ifndef __ARCH_XTENSA_SRC_COMMON_ESPRESSIF_ESP_AES_H
+#define __ARCH_XTENSA_SRC_COMMON_ESPRESSIF_ESP_AES_H
#include <nuttx/config.h>
#include <stdint.h>
@@ -45,7 +45,7 @@ extern "C"
/* AES private description */
-struct esp32s3_aes_s
+struct esp_aes_s
{
uint32_t key[8]; /* Key data value */
uint16_t keybits; /* Key data bits */
@@ -53,10 +53,10 @@ struct esp32s3_aes_s
/* AES XTS private description */
-struct esp32s3_aes_xts_s
+struct esp_aes_xts_s
{
- struct esp32s3_aes_s crypt; /* AES block encryption/decryption */
- struct esp32s3_aes_s tweak; /* AES tweak encryption/decryption */
+ struct esp_aes_s crypt; /* AES block encryption/decryption */
+ struct esp_aes_s tweak; /* AES tweak encryption/decryption */
};
/****************************************************************************
@@ -64,7 +64,7 @@ struct esp32s3_aes_xts_s
****************************************************************************/
/****************************************************************************
- * Name: esp32s3_aes_ecb_cypher
+ * Name: esp_aes_ecb_cypher
*
* Description:
* Process AES ECB encryption/decryption.
@@ -81,11 +81,11 @@ struct esp32s3_aes_xts_s
*
****************************************************************************/
-int esp32s3_aes_ecb_cypher(struct esp32s3_aes_s *aes, bool encrypt,
- const void *input, void *output, uint32_t size);
+int esp_aes_ecb_cypher(struct esp_aes_s *aes, bool encrypt,
+ const void *input, void *output, uint32_t size);
/****************************************************************************
- * Name: esp32s3_aes_cbc_cypher
+ * Name: esp_aes_cbc_cypher
*
* Description:
* Process AES CBC encryption/decryption.
@@ -103,12 +103,12 @@ int esp32s3_aes_ecb_cypher(struct esp32s3_aes_s *aes, bool encrypt,
*
****************************************************************************/
-int esp32s3_aes_cbc_cypher(struct esp32s3_aes_s *aes, bool encrypt,
- void *ivptr, const void *input, void *output,
- uint32_t size);
+int esp_aes_cbc_cypher(struct esp_aes_s *aes, bool encrypt,
+ void *ivptr, const void *input, void *output,
+ uint32_t size);
/****************************************************************************
- * Name: esp32s3_aes_ctr_cypher
+ * Name: esp_aes_ctr_cypher
*
* Description:
* Process AES CTR encryption/decryption.
@@ -127,12 +127,12 @@ int esp32s3_aes_cbc_cypher(struct esp32s3_aes_s *aes, bool encrypt,
*
****************************************************************************/
-int esp32s3_aes_ctr_cypher(struct esp32s3_aes_s *aes, uint32_t *offptr,
- void *cntptr, void *cacheptr, const void *input,
- void *output, uint32_t size);
+int esp_aes_ctr_cypher(struct esp_aes_s *aes, uint32_t *offptr,
+ void *cntptr, void *cacheptr, const void *input,
+ void *output, uint32_t size);
/****************************************************************************
- * Name: esp32s3_aes_xts_cypher
+ * Name: esp_aes_xts_cypher
*
* Description:
* Process AES XTS encryption/decryption.
@@ -150,12 +150,12 @@ int esp32s3_aes_ctr_cypher(struct esp32s3_aes_s *aes, uint32_t *offptr,
*
****************************************************************************/
-int esp32s3_aes_xts_cypher(struct esp32s3_aes_xts_s *aes, bool encrypt,
- void *unitptr, const void *input, void *output,
- uint32_t size);
+int esp_aes_xts_cypher(struct esp_aes_xts_s *aes, bool encrypt,
+ void *unitptr, const void *input, void *output,
+ uint32_t size);
/****************************************************************************
- * Name: esp32s3_aes_setkey
+ * Name: esp_aes_setkey
*
* Description:
* Configure AES key.
@@ -170,11 +170,11 @@ int esp32s3_aes_xts_cypher(struct esp32s3_aes_xts_s *aes, bool encrypt,
*
****************************************************************************/
-int esp32s3_aes_setkey(struct esp32s3_aes_s *aes, const void *keyptr,
- uint16_t keybits);
+int esp_aes_setkey(struct esp_aes_s *aes, const void *keyptr,
+ uint16_t keybits);
/****************************************************************************
- * Name: esp32s3_aes_xts_setkey
+ * Name: esp_aes_xts_setkey
*
* Description:
* Configure AES XTS key.
@@ -189,14 +189,14 @@ int esp32s3_aes_setkey(struct esp32s3_aes_s *aes, const void *keyptr,
*
****************************************************************************/
-int esp32s3_aes_xts_setkey(struct esp32s3_aes_xts_s *aes, const void *keyptr,
- uint16_t keybits);
+int esp_aes_xts_setkey(struct esp_aes_xts_s *aes, const void *keyptr,
+ uint16_t keybits);
/****************************************************************************
- * Name: esp32s3_aes_init
+ * Name: esp_aes_init
*
* Description:
- * Initialize ESP32-S3 AES hardware driver.
+ * Initialize AES hardware driver.
*
* Input Parameters:
* None
@@ -206,17 +206,26 @@ int esp32s3_aes_xts_setkey(struct esp32s3_aes_xts_s *aes, const void *keyptr,
*
****************************************************************************/
-int esp32s3_aes_init(void);
+int esp_aes_init(void);
#ifdef CONFIG_ESP32S3_AES_ACCELERATOR_TEST
/****************************************************************************
- * Name: esp32s3_aes_test
+ * Name: esp_aes_test
+ *
+ * Description:
+ * Test AES implementation
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
****************************************************************************/
-void esp32s3_aes_test(void);
-
-#endif
+void esp_aes_test(void);
+#endif /* CONFIG_ESP32S3_AES_ACCELERATOR_TEST */
#ifdef __cplusplus
}
@@ -224,4 +233,4 @@ void esp32s3_aes_test(void);
#undef EXTERN
#endif /* __ASSEMBLY__ */
-#endif /* __ARCH_RISCV_SRC_ESP32S3_LEGACY_ESP32S3_AES_H */
+#endif /* __ARCH_XTENSA_SRC_COMMON_ESPRESSIF_ESP_AES_H */
diff --git a/arch/xtensa/src/common/espressif/esp_crypto.c b/arch/xtensa/src/common/espressif/esp_crypto.c
index 89830918fb9..4643ea654fb 100644
--- a/arch/xtensa/src/common/espressif/esp_crypto.c
+++ b/arch/xtensa/src/common/espressif/esp_crypto.c
@@ -574,6 +574,23 @@ static int esp_newsession(uint32_t *sid, struct cryptoini *cri)
switch (cri->cri_alg)
{
+#ifdef CONFIG_CRYPTO_AES
+ case CRYPTO_AES_CBC:
+ break;
+
+ case CRYPTO_AES_CTR:
+ if ((cri->cri_klen / 8 - 4) != 16 &&
+ (cri->cri_klen / 8 -4) != 32)
+ {
+ /* esp aes-ctr key bits just support 128 & 256 */
+
+ esp_freesession(i);
+ kmm_free(data);
+ return -EINVAL;
+ }
+
+ break;
+#endif
case CRYPTO_SHA1:
axf = &g_auth_hash_sha1_esp;
goto sha_common;
@@ -767,6 +784,7 @@ static int esp_process(struct cryptop *crp)
struct cryptodesc *crd;
struct esp_crypto_list *session;
struct esp_crypto_data *data;
+ uint8_t iv[AESCTR_BLOCKSIZE];
uint32_t lid;
int err = 0;
@@ -793,6 +811,35 @@ static int esp_process(struct cryptop *crp)
switch (data->alg)
{
+#ifdef CONFIG_CRYPTO_AES
+ case CRYPTO_AES_CBC:
+ err = aes_cypher(crp->crp_dst, crp->crp_buf, crd->crd_len,
+ crp->crp_iv, crd->crd_key, crd->crd_klen / 8,
+ AES_MODE_CBC, crd->crd_flags & CRD_F_ENCRYPT);
+
+ if (err < 0)
+ {
+ return err;
+ }
+ break;
+ case CRYPTO_AES_CTR:
+ memcpy(iv, crd->crd_key + crd->crd_klen / 8 - AESCTR_NONCESIZE,
+ AESCTR_NONCESIZE);
+ memcpy(iv + AESCTR_NONCESIZE, crp->crp_iv, AESCTR_IVSIZE);
+ memcpy(iv + AESCTR_NONCESIZE + AESCTR_IVSIZE,
+ (uint8_t *)crp->crp_iv + AESCTR_IVSIZE, 4);
+ err = aes_cypher(crp->crp_dst, crp->crp_buf, crd->crd_len, iv,
+ crd->crd_key,
+ crd->crd_klen / 8 - AESCTR_NONCESIZE,
+ AES_MODE_CTR, crd->crd_flags & CRD_F_ENCRYPT);
+
+ if (err < 0)
+ {
+ return err;
+ }
+
+ break;
+#endif
case CRYPTO_SHA1:
case CRYPTO_SHA2_256:
case CRYPTO_SHA2_384:
@@ -854,6 +901,10 @@ void hwcr_init(void)
algs[CRYPTO_SHA2_256_HMAC] = CRYPTO_ALG_FLAG_SUPPORTED;
algs[CRYPTO_SHA2_384_HMAC] = CRYPTO_ALG_FLAG_SUPPORTED;
algs[CRYPTO_SHA2_512_HMAC] = CRYPTO_ALG_FLAG_SUPPORTED;
+#ifdef CONFIG_CRYPTO_AES
+ algs[CRYPTO_AES_CBC] = CRYPTO_ALG_FLAG_SUPPORTED;
+ algs[CRYPTO_AES_CTR] = CRYPTO_ALG_FLAG_SUPPORTED;
+#endif
esp_sha_init();
crypto_register(hwcr_id, algs, esp_newsession,
diff --git a/arch/xtensa/src/esp32s2/hal.mk b/arch/xtensa/src/esp32s2/hal.mk
index d023f3f87e2..0018f3530b7 100644
--- a/arch/xtensa/src/esp32s2/hal.mk
+++ b/arch/xtensa/src/esp32s2/hal.mk
@@ -185,6 +185,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)system_time.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)aes_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)wdt_hal_iram.c
diff --git a/arch/xtensa/src/esp32s3/Kconfig b/arch/xtensa/src/esp32s3/Kconfig
index edac2d873c7..3906fd80cb6 100644
--- a/arch/xtensa/src/esp32s3/Kconfig
+++ b/arch/xtensa/src/esp32s3/Kconfig
@@ -940,8 +940,12 @@ config ESP32S3_CAM
Camera controller that receives parallel DVP data from image sensors.
config ESP32S3_AES_ACCELERATOR
- bool "AES Accelerator"
+ bool "AES Accelerator (legacy implementation: read help)"
default n
+ select ESPRESSIF_AES_ACCELERATOR
+ ---help---
+ This is a deprecated Kconfig macro. Its kept for retrocompatibility only.
+ Use "CONFIG_ESPRESSIF_AES_ACCELERATOR" instead.
endmenu # ESP32-S3 Peripheral Selection
diff --git a/arch/xtensa/src/esp32s3/Make.defs b/arch/xtensa/src/esp32s3/Make.defs
index 6126987f6fa..3e13b4a7925 100644
--- a/arch/xtensa/src/esp32s3/Make.defs
+++ b/arch/xtensa/src/esp32s3/Make.defs
@@ -181,10 +181,6 @@ ifeq ($(CONFIG_ESP32S3_SDMMC),y)
CHIP_CSRCS += esp32s3_sdmmc.c
endif
-ifeq ($(CONFIG_ESP32S3_AES_ACCELERATOR),y)
-CHIP_CSRCS += esp32s3_aes.c
-endif
-
ifeq ($(CONFIG_ESP32S3_OPENETH),y)
CHIP_CSRCS += esp_openeth.c
endif
diff --git a/arch/xtensa/src/esp32s3/hal.mk b/arch/xtensa/src/esp32s3/hal.mk
index f728d2e4bd1..a2db0bd74d9 100644
--- a/arch/xtensa/src/esp32s3/hal.mk
+++ b/arch/xtensa/src/esp32s3/hal.mk
@@ -169,6 +169,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)aes_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_cntl_hal.c