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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/03/25 06:49:55 UTC
[incubator-nuttx] branch master updated (1ec65ee -> 5239764)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 1ec65ee samv7: Fix sam_putreg() parameter type
new fa0dd46 arch: arm: tiva: Author Gregory Nutt: update licenses to Apache
new 648b266 arch: arm: tiva: fix nxstyle errors
new 5239764 arch: arm: tiva: fix Mixed case identifier errors
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/arm/arm.h | 100 ++--
arch/arm/src/arm/pg_macros.h | 159 +++----
arch/arm/src/tiva/cc13xx/cc13x0_rom.c | 511 ++++++++++++---------
arch/arm/src/tiva/cc13xx/cc13x0_rom.h | 55 ++-
arch/arm/src/tiva/cc13xx/cc13x0_trim.c | 126 ++---
arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c | 12 +-
arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h | 40 +-
arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v2_rom.h | 30 +-
arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c | 59 +--
arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c | 98 ++--
arch/arm/src/tiva/cc13xx/cc13xx_enableclks.c | 39 +-
arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h | 63 +--
arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c | 39 +-
arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h | 70 ++-
arch/arm/src/tiva/cc13xx/cc13xx_gpio.c | 39 +-
arch/arm/src/tiva/cc13xx/cc13xx_gpioirq.c | 39 +-
arch/arm/src/tiva/cc13xx/cc13xx_start.c | 39 +-
arch/arm/src/tiva/chip.h | 57 +--
arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c | 39 +-
arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h | 55 +--
arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h | 56 +--
arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c | 40 +-
arch/arm/src/tiva/common/lmxx_tm4c_start.c | 39 +-
arch/arm/src/tiva/common/tiva_allocateheap.c | 39 +-
arch/arm/src/tiva/common/tiva_dumpgpio.c | 39 +-
arch/arm/src/tiva/common/tiva_i2c.c | 270 ++++++-----
arch/arm/src/tiva/common/tiva_lowputc.c | 39 +-
arch/arm/src/tiva/common/tiva_mpuinit.c | 39 +-
arch/arm/src/tiva/common/tiva_pwm.c | 132 +++---
arch/arm/src/tiva/common/tiva_serial.c | 40 +-
arch/arm/src/tiva/common/tiva_timerisr.c | 39 +-
arch/arm/src/tiva/common/tiva_timerlib.c | 362 +++++++++------
arch/arm/src/tiva/common/tiva_userspace.c | 39 +-
.../src/tiva/hardware/cc13x0/cc13x0_adi2_refsys.h | 25 +-
.../src/tiva/hardware/cc13x0/cc13x0_adi3_refsys.h | 28 +-
.../src/tiva/hardware/cc13x0/cc13x0_aon_batmon.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h | 29 +-
.../src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_wuc.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_ccfg.h | 18 +-
.../arm/src/tiva/hardware/cc13x0/cc13x0_ddi0_osc.h | 37 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h | 71 ++-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_flash.h | 34 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h | 33 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h | 17 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_ioc.h | 42 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h | 34 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_timer.h | 33 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_uart.h | 29 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_vims.h | 23 +-
.../cc13x2_cc26x2/cc13x2_cc26x2_adi2_refsys.h | 25 +-
.../cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h | 21 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h | 21 +-
.../cc13x2_cc26x2/cc13x2_cc26x2_aux_sysif.h | 21 +-
.../cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h | 42 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h | 33 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h | 17 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_ioc.h | 42 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_timer.h | 33 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_uart.h | 29 +-
arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h | 73 ++-
arch/arm/src/tiva/hardware/lm/lm3s_flash.h | 91 ++--
arch/arm/src/tiva/hardware/lm/lm3s_gpio.h | 31 +-
arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h | 84 ++--
arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h | 65 +--
arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h | 77 ++--
arch/arm/src/tiva/hardware/lm/lm3s_timer.h | 56 ++-
arch/arm/src/tiva/hardware/lm/lm4f_gpio.h | 33 +-
arch/arm/src/tiva/hardware/lm/lm4f_memorymap.h | 29 +-
arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h | 83 ++--
arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h | 95 ++--
arch/arm/src/tiva/hardware/lm/lm4f_timer.h | 34 +-
arch/arm/src/tiva/hardware/lm/lm_i2c.h | 65 +--
arch/arm/src/tiva/hardware/lm/lm_uart.h | 65 +--
arch/arm/src/tiva/hardware/tiva_adc.h | 20 +-
arch/arm/src/tiva/hardware/tiva_adi2_refsys.h | 67 ++-
arch/arm/src/tiva/hardware/tiva_adi3_refsys.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_adi4_aux.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_aon_batmon.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_aon_ioc.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_aon_pmctl.h | 70 ++-
arch/arm/src/tiva/hardware/tiva_aon_rtc.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_aon_sysctl.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_aon_wuc.h | 67 ++-
arch/arm/src/tiva/hardware/tiva_aux_smph.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_aux_sysif.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_aux_wuc.h | 67 ++-
arch/arm/src/tiva/hardware/tiva_ccfg.h | 70 ++-
arch/arm/src/tiva/hardware/tiva_ddi.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_ddi0_osc.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_eeprom.h | 90 ++--
arch/arm/src/tiva/hardware/tiva_epi.h | 18 +-
arch/arm/src/tiva/hardware/tiva_ethernet.h | 47 +-
arch/arm/src/tiva/hardware/tiva_fcfg1.h | 67 ++-
arch/arm/src/tiva/hardware/tiva_flash.h | 51 +-
arch/arm/src/tiva/hardware/tiva_gpio.h | 28 +-
arch/arm/src/tiva/hardware/tiva_i2c.h | 67 ++-
arch/arm/src/tiva/hardware/tiva_ioc.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_memorymap.h | 67 ++-
arch/arm/src/tiva/hardware/tiva_pinmap.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_prcm.h | 67 ++-
arch/arm/src/tiva/hardware/tiva_pwm.h | 78 ++--
arch/arm/src/tiva/hardware/tiva_qencoder.h | 12 +-
arch/arm/src/tiva/hardware/tiva_smph.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_ssi.h | 70 ++-
arch/arm/src/tiva/hardware/tiva_sysctrl.h | 68 ++-
arch/arm/src/tiva/hardware/tiva_timer.h | 51 +-
arch/arm/src/tiva/hardware/tiva_uart.h | 67 ++-
arch/arm/src/tiva/hardware/tiva_vims.h | 70 ++-
arch/arm/src/tiva/hardware/tiva_wdt.h | 61 +--
arch/arm/src/tiva/hardware/tm4c/tm4c123_gpio.h | 31 +-
arch/arm/src/tiva/hardware/tm4c/tm4c123_i2c.h | 65 +--
arch/arm/src/tiva/hardware/tm4c/tm4c123_sysctrl.h | 105 +++--
arch/arm/src/tiva/hardware/tm4c/tm4c123_timer.h | 34 +-
arch/arm/src/tiva/hardware/tm4c/tm4c129_gpio.h | 45 +-
arch/arm/src/tiva/hardware/tm4c/tm4c129_i2c.h | 65 +--
arch/arm/src/tiva/hardware/tm4c/tm4c129_sysctrl.h | 127 +++--
arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h | 85 ++--
arch/arm/src/tiva/hardware/tm4c/tm4c_ethernet.h | 119 ++++-
arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h | 48 +-
arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h | 46 +-
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h | 86 ++--
arch/arm/src/tiva/hardware/tm4c/tm4c_uart.h | 65 +--
arch/arm/src/tiva/lm/lm3s_ethernet.c | 44 +-
arch/arm/src/tiva/lm/lm3s_gpio.c | 40 +-
arch/arm/src/tiva/lm/lm4f_gpio.c | 40 +-
arch/arm/src/tiva/tiva_chipinfo.h | 89 ++--
arch/arm/src/tiva/tiva_enableclks.h | 47 +-
arch/arm/src/tiva/tiva_enablepwr.h | 47 +-
arch/arm/src/tiva/tiva_ethernet.h | 39 +-
arch/arm/src/tiva/tiva_flash.h | 39 +-
arch/arm/src/tiva/tiva_hciuart.h | 39 +-
arch/arm/src/tiva/tiva_i2c.h | 39 +-
arch/arm/src/tiva/tiva_lowputc.h | 39 +-
arch/arm/src/tiva/tiva_mpuinit.h | 39 +-
arch/arm/src/tiva/tiva_periphrdy.h | 55 +--
arch/arm/src/tiva/tiva_ssi.h | 39 +-
arch/arm/src/tiva/tiva_start.h | 39 +-
arch/arm/src/tiva/tiva_sysctrl.h | 43 +-
arch/arm/src/tiva/tiva_timer.h | 43 +-
arch/arm/src/tiva/tiva_userspace.h | 39 +-
arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c | 39 +-
arch/arm/src/tiva/tm4c/tm4c_gpio.c | 40 +-
145 files changed, 4031 insertions(+), 4557 deletions(-)
[incubator-nuttx] 01/03: arch: arm: tiva: Author Gregory Nutt:
update licenses to Apache
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit fa0dd46c6cd42a391fa09066d5944675c627147c
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:37:12 2021 +0100
arch: arm: tiva: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/tiva/cc13xx/cc13xx_enableclks.c | 39 +++++++-------------
arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h | 39 +++++++-------------
arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c | 39 +++++++-------------
arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h | 39 +++++++-------------
arch/arm/src/tiva/cc13xx/cc13xx_gpio.c | 39 +++++++-------------
arch/arm/src/tiva/cc13xx/cc13xx_gpioirq.c | 39 +++++++-------------
arch/arm/src/tiva/cc13xx/cc13xx_start.c | 39 +++++++-------------
arch/arm/src/tiva/chip.h | 39 +++++++-------------
arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c | 39 +++++++-------------
arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h | 39 +++++++-------------
arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h | 40 +++++++--------------
arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c | 40 +++++++--------------
arch/arm/src/tiva/common/lmxx_tm4c_start.c | 39 +++++++-------------
arch/arm/src/tiva/common/tiva_allocateheap.c | 39 +++++++-------------
arch/arm/src/tiva/common/tiva_dumpgpio.c | 39 +++++++-------------
arch/arm/src/tiva/common/tiva_lowputc.c | 39 +++++++-------------
arch/arm/src/tiva/common/tiva_mpuinit.c | 39 +++++++-------------
arch/arm/src/tiva/common/tiva_serial.c | 40 +++++++--------------
arch/arm/src/tiva/common/tiva_timerisr.c | 39 +++++++-------------
arch/arm/src/tiva/common/tiva_timerlib.c | 43 ++++++++--------------
arch/arm/src/tiva/common/tiva_userspace.c | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm3s_flash.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm_i2c.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/lm/lm_uart.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_adi2_refsys.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_adi3_refsys.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_adi4_aux.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aon_batmon.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aon_ioc.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aon_pmctl.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aon_rtc.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aon_sysctl.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aon_wuc.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aux_smph.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aux_sysif.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_aux_wuc.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_ccfg.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_ddi.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_ddi0_osc.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_ethernet.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_fcfg1.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_flash.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_i2c.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_ioc.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_memorymap.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_pinmap.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_prcm.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_smph.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_ssi.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_sysctrl.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_timer.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_uart.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_vims.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tiva_wdt.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tm4c/tm4c123_i2c.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tm4c/tm4c123_sysctrl.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tm4c/tm4c129_i2c.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tm4c/tm4c129_sysctrl.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h | 39 +++++++-------------
arch/arm/src/tiva/hardware/tm4c/tm4c_uart.h | 39 +++++++-------------
arch/arm/src/tiva/lm/lm3s_ethernet.c | 44 ++++++++---------------
arch/arm/src/tiva/lm/lm3s_gpio.c | 40 +++++++--------------
arch/arm/src/tiva/lm/lm4f_gpio.c | 40 +++++++--------------
arch/arm/src/tiva/tiva_enableclks.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_enablepwr.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_ethernet.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_flash.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_hciuart.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_i2c.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_lowputc.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_mpuinit.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_periphrdy.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_ssi.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_start.h | 39 +++++++-------------
arch/arm/src/tiva/tiva_sysctrl.h | 43 ++++++++--------------
arch/arm/src/tiva/tiva_timer.h | 43 ++++++++--------------
arch/arm/src/tiva/tiva_userspace.h | 39 +++++++-------------
arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c | 39 +++++++-------------
arch/arm/src/tiva/tm4c/tm4c_gpio.c | 40 +++++++--------------
85 files changed, 1028 insertions(+), 2310 deletions(-)
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.c b/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.c
index fb6567e..9d13d96 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.c
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_enableclks.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h b/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h
index 9f1a26a..abbdd0b 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h
@@ -1,35 +1,20 @@
/****************************************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************************************/
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c b/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c
index 722dcf6..0d9b833 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h b/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h
index 7b755ab..404b208 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_gpio.c b/arch/arm/src/tiva/cc13xx/cc13xx_gpio.c
index f214645..bf122f1 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_gpio.c
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_gpio.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_gpio.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_gpioirq.c b/arch/arm/src/tiva/cc13xx/cc13xx_gpioirq.c
index 9286e9d..36251a5 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_gpioirq.c
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_gpioirq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_gpioirq.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_start.c b/arch/arm/src/tiva/cc13xx/cc13xx_start.c
index b7cbfd9..aeb6955 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_start.c
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_start.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_start.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/chip.h b/arch/arm/src/tiva/chip.h
index ea739dc..bfaf33d 100644
--- a/arch/arm/src/tiva/chip.h
+++ b/arch/arm/src/tiva/chip.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/chip.h
*
- * Copyright (C) 2009-2010, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c b/arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c
index f8e067a..2feaae6 100644
--- a/arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c
+++ b/arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/lm4xx_tm3c_sysctrl.c
*
- * Copyright (C) 2009-2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h b/arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h
index bd1e01d..8fc4c55 100644
--- a/arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h
+++ b/arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h
*
- * Copyright (C) 2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h b/arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h
index 0e84da4..3f4be38 100644
--- a/arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h
+++ b/arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h
@@ -1,36 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h
*
- * Copyright (C) 2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c b/arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c
index e23ed5c..c4cf238 100644
--- a/arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c
+++ b/arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c
*
- * Copyright (C) 2009-2010, 2012, 2014-2016, 2018 Gregory Nutt. All
- * rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/lmxx_tm4c_start.c b/arch/arm/src/tiva/common/lmxx_tm4c_start.c
index 9d4bdc8..4f016ca 100644
--- a/arch/arm/src/tiva/common/lmxx_tm4c_start.c
+++ b/arch/arm/src/tiva/common/lmxx_tm4c_start.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/lmxx_tm4c_start.c
*
- * Copyright (C) 2009, 2012, 2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/tiva_allocateheap.c b/arch/arm/src/tiva/common/tiva_allocateheap.c
index e635a16..8dbda58 100644
--- a/arch/arm/src/tiva/common/tiva_allocateheap.c
+++ b/arch/arm/src/tiva/common/tiva_allocateheap.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_allocateheap.c
*
- * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/tiva_dumpgpio.c b/arch/arm/src/tiva/common/tiva_dumpgpio.c
index 8e0b92b..2f4dfa1 100644
--- a/arch/arm/src/tiva/common/tiva_dumpgpio.c
+++ b/arch/arm/src/tiva/common/tiva_dumpgpio.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_dumpgpio.c
*
- * Copyright (C) 2009-2010, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/tiva_lowputc.c b/arch/arm/src/tiva/common/tiva_lowputc.c
index 3a737ae2d..7499238 100644
--- a/arch/arm/src/tiva/common/tiva_lowputc.c
+++ b/arch/arm/src/tiva/common/tiva_lowputc.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_lowputc.c
*
- * Copyright (C) 2009-2010, 2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/tiva_mpuinit.c b/arch/arm/src/tiva/common/tiva_mpuinit.c
index fb87198..14d88d0 100644
--- a/arch/arm/src/tiva/common/tiva_mpuinit.c
+++ b/arch/arm/src/tiva/common/tiva_mpuinit.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_mpuinit.c
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/tiva_serial.c b/arch/arm/src/tiva/common/tiva_serial.c
index 77ce40f..ffbd617 100644
--- a/arch/arm/src/tiva/common/tiva_serial.c
+++ b/arch/arm/src/tiva/common/tiva_serial.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_serial.c
*
- * Copyright (C) 2009-2010, 2012-2014, 2017-2018 Gregory Nutt. All rights
- * reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/tiva_timerisr.c b/arch/arm/src/tiva/common/tiva_timerisr.c
index fc38987..2d7d4b2 100644
--- a/arch/arm/src/tiva/common/tiva_timerisr.c
+++ b/arch/arm/src/tiva/common/tiva_timerisr.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_timerisr.c
*
- * Copyright (C) 2009, 2014, 2017 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/tiva_timerlib.c b/arch/arm/src/tiva/common/tiva_timerlib.c
index 8c03fd8..83d7b86 100644
--- a/arch/arm/src/tiva/common/tiva_timerlib.c
+++ b/arch/arm/src/tiva/common/tiva_timerlib.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_timerlib.c
*
- * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/common/tiva_userspace.c b/arch/arm/src/tiva/common/tiva_userspace.c
index 0783290..ad742d8 100644
--- a/arch/arm/src/tiva/common/tiva_userspace.c
+++ b/arch/arm/src/tiva/common/tiva_userspace.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_userspace.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h b/arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h
index 9791ea8..1732640 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h
*
- * Copyright (C) 2009-2010, 2012-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_flash.h b/arch/arm/src/tiva/hardware/lm/lm3s_flash.h
index e82290d..fdb38b6 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_flash.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_flash.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_flash.h
*
- * Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h b/arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h
index 9562926..beb397d 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h
*
- * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h b/arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h
index a48a721..57ca601 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h
*
- * Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h b/arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h
index 2e851fa..8eff264 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h
*
- * Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h b/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h
index 296d138..3922c9e 100644
--- a/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h
+++ b/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h b/arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h
index bb1f1fc..abb871c 100644
--- a/arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h
+++ b/arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h
@@ -1,35 +1,20 @@
/********************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h
*
- * Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
********************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm_i2c.h b/arch/arm/src/tiva/hardware/lm/lm_i2c.h
index ce1da2c..6da3975 100644
--- a/arch/arm/src/tiva/hardware/lm/lm_i2c.h
+++ b/arch/arm/src/tiva/hardware/lm/lm_i2c.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm_i2c.h
*
- * Copyright (C) 2009, 2013-2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/lm/lm_uart.h b/arch/arm/src/tiva/hardware/lm/lm_uart.h
index 782fd73..9e5f6ef 100644
--- a/arch/arm/src/tiva/hardware/lm/lm_uart.h
+++ b/arch/arm/src/tiva/hardware/lm/lm_uart.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/lm/lm_uart.h
*
- * Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_adi2_refsys.h b/arch/arm/src/tiva/hardware/tiva_adi2_refsys.h
index a746c13..127b8b2 100644
--- a/arch/arm/src/tiva/hardware/tiva_adi2_refsys.h
+++ b/arch/arm/src/tiva/hardware/tiva_adi2_refsys.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_adi2_refsys.h
*
- * Copyright (C) 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_adi3_refsys.h b/arch/arm/src/tiva/hardware/tiva_adi3_refsys.h
index fa562cb..597033b 100644
--- a/arch/arm/src/tiva/hardware/tiva_adi3_refsys.h
+++ b/arch/arm/src/tiva/hardware/tiva_adi3_refsys.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_adi3_refsys.h
*
- * Copyright (C) 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_adi4_aux.h b/arch/arm/src/tiva/hardware/tiva_adi4_aux.h
index 1464108..7b4c0ca 100644
--- a/arch/arm/src/tiva/hardware/tiva_adi4_aux.h
+++ b/arch/arm/src/tiva/hardware/tiva_adi4_aux.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_adi4_aux.h
*
- * Copyright (C) 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_batmon.h b/arch/arm/src/tiva/hardware/tiva_aon_batmon.h
index 15368e9..d30c148 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_batmon.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_batmon.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_batmon.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_ioc.h b/arch/arm/src/tiva/hardware/tiva_aon_ioc.h
index 16c7987..e61c84c 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_ioc.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_ioc.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_ioc.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_pmctl.h b/arch/arm/src/tiva/hardware/tiva_aon_pmctl.h
index 3c1f9b2..dd3507b 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_pmctl.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_pmctl.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_pmctl.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_rtc.h b/arch/arm/src/tiva/hardware/tiva_aon_rtc.h
index 45c80e5..3f80a8e 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_rtc.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_rtc.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_rtc.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_sysctl.h b/arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
index 3a7d5a8..0fcd725 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_wuc.h b/arch/arm/src/tiva/hardware/tiva_aon_wuc.h
index bf65eee..a9c8988 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_wuc.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_wuc.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_wuc.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aux_smph.h b/arch/arm/src/tiva/hardware/tiva_aux_smph.h
index fe8fc7c..8ac5788 100644
--- a/arch/arm/src/tiva/hardware/tiva_aux_smph.h
+++ b/arch/arm/src/tiva/hardware/tiva_aux_smph.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aux_smph.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aux_sysif.h b/arch/arm/src/tiva/hardware/tiva_aux_sysif.h
index 0b36560..aa3e767 100644
--- a/arch/arm/src/tiva/hardware/tiva_aux_sysif.h
+++ b/arch/arm/src/tiva/hardware/tiva_aux_sysif.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aux_sysif.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_aux_wuc.h b/arch/arm/src/tiva/hardware/tiva_aux_wuc.h
index 1aa2bac..5a81cab 100644
--- a/arch/arm/src/tiva/hardware/tiva_aux_wuc.h
+++ b/arch/arm/src/tiva/hardware/tiva_aux_wuc.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_aux_wuc.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_ccfg.h b/arch/arm/src/tiva/hardware/tiva_ccfg.h
index d067fbe..27ccd94 100644
--- a/arch/arm/src/tiva/hardware/tiva_ccfg.h
+++ b/arch/arm/src/tiva/hardware/tiva_ccfg.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_ccfg.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_ddi.h b/arch/arm/src/tiva/hardware/tiva_ddi.h
index e8b3a21..e2efb94 100644
--- a/arch/arm/src/tiva/hardware/tiva_ddi.h
+++ b/arch/arm/src/tiva/hardware/tiva_ddi.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_ddi.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_ddi0_osc.h b/arch/arm/src/tiva/hardware/tiva_ddi0_osc.h
index 36fb6a7..9ae278e 100644
--- a/arch/arm/src/tiva/hardware/tiva_ddi0_osc.h
+++ b/arch/arm/src/tiva/hardware/tiva_ddi0_osc.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_ddi0_osc.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_ethernet.h b/arch/arm/src/tiva/hardware/tiva_ethernet.h
index 0688bc1..649bd9f 100644
--- a/arch/arm/src/tiva/hardware/tiva_ethernet.h
+++ b/arch/arm/src/tiva/hardware/tiva_ethernet.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_ethernet.h
*
- * Copyright (C) 2009-2010, 2012-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_fcfg1.h b/arch/arm/src/tiva/hardware/tiva_fcfg1.h
index faeddce..51baaee 100644
--- a/arch/arm/src/tiva/hardware/tiva_fcfg1.h
+++ b/arch/arm/src/tiva/hardware/tiva_fcfg1.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_fcfg1.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_flash.h b/arch/arm/src/tiva/hardware/tiva_flash.h
index 1a43bf9..be18249 100644
--- a/arch/arm/src/tiva/hardware/tiva_flash.h
+++ b/arch/arm/src/tiva/hardware/tiva_flash.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_flash.h
*
- * Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_i2c.h b/arch/arm/src/tiva/hardware/tiva_i2c.h
index fd3d6af..3d613e8 100644
--- a/arch/arm/src/tiva/hardware/tiva_i2c.h
+++ b/arch/arm/src/tiva/hardware/tiva_i2c.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_i2c.h
*
- * Copyright (C) 2009, 2013-2015, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_ioc.h b/arch/arm/src/tiva/hardware/tiva_ioc.h
index 4e7a08d..919d508 100644
--- a/arch/arm/src/tiva/hardware/tiva_ioc.h
+++ b/arch/arm/src/tiva/hardware/tiva_ioc.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_ioc.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_memorymap.h b/arch/arm/src/tiva/hardware/tiva_memorymap.h
index 17e7c25..5c6876c 100644
--- a/arch/arm/src/tiva/hardware/tiva_memorymap.h
+++ b/arch/arm/src/tiva/hardware/tiva_memorymap.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_memorymap.h
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_pinmap.h b/arch/arm/src/tiva/hardware/tiva_pinmap.h
index c66aec5..dad210f 100644
--- a/arch/arm/src/tiva/hardware/tiva_pinmap.h
+++ b/arch/arm/src/tiva/hardware/tiva_pinmap.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_pinmap.h
*
- * Copyright (C) 2013-2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_prcm.h b/arch/arm/src/tiva/hardware/tiva_prcm.h
index 017df76..48085c3 100644
--- a/arch/arm/src/tiva/hardware/tiva_prcm.h
+++ b/arch/arm/src/tiva/hardware/tiva_prcm.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_prcm.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_smph.h b/arch/arm/src/tiva/hardware/tiva_smph.h
index 4502190..4bb23a0 100644
--- a/arch/arm/src/tiva/hardware/tiva_smph.h
+++ b/arch/arm/src/tiva/hardware/tiva_smph.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_smph.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_ssi.h b/arch/arm/src/tiva/hardware/tiva_ssi.h
index f603c6f..9a2c2f8 100644
--- a/arch/arm/src/tiva/hardware/tiva_ssi.h
+++ b/arch/arm/src/tiva/hardware/tiva_ssi.h
@@ -1,35 +1,20 @@
/********************************************************************************************
* arch/arm/src/tiva/hardware/tiva_ssi.h
*
- * Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
********************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_sysctrl.h b/arch/arm/src/tiva/hardware/tiva_sysctrl.h
index 0296b2b..f5cc340 100644
--- a/arch/arm/src/tiva/hardware/tiva_sysctrl.h
+++ b/arch/arm/src/tiva/hardware/tiva_sysctrl.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_sysctrl.h
*
- * Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_timer.h b/arch/arm/src/tiva/hardware/tiva_timer.h
index 294305a..76c887a 100644
--- a/arch/arm/src/tiva/hardware/tiva_timer.h
+++ b/arch/arm/src/tiva/hardware/tiva_timer.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_timer.h
*
- * Copyright (C) 2015, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_uart.h b/arch/arm/src/tiva/hardware/tiva_uart.h
index 359f888..e90bc29 100644
--- a/arch/arm/src/tiva/hardware/tiva_uart.h
+++ b/arch/arm/src/tiva/hardware/tiva_uart.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_uart.h
*
- * Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_vims.h b/arch/arm/src/tiva/hardware/tiva_vims.h
index 99cfe93..7e47ac9 100644
--- a/arch/arm/src/tiva/hardware/tiva_vims.h
+++ b/arch/arm/src/tiva/hardware/tiva_vims.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tiva_vims.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tiva_wdt.h b/arch/arm/src/tiva/hardware/tiva_wdt.h
index 7559f29..4f47fc4 100644
--- a/arch/arm/src/tiva/hardware/tiva_wdt.h
+++ b/arch/arm/src/tiva/hardware/tiva_wdt.h
@@ -1,35 +1,20 @@
/********************************************************************************************
* arch/arm/src/tiva/hardware/tiva_wdt.h
*
- * Copyright (C) 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
********************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c123_i2c.h b/arch/arm/src/tiva/hardware/tm4c/tm4c123_i2c.h
index e0ed70c..4a00cad 100644
--- a/arch/arm/src/tiva/hardware/tm4c/tm4c123_i2c.h
+++ b/arch/arm/src/tiva/hardware/tm4c/tm4c123_i2c.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tm4c/tm4c123_i2c.h
*
- * Copyright (C) 2009, 2013-2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c123_sysctrl.h b/arch/arm/src/tiva/hardware/tm4c/tm4c123_sysctrl.h
index ec48002..81dab86 100644
--- a/arch/arm/src/tiva/hardware/tm4c/tm4c123_sysctrl.h
+++ b/arch/arm/src/tiva/hardware/tm4c/tm4c123_sysctrl.h
@@ -1,35 +1,20 @@
/********************************************************************************************
* arch/arm/src/tiva/hardware/tm4c/tm4c123_sysctrl.h
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
********************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c129_i2c.h b/arch/arm/src/tiva/hardware/tm4c/tm4c129_i2c.h
index f2d9238..e10af76 100644
--- a/arch/arm/src/tiva/hardware/tm4c/tm4c129_i2c.h
+++ b/arch/arm/src/tiva/hardware/tm4c/tm4c129_i2c.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tm4c/tm4c129_i2c.h
*
- * Copyright (C) 2009, 2013-2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c129_sysctrl.h b/arch/arm/src/tiva/hardware/tm4c/tm4c129_sysctrl.h
index 7574e14..ac4030a 100644
--- a/arch/arm/src/tiva/hardware/tm4c/tm4c129_sysctrl.h
+++ b/arch/arm/src/tiva/hardware/tm4c/tm4c129_sysctrl.h
@@ -1,35 +1,20 @@
/********************************************************************************************
* arch/arm/src/tiva/hardware/tm4c/tm4c129_sysctrl.h
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
********************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h b/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h
index 14ec945..d3e19a8 100644
--- a/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h
+++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_uart.h b/arch/arm/src/tiva/hardware/tm4c/tm4c_uart.h
index 2a88938..4058fd0 100644
--- a/arch/arm/src/tiva/hardware/tm4c/tm4c_uart.h
+++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_uart.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/tm4c/tm4c_uart.h
*
- * Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/lm/lm3s_ethernet.c b/arch/arm/src/tiva/lm/lm3s_ethernet.c
index 8453173..2a7cff1 100644
--- a/arch/arm/src/tiva/lm/lm3s_ethernet.c
+++ b/arch/arm/src/tiva/lm/lm3s_ethernet.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/lm/lm3s_ethernet.c
*
- * Copyright (C) 2009-2010, 2014, 2016, 2018 Gregory Nutt. All rights
- * reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/lm/lm3s_gpio.c b/arch/arm/src/tiva/lm/lm3s_gpio.c
index 875e533..0f35656 100644
--- a/arch/arm/src/tiva/lm/lm3s_gpio.c
+++ b/arch/arm/src/tiva/lm/lm3s_gpio.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/lm/lm3s_gpio.c
*
- * Copyright (C) 2009-2010, 2014-2015, 2018 Gregory Nutt. All rights
- * reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/lm/lm4f_gpio.c b/arch/arm/src/tiva/lm/lm4f_gpio.c
index 8024e8f..1f8fe67 100644
--- a/arch/arm/src/tiva/lm/lm4f_gpio.c
+++ b/arch/arm/src/tiva/lm/lm4f_gpio.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/lm/lm4f_gpio.c
*
- * Copyright (C) 2009-2010, 2014-2015, 2018 Gregory Nutt. All rights
- * reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_enableclks.h b/arch/arm/src/tiva/tiva_enableclks.h
index f74f290..e3f7bf8 100644
--- a/arch/arm/src/tiva/tiva_enableclks.h
+++ b/arch/arm/src/tiva/tiva_enableclks.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/tiva_enableclks.h
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_enablepwr.h b/arch/arm/src/tiva/tiva_enablepwr.h
index 659513b..999bbc4 100644
--- a/arch/arm/src/tiva/tiva_enablepwr.h
+++ b/arch/arm/src/tiva/tiva_enablepwr.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/tiva_enablepwr.h
*
- * Copyright (C) 2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_ethernet.h b/arch/arm/src/tiva/tiva_ethernet.h
index 6dfa156..bb6a5cb 100644
--- a/arch/arm/src/tiva/tiva_ethernet.h
+++ b/arch/arm/src/tiva/tiva_ethernet.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_ethernet.h
*
- * Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_flash.h b/arch/arm/src/tiva/tiva_flash.h
index f411baf..d1327f2 100644
--- a/arch/arm/src/tiva/tiva_flash.h
+++ b/arch/arm/src/tiva/tiva_flash.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_flash.h
*
- * Copyright (C) 2017 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_hciuart.h b/arch/arm/src/tiva/tiva_hciuart.h
index 19d77a8..c3ac3eb 100644
--- a/arch/arm/src/tiva/tiva_hciuart.h
+++ b/arch/arm/src/tiva/tiva_hciuart.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_hciuart.h
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_i2c.h b/arch/arm/src/tiva/tiva_i2c.h
index fa30cd6..d5cf64a 100644
--- a/arch/arm/src/tiva/tiva_i2c.h
+++ b/arch/arm/src/tiva/tiva_i2c.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_i2c.h
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_lowputc.h b/arch/arm/src/tiva/tiva_lowputc.h
index 667c89d..902724a 100644
--- a/arch/arm/src/tiva/tiva_lowputc.h
+++ b/arch/arm/src/tiva/tiva_lowputc.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_lowputc.h
*
- * Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_mpuinit.h b/arch/arm/src/tiva/tiva_mpuinit.h
index 82aacfe..32141b7 100644
--- a/arch/arm/src/tiva/tiva_mpuinit.h
+++ b/arch/arm/src/tiva/tiva_mpuinit.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_mpuinit.h
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_periphrdy.h b/arch/arm/src/tiva/tiva_periphrdy.h
index 869d605..b4f36a4 100644
--- a/arch/arm/src/tiva/tiva_periphrdy.h
+++ b/arch/arm/src/tiva/tiva_periphrdy.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/tiva/tiva_periphrdy.h
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_ssi.h b/arch/arm/src/tiva/tiva_ssi.h
index af847d4..0020f51 100644
--- a/arch/arm/src/tiva/tiva_ssi.h
+++ b/arch/arm/src/tiva/tiva_ssi.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_ssi.h
*
- * Copyright (C) 2009-2010, 2013, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_start.h b/arch/arm/src/tiva/tiva_start.h
index a926841..35f24e4 100644
--- a/arch/arm/src/tiva/tiva_start.h
+++ b/arch/arm/src/tiva/tiva_start.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_start.h
*
- * Copyright (C) 2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_sysctrl.h b/arch/arm/src/tiva/tiva_sysctrl.h
index d299683..c35f7e4 100644
--- a/arch/arm/src/tiva/tiva_sysctrl.h
+++ b/arch/arm/src/tiva/tiva_sysctrl.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_sysctrl.h
*
- * Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_timer.h b/arch/arm/src/tiva/tiva_timer.h
index b09c671..b8032bb 100644
--- a/arch/arm/src/tiva/tiva_timer.h
+++ b/arch/arm/src/tiva/tiva_timer.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_timer.h
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tiva_userspace.h b/arch/arm/src/tiva/tiva_userspace.h
index 7ecd4c6..508418d 100644
--- a/arch/arm/src/tiva/tiva_userspace.h
+++ b/arch/arm/src/tiva/tiva_userspace.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tiva_userspace.h
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c b/arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c
index 9988098..6e25dcf 100644
--- a/arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c
+++ b/arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/tiva/tm4c/tm4c_gpio.c b/arch/arm/src/tiva/tm4c/tm4c_gpio.c
index bef3ee3..1bae136 100644
--- a/arch/arm/src/tiva/tm4c/tm4c_gpio.c
+++ b/arch/arm/src/tiva/tm4c/tm4c_gpio.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/tm4c/tm4c_gpio.c
*
- * Copyright (C) 2009-2010, 2014-2015, 2018 Gregory Nutt. All rights
- * reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
[incubator-nuttx] 02/03: arch: arm: tiva: fix nxstyle errors
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 648b2669d1f77695e3e411fdb2e0bdec0f00679d
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:37:30 2021 +0100
arch: arm: tiva: fix nxstyle errors
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/tiva/cc13xx/cc13x0_rom.c | 451 ++++++++++++---------
arch/arm/src/tiva/cc13xx/cc13x0_rom.h | 55 +--
arch/arm/src/tiva/cc13xx/cc13x0_trim.c | 120 +++---
arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c | 12 +-
arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h | 38 +-
arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v2_rom.h | 30 +-
arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c | 53 +--
arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c | 78 ++--
arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h | 24 +-
arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h | 31 +-
arch/arm/src/tiva/chip.h | 18 +-
arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h | 16 +-
arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h | 16 +-
arch/arm/src/tiva/common/tiva_i2c.c | 270 ++++++------
arch/arm/src/tiva/common/tiva_pwm.c | 108 +++--
arch/arm/src/tiva/common/tiva_timerlib.c | 287 ++++++++-----
.../src/tiva/hardware/cc13x0/cc13x0_adi2_refsys.h | 25 +-
.../src/tiva/hardware/cc13x0/cc13x0_adi3_refsys.h | 28 +-
.../src/tiva/hardware/cc13x0/cc13x0_aon_batmon.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h | 29 +-
.../src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_wuc.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h | 21 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_ccfg.h | 18 +-
.../arm/src/tiva/hardware/cc13x0/cc13x0_ddi0_osc.h | 37 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h | 71 +++-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_flash.h | 34 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h | 33 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h | 17 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_ioc.h | 42 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h | 34 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_timer.h | 33 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_uart.h | 29 +-
arch/arm/src/tiva/hardware/cc13x0/cc13x0_vims.h | 23 +-
.../cc13x2_cc26x2/cc13x2_cc26x2_adi2_refsys.h | 25 +-
.../cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h | 21 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h | 21 +-
.../cc13x2_cc26x2/cc13x2_cc26x2_aux_sysif.h | 21 +-
.../cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h | 42 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h | 33 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h | 17 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_ioc.h | 42 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_timer.h | 33 +-
.../hardware/cc13x2_cc26x2/cc13x2_cc26x2_uart.h | 29 +-
arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h | 34 +-
arch/arm/src/tiva/hardware/lm/lm3s_flash.h | 52 +--
arch/arm/src/tiva/hardware/lm/lm3s_gpio.h | 31 +-
arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h | 45 +-
arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h | 26 +-
arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h | 38 +-
arch/arm/src/tiva/hardware/lm/lm3s_timer.h | 30 +-
arch/arm/src/tiva/hardware/lm/lm4f_gpio.h | 33 +-
arch/arm/src/tiva/hardware/lm/lm4f_memorymap.h | 29 +-
arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h | 44 +-
arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h | 56 +--
arch/arm/src/tiva/hardware/lm/lm4f_timer.h | 34 +-
arch/arm/src/tiva/hardware/lm/lm_i2c.h | 26 +-
arch/arm/src/tiva/hardware/lm/lm_uart.h | 26 +-
arch/arm/src/tiva/hardware/tiva_adc.h | 20 +-
arch/arm/src/tiva/hardware/tiva_adi2_refsys.h | 28 +-
arch/arm/src/tiva/hardware/tiva_adi3_refsys.h | 29 +-
arch/arm/src/tiva/hardware/tiva_adi4_aux.h | 29 +-
arch/arm/src/tiva/hardware/tiva_aon_batmon.h | 29 +-
arch/arm/src/tiva/hardware/tiva_aon_ioc.h | 29 +-
arch/arm/src/tiva/hardware/tiva_aon_pmctl.h | 31 +-
arch/arm/src/tiva/hardware/tiva_aon_rtc.h | 29 +-
arch/arm/src/tiva/hardware/tiva_aon_sysctl.h | 29 +-
arch/arm/src/tiva/hardware/tiva_aon_wuc.h | 28 +-
arch/arm/src/tiva/hardware/tiva_aux_smph.h | 29 +-
arch/arm/src/tiva/hardware/tiva_aux_sysif.h | 29 +-
arch/arm/src/tiva/hardware/tiva_aux_wuc.h | 28 +-
arch/arm/src/tiva/hardware/tiva_ccfg.h | 31 +-
arch/arm/src/tiva/hardware/tiva_ddi.h | 29 +-
arch/arm/src/tiva/hardware/tiva_ddi0_osc.h | 29 +-
arch/arm/src/tiva/hardware/tiva_eeprom.h | 90 ++--
arch/arm/src/tiva/hardware/tiva_epi.h | 18 +-
arch/arm/src/tiva/hardware/tiva_ethernet.h | 8 +-
arch/arm/src/tiva/hardware/tiva_fcfg1.h | 28 +-
arch/arm/src/tiva/hardware/tiva_flash.h | 12 +-
arch/arm/src/tiva/hardware/tiva_gpio.h | 28 +-
arch/arm/src/tiva/hardware/tiva_i2c.h | 28 +-
arch/arm/src/tiva/hardware/tiva_ioc.h | 29 +-
arch/arm/src/tiva/hardware/tiva_memorymap.h | 28 +-
arch/arm/src/tiva/hardware/tiva_pinmap.h | 29 +-
arch/arm/src/tiva/hardware/tiva_prcm.h | 28 +-
arch/arm/src/tiva/hardware/tiva_pwm.h | 12 +-
arch/arm/src/tiva/hardware/tiva_qencoder.h | 12 +-
arch/arm/src/tiva/hardware/tiva_smph.h | 29 +-
arch/arm/src/tiva/hardware/tiva_ssi.h | 31 +-
arch/arm/src/tiva/hardware/tiva_sysctrl.h | 29 +-
arch/arm/src/tiva/hardware/tiva_timer.h | 12 +-
arch/arm/src/tiva/hardware/tiva_uart.h | 28 +-
arch/arm/src/tiva/hardware/tiva_vims.h | 31 +-
arch/arm/src/tiva/hardware/tiva_wdt.h | 22 +-
arch/arm/src/tiva/hardware/tm4c/tm4c123_gpio.h | 31 +-
arch/arm/src/tiva/hardware/tm4c/tm4c123_i2c.h | 26 +-
arch/arm/src/tiva/hardware/tm4c/tm4c123_sysctrl.h | 66 +--
arch/arm/src/tiva/hardware/tm4c/tm4c123_timer.h | 34 +-
arch/arm/src/tiva/hardware/tm4c/tm4c129_gpio.h | 45 +-
arch/arm/src/tiva/hardware/tm4c/tm4c129_i2c.h | 26 +-
arch/arm/src/tiva/hardware/tm4c/tm4c129_sysctrl.h | 88 +++-
arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h | 35 +-
arch/arm/src/tiva/hardware/tm4c/tm4c_ethernet.h | 119 ++++--
arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h | 48 ++-
arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h | 46 ++-
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h | 47 +--
arch/arm/src/tiva/hardware/tm4c/tm4c_uart.h | 26 +-
arch/arm/src/tiva/tiva_chipinfo.h | 71 ++--
arch/arm/src/tiva/tiva_enableclks.h | 8 +-
arch/arm/src/tiva/tiva_enablepwr.h | 8 +-
arch/arm/src/tiva/tiva_periphrdy.h | 16 +-
112 files changed, 2705 insertions(+), 1976 deletions(-)
diff --git a/arch/arm/src/tiva/cc13xx/cc13x0_rom.c b/arch/arm/src/tiva/cc13xx/cc13x0_rom.c
index f0d0ae0..5800d22 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x0_rom.c
+++ b/arch/arm/src/tiva/cc13xx/cc13x0_rom.c
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13x0_rom.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * This is a port of TI's setup_rom.c file which has a fully compatible BSD license:
+ * This is a port of TI's setup_rom.c file which has a fully compatible BSD
+ * license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,11 +37,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <stdint.h>
@@ -60,13 +61,13 @@
#include "cc13xx/cc13x0_rom.h"
-/************************************************************************************
+/****************************************************************************
* Private Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: rom_set_vddr_level
- ************************************************************************************/
+ ****************************************************************************/
static void rom_set_vddr_level(uint32_t ccfg_modeconf)
{
@@ -77,7 +78,8 @@ static void rom_set_vddr_level(uint32_t ccfg_modeconf)
uint16_t regval16;
/* VDDS_BOD_LEVEL = 1 means that boost mode is selected - Step up VDDR_TRIM
- * to FCFG1..VDDR_TRIM_HH */
+ * to FCFG1..VDDR_TRIM_HH
+ */
rawtrim = ((getreg32(TIVA_FCFG1_VOLT_TRIM) &
FCFG1_VOLT_TRIM_VDDR_TRIM_HH_MASK) >>
@@ -117,7 +119,8 @@ static void rom_set_vddr_level(uint32_t ccfg_modeconf)
((currenttrim << ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_SHIFT) &
ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_MASK);
putreg16(regval16,
- TIVA_ADI3_REFSYS_MASK8B + (TIVA_ADI3_REFSYS_DCDCCTL0_OFFSET * 2));
+ TIVA_ADI3_REFSYS_MASK8B +
+ (TIVA_ADI3_REFSYS_DCDCCTL0_OFFSET * 2));
/* Force SCLK_LF period wait on next read */
@@ -131,23 +134,23 @@ static void rom_set_vddr_level(uint32_t ccfg_modeconf)
putreg32(1, TIVA_AON_RTC_SYNC);
getreg32(TIVA_AON_RTC_SYNC); /* Wait one more SCLK_LF period
- * before re-enabling VDDR BOD */
+ * before re-enabling VDDR BOD */
modifyreg32(TIVA_AON_SYSCTL_RESETCTL, 0,
AON_SYSCTL_RESETCTL_VDDR_LOSS_EN);
getreg32(TIVA_AON_RTC_SYNC); /* And finally wait for
- * VDDR_LOSS_EN setting to
- * propagate */
+ * VDDR_LOSS_EN setting to
+ * propagate */
}
}
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_coldreset_from_shutdown_cfg1
- ************************************************************************************/
+ ****************************************************************************/
void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
{
@@ -158,15 +161,19 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
uint16_t regval16;
/* Check for CC13xx boost mode The combination VDDR_EXT_LOAD=0 and
- * VDDS_BOD_LEVEL=1 is defined to select boost mode */
+ * VDDS_BOD_LEVEL=1 is defined to select boost mode
+ */
if (((ccfg_modeconf & CCFG_MODE_CONF_1_VDDR_EXT_LOAD) == 0) &&
((ccfg_modeconf & CCFG_MODE_CONF_1_VDDS_BOD_LEVEL) != 0))
{
- /* Set VDDS_BOD trim - using masked write {MASK8:DATA8} - TRIM_VDDS_BOD
- * is bits[7:3] of ADI3..REFSYSCTL1 - Needs a positive transition on
- * BOD_BG_TRIM_EN (bit[7] of REFSYSCTL3) to latch new VDDS BOD. Set to 0
- * first to guarantee a positive transition. */
+ /* Set VDDS_BOD trim - using masked write {MASK8:DATA8}
+ *
+ * - TRIM_VDDS_BOD is bits[7:3] of ADI3..REFSYSCTL1
+ * - Needs a positive transition on BOD_BG_TRIM_EN
+ * (bit[7] of REFSYSCTL3) to latch new VDDS BOD.
+ * Set to 0 first to guarantee a positive transition.
+ */
putreg8(ADI3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN,
TIVA_ADI3_REFSYS_CLR + TIVA_ADI3_REFSYS_REFSYSCTL3_OFFSET);
@@ -177,7 +184,8 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
putreg16((ADI3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_MASK << 8) |
(ADI3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_POS_31),
- TIVA_ADI3_REFSYS_MASK8B + (TIVA_ADI3_REFSYS_REFSYSCTL1_OFFSET * 2));
+ TIVA_ADI3_REFSYS_MASK8B +
+ (TIVA_ADI3_REFSYS_REFSYSCTL1_OFFSET * 2));
putreg8(ADI3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN,
TIVA_ADI3_REFSYS_SET + TIVA_ADI3_REFSYS_REFSYSCTL3_OFFSET);
@@ -185,27 +193,29 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
vddr_sleeptrim =
rom_signextend_vddrtrim((getreg32(TIVA_FCFG1_VOLT_TRIM) &
- FCFG1_VOLT_TRIM_VDDR_TRIM_SLEEP_H_MASK) >>
- FCFG1_VOLT_TRIM_VDDR_TRIM_SLEEP_H_SHIFT);
+ FCFG1_VOLT_TRIM_VDDR_TRIM_SLEEP_H_MASK) >>
+ FCFG1_VOLT_TRIM_VDDR_TRIM_SLEEP_H_SHIFT);
}
else
{
vddr_sleeptrim =
rom_signextend_vddrtrim((getreg32(TIVA_FCFG1_LDO_TRIM) &
- FCFG1_LDO_TRIM_VDDR_TRIM_SLEEP_MASK) >>
- FCFG1_LDO_TRIM_VDDR_TRIM_SLEEP_SHIFT);
+ FCFG1_LDO_TRIM_VDDR_TRIM_SLEEP_MASK) >>
+ FCFG1_LDO_TRIM_VDDR_TRIM_SLEEP_SHIFT);
}
/* Adjust the VDDR_TRIM_SLEEP value with value adjustable by customer
- * (CCFG_MODE_CONF_1_VDDR_TRIM_SLEEP_DELTA) Read and sign extend VddrSleepDelta
- * (in range -8 to +7) */
+ * (CCFG_MODE_CONF_1_VDDR_TRIM_SLEEP_DELTA)
+ * Read and sign extend VddrSleepDelta (in range -8 to +7)
+ */
vddr_sleepdelta =
(((int32_t)
(ccfg_modeconf <<
(32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_WIDTH -
- CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_SHIFT))) >> (32 -
- CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_WIDTH));
+ CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_SHIFT))) >>
+ (32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_WIDTH));
+
/* Calculate new VDDR sleep trim */
vddr_sleeptrim = (vddr_sleeptrim + vddr_sleepdelta + 1);
@@ -222,7 +232,8 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
/* Write adjusted value using MASKED write (MASK8) */
regval16 = ((ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_MASK << 8) |
- ((vddr_sleeptrim << ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_SHIFT) &
+ ((vddr_sleeptrim <<
+ ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_SHIFT) &
ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_MASK));
putreg16(regval16,
TIVA_ADI3_REFSYS_MASK8B + (TIVA_ADI3_REFSYS_DCDCCTL1_OFFSET * 2));
@@ -262,8 +273,8 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
setbits |= AON_SYSCTL_PWRCTL_DCDC_EN;
}
- /* Set the ACTIVE source based upon CCFG:MODE_CONF:DCDC_ACTIVE Note: Inverse
- * polarity
+ /* Set the ACTIVE source based upon CCFG:MODE_CONF:DCDC_ACTIVE
+ * Note: Inverse polarity
*/
if ((ccfg_modeconf & CCFG_MODE_CONF_1_DCDC_ACTIVE) != 0)
@@ -278,9 +289,9 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
modifyreg32(TIVA_AON_SYSCTL_PWRCTL, clrbits, setbits);
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_coldreset_from_shutdown_cfg2
- ************************************************************************************/
+ ****************************************************************************/
void rom_setup_coldreset_from_shutdown_cfg2(uint32_t fcfg1_revision,
uint32_t ccfg_modeconf)
@@ -289,40 +300,52 @@ void rom_setup_coldreset_from_shutdown_cfg2(uint32_t fcfg1_revision,
/* Following sequence is required for using XOSCHF, if not included devices
* crashes when trying to switch to XOSCHF. Trim CAP settings. Get and set
- * trim value for the ANABYPASS_VALUE1 register */
+ * trim value for the ANABYPASS_VALUE1 register
+ */
trim = rom_setup_get_trim_anabypass_value1(ccfg_modeconf);
- rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE, TIVA_DDI0_OSC_ANABYPASSVAL1_OFFSET, trim);
+ rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE,
+ TIVA_DDI0_OSC_ANABYPASSVAL1_OFFSET, trim);
/* Trim RCOSC_LF. Get and set trim values for the RCOSCLF_RTUNE_TRIM and
- * RCOSCLF_CTUNE_TRIM fields in the XOSCLF_RCOSCLF_CTRL register. */
+ * RCOSCLF_CTUNE_TRIM fields in the XOSCLF_RCOSCLF_CTRL register.
+ */
trim = rom_setup_get_trim_rcosc_lfrtunectuntrim();
- rom_ddi_bitfield_write16(TIVA_AUX_DDI0_OSC_BASE, TIVA_DDI0_OSC_LFOSCCTL_OFFSET,
- (DDI0_OSC_LFOSCCTL_RCOSCLF_CTUNE_TRIM |
- DDI0_OSC_LFOSCCTL_RCOSCLF_RTUNE_TRIM),
- DDI0_OSC_LFOSCCTL_RCOSCLF_CTUNE_TRIM_SHIFT, trim);
-
- /* Trim XOSCHF IBIAS THERM. Get and set trim value for the XOSCHF IBIAS THERM
- * bit field in the ANABYPASS_VALUE2 register. Other register bit fields are
- * set to 0. */
+ rom_ddi_bitfield_write16(TIVA_AUX_DDI0_OSC_BASE,
+ TIVA_DDI0_OSC_LFOSCCTL_OFFSET,
+ (DDI0_OSC_LFOSCCTL_RCOSCLF_CTUNE_TRIM |
+ DDI0_OSC_LFOSCCTL_RCOSCLF_RTUNE_TRIM),
+ DDI0_OSC_LFOSCCTL_RCOSCLF_CTUNE_TRIM_SHIFT, trim);
+
+ /* Trim XOSCHF IBIAS THERM.
+ * Get and set trim value for the XOSCHF IBIAS THERM bit field in the
+ * ANABYPASS_VALUE2 register.
+ * Other register bit fields are set to 0.
+ */
trim = rom_setup_get_trim_xosc_hfibiastherm();
- rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE, TIVA_DDI0_OSC_ANABYPASSVAL2_OFFSET,
+ rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE,
+ TIVA_DDI0_OSC_ANABYPASSVAL2_OFFSET,
trim << DDI0_OSC_ANABYPASSVAL2_XOSC_HF_IBIASTHERM_SHIFT);
/* Trim AMPCOMP settings required before switch to XOSCHF */
trim = rom_setup_get_trim_ampcompth2();
- rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE, TIVA_DDI0_OSC_AMPCOMPTH2_OFFSET, trim);
+ rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE,
+ TIVA_DDI0_OSC_AMPCOMPTH2_OFFSET, trim);
trim = rom_setup_get_trim_ampcompth1();
- rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE, TIVA_DDI0_OSC_AMPCOMPTH1_OFFSET, trim);
+ rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE,
+ TIVA_DDI0_OSC_AMPCOMPTH1_OFFSET, trim);
trim = rom_setup_get_trim_ampcompctrl(fcfg1_revision);
- rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE, TIVA_DDI0_OSC_AMPCOMPCTL_OFFSET, trim);
+ rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE,
+ TIVA_DDI0_OSC_AMPCOMPCTL_OFFSET, trim);
/* Set trim for DDI0_OSC_ADCDOUBLERNANOAMPCTL_ADC_SH_MODE_EN in accordance
- * to FCFG1 setting This is bit[5] in the TIVA_DDI0_OSC_ADCDOUBLERNANOAMPCTL
- * register Using MASK4 write + 1 => writing to bits[7:4] */
+ * to FCFG1 setting
+ * This is bit[5] in the TIVA_DDI0_OSC_ADCDOUBLERNANOAMPCTL
+ * register Using MASK4 write + 1 => writing to bits[7:4]
+ */
trim = rom_setup_get_trim_adcshmodeen(fcfg1_revision);
putreg8((0x20 | (trim << 1),
@@ -330,26 +353,32 @@ void rom_setup_coldreset_from_shutdown_cfg2(uint32_t fcfg1_revision,
(TIVA_DDI0_OSC_ADCDOUBLERNANOAMPCTL_OFFSET * 2) + 1));
/* Set trim for DDI0_OSC_ADCDOUBLERNANOAMPCTL_ADC_SH_VBUF_EN in accordance
- * to FCFG1 setting This is bit[4] in the TIVA_DDI0_OSC_ADCDOUBLERNANOAMPCTL
- * register Using MASK4 write + 1 => writing to bits[7:4] */
+ * to FCFG1 setting
+ * This is bit[4] in the TIVA_DDI0_OSC_ADCDOUBLERNANOAMPCTL
+ * register Using MASK4 write + 1 => writing to bits[7:4]
+ */
trim = rom_setup_get_trim_adcshvbufen(fcfg1_revision);
putreg8(0x10 | trim,
TIVA_AUX_DDI0_OSC_BASE + TIVA_DI_MASK4B_OFFSET +
(TIVA_DDI0_OSC_ADCDOUBLERNANOAMPCTL_OFFSET * 2) + 1);
- /* Set trim for the PEAK_DET_ITRIM, HP_BUF_ITRIM and LP_BUF_ITRIM bit fields
- * in the TIVA_DDI0_OSC_XOSCHFCTL register in accordance to FCFG1 setting.
- * Remaining register bit fields are set to their reset values of 0. */
+ /* Set trim for the PEAK_DET_ITRIM, HP_BUF_ITRIM and LP_BUF_ITRIM bit
+ * fields in the TIVA_DDI0_OSC_XOSCHFCTL register in accordance to FCFG1
+ * setting.
+ * Remaining register bit fields are set to their reset values of 0.
+ */
trim = rom_setup_get_trim_xosc_hfctrl(fcfg1_revision);
- rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE, TIVA_DDI0_OSC_XOSCHFCTL_OFFSET, trim);
-
- /* Set trim for DBLR_LOOP_FILTER_RESET_VOLTAGE in accordance to FCFG1 setting
- * (This is bits [18:17] in TIVA_DDI0_OSC_ADCDOUBLERNANOAMPCTL) (Using MASK4
- * write + 4 => writing to bits[19:16] => (4*4)) (Assuming:
- * DDI0_OSC_ADCDOUBLERNANOAMPCTL_DBLR_LOOP_FILTER_RESET_VOLTAGE_SHIFT = 17 and
- * that DDI0_OSC_ADCDOUBLERNANOAMPCTL_DBLR_LOOP_FILTER_RESET_VOLTAGE_MASK =
+ rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE,
+ TIVA_DDI0_OSC_XOSCHFCTL_OFFSET, trim);
+
+ /* Set trim for DBLR_LOOP_FILTER_RESET_VOLTAGE in accordance to FCFG1
+ * setting (This is bits [18:17] in TIVA_DDI0_OSC_ADCDOUBLERNANOAMPCTL)
+ * (Using MASK4 write + 4 => writing to bits[19:16] => (4*4)) (Assuming:
+ * DDI0_OSC_ADCDOUBLERNANOAMPCTL_DBLR_LOOP_FILTER_RESET_VOLTAGE_SHIFT = 17
+ * and that
+ * DDI0_OSC_ADCDOUBLERNANOAMPCTL_DBLR_LOOP_FILTER_RESET_VOLTAGE_MASK =
* 0x00060000)
*/
@@ -360,8 +389,8 @@ void rom_setup_coldreset_from_shutdown_cfg2(uint32_t fcfg1_revision,
/* Update DDI0_OSC_ATESTCTL_ATESTLF_RCOSCLF_IBIAS_TRIM with data from
* FCFG1_OSC_CONF_ATESTLF_RCOSCLF_IBIAS_TRIM This is TIVA_DDI0_OSC_ATESTCTL
- * bit[7] ( TIVA_DDI0_OSC_ATESTCTL is currently hidden (but=0x00000020)) Using
- * MASK4 write + 1 => writing to bits[7:4]
+ * bit[7] ( TIVA_DDI0_OSC_ATESTCTL is currently hidden (but=0x00000020))
+ * Using MASK4 write + 1 => writing to bits[7:4]
*/
trim = rom_setup_get_trim_rcosc_lfibiastrim(fcfg1_revision);
@@ -371,8 +400,8 @@ void rom_setup_coldreset_from_shutdown_cfg2(uint32_t fcfg1_revision,
/* Update DDI0_OSC_LFOSCCTL_XOSCLF_REGULATOR_TRIM and
* DDI0_OSC_LFOSCCTL_XOSCLF_CMIRRWR_RATIO in one write This can be
- * simplified since the registers are packed together in the same order both
- * in FCFG1 and in the HW register. This spans TIVA_DDI0_OSC_LFOSCCTL
+ * simplified since the registers are packed together in the same order
+ * both in FCFG1 and in the HW register. This spans TIVA_DDI0_OSC_LFOSCCTL
* bits[23:18] Using MASK8 write + 4 => writing to bits[23:16]
*/
@@ -383,22 +412,26 @@ void rom_setup_coldreset_from_shutdown_cfg2(uint32_t fcfg1_revision,
/* Set trim the HPM_IBIAS_WAIT_CNT, LPM_IBIAS_WAIT_CNT and IDAC_STEP bit
* fields in the TIVA_DDI0_OSC_RADCEXTCFG register in accordance to FCFG1
- * setting. Remaining register bit fields are set to their reset values of 0. */
+ * setting.
+ * Remaining register bit fields are set to their reset values of 0.
+ */
trim = rom_setup_get_trim_radc_extcfg(fcfg1_revision);
- rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE, TIVA_DDI0_OSC_RADCEXTCFG_OFFSET, trim);
+ rom_ddi_write32(TIVA_AUX_DDI0_OSC_BASE,
+ TIVA_DDI0_OSC_RADCEXTCFG_OFFSET, trim);
- /* Setting FORCE_KICKSTART_EN (ref. CC26_V1_BUG00261). Should also be done
- * for PG2 (This is bit 22 in TIVA_DDI0_OSC_CTL0) */
+ /* Setting FORCE_KICKSTART_EN (ref. CC26_V1_BUG00261).
+ * Should also be done for PG2 (This is bit 22 in TIVA_DDI0_OSC_CTL0)
+ */
putreg32(DDI0_OSC_CTL0_FORCE_KICKSTART_EN,
TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_SET_OFFSET +
TIVA_DDI0_OSC_CTL0_OFFSET);
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_coldreset_from_shutdown_cfg13
- ************************************************************************************/
+ ****************************************************************************/
void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
{
@@ -409,15 +442,18 @@ void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
uint32_t regval;
uint8_t regval8;
- /* Examine the XOSC_FREQ field to select 0x1=HPOSC, 0x2=48MHz XOSC, 0x3=24MHz
- * XOSC */
+ /* Examine the XOSC_FREQ field to select
+ * 0x1=HPOSC,
+ * 0x2=48MHz XOSC,
+ * 0x3=24MHz XOSC
+ */
switch ((ccfg_modeconf & CCFG_MODE_CONF_1_XOSC_FREQ_MASK) >>
CCFG_MODE_CONF_1_XOSC_FREQ_SHIFT)
{
case 2:
- /* XOSC source is a 48 MHz crystal Do nothing (since this is the reset
- * setting)
+ /* XOSC source is a 48 MHz crystal Do nothing
+ * (since this is the reset setting)
*/
break;
@@ -431,8 +467,10 @@ void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
if ((fcfg1_oscconf & FCFG1_OSC_CONF_HPOSC_OPTION) == 0)
{
- /* This is a HPOSC chip, apply HPOSC settings Set bit
- * DDI0_OSC_CTL0_HPOSC_MODE_EN (this is bit 14 in TIVA_DDI0_OSC_CTL0) */
+ /* This is a HPOSC chip,
+ * apply HPOSC settings Set bit DDI0_OSC_CTL0_HPOSC_MODE_EN
+ * (this is bit 14 in TIVA_DDI0_OSC_CTL0)
+ */
putreg32(DDI0_OSC_CTL0_HPOSC_MODE_EN,
TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_SET_OFFSET +
@@ -450,7 +488,8 @@ void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
* ADI2_REFSYS_HPOSCCTL0_SERIES_CAP =
* FCFG1_OSC_CONF_HPOSC_SERIES_CAP (2 bits)
* ADI2_REFSYS_HPOSCCTL0_DIV3_BYPASS =
- * FCFG1_OSC_CONF_HPOSC_DIV3_BYPASS (1 bit) */
+ * FCFG1_OSC_CONF_HPOSC_DIV3_BYPASS (1 bit)
+ */
regval = ((getreg32(TIVA_ADI2_REFSYS_HPOSCCTL2) &
~(ADI2_REFSYS_HPOSCCTL2_BIAS_HOLD_MODE_EN |
@@ -502,11 +541,13 @@ void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
putreg32(regval, TIVA_ADI2_REFSYS_HPOSCCTL0);
break;
}
+
/* Not a HPOSC chip - fall through to default */
default:
/* XOSC source is a 24 MHz crystal (default) Set bit
- * DDI0_OSC_CTL0_XTAL_IS_24M (this is bit 31 in TIVA_DDI0_OSC_CTL0) */
+ * DDI0_OSC_CTL0_XTAL_IS_24M (this is bit 31 in TIVA_DDI0_OSC_CTL0)
+ */
putreg32(DDI0_OSC_CTL0_XTAL_IS_24M,
TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_SET_OFFSET +
@@ -514,20 +555,24 @@ void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
break;
}
- /* Set XOSC_HF in bypass mode if CCFG is configured for external TCXO Please
- * note that it is up to the customer to make sure that the external clock
- * source is up and running before XOSC_HF can be used. */
+ /* Set XOSC_HF in bypass mode if CCFG is configured for external TCXO
+ * Please note that it is up to the customer to make sure that the external
+ * clock source is up and running before XOSC_HF can be used.
+ */
if ((getreg32(TIVA_CCFG_SIZE_AND_DIS_FLAGS) &
CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO) == 0)
{
putreg32(DDI0_OSC_XOSCHFCTL_BYPASS,
- TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_SET_OFFSET + TIVA_DDI0_OSC_XOSCHFCTL_OFFSET);
+ TIVA_AUX_DDI0_OSC_BASE +
+ TIVA_DDI_SET_OFFSET +
+ TIVA_DDI0_OSC_XOSCHFCTL_OFFSET);
}
- /* Clear DDI0_OSC_CTL0_CLK_LOSS_EN (ClockLossEventEnable()). This is bit 9
- * in TIVA_DDI0_OSC_CTL0. This is typically already 0 except on Lizard where it
- * is set in ROM-boot */
+ /* Clear DDI0_OSC_CTL0_CLK_LOSS_EN (ClockLossEventEnable()).
+ * This is bit 9 in TIVA_DDI0_OSC_CTL0.
+ * This is typically already 0 except on Lizard where it is set in ROM-boot
+ */
putreg32(DDI0_OSC_CTL0_CLK_LOSS_EN,
TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_CLR_OFFSET +
@@ -547,36 +592,42 @@ void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
switch ((ccfg_modeconf & CCFG_MODE_CONF_1_SCLK_LF_OPTION_MASK) >>
CCFG_MODE_CONF_1_SCLK_LF_OPTION_SHIFT)
{
- case 0: /* XOSC_HF_DLF (XOSCHF/1536) -> SCLK_LF (=31250
- * Hz) */
+ case 0: /* XOSC_HF_DLF (XOSCHF/1536) -> SCLK_LF
+ * (=31250Hz) */
rom_osc_set_clocksource(OSC_SRC_CLK_LF, OSC_XOSC_HF);
- rom_setup_aonrtc_subsecinc(0x8637bd); /* RTC_INCREMENT = 2^38 /
+ rom_setup_aonrtc_subsecinc(0x8637bd); /* RTC_INCREMENT = 2^38 /
* frequency */
break;
- case 1: /* EXTERNAL signal -> SCLK_LF
- * (frequency=2^38/CCFG_EXT_LF_CLK_RTC_INCREMENT)
- * * Set SCLK_LF to use the same source as SCLK_HF
- * * Can be simplified a bit since possible return
- * values for HF matches LF settings */
+ case 1: /* EXTERNAL signal -> SCLK_LF
+ * (frequency=2^38/CCFG_EXT_LF_CLK_RTC_INCREMENT)
+ * * Set SCLK_LF to use the same source as SCLK_HF
+ * * Can be simplified a bit since possible return
+ * values for HF matches LF settings
+ */
current_hfclock = rom_osc_get_clocksource(OSC_SRC_CLK_HF);
rom_osc_set_clocksource(OSC_SRC_CLK_LF, current_hfclock);
while (rom_osc_get_clocksource(OSC_SRC_CLK_LF) != current_hfclock)
{
/* Wait until switched */
-
}
+
ccfg_extlfclk = getreg32(TIVA_CCFG_EXT_LF_CLK);
- rom_setup_aonrtc_subsecinc((ccfg_extlfclk & CCFG_EXT_LF_CLK_RTC_INCREMENT_MASK)
- >> CCFG_EXT_LF_CLK_RTC_INCREMENT_SHIFT);
+ rom_setup_aonrtc_subsecinc((ccfg_extlfclk &
+ CCFG_EXT_LF_CLK_RTC_INCREMENT_MASK) >>
+ CCFG_EXT_LF_CLK_RTC_INCREMENT_SHIFT);
/* Route external clock to AON IOC w/hysteresis. Set XOSC_LF in
* bypass mode to allow external 32 kHz clock
*/
- rom_iocport_set_configuration((ccfg_extlfclk & CCFG_EXT_LF_CLK_DIO_MASK) >> CCFG_EXT_LF_CLK_DIO_SHIFT, IOC_PORT_AON_CLK32K, IOC_STD_INPUT | IOC_HYST_ENABLE);
+ rom_iocport_set_configuration((ccfg_extlfclk &
+ CCFG_EXT_LF_CLK_DIO_MASK) >>
+ CCFG_EXT_LF_CLK_DIO_SHIFT,
+ IOC_PORT_AON_CLK32K,
+ IOC_STD_INPUT | IOC_HYST_ENABLE);
putreg32(DDI0_OSC_CTL0_XOSC_LF_DIG_BYPASS,
TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_SET_OFFSET +
@@ -597,8 +648,8 @@ void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
/* Update ADI4_AUX_ADCREF1_VTRIM with value from FCFG1 */
regval8 = (((getreg32(TIVA_FCFG1_SOC_ADC_REF_TRIM_AND_OFFSET_EXT) >>
- FCFG1_SOC_ADC_REF_TRIM_AND_OFFSET_EXT_SOC_ADC_REF_VOLTAGE_TRIM_TEMP1_SHIFT)
- << ADI4_AUX_ADCREF1_VTRIM_SHIFT) & ADI4_AUX_ADCREF1_VTRIM_MASK);
+ FCFG1_SOC_ADC_REF_TRIM_AND_OFFSET_EXT_SOC_ADC_REF_VOLTAGE_TRIM_TEMP1_SHIFT)
+ << ADI4_AUX_ADCREF1_VTRIM_SHIFT) & ADI4_AUX_ADCREF1_VTRIM_MASK);
putreg8(regval8, TIVA_ADI4_AUX_ADCREF1);
/* Sync with AON */
@@ -606,9 +657,9 @@ void rom_setup_coldreset_from_shutdown_cfg3(uint32_t ccfg_modeconf)
SysCtrlAonSync();
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_anabypass_value1
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_anabypass_value1(uint32_t ccfg_modeconf)
{
@@ -617,9 +668,10 @@ uint32_t rom_setup_get_trim_anabypass_value1(uint32_t ccfg_modeconf)
uint32_t xosc_hf_col;
uint32_t trimval;
- /* Use device specific trim values located in factory configuration area for
- * the XOSC_HF_COLUMN_Q12 and XOSC_HF_ROW_Q12 bit fields in the
- * ANABYPASS_VALUE1 register. Value for the other bit fields are set to 0. */
+ /* Use device specific trim values located in factory configuration area
+ * for the XOSC_HF_COLUMN_Q12 and XOSC_HF_ROW_Q12 bit fields in the
+ * ANABYPASS_VALUE1 register. Value for the other bit fields are set to 0.
+ */
fcfg1val = getreg32(TIVA_FCFG1_CONFIG_OSC_TOP);
xosc_hf_row = ((fcfg1val &
@@ -633,36 +685,38 @@ uint32_t rom_setup_get_trim_anabypass_value1(uint32_t ccfg_modeconf)
{
/* XOSC_CAP_MOD = 0 means: CAP_ARRAY_DELTA is in use -> Apply
* compensation XOSC_CAPARRAY_DELTA is located in bit[15:8] of
- * ccfg_modeconf Note: HW_REV_DEPENDENT_IMPLEMENTATION. Field width is
- * not given by a define and sign extension must therefore be hard coded.
- * ( A small test program is created verifying the code lines below: Ref.:
- * ..\test\small_standalone_test_programs\CapArrayDeltaAdjust_test.c) */
+ * ccfg_modeconf Note: HW_REV_DEPENDENT_IMPLEMENTATION.
+ * Field width is not given by a define and sign extension must
+ * therefore be hard coded.( A small test program is created
+ * verifying the code lines below: Ref.:
+ * ..\test\small_standalone_test_programs\CapArrayDeltaAdjust_test.c)
+ */
int32_t customer_delta_adjust =
(((int32_t)
(ccfg_modeconf <<
(32 - CCFG_MODE_CONF_1_XOSC_CAPARRAY_DELTA_WIDTH -
- CCFG_MODE_CONF_1_XOSC_CAPARRAY_DELTA_SHIFT))) >> (32 -
- CCFG_MODE_CONF_1_XOSC_CAPARRAY_DELTA_WIDTH));
+ CCFG_MODE_CONF_1_XOSC_CAPARRAY_DELTA_SHIFT))) >>
+ (32 - CCFG_MODE_CONF_1_XOSC_CAPARRAY_DELTA_WIDTH));
while (customer_delta_adjust < 0)
{
xosc_hf_col >>= 1; /* COL 1 step down */
- if (xosc_hf_col == 0)
- { /* if COL below minimum */
+ /* if COL below minimum */
+ if (xosc_hf_col == 0)
+ {
xosc_hf_col = 0xffff; /* Set COL to maximum */
-
xosc_hf_row >>= 1; /* ROW 1 step down */
- if (xosc_hf_row == 0)
- { /* if ROW below minimum */
+ /* if ROW below minimum */
+ if (xosc_hf_row == 0)
+ {
xosc_hf_row = 1; /* Set both ROW and COL */
xosc_hf_col = 1; /* to minimum */
-
}
}
@@ -673,22 +727,24 @@ uint32_t rom_setup_get_trim_anabypass_value1(uint32_t ccfg_modeconf)
{
xosc_hf_col = (xosc_hf_col << 1) | 1; /* COL 1 step up */
- if (xosc_hf_col > 0xffff)
- { /* if COL above maximum */
+ /* if COL above maximum */
+ if (xosc_hf_col > 0xffff)
+ {
xosc_hf_col = 1; /* Set COL to minimum */
xosc_hf_row = (xosc_hf_row << 1) | 1; /* ROW 1 step up */
- if (xosc_hf_row > 0xf)
- { /* if ROW above maximum */
+ /* if ROW above maximum */
+ if (xosc_hf_row > 0xf)
+ {
xosc_hf_row = 0xf; /* Set both ROW and COL */
xosc_hf_col = 0xffff; /* to maximum */
-
}
}
+
customer_delta_adjust--;
}
}
@@ -700,9 +756,9 @@ uint32_t rom_setup_get_trim_anabypass_value1(uint32_t ccfg_modeconf)
return trimval;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_rcosc_lfrtunectuntrim
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_rcosc_lfrtunectuntrim(void)
{
@@ -725,9 +781,9 @@ uint32_t rom_setup_get_trim_rcosc_lfrtunectuntrim(void)
return trimval;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_xosc_hfibiastherm
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_xosc_hfibiastherm(void)
{
@@ -743,18 +799,19 @@ uint32_t rom_setup_get_trim_xosc_hfibiastherm(void)
return trimval;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_ampcompth2
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_ampcompth2(void)
{
uint32_t trimval;
uint32_t fcfg1val;
- /* Use device specific trim value located in factory configuration area. All
- * defined register bit fields have corresponding trim value in the factory
- * configuration area */
+ /* Use device specific trim value located in factory configuration area.
+ * All defined register bit fields have corresponding trim value in the
+ * factory configuration area
+ */
fcfg1val = getreg32(TIVA_FCFG1_AMPCOMP_TH2);
trimval = ((fcfg1val &
@@ -777,18 +834,19 @@ uint32_t rom_setup_get_trim_ampcompth2(void)
return trimval;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_ampcompth1
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_ampcompth1(void)
{
uint32_t trimval;
uint32_t fcfg1val;
- /* Use device specific trim values located in factory configuration area. All
- * defined register bit fields have a corresponding trim value in the factory
- * configuration area */
+ /* Use device specific trim values located in factory configuration area.
+ * All defined register bit fields have a corresponding trim value in the
+ * factory configuration area
+ */
fcfg1val = getreg32(TIVA_FCFG1_AMPCOMP_TH1);
trimval = (((fcfg1val &
@@ -811,9 +869,9 @@ uint32_t rom_setup_get_trim_ampcompth1(void)
return trimval;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_ampcompctrl
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision)
{
@@ -825,8 +883,9 @@ uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision)
int32_t delta_adjust;
/* Use device specific trim values located in factory configuration area.
- * Register bit fields without trim values in the factory configuration area
- * will be set to the value of 0. */
+ * Register bit fields without trim values in the factory configuration
+ * area will be set to the value of 0.
+ */
fcfg1val = getreg32(TIVA_FCFG1_AMPCOMP_CTRL1);
@@ -840,12 +899,15 @@ uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision)
if ((getreg32(TIVA_CCFG_SIZE_AND_DIS_FLAGS) &
CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR) == 0)
{
- /* Adjust with TIVA_DELTA_IBIAS_OFFSET and DELTA_IBIAS_INIT from CCFG */
+ /* Adjust with TIVA_DELTA_IBIAS_OFFSET and DELTA_IBIAS_INIT
+ * from CCFG
+ */
mode_conf1 = getreg32(TIVA_CCFG_MODE_CONF_1);
- /* Both fields are signed 4-bit values. This is an assumption when doing
- * the sign extension. */
+ /* Both fields are signed 4-bit values. This is an assumption
+ * when doing the sign extension.
+ */
delta_adjust =
(((int32_t)
@@ -858,6 +920,7 @@ uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision)
{
delta_adjust = 0;
}
+
if (delta_adjust >
(DDI0_OSC_AMPCOMPCTL_IBIAS_OFFSET_MASK >>
DDI0_OSC_AMPCOMPCTL_IBIAS_OFFSET_SHIFT))
@@ -866,19 +929,21 @@ uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision)
(DDI0_OSC_AMPCOMPCTL_IBIAS_OFFSET_MASK >>
DDI0_OSC_AMPCOMPCTL_IBIAS_OFFSET_SHIFT);
}
+
ibias_offset = (uint32_t) delta_adjust;
delta_adjust =
(((int32_t)
(mode_conf1 <<
(32 - CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_WIDTH -
- CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_SHIFT))) >> (32 -
- CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_WIDTH));
+ CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_SHIFT))) >>
+ (32 - CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_WIDTH));
delta_adjust += (int32_t)ibias_init;
if (delta_adjust < 0)
{
delta_adjust = 0;
}
+
if (delta_adjust >
(DDI0_OSC_AMPCOMPCTL_IBIAS_INIT_MASK >>
DDI0_OSC_AMPCOMPCTL_IBIAS_INIT_SHIFT))
@@ -887,6 +952,7 @@ uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision)
(DDI0_OSC_AMPCOMPCTL_IBIAS_INIT_MASK >>
DDI0_OSC_AMPCOMPCTL_IBIAS_INIT_SHIFT);
}
+
ibias_init = (uint32_t) delta_adjust;
}
@@ -921,11 +987,12 @@ uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision)
return trimval;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_dblrloopfilter_resetvoltage
- ************************************************************************************/
+ ****************************************************************************/
-uint32_t rom_setup_get_trim_dblrloopfilter_resetvoltage(uint32_t fcfg1_revision)
+uint32_t
+rom_setup_get_trim_dblrloopfilter_resetvoltage(uint32_t fcfg1_revision)
{
uint32_t dblrLoopFilterResetVoltageValue = 0; /* Reset value */
@@ -940,9 +1007,9 @@ uint32_t rom_setup_get_trim_dblrloopfilter_resetvoltage(uint32_t fcfg1_revision)
return (dblrLoopFilterResetVoltageValue);
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_adcshmodeen
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_adcshmodeen(uint32_t fcfg1_revision)
{
@@ -950,7 +1017,8 @@ uint32_t rom_setup_get_trim_adcshmodeen(uint32_t fcfg1_revision)
if (fcfg1_revision >= 0x00000022)
{
- if ((getreg32(TIVA_FCFG1_OSC_CONF) & FCFG1_OSC_CONF_ADC_SH_MODE_EN) == 0)
+ if ((getreg32(TIVA_FCFG1_OSC_CONF) &
+ FCFG1_OSC_CONF_ADC_SH_MODE_EN) == 0)
{
fcfg1_adcsh_modeen = 0;
}
@@ -959,9 +1027,9 @@ uint32_t rom_setup_get_trim_adcshmodeen(uint32_t fcfg1_revision)
return fcfg1_adcsh_modeen;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_adcshvbufen
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_adcshvbufen(uint32_t fcfg1_revision)
{
@@ -969,7 +1037,8 @@ uint32_t rom_setup_get_trim_adcshvbufen(uint32_t fcfg1_revision)
if (fcfg1_revision >= 0x00000022)
{
- if ((getreg32(TIVA_FCFG1_OSC_CONF) & FCFG1_OSC_CONF_ADC_SH_VBUF_EN) == 0)
+ if ((getreg32(TIVA_FCFG1_OSC_CONF) &
+ FCFG1_OSC_CONF_ADC_SH_VBUF_EN) == 0)
{
trim_adcshvbufen = 0;
}
@@ -978,9 +1047,9 @@ uint32_t rom_setup_get_trim_adcshvbufen(uint32_t fcfg1_revision)
return trim_adcshvbufen;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_xosc_hfctrl
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_xosc_hfctrl(uint32_t fcfg1_revision)
{
@@ -1010,9 +1079,9 @@ uint32_t rom_setup_get_trim_xosc_hfctrl(uint32_t fcfg1_revision)
return (getTrimForXoschfCtlValue);
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_xosc_hffaststart
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_xosc_hffaststart(void)
{
@@ -1027,9 +1096,9 @@ uint32_t rom_setup_get_trim_xosc_hffaststart(void)
return (ui32XoscHfFastStartValue);
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_radc_extcfg
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_radc_extcfg(uint32_t fcfg1_revision)
{
@@ -1060,9 +1129,9 @@ uint32_t rom_setup_get_trim_radc_extcfg(uint32_t fcfg1_revision)
return (getTrimForRadcExtCfgValue);
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_rcosc_lfibiastrim
- ************************************************************************************/
+ ****************************************************************************/
uint32_t rom_setup_get_trim_rcosc_lfibiastrim(uint32_t fcfg1_revision)
{
@@ -1070,7 +1139,8 @@ uint32_t rom_setup_get_trim_rcosc_lfibiastrim(uint32_t fcfg1_revision)
if (fcfg1_revision >= 0x00000022)
{
- if ((getreg32(TIVA_FCFG1_OSC_CONF) & FCFG1_OSC_CONF_ATESTLF_RCOSCLF_IBIAS_TRIM) != 0)
+ if ((getreg32(TIVA_FCFG1_OSC_CONF) &
+ FCFG1_OSC_CONF_ATESTLF_RCOSCLF_IBIAS_TRIM) != 0)
{
trim_rcosc_lfibaistrim = 1;
}
@@ -1079,11 +1149,12 @@ uint32_t rom_setup_get_trim_rcosc_lfibiastrim(uint32_t fcfg1_revision)
return trim_rcosc_lfibaistrim;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_get_trim_lfregulator_cmirrwr_ratio
- ************************************************************************************/
+ ****************************************************************************/
-uint32_t rom_setup_get_trim_lfregulator_cmirrwr_ratio(uint32_t fcfg1_revision)
+uint32_t
+rom_setup_get_trim_lfregulator_cmirrwr_ratio(uint32_t fcfg1_revision)
{
/* Default value for both fields */
@@ -1101,18 +1172,18 @@ uint32_t rom_setup_get_trim_lfregulator_cmirrwr_ratio(uint32_t fcfg1_revision)
return (trimForXoscLfRegulatorAndCmirrwrRatioValue);
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_cachemode
- ************************************************************************************/
+ ****************************************************************************/
void rom_setup_cachemode(void)
{
- /* - Make sure to enable aggressive VIMS clock gating for power optimization
+ /* Make sure to enable aggressive VIMS clock gating for power optimization
* Only for PG2 devices. - Enable cache prefetch enable as default setting
* (Slightly higher power consumption, but higher CPU performance) - IF (
- * CCFG_..._DIS_GPRAM == 1 ) then: Enable cache (set cache mode = 1), even if
- * set by ROM boot code (This is done because it's not set by boot code when
- * running inside a debugger supporting the Halt In Boot (HIB)
+ * CCFG_..._DIS_GPRAM == 1 ) then: Enable cache (set cache mode = 1), even
+ * if set by ROM boot code (This is done because it's not set by boot code
+ * when running inside a debugger supporting the Halt In Boot (HIB)
* functionality). else: Set MODE_GPRAM if not already set (see inline
* comments as well)
*/
@@ -1143,15 +1214,16 @@ void rom_setup_cachemode(void)
VIMS_STAT_MODE_GPRAM)
{
/* GPRAM is enabled in CCFG but not selected Note: It is recommended to
- * go via MODE_OFF when switching to MODE_GPRAM */
+ * go via MODE_OFF when switching to MODE_GPRAM
+ */
putreg32((vims_ctlmode0 | VIMS_CTL_MODE_OFF), TIVA_VIMS_CTL);
while ((getreg32(TIVA_VIMS_STAT) & VIMS_STAT_MODE_MASK) !=
VIMS_STAT_MODE_OFF)
{
/* Do nothing - wait for an eventual mode change to complete (This
- * goes fast). */
-
+ * goes fast).
+ */
}
putreg32(vims_ctlmode0, TIVA_VIMS_CTL);
@@ -1164,17 +1236,19 @@ void rom_setup_cachemode(void)
}
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_setup_aonrtc_subsecinc
- ************************************************************************************/
+ ****************************************************************************/
void rom_setup_aonrtc_subsecinc(uint32_t subsecinc)
{
- /* Loading a new RTCSUBSECINC value is done in 5 steps: 1. Write bit[15:0] of
- * new SUBSECINC value to TIVA_AUX_WUC_RTCSUBSECINC0 2. Write bit[23:16] of new
- * SUBSECINC value to TIVA_AUX_WUC_RTCSUBSECINC1 3. Set
- * AUX_WUC_RTCSUBSECINCCTL_UPD_REQ 4. Wait for
- * AUX_WUC_RTCSUBSECINCCTL_UPD_ACK 5. Clear AUX_WUC_RTCSUBSECINCCTL_UPD_REQ */
+ /* Loading a new RTCSUBSECINC value is done in 5 steps:
+ * 1. Write bit[15:0] of new SUBSECINC value to TIVA_AUX_WUC_RTCSUBSECINC0
+ * 2. Write bit[23:16] of new SUBSECINC value to TIVA_AUX_WUC_RTCSUBSECINC1
+ * 3. Set AUX_WUC_RTCSUBSECINCCTL_UPD_REQ
+ * 4. Wait forAUX_WUC_RTCSUBSECINCCTL_UPD_ACK
+ * 5. Clear AUX_WUC_RTCSUBSECINCCTL_UPD_REQ
+ */
putreg32(((subsecinc) & AUX_WUC_RTCSUBSECINC0_INC15_0_MASK),
TIVA_AUX_WUC_RTCSUBSECINC0);
@@ -1182,7 +1256,8 @@ void rom_setup_aonrtc_subsecinc(uint32_t subsecinc)
TIVA_AUX_WUC_RTCSUBSECINC1);
putreg32(AUX_WUC_RTCSUBSECINCCTL_UPD_REQ, TIVA_AUX_WUC_RTCSUBSECINCCTL);
- while ((getreg32(TIVA_AUX_WUC_RTCSUBSECINCCTL) & AUX_WUC_RTCSUBSECINCCTL_UPD_ACK) == 0)
+ while ((getreg32(TIVA_AUX_WUC_RTCSUBSECINCCTL) &
+ AUX_WUC_RTCSUBSECINCCTL_UPD_ACK) == 0)
{
}
diff --git a/arch/arm/src/tiva/cc13xx/cc13x0_rom.h b/arch/arm/src/tiva/cc13xx/cc13x0_rom.h
index b75853b..2b5bf85 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x0_rom.h
+++ b/arch/arm/src/tiva/cc13xx/cc13x0_rom.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13x0_rom.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * This is a port of TI's setup_rom.h file which has a fully compatible BSD license:
+ * This is a port of TI's setup_rom.h file which has a fully compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,26 +37,26 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CC13XX_CC13X0_ROM_H
#define __ARCH_ARM_SRC_TIVA_CC13XX_CC13X0_ROM_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <stdint.h>
#include <nuttx/irq.h>
#include "hardware/tiva_aux_smph.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Start address of the ROM hard API access table (located after the ROM FW rev
- * field)
+/* Start address of the ROM hard API access table
+ * (located after the ROM FW rev field)
*/
#define ROM_HAPI_TABLE_ADDR 0x10000048
@@ -605,9 +606,9 @@
#define AUX_WUC_POWER_DOWN 0x00000002
#define AUX_WUC_POWER_ACTIVE 0x00000004
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
/* ROM Hard-API function interface types */
@@ -659,7 +660,9 @@ typedef void (*fptr_adccompbin_t) (uint8_t /* signal */);
typedef void (*fptr_compbref_t) (uint8_t /* signal */);
-/* Types used in the "Safe" interfaces taken from the TI DriverLib hw_types.h */
+/* Types used in the "Safe" interfaces taken from the TI DriverLib
+ * hw_types.h
+ */
typedef void (*fptr_void_void_t) (void);
typedef void (*fptr_void_uint8_t) (uint8_t);
@@ -691,9 +694,9 @@ struct hard_api_s
typedef struct hard_api_s hard_api_t;
-/************************************************************************************
+/****************************************************************************
* Global Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
/* ROM functions implemented in FLASH */
@@ -708,26 +711,29 @@ uint32_t rom_setup_get_trim_xosc_hfibiastherm(void);
uint32_t rom_setup_get_trim_ampcompth1(void);
uint32_t rom_setup_get_trim_ampcompth2(void);
uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision);
-uint32_t rom_setup_get_trim_dblrloopfilter_resetvoltage(uint32_t fcfg1_revision);
+uint32_t
+rom_setup_get_trim_dblrloopfilter_resetvoltage(uint32_t fcfg1_revision);
uint32_t rom_setup_get_trim_adcshmodeen(uint32_t fcfg1_revision);
uint32_t rom_setup_get_trim_adcshvbufen(uint32_t fcfg1_revision);
uint32_t rom_setup_get_trim_xosc_hfctrl(uint32_t fcfg1_revision);
uint32_t rom_setup_get_trim_xosc_hffaststart(void);
uint32_t rom_setup_get_trim_radc_extcfg(uint32_t fcfg1_revision);
uint32_t rom_setup_get_trim_rcosc_lfibiastrim(uint32_t fcfg1_revision);
-uint32_t rom_setup_get_trim_lfregulator_cmirrwr_ratio(uint32_t fcfg1_revision);
+uint32_t
+rom_setup_get_trim_lfregulator_cmirrwr_ratio(uint32_t fcfg1_revision);
void rom_setup_cachemode(void);
void rom_setup_aonrtc_subsecinc(uint32_t subsecinc);
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: rom_signextend_vddrtrim
*
* Description:
- * Sign extend the VDDR_TRIM setting (special format ranging from -10 to +21)
+ * Sign extend the VDDR_TRIM setting
+ * (special format ranging from -10 to +21)
*
* Input Parameters
* vddrtrim - VDDR_TRIM setting
@@ -735,7 +741,7 @@ void rom_setup_aonrtc_subsecinc(uint32_t subsecinc);
* Returned Value:
* Returns sign extended VDDR_TRIM setting.
*
- ************************************************************************************/
+ ****************************************************************************/
static inline int32_t rom_signextend_vddrtrim(uint32_t vddrtrim)
{
@@ -752,7 +758,7 @@ static inline int32_t rom_signextend_vddrtrim(uint32_t vddrtrim)
return signed_vaddrtrim;
}
-/************************************************************************************
+/****************************************************************************
* Name: rom_hapi_void and rom_hapi_auxadiselect
*
* Description:
@@ -765,7 +771,7 @@ static inline int32_t rom_signextend_vddrtrim(uint32_t vddrtrim)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
inline static void rom_hapi_void(fptr_void_void_t fptr)
{
@@ -779,7 +785,8 @@ inline static void rom_hapi_void(fptr_void_void_t fptr)
leave_critical_section(flags);
}
-inline static void rom_hapi_auxadiselect(fptr_void_uint8_t fptr, uint8_t signal)
+inline static void rom_hapi_auxadiselect(fptr_void_uint8_t fptr,
+ uint8_t signal)
{
irqstate_t flags = enter_critical_section();
while (getreg32(TIVA_AUX_SMPH_SMPH0) == 0)
diff --git a/arch/arm/src/tiva/cc13xx/cc13x0_trim.c b/arch/arm/src/tiva/cc13xx/cc13x0_trim.c
index 94999a7..a2fd195 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x0_trim.c
+++ b/arch/arm/src/tiva/cc13xx/cc13x0_trim.c
@@ -10,37 +10,38 @@
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
*
- * 1) Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
+ * 1) Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
*
- * 2) Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
+ * 2) Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3) Neither the name NuttX nor the names of its contributors may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
+ * 3) Neither the name NuttX nor the names of its contributors may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- ******************************************************************************/
+ ****************************************************************************/
-/******************************************************************************
+/****************************************************************************
* Included Files
- ******************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -59,11 +60,11 @@
#include "cc13xx/cc13x0_rom.h"
-/******************************************************************************
+/****************************************************************************
* Private Functions
- ******************************************************************************/
+ ****************************************************************************/
-/******************************************************************************
+/****************************************************************************
* Name: trim_wakeup_frompowerdown
*
* Description:
@@ -73,14 +74,14 @@
* Returned Value:
* None
*
- ******************************************************************************/
+ ****************************************************************************/
static void trim_wakeup_frompowerdown(void)
{
/* Currently no specific trim for Powerdown */
}
-/******************************************************************************
+/****************************************************************************
* Name: trim_wakeup_fromshutdown
*
* Description:
@@ -93,7 +94,7 @@ static void trim_wakeup_frompowerdown(void)
* Returned Value:
* None
*
- ******************************************************************************/
+ ****************************************************************************/
static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
{
@@ -126,14 +127,16 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
{
/* ADI3_REFSYS:DCDCCTL5[3] (=DITHER_EN) = CCFG_MODE_CONF_1[19]
* (=ALT_DCDC_DITHER_EN) ADI3_REFSYS:DCDCCTL5[2:0](=IPEAK ) =
- * CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK ) Using a single 4-bit masked
- * write since layout is equal for both source and destination
+ * CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK )
+ * Using a single 4-bit masked write since layout is equal for
+ * both source and destination
*/
regval = getreg32(TIVA_CCFG_MODE_CONF_1);
regval = (0xf0 | (regval >> CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_SHIFT));
putreg8((uint8_t)regval,
- TIVA_ADI3_REFSYS_MASK4B + (TIVA_ADI3_REFSYS_DCDCCTL5_OFFSET * 2));
+ TIVA_ADI3_REFSYS_MASK4B +
+ (TIVA_ADI3_REFSYS_DCDCCTL5_OFFSET * 2));
}
/* Enable for JTAG to be powered down. The JTAG domain is automatically
@@ -167,7 +170,8 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
rom_setup_coldreset_from_shutdown_cfg2(fcfg1_revision, ccfg_modeconf);
/* Increased margin between digital supply voltage and VDD BOD during
- * standby. VTRIM_UDIG: signed 4 bits value to be incremented by 2 (max = 7)
+ * standby.
+ * VTRIM_UDIG: signed 4 bits value to be incremented by 2 (max = 7)
* VTRIM_BOD: unsigned 4 bits value to be decremented by 1 (min = 0) This
* applies to chips with mp1rev < 542 for cc13x0 and for mp1rev < 527 for
* cc26x0
@@ -239,7 +243,7 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
putreg32(regval, TIVA_FLASH_CFG);
}
-/******************************************************************************
+/****************************************************************************
* Name: trim_coldreset
*
* Description:
@@ -248,28 +252,28 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
* Returned Value:
* None
*
- ******************************************************************************/
+ ****************************************************************************/
static void trim_coldreset(void)
{
/* Currently no specific trim for Cold Reset */
}
-/******************************************************************************
+/****************************************************************************
* Public Functions
- ******************************************************************************/
+ ****************************************************************************/
-/******************************************************************************
+/****************************************************************************
* Name: cc13xx_trim_device
*
* Description:
* Perform the necessary trim of the device which is not done in boot code
*
* This function should only execute coming from ROM boot. The current
- * implementation does not take soft reset into account. However, it does no
- * damage to execute it again. It only consumes time.
+ * implementation does not take soft reset into account. However, it does
+ * no damage to execute it again. It only consumes time.
*
- ******************************************************************************/
+ ****************************************************************************/
void cc13xx_trim_device(void)
{
@@ -303,11 +307,11 @@ void cc13xx_trim_device(void)
putreg32(AUX_WUC_MODCLKEN1_SMPH, TIVA_AUX_WUC_MODCLKEN1);
- /* Warm resets on CC13x0 and CC26x0 complicates software design because much
- * of our software expect that initialization is done from a full system
- * reset. This includes RTC setup, oscillator configuration and AUX setup. To
- * ensure a full reset of the device is done when customers get e.g. a
- * Watchdog reset, the following is set here:
+ /* Warm resets on CC13x0 and CC26x0 complicates software design because
+ * much of our software expect that initialization is done from a full
+ * system reset. This includes RTC setup, oscillator configuration and
+ * AUX setup. To ensure a full reset of the device is done when customers
+ * get e.g. a Watchdog reset, the following is set here:
*/
regval = getreg32(TIVA_PRCM_WARMRESET);
@@ -338,11 +342,11 @@ void cc13xx_trim_device(void)
trim_wakeup_frompowerdown();
}
- /* Check for shutdown. When device is going to shutdown the hardware will
- * automatically clear the SLEEPDIS bit in the SLEEP register in the
- * AON_SYSCTL module. It is left for the application to assert this bit when
- * waking back up, but not before the desired IO configuration has been
- * re-established.
+ /* Check for shutdown.
+ * When device is going to shutdown the hardware will automatically clear
+ * the SLEEPDIS bit in the SLEEP register in the AON_SYSCTL module.
+ * It is left for the application to assert this bit when waking back
+ * up, but not before the desired IO configuration has been re-established.
*/
else if ((getreg32(TIVA_AON_SYSCTL_SLEEPCTL) &
@@ -358,8 +362,8 @@ void cc13xx_trim_device(void)
}
else
{
- /* Consider adding a check for soft reset to allow debugging to skip this
- * section!!! NB. This should be calling a ROM implementation of
+ /* Consider adding a check for soft reset to allow debugging to skip
+ * this section!!! NB. This should be calling a ROM implementation of
* required trim and compensation e.g. trim_coldreset() -->
* trim_wakeup_fromshutdown() --> trim_wakeup_frompowerdown()
*/
@@ -375,8 +379,8 @@ void cc13xx_trim_device(void)
putreg32(0, TIVA_PRCM_PDCTL1VIMS);
- /* Configure optimal wait time for flash FSM in cases where flash pump wakes
- * up from sleep
+ /* Configure optimal wait time for flash FSM in cases where flash pump
+ * wakes up from sleep
*/
regval = getreg32(TIVA_FLASH_FPAC1);
@@ -385,8 +389,8 @@ void cc13xx_trim_device(void)
putreg32(regval, TIVA_FLASH_FPAC1);
/* And finally at the end of the flash boot process: SET BOOT_DET bits in
- * AON_SYSCTL to 3 if already found to be 1 Note: The BOOT_DET_x_CLR/SET bits
- * must be manually cleared
+ * AON_SYSCTL to 3 if already found to be 1 Note: The BOOT_DET_x_CLR/SET
+ * bits must be manually cleared
*/
if ((getreg32(TIVA_AON_SYSCTL_RESETCTL) &
diff --git a/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c b/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c
index 44ecd88..e7b4c74 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c
+++ b/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c
@@ -91,7 +91,7 @@ void rom_setup_stepvaddrtrimto(uint32_t tocode)
putreg32(pmctl_regsetctrl & ~AON_PMCTL_RESETCTL_VDDR_LOSS_EN,
TIVA_AON_PMCTL_RESETCTL);
- /* Wait for VDDR_LOSS_EN setting to propagate */
+ /* Wait for VDDR_LOSS_EN setting to propagate */
getreg32(TIVA_AON_RTC_SYNC);
}
@@ -135,7 +135,7 @@ void rom_setup_stepvaddrtrimto(uint32_t tocode)
putreg32(pmctl_regsetctrl, TIVA_AON_PMCTL_RESETCTL);
- /* And finally wait for VDDR_LOSS_EN setting to propagate */
+ /* And finally wait for VDDR_LOSS_EN setting to propagate */
getreg32(TIVA_AON_RTC_SYNC);
}
@@ -160,8 +160,8 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
{
/* Set VDDS_BOD trim - using masked write {MASK8:DATA8} - TRIM_VDDS_BOD
* is bits[7:3] of ADI3..REFSYSCTL1 - Needs a positive transition on
- * BOD_BG_TRIM_EN (bit[7] of REFSYSCTL3) to latch new VDDS BOD. Set to 0
- * first to guarantee a positive transition.
+ * BOD_BG_TRIM_EN (bit[7] of REFSYSCTL3) to latch new VDDS BOD.
+ * Set to 0 first to guarantee a positive transition.
*/
putreg8(ADI3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN,
@@ -219,8 +219,8 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
setbits |= AON_PMCTL_PWRCTL_DCDC_EN;
}
- /* Set the ACTIVE source based upon CCFG:MODE_CONF:DCDC_ACTIVE Note: Inverse
- * polarity
+ /* Set the ACTIVE source based upon CCFG:MODE_CONF:DCDC_ACTIVE
+ * Note: Inverse polarity
*/
if ((ccfg_modeconf & CCFG_MODE_CONF_DCDC_ACTIVE) != 0)
diff --git a/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h b/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h
index 8e59060..81eb361 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h
+++ b/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * This is a port of TI's rom.h file which has a fully compatible BSD license:
+ * This is a port of TI's rom.h file which has a fully compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,17 +37,17 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CC13XX_CC13X2_CC26X2_V1_ROM_H
#define __ARCH_ARM_SRC_TIVA_CC13XX_CC13X2_CC26X2_V1_ROM_H
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Start address of the ROM hard API access table (located after the ROM FW rev
- * field)
+/* Start address of the ROM hard API access table (located after the ROM FW
+ * rev field)
*/
#define ROM_HAPI_TABLE_ADDR 0x10000048
@@ -812,9 +813,9 @@
((void (*)(uint32_t powerconfig)) \
ROM_API_PWR_CTRL_TABLE[0])
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
/* ROM Hard-API function interface types */
@@ -830,8 +831,8 @@ typedef uint32_t (*fptr_reserved1_t) (uint32_t);
typedef uint32_t (*fptr_reserved2_t) (void);
-typedef uint32_t (*fptr_reserved3_t) (uint8_t *,\
- uint32_t,\
+typedef uint32_t (*fptr_reserved3_t) (uint8_t *, \
+ uint32_t, \
uint32_t);
typedef void (*fptr_resetdev_t) (void);
@@ -893,15 +894,16 @@ struct hard_api_s
typedef struct hard_api_s hard_api_t;
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: rom_signextend_vddrtrim
*
* Description:
- * Sign extend the VDDR_TRIM setting (special format ranging from -10 to +21)
+ * Sign extend the VDDR_TRIM setting
+ * (special format ranging from -10 to +21)
*
* Input Parameters
* vddrtrim - VDDR_TRIM setting
@@ -909,7 +911,7 @@ typedef struct hard_api_s hard_api_t;
* Returned Value:
* Returns sign extended VDDR_TRIM setting.
*
- ************************************************************************************/
+ ****************************************************************************/
static inline int32_t rom_signextend_vddrtrim(uint32_t vddrtrim)
{
@@ -926,9 +928,9 @@ static inline int32_t rom_signextend_vddrtrim(uint32_t vddrtrim)
return signed_vaddrtrim;
}
-/************************************************************************************
+/****************************************************************************
* Global Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
/* ROM functions implemented in FLASH */
diff --git a/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v2_rom.h b/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v2_rom.h
index 5f23978..5998e77 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v2_rom.h
+++ b/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v2_rom.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v2_rom.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * This is a port of TI's rom.h file which has a fully compatible BSD license:
+ * This is a port of TI's rom.h file which has a fully compatible BSD
+ * license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,17 +37,17 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CC13XX_CC13X2_CC26X2_V2_ROM_H
#define __ARCH_ARM_SRC_TIVA_CC13XX_CC13X2_CC26X2_V2_ROM_H
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Start address of the ROM hard API access table (located after the ROM FW rev
- * field)
+/* Start address of the ROM hard API access table
+ * (located after the ROM FW rev field)
*/
#define ROM_HAPI_TABLE_ADDR 0x10000048
@@ -968,9 +969,9 @@
((uint32_t (*)(uint32_t irqFlags)) \
ROM_API_SHA2_TABLE[5])
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
/* ROM Hard-API function interface types */
@@ -1049,15 +1050,16 @@ struct hard_api_s
typedef struct hard_api_s hard_api_t;
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: rom_signextend_vddrtrim
*
* Description:
- * Sign extend the VDDR_TRIM setting (special format ranging from -10 to +21)
+ * Sign extend the VDDR_TRIM setting
+ * (special format ranging from -10 to +21)
*
* Input Parameters
* vddrtrim - VDDR_TRIM setting
@@ -1065,7 +1067,7 @@ typedef struct hard_api_s hard_api_t;
* Returned Value:
* Returns sign extended VDDR_TRIM setting.
*
- ************************************************************************************/
+ ****************************************************************************/
static inline int32_t rom_signextend_vddrtrim(uint32_t vddrtrim)
{
diff --git a/arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c b/arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c
index 633c18a..c3bd1af 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c
+++ b/arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c
@@ -25,17 +25,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
@@ -224,8 +224,9 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
{
/* ADI3_REFSYS:DCDCCTL5[3] (=DITHER_EN) = CCFG_MODE_CONF_1[19]
* (=ALT_DCDC_DITHER_EN) ADI3_REFSYS:DCDCCTL5[2:0](=IPEAK ) =
- * CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK ) Using a single 4-bit masked
- * write since layout is equal for both source and destination
+ * CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK ) Using a single 4-bit
+ * masked write since layout is equal for both source and
+ * destination
*/
regval = getreg32(TIVA_CCFG_MODE_CONF_1);
@@ -237,8 +238,8 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
/* TBD - Temporarily removed for CC13x2 / CC26x2 */
- /* Force DCDC to use RCOSC before starting up XOSC. Clock loss detector does
- * not use XOSC until SCLK_HF actually switches and thus DCDC is not
+ /* Force DCDC to use RCOSC before starting up XOSC. Clock loss detector
+ * does not use XOSC until SCLK_HF actually switches and thus DCDC is not
* protected from clock loss on XOSC in that time frame. The force must be
* released when the switch to XOSC has happened. This is done in
* OSCHfSourceSwitch().
@@ -292,7 +293,8 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
(((fusedata & FCFG1_SHDW_OSC_BIAS_LDO_TRIM_VTRIM_DIG_MASK) >>
FCFG1_SHDW_OSC_BIAS_LDO_TRIM_VTRIM_DIG_SHIFT) <<
ADI2_REFSYS_SOCLDOCTL1_VTRIM_DIG_SHIFT));
- putreg8(regval8, TIVA_ADI2_REFSYS_DIR + TIVA_ADI2_REFSYS_SOCLDOCTL1_OFFSET);
+ putreg8(regval8,
+ TIVA_ADI2_REFSYS_DIR + TIVA_ADI2_REFSYS_SOCLDOCTL1_OFFSET);
/* Write to register CTLSOCREFSYS0 (addr offset 0) bits[4:0] (TRIMIREF) in
* ADI2_REFSYS. Avoid using masked write access since bit field spans
@@ -303,7 +305,8 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
regval8 = (((fusedata & FCFG1_SHDW_OSC_BIAS_LDO_TRIM_TRIMIREF_MASK) >>
FCFG1_SHDW_OSC_BIAS_LDO_TRIM_TRIMIREF_SHIFT) <<
ADI2_REFSYS_REFSYSCTL0_TRIM_IREF_SHIFT);
- putreg8(regval8, TIVA_ADI2_REFSYS_DIR + TIVA_ADI2_REFSYS_REFSYSCTL0_OFFSET);
+ putreg8(regval8,
+ TIVA_ADI2_REFSYS_DIR + TIVA_ADI2_REFSYS_REFSYSCTL0_OFFSET);
/* Write to register CTLSOCREFSYS2 (addr offset 4) bits[7:4] (TRIMMAG) in
* ADI3_REFSYS
@@ -485,8 +488,8 @@ static void trim_coldreset(void)
* Perform the necessary trim of the device which is not done in boot code
*
* This function should only execute coming from ROM boot. The current
- * implementation does not take soft reset into account. However, it does no
- * damage to execute it again. It only consumes time.
+ * implementation does not take soft reset into account. However, it does
+ * no damage to execute it again. It only consumes time.
*
****************************************************************************/
@@ -577,8 +580,8 @@ void cc13xx_trim_device(void)
putreg32(0, TIVA_PRCM_PDCTL1VIMS);
- /* Configure optimal wait time for flash FSM in cases where flash pump wakes
- * up from sleep
+ /* Configure optimal wait time for flash FSM in cases where flash pump
+ * wakes up from sleep
*/
regval = getreg32(TIVA_FLASH_FPAC1);
@@ -587,8 +590,8 @@ void cc13xx_trim_device(void)
putreg32(regval, TIVA_FLASH_FPAC1);
/* And finally at the end of the flash boot process: SET BOOT_DET bits in
- * AON_PMCTL to 3 if already found to be 1 Note: The BOOT_DET_x_CLR/SET bits
- * must be manually cleared
+ * AON_PMCTL to 3 if already found to be 1 Note: The BOOT_DET_x_CLR/SET
+ * bits must be manually cleared
*/
if ((getreg32(TIVA_AON_PMCTL_RESETCTL) &
@@ -608,8 +611,8 @@ void cc13xx_trim_device(void)
}
/* Make sure there are no ongoing VIMS mode change when leaving
- * cc13x2_cc26x2_trim_device() (There should typically be no wait time here,
- * but need to be sure)
+ * cc13x2_cc26x2_trim_device() (There should typically be no wait time
+ * here, but need to be sure)
*/
while ((getreg32(TIVA_VIMS_STAT) & VIMS_STAT_MODE_CHANGING) != 0)
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c b/arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c
index ffc6c67..7d61141 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c
@@ -1,4 +1,4 @@
-/*****************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@@ -37,11 +37,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- *****************************************************************************/
+ ****************************************************************************/
-/*****************************************************************************
+/****************************************************************************
* Included Files
- *****************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -51,11 +51,11 @@
#include "hardware/tiva_prcm.h"
#include "tiva_chipinfo.h"
-/*****************************************************************************
+/****************************************************************************
* Public Functions
- *****************************************************************************/
+ ****************************************************************************/
-/*****************************************************************************
+/****************************************************************************
* Name: chipinfo_protocols
*
* Description:
@@ -64,18 +64,19 @@
* Returned Value:
* Returns a bit set indicating supported protocols.
*
- *****************************************************************************/
+ ****************************************************************************/
enum cc13xx_protocol_e chipinfo_protocols(void)
{
/* Return allowed RTC modes.
- * REVISIT: Per fcfg1 header file, the allowed RGC modes are in bits 0-2. */
+ * REVISIT: Per fcfg1 header file, the allowed RGC modes are in bits 0-2.
+ */
- uint32_t regval = getreg32(TIVA_PRCM_RFCMODEHWOPT);
- return (enum cc13xx_protocol_e)(regval & 0x0e);
+ uint32_t regval = getreg32(TIVA_PRCM_RFCMODEHWOPT);
+ return (enum cc13xx_protocol_e)(regval & 0x0e);
}
-/*****************************************************************************
+/****************************************************************************
* Name: chipinfo_packagetype
*
* Description:
@@ -84,7 +85,7 @@ enum cc13xx_protocol_e chipinfo_protocols(void)
* Returned Value:
* Returns an enumeration value indicating the package type.
*
- *****************************************************************************/
+ ****************************************************************************/
enum cc13xx_package_e chipinfo_packagetype(void)
{
@@ -102,7 +103,7 @@ enum cc13xx_package_e chipinfo_packagetype(void)
return pkgtype;
}
-/*****************************************************************************
+/****************************************************************************
* Name: chipinfo_chiptype
*
* Description:
@@ -111,7 +112,7 @@ enum cc13xx_package_e chipinfo_packagetype(void)
* Returned Value:
* Returns an enumeration value indicating the chip type
*
- *****************************************************************************/
+ ****************************************************************************/
enum cc13xx_chiptype_e chipinfo_chiptype(void)
{
@@ -147,13 +148,13 @@ enum cc13xx_chiptype_e chipinfo_chiptype(void)
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
- cc13 = ((userid & FCFG1_USER_ID_CC13) != 0); /* CC13xx device type (vs CC26xx) */
- pa = ((userid & FCFG1_USER_ID_PA) != 0); /* Supports 20dBM PA */
+ cc13 = ((userid & FCFG1_USER_ID_CC13) != 0); /* CC13xx device type (vs CC26xx) */
+ pa = ((userid & FCFG1_USER_ID_PA) != 0); /* Supports 20dBM PA */
- if (chipfamily == FAMILY_CC13x2_CC26x2)
- {
- switch (protocol)
- {
+ if (chipfamily == FAMILY_CC13x2_CC26x2)
+ {
+ switch (protocol)
+ {
case 0xf:
if (cc13)
{
@@ -195,7 +196,7 @@ enum cc13xx_chiptype_e chipinfo_chiptype(void)
return chiptype;
}
-/*****************************************************************************
+/****************************************************************************
* Name: chipinfo_chipfamily
*
* Description:
@@ -204,7 +205,7 @@ enum cc13xx_chiptype_e chipinfo_chiptype(void)
* Returned Value:
* Returns an enumeration value indicating the chip family
*
- *****************************************************************************/
+ ****************************************************************************/
enum cc13xx_chipfamily_e chipinfo_chipfamily(void)
{
@@ -220,28 +221,30 @@ enum cc13xx_chipfamily_e chipinfo_chipfamily(void)
if (waferid == 0xb9be)
{
chipfamily = FAMILY_CC13x0;
- }
+ }
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
if (waferid == 0xbb41)
{
chipfamily = FAMILY_CC13x2_CC26x2;
- }
+ }
#endif
- return chipfamily;
+ return chipfamily;
}
-/*****************************************************************************
+/****************************************************************************
* Name: chipinfo_hwrevision
*
* Description:
- * Returns an enumeration value indicating the hardware revision of the chip
+ * Returns an enumeration value indicating the hardware revision of the
+ * chip
*
* Returned Value:
- * Returns an enumeration value indicating the hardware revision of the chip
+ * Returns an enumeration value indicating the hardware revision of the
+ * chip
*
- *****************************************************************************/
+ ****************************************************************************/
enum cc13xx_revision_e chipinfo_hwrevision(void)
{
@@ -265,7 +268,8 @@ enum cc13xx_revision_e chipinfo_hwrevision(void)
break;
case 2: /* CC13x0 PG2.0 (or later) */
- hwrev = (enum cc13xx_revision_e)(((uint32_t)HWREV_2_0) + hwminorrev);
+ hwrev = (enum cc13xx_revision_e)(((uint32_t)HWREV_2_0) +
+ hwminorrev);
break;
}
}
@@ -281,21 +285,23 @@ enum cc13xx_revision_e chipinfo_hwrevision(void)
break;
case 2: /* CC13x2, CC26x2 - PG1.1 (or later) */
- hwrev = (enum cc13xx_revision_e)(((uint32_t)HWREV_1_1) + hwminorrev);
+ hwrev = (enum cc13xx_revision_e)(((uint32_t)HWREV_1_1) +
+ hwminorrev);
break;
case 3: /* CC13x2, CC26x2 - PG2.1 (or later) */
- hwrev = (enum cc13xx_revision_e)(((uint32_t)HWREV_2_1) + hwminorrev);
+ hwrev = (enum cc13xx_revision_e)(((uint32_t)HWREV_2_1) +
+ hwminorrev);
break;
}
}
#endif
- return hwrev;
+ return hwrev;
}
-/*****************************************************************************
+/****************************************************************************
* Name: chipinfo_verify
*
* Description:
@@ -305,7 +311,7 @@ enum cc13xx_revision_e chipinfo_hwrevision(void)
* Returned Value:
* None
*
- *****************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_DEBUG_ASSERTIONS
void chipinfo_verify(void)
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h b/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h
index abbdd0b..a7f04d5 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h
@@ -1,4 +1,4 @@
-/****************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_enableclks.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ****************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CC13XX_CC13XX_ENABLECLKS_H
#define __ARCH_ARM_SRC_TIVA_CC13XX_CC13XX_ENABLECLKS_H
-/****************************************************************************************************
+/****************************************************************************
* Included Files
- ****************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "cc13xx/cc13xx_prcm.h"
-/****************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ****************************************************************************************************/
+ ****************************************************************************/
#define CC13XX_RUNMODE_CLOCK (1 << 0)
#define CC13XX_SLEEPMODE_CLOCK (1 << 1)
@@ -218,27 +218,27 @@
#define tiva_trng_enableclk() cc13xx_periph_enableclk(PRCM_PERIPH_TRNG, CC13XX_ALLMODE_CLOCKS)
#define tiva_trng_disableclk() cc13xx_periph_disableclk(PRCM_PERIPH_TRNG, CC13XX_ALLMODE_CLOCKS)
-/****************************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ****************************************************************************************************/
+ ****************************************************************************/
-/****************************************************************************************************
+/****************************************************************************
* Name: cc13xx_periph_enableclks
*
* Description:
* Enable clocking in the selected modes for this peripheral.
*
- ****************************************************************************************************/
+ ****************************************************************************/
void cc13xx_periph_enableclk(uint32_t peripheral, uint32_t modeset);
-/****************************************************************************************************
+/****************************************************************************
* Name: cc13xx_periph_disableclk
*
* Description:
* Disable clocking in the selected modes for this peripheral.
*
- ****************************************************************************************************/
+ ****************************************************************************/
void cc13xx_periph_disableclk(uint32_t peripheral, uint32_t modeset);
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h b/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h
index 404b208..46e6f33 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,28 +16,29 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CC13XX_CC13XX_ENABLEPWR_H
#define __ARCH_ARM_SRC_TIVA_CC13XX_CC13XX_ENABLEPWR_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "cc13xx/cc13xx_prcm.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* CC13xx Power Domains:
*
* 1) PRCM_DOMAIN_RFCORE : RF Core
* 2) PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0
- * 3) PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1
+ * 3) PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1,
+ * I2S, DMA, UART1
* 4) PRCM_DOMAIN_VIMS : SRAM, FLASH, ROM
* 5) PRCM_DOMAIN_SYSBUS
* 6) PRCM_DOMAIN_CPU
@@ -121,28 +122,28 @@
#define tiva_trng_enablepwr() cc13xx_periph_enablepwr(PRCM_PERIPH_TRNG)
#define tiva_trng_disablepwr() cc13xx_periph_disablepwr(PRCM_PERIPH_TRNG)
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: cc13xx_periph_enablepwr
*
* Description:
* Enable the power domain associated with the peripheral.
*
- ************************************************************************************/
+ ****************************************************************************/
void cc13xx_periph_enablepwr(uint32_t peripheral);
-/************************************************************************************
+/****************************************************************************
* Name: cc13xx_periph_disablepwr
*
* Description:
- * Disable the power domain associated with the peripheral if and only if all
- * peripherals using that power domain no longer need power.
+ * Disable the power domain associated with the peripheral if and only if
+ * all peripherals using that power domain no longer need power.
*
- ************************************************************************************/
+ ****************************************************************************/
void cc13xx_periph_disablepwr(uint32_t peripheral);
diff --git a/arch/arm/src/tiva/chip.h b/arch/arm/src/tiva/chip.h
index bfaf33d..4d8b747 100644
--- a/arch/arm/src/tiva/chip.h
+++ b/arch/arm/src/tiva/chip.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_H
#define __ARCH_ARM_SRC_TIVA_CHIP_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/tiva/chip.h>
@@ -43,13 +43,13 @@
#include "hardware/tiva_timer.h" /* Timer */
#include "hardware/tiva_adc.h" /* ADC */
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Provide the required number of peripheral interrupt vector definitions as well.
- * The definition TIVA_IRQ_NEXTINT simply comes from the chip-specific IRQ header
- * file included by arch/tiva/irq.h.
+/* Provide the required number of peripheral interrupt vector definitions as
+ * well. The definition TIVA_IRQ_NEXTINT simply comes from the chip-specific
+ * IRQ header file included by arch/tiva/irq.h.
*/
#define ARMV7M_PERIPHERAL_INTERRUPTS TIVA_IRQ_NEXTINT
diff --git a/arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h b/arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h
index 8fc4c55..e9c2c5a 100644
--- a/arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h
+++ b/arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/common/lmxx_tm4c_enableclks.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_COMMON_LMXX_TM4C_ENABLECLKS_H
#define __ARCH_ARM_SRC_TIVA_COMMON_LMXX_TM4C_ENABLECLKS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -31,12 +31,12 @@
#include "chip.h"
#include "hardware/tiva_sysctrl.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Clocks are enabled or disabled by setting or clearing a bit (b) in a system
- * control register (a))
+/* Clocks are enabled or disabled by setting or clearing a bit (b) in a
+ * system control register (a))
*/
#define tiva_enableclk(a,b) modifyreg32((a),0,(b))
diff --git a/arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h b/arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h
index 3f4be38..69261ff 100644
--- a/arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h
+++ b/arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/common/lmxx_tm4c_enablepwr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_COMMON_LMXX_TM4C_ENABLEPWR_H
#define __ARCH_ARM_SRC_TIVA_COMMON_LMXX_TM4C_ENABLEPWR_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -31,12 +31,12 @@
#include "chip.h"
#include "hardware/tiva_sysctrl.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Power control is enabled or disabled by setting or clearing a bit (b) in a system
- * control register (a))
+/* Power control is enabled or disabled by setting or clearing a bit (b) in
+ * a system control register (a))
*/
#define tiva_enablepwr(a, b) modifyreg32((a), 0, (b))
diff --git a/arch/arm/src/tiva/common/tiva_i2c.c b/arch/arm/src/tiva/common/tiva_i2c.c
index e472bc8..c40057b 100644
--- a/arch/arm/src/tiva/common/tiva_i2c.c
+++ b/arch/arm/src/tiva/common/tiva_i2c.c
@@ -1,11 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/common/tiva_i2c.c
*
* Copyright (C) 2014-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * The basic structure of this driver derives in spirit (if nothing more) from the
- * NuttX STM32 I2C driver which has:
+ * The basic structure of this driver derives in spirit (if nothing more)
+ * from the NuttX STM32 I2C driver which has:
*
* Copyright (C) 2011 Uros Platise. All rights reserved.
* Author: Uros Platise <ur...@isotel.eu>
@@ -37,11 +37,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -80,14 +80,14 @@
defined(CONFIG_TIVA_I2C6) || defined(CONFIG_TIVA_I2C7) || \
defined(CONFIG_TIVA_I2C8) || defined(CONFIG_TIVA_I2C9)
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************/
+/* Configuration ************************************************************/
-/* CONFIG_I2C_POLLED may be set so that I2C interrupts will not be used. Instead,
- * CPU-intensive polling will be used.
+/* CONFIG_I2C_POLLED may be set so that I2C interrupts will not be used.
+ * Instead, CPU-intensive polling will be used.
*/
/* Interrupt wait timeout in seconds and milliseconds */
@@ -112,7 +112,7 @@
# define CONFIG_TIVA_I2C_DYNTIMEO_STARTSTOP TICK2USEC(CONFIG_TIVA_I2C_TIMEOTICKS)
#endif
-/* GPIO pins ************************************************************************/
+/* GPIO pins ****************************************************************/
/* Macros to convert a I2C pin to a GPIO output */
@@ -122,15 +122,16 @@
#define MKI2C_INPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_INPUT)
#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
-/* Debug ****************************************************************************/
+/* Debug ********************************************************************/
#ifndef CONFIG_DEBUG_I2C_INFO
# undef CONFIG_TIVA_I2C_REGDEBUG
#endif
-/* I2C event trace logic. NOTE: trace uses the internal, non-standard, low-level
- * debug interface syslog() but does not require that any other debug
- * is enabled.
+/* I2C event trace logic.
+ * NOTE:
+ * trace uses the internal, non-standard, low-level debug interface syslog()
+ * but does not require that any other debug is enabled.
*/
#ifndef CONFIG_I2C_TRACE
@@ -144,9 +145,9 @@
# define CONFIG_I2C_NTRACE 32
#endif
-/************************************************************************************
+/****************************************************************************
* Private Types
- ************************************************************************************/
+ ****************************************************************************/
/* Interrupt state */
@@ -253,15 +254,17 @@ struct tiva_i2c_priv_s
#endif
};
-/************************************************************************************
+/****************************************************************************
* Private Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_TIVA_I2C_REGDEBUG
static bool tiva_i2c_checkreg(struct tiva_i2c_priv_s *priv, bool wr,
uint32_t regval, uintptr_t regaddr);
-static uint32_t tiva_i2c_getreg(struct tiva_i2c_priv_s *priv, unsigned int offset);
-static void tiva_i2c_putreg(struct tiva_i2c_priv_s *priv, unsigned int offset,
+static uint32_t tiva_i2c_getreg(struct tiva_i2c_priv_s *priv,
+ unsigned int offset);
+static void tiva_i2c_putreg(struct tiva_i2c_priv_s *priv,
+ unsigned int offset,
uint32_t value);
#else
static inline uint32_t tiva_i2c_getreg(struct tiva_i2c_priv_s *priv,
@@ -295,18 +298,21 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s * priv, uint32_t status);
static int tiva_i2c_interrupt(int irq, void *context, FAR void *arg);
#endif /* !CONFIG_I2C_POLLED */
-static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency);
+static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv,
+ uint32_t frequency);
static int tiva_i2c_uninitialize(struct tiva_i2c_priv_s *priv);
-static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv, uint32_t frequency);
-static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
+static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv,
+ uint32_t frequency);
+static int tiva_i2c_transfer(struct i2c_master_s *dev,
+ struct i2c_msg_s *msgv,
int msgc);
#ifdef CONFIG_I2C_RESET
static int tiva_i2c_reset(FAR struct i2c_master_s *dev);
#endif
-/************************************************************************************
+/****************************************************************************
* Private Data
- ************************************************************************************/
+ ****************************************************************************/
/* I2C Interface */
@@ -528,11 +534,11 @@ static const struct tiva_i2c_config_s tiva_i2c9_config =
static struct tiva_i2c_priv_s tiva_i2c9_priv;
#endif
-/************************************************************************************
+/****************************************************************************
* Private Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: sam_checkreg
*
* Description:
@@ -546,7 +552,7 @@ static struct tiva_i2c_priv_s tiva_i2c9_priv;
* true: This is the first register access of this type.
* flase: This is the same as the preceding register access.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_TIVA_I2C_REGDEBUG
static bool tiva_i2c_checkreg(struct tiva_i2c_priv_s *priv, bool wr,
@@ -586,16 +592,17 @@ static bool tiva_i2c_checkreg(struct tiva_i2c_priv_s *priv, bool wr,
}
#endif
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_getreg
*
* Description:
* Get a 16-bit register value by offset
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_TIVA_I2C_REGDEBUG
-static uint32_t tiva_i2c_getreg(struct tiva_i2c_priv_s *priv, unsigned int offset)
+static uint32_t tiva_i2c_getreg(struct tiva_i2c_priv_s *priv,
+ unsigned int offset)
{
uintptr_t regaddr = priv->config->base + offset;
uint32_t regval = getreg32(regaddr);
@@ -615,16 +622,17 @@ static inline uint32_t tiva_i2c_getreg(struct tiva_i2c_priv_s *priv,
}
#endif
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_putreg
*
* Description:
* Put a 16-bit register value by offset
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_TIVA_I2C_REGDEBUG
-static void tiva_i2c_putreg(struct tiva_i2c_priv_s *priv, unsigned int offset,
+static void tiva_i2c_putreg(struct tiva_i2c_priv_s *priv,
+ unsigned int offset,
uint32_t regval)
{
uintptr_t regaddr = priv->config->base + offset;
@@ -644,13 +652,14 @@ static inline void tiva_i2c_putreg(struct tiva_i2c_priv_s *priv,
}
#endif
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_tousecs
*
* Description:
- * Return a micro-second delay based on the number of bytes left to be processed.
+ * Return a micro-second delay based on the number of bytes left to be
+ * processed.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_TIVA_I2C_DYNTIMEO
static useconds_t tiva_i2c_tousecs(int msgc, struct i2c_msg_s *msgv)
@@ -673,13 +682,13 @@ static useconds_t tiva_i2c_tousecs(int msgc, struct i2c_msg_s *msgv)
}
#endif
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_sem_waitdone
*
* Description:
* Wait for a transfer to complete
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_I2C_POLLED
static inline int tiva_i2c_sem_waitdone(struct tiva_i2c_priv_s *priv)
@@ -690,16 +699,16 @@ static inline int tiva_i2c_sem_waitdone(struct tiva_i2c_priv_s *priv)
flags = enter_critical_section();
- /* Enable the master interrupt. The I2C master module generates an interrupt when
- * a transaction completes (either transmit or receive), when arbitration is lost,
- * or when an error occurs during a transaction.
+ /* Enable the master interrupt. The I2C master module generates an
+ * interrupt when a transaction completes (either transmit or receive),
+ * when arbitration is lost, or when an error occurs during a transaction.
*/
tiva_i2c_putreg(priv, TIVA_I2CM_IMR_OFFSET, I2CM_IMR_MIM);
- /* Signal the interrupt handler that we are waiting. NOTE: Interrupts
- * are currently disabled but will be temporarily re-enabled below when
- * nxsem_timedwait() sleeps.
+ /* Signal the interrupt handler that we are waiting.
+ * NOTE: Interrupts are currently disabled but will be temporarily
+ * re-enabled below when nxsem_timedwait() sleeps.
*/
do
@@ -819,26 +828,26 @@ static inline int tiva_i2c_sem_waitdone(struct tiva_i2c_priv_s *priv)
}
#endif
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_sem_post
*
* Description:
* Release the mutual exclusion semaphore
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void tiva_i2c_sem_post(struct tiva_i2c_priv_s *priv)
{
nxsem_post(&priv->exclsem);
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_sem_init
*
* Description:
* Initialize semaphores
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void tiva_i2c_sem_init(struct tiva_i2c_priv_s *priv)
{
@@ -854,13 +863,13 @@ static inline void tiva_i2c_sem_init(struct tiva_i2c_priv_s *priv)
#endif
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_sem_destroy
*
* Description:
* Destroy semaphores.
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void tiva_i2c_sem_destroy(struct tiva_i2c_priv_s *priv)
{
@@ -870,13 +879,13 @@ static inline void tiva_i2c_sem_destroy(struct tiva_i2c_priv_s *priv)
#endif
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_trace
*
* Description:
* I2C trace instrumentation
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_I2C_TRACE
static void tiva_i2c_traceclear(struct tiva_i2c_priv_s *priv)
@@ -913,11 +922,14 @@ static void tiva_i2c_tracenew(struct tiva_i2c_priv_s *priv, uint32_t status)
if (trace->count != 0)
{
- /* Yes.. bump up the trace index (unless we are out of trace entries) */
+ /* Yes.. bump up the trace index
+ * (unless we are out of trace entries)
+ */
if (priv->tndx >= (CONFIG_I2C_NTRACE - 1))
{
- i2cerr("ERROR: I2C%d trace table overflow\n", priv->config->devno);
+ i2cerr("ERROR: I2C%d trace table overflow\n",
+ priv->config->devno);
return;
}
@@ -966,7 +978,8 @@ static void tiva_i2c_traceevent(struct tiva_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE - 1))
{
- i2cerr("ERROR: I2C%d trace table overflow\n", priv->config->devno);
+ i2cerr("ERROR: I2C%d trace table overflow\n",
+ priv->config->devno);
return;
}
@@ -1005,13 +1018,13 @@ static void tiva_i2c_tracedump(struct tiva_i2c_priv_s *priv)
}
#endif /* CONFIG_I2C_TRACE */
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_startxfr
*
* Description:
* Send the START conditions/force Master mode
*
- ************************************************************************************/
+ ****************************************************************************/
static void tiva_i2c_startxfr(struct tiva_i2c_priv_s *priv)
{
@@ -1043,30 +1056,32 @@ static void tiva_i2c_startxfr(struct tiva_i2c_priv_s *priv)
tiva_i2c_nextxfr(priv, I2CM_CS_START);
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_nextxfr
*
* Description:
* Common Interrupt Service Routine
*
- ************************************************************************************/
+ ****************************************************************************/
static void tiva_i2c_nextxfr(struct tiva_i2c_priv_s *priv, uint32_t cmd)
{
- /* Set up the basic command. The STOP bit should be set on the last byte transfer.
+ /* Set up the basic command. The STOP bit should be set on the last byte
+ * transfer.
*
- * - CASE 1: If this is the last message in the sequence, then the stop bit should
- * always be set.
+ * - CASE 1: If this is the last message in the sequence, then the stop bit
+ * should always be set.
* - CASE 2.1.1: The next message may be another read or write of the SAME
- * direction (read or write) and to the SAME address WITHOUT repeated start, in
- * which case this is really just a continuation of the message. No STOP is
- * needed.
- * - CASE 2.x.2: The next message may be to the SAME address WITH repeated start.
- * Because the repeated start, a direction change is possible. This is still
- * a continuation of the same message sequence and so no STOP is needed.
- * - CASE 2.2.x: The next message may be a DIFFERENT address WITHOUT repeated
- * start. This would be an error; The STOP will be sent, the next message will
- * fail.
+ * direction (read or write) and to the SAME address WITHOUT repeated
+ * start, in which case this is really just a continuation of the
+ * message. No STOP is needed.
+ * - CASE 2.x.2: The next message may be to the SAME address WITH repeated
+ * start. Because the repeated start, a direction change is possible.
+ * This is still a continuation of the same message sequence and so no
+ * STOP is needed.
+ * - CASE 2.2.x: The next message may be a DIFFERENT address WITHOUT
+ * repeated start. This would be an error; The STOP will be sent, the
+ * next message will fail.
*/
cmd |= I2CM_CS_RUN;
@@ -1111,7 +1126,9 @@ static void tiva_i2c_nextxfr(struct tiva_i2c_priv_s *priv, uint32_t cmd)
cmd |= I2CM_CS_ACK;
}
- /* Write the command to the control register to receive the next byte. */
+ /* Write the command to the control register to receive the next
+ * byte.
+ */
tiva_i2c_putreg(priv, TIVA_I2CM_CS_OFFSET, cmd);
tiva_i2c_traceevent(priv, I2CEVENT_RECVSETUP, priv->mcnt);
@@ -1120,13 +1137,15 @@ static void tiva_i2c_nextxfr(struct tiva_i2c_priv_s *priv, uint32_t cmd)
{
uint32_t dr;
- /* We are sending data. Write the data to be sent to the DR register. */
+ /* We are sending data.
+ * Write the data to be sent to the DR register.
+ */
dr = (uint32_t)*priv->mptr++;
tiva_i2c_putreg(priv, TIVA_I2CM_DR_OFFSET, dr << I2CM_DR_SHIFT);
- /* Write the command to the control register to send the byte in the DR
- * register.
+ /* Write the command to the control register to send the byte in the
+ * DR register.
*/
tiva_i2c_putreg(priv, TIVA_I2CM_CS_OFFSET, cmd);
@@ -1136,13 +1155,13 @@ static void tiva_i2c_nextxfr(struct tiva_i2c_priv_s *priv, uint32_t cmd)
priv->intstate = INTSTATE_WAITING;
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_process
*
* Description:
* Common Interrupt Service Routine
*
- ************************************************************************************/
+ ****************************************************************************/
static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status)
{
@@ -1150,9 +1169,9 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status)
tiva_i2c_tracenew(priv, status);
- /* Check for a master interrupt? The I2C master module generates an interrupt when
- * a transaction completes (either transmit or receive), when arbitration is lost,
- * or when an error occurs during a transaction.
+ /* Check for a master interrupt? The I2C master module generates an
+ * interrupt when a transaction completes (either transmit or receive),
+ * when arbitration is lost, or when an error occurs during a transaction.
*/
if ((status & I2CM_RIS_MRIS) != 0)
@@ -1173,8 +1192,8 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status)
tiva_i2c_getreg(priv, TIVA_I2CM_MIS_OFFSET);
#endif
- /* We need look at the Master Control/Status register to determine the cause
- * of the master interrupt.
+ /* We need look at the Master Control/Status register to determine
+ * the cause of the master interrupt.
*/
mcs = tiva_i2c_getreg(priv, TIVA_I2CM_CS_OFFSET);
@@ -1247,7 +1266,9 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status)
if (priv->intstate == INTSTATE_WAITING)
{
- /* Data transfer completed. Are we sending or receiving data? */
+ /* Data transfer completed.
+ * Are we sending or receiving data?
+ */
if ((priv->mflags & I2C_M_READ) != 0)
{
@@ -1287,7 +1308,8 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status)
* continue with or without the (repeated) start bit.
*/
- tiva_i2c_traceevent(priv, I2CEVENT_NEXTMSG, priv->msgc);
+ tiva_i2c_traceevent(priv,
+ I2CEVENT_NEXTMSG, priv->msgc);
if ((priv->msgv->flags & I2C_M_NOSTART) != 0)
{
/* Just continue transferring data. In this case,
@@ -1314,7 +1336,8 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status)
{
/* No.. then we are finished */
- tiva_i2c_traceevent(priv, I2CEVENT_DONE, priv->intstate);
+ tiva_i2c_traceevent(priv,
+ I2CEVENT_DONE, priv->intstate);
/* Disable further interrupts */
@@ -1361,13 +1384,13 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status)
return OK;
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_interrupt
*
* Description:
* Common I2C interrupt service routine
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_I2C_POLLED
static int tiva_i2c_interrupt(int irq, void *context, void *arg)
@@ -1387,15 +1410,16 @@ static int tiva_i2c_interrupt(int irq, void *context, void *arg)
}
#endif
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_initialize
*
* Description:
* Setup the I2C hardware, ready for operation with defaults
*
- ************************************************************************************/
+ ****************************************************************************/
-static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
+static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv,
+ uint32_t frequency)
{
const struct tiva_i2c_config_s *config = priv->config;
uint32_t regval;
@@ -1494,13 +1518,13 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
return OK;
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_uninitialize
*
* Description:
* Shutdown the I2C hardware
*
- ************************************************************************************/
+ ****************************************************************************/
static int tiva_i2c_uninitialize(struct tiva_i2c_priv_s *priv)
{
@@ -1537,15 +1561,16 @@ static int tiva_i2c_uninitialize(struct tiva_i2c_priv_s *priv)
return OK;
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_setclock
*
* Description:
* Set the I2C frequency
*
- ************************************************************************************/
+ ****************************************************************************/
-static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv, uint32_t frequency)
+static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv,
+ uint32_t frequency)
{
uint32_t regval;
uint32_t tmp;
@@ -1557,8 +1582,8 @@ static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv, uint32_t frequency)
if (frequency != priv->frequency)
{
- /* Calculate the clock divider that results in the highest frequency that
- * is than or equal to the desired speed.
+ /* Calculate the clock divider that results in the highest frequency
+ * that is than or equal to the desired speed.
*/
tmp = 2 * 10 * frequency;
@@ -1576,9 +1601,11 @@ static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv, uint32_t frequency)
if ((regval & I2CSC_PC_HS) != 0)
{
tmp = (2 * 3 * 3400000);
- regval = (((SYSCLK_FREQUENCY + tmp - 1) / tmp) - 1) << I2CM_TPR_SHIFT;
+ regval = (((SYSCLK_FREQUENCY + tmp - 1) / tmp) - 1) <<
+ I2CM_TPR_SHIFT;
- tiva_i2c_putreg(priv, TIVA_I2CM_TPR_OFFSET, I2CM_TPR_HS | regval);
+ tiva_i2c_putreg(priv, TIVA_I2CM_TPR_OFFSET,
+ I2CM_TPR_HS | regval);
}
#endif
@@ -1588,15 +1615,16 @@ static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv, uint32_t frequency)
}
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_transfer
*
* Description:
* Generic I2C transfer function
*
- ************************************************************************************/
+ ****************************************************************************/
-static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
+static int tiva_i2c_transfer(struct i2c_master_s *dev,
+ struct i2c_msg_s *msgv,
int msgc)
{
struct tiva_i2c_priv_s *priv = (struct tiva_i2c_priv_s *)dev;
@@ -1652,7 +1680,8 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
ret = -ETIMEDOUT;
}
#if 0 /* I2CM_CS_CLKTO */
- else if ((priv->mstatus & (I2CM_CS_ERROR | I2CM_CS_ARBLST | I2CM_CS_CLKTO)) != 0)
+ else if ((priv->mstatus &
+ (I2CM_CS_ERROR | I2CM_CS_ARBLST | I2CM_CS_CLKTO)) != 0)
#else
else if ((priv->mstatus & (I2CM_CS_ERROR | I2CM_CS_ARBLST)) != 0)
#endif
@@ -1688,9 +1717,10 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
}
}
- /* This is not an error, but should not happen. The I2CM_CS_BUSBSY signal
- * can hang, however. This normally indicates the STOP was never sent,
- * possibly because some other error occurred.
+ /* This is not an error, but should not happen.
+ * The I2CM_CS_BUSBSY signal can hang, however.
+ * This normally indicates the STOP was never sent, possibly because some
+ * other error occurred.
*
* The status bits are not valid if BUSY is set. But in this context I
* assume that busy bit stuck on would be a very bad situation, worthy
@@ -1725,7 +1755,9 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
tiva_i2c_tracedump(priv);
- /* Ensure that no ISR happening after we finish can overwrite any user data */
+ /* Ensure that no ISR happening after we finish can overwrite any user
+ * data
+ */
priv->mcnt = 0;
priv->mptr = NULL;
@@ -1734,7 +1766,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
return ret;
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2c_reset
*
* Description:
@@ -1746,7 +1778,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_I2C_RESET
static int tiva_i2c_reset(FAR struct i2c_master_s * dev)
@@ -1862,17 +1894,17 @@ out:
}
#endif /* CONFIG_I2C_RESET */
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2cbus_initialize
*
* Description:
* Initialize one I2C bus
*
- ************************************************************************************/
+ ****************************************************************************/
struct i2c_master_s *tiva_i2cbus_initialize(int port)
{
@@ -1988,13 +2020,13 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
return (struct i2c_master_s *)priv;
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_i2cbus_uninitialize
*
* Description:
* Uninitialize an I2C bus
*
- ************************************************************************************/
+ ****************************************************************************/
int tiva_i2cbus_uninitialize(struct i2c_master_s *dev)
{
diff --git a/arch/arm/src/tiva/common/tiva_pwm.c b/arch/arm/src/tiva/common/tiva_pwm.c
index 25f69d6..a84462e 100644
--- a/arch/arm/src/tiva/common/tiva_pwm.c
+++ b/arch/arm/src/tiva/common/tiva_pwm.c
@@ -1,11 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/common/tiva_pwm.c
*
* Copyright (C) 2016 Young Mu. All rights reserved.
* Author: Young Mu <yo...@aliyun.com>
*
- * The basic structure of this driver derives in spirit (if nothing more) from the
- * NuttX SAM PWM driver which has:
+ * The basic structure of this driver derives in spirit (if nothing more)
+ * from the NuttX SAM PWM driver which has:
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
@@ -37,11 +37,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -61,9 +61,9 @@
#include "hardware/tiva_pinmap.h"
#include "hardware/tiva_memorymap.h"
-/************************************************************************************
+/****************************************************************************
* Private Types
- ************************************************************************************/
+ ****************************************************************************/
uint32_t g_pwm_pinset[] =
{
@@ -94,24 +94,28 @@ struct tiva_pwm_chan_s
#endif
};
-/************************************************************************************
+/****************************************************************************
* Private Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN0)
-static int tiva_pwm_gen0_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_pwm_gen0_interrupt(int irq,
+ FAR void *context, FAR void *arg);
#endif
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN2)
-static int tiva_pwm_gen1_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_pwm_gen1_interrupt(int irq,
+ FAR void *context, FAR void *arg);
#endif
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN4)
-static int tiva_pwm_gen2_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_pwm_gen2_interrupt(int irq,
+ FAR void *context, FAR void *arg);
#endif
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN6)
-static int tiva_pwm_gen3_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_pwm_gen3_interrupt(int irq,
+ FAR void *context, FAR void *arg);
#endif
#if defined(CONFIG_PWM_PULSECOUNT) && \
@@ -131,7 +135,8 @@ static int tiva_pwm_setup(FAR struct pwm_lowerhalf_s *dev);
static int tiva_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
#ifdef CONFIG_PWM_PULSECOUNT
static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
- FAR const struct pwm_info_s *info, FAR void *handle);
+ FAR const struct pwm_info_s *info,
+ FAR void *handle);
#else
static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info);
@@ -140,9 +145,9 @@ static int tiva_pwm_stop(FAR struct pwm_lowerhalf_s *dev);
static int tiva_pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
int cmd, unsigned long arg);
-/************************************************************************************
+/****************************************************************************
* Private Data
- ************************************************************************************/
+ ****************************************************************************/
static uint32_t g_pwm_freq = 1875000;
static uint32_t g_pwm_counter = (1 << 16);
@@ -163,7 +168,8 @@ static struct tiva_pwm_chan_s g_pwm_chan0 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 0,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 0,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
+ TIVA_PWMn_INTERVAL * 0,
.channel_id = 0,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -182,7 +188,8 @@ static struct tiva_pwm_chan_s g_pwm_chan1 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 0,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 0,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
+ TIVA_PWMn_INTERVAL * 0,
.channel_id = 1,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -201,7 +208,8 @@ static struct tiva_pwm_chan_s g_pwm_chan2 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 1,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 1,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
+ TIVA_PWMn_INTERVAL * 1,
.channel_id = 2,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -220,7 +228,8 @@ static struct tiva_pwm_chan_s g_pwm_chan3 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 1,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 1,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
+ TIVA_PWMn_INTERVAL * 1,
.channel_id = 3,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -239,7 +248,8 @@ static struct tiva_pwm_chan_s g_pwm_chan4 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 2,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 2,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
+ TIVA_PWMn_INTERVAL * 2,
.channel_id = 4,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -258,7 +268,8 @@ static struct tiva_pwm_chan_s g_pwm_chan5 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 2,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 2,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
+ TIVA_PWMn_INTERVAL * 2,
.channel_id = 5,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -277,7 +288,8 @@ static struct tiva_pwm_chan_s g_pwm_chan6 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 3,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 3,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
+ TIVA_PWMn_INTERVAL * 3,
.channel_id = 6,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -296,7 +308,8 @@ static struct tiva_pwm_chan_s g_pwm_chan7 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 3,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE + TIVA_PWMn_INTERVAL * 3,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
+ TIVA_PWMn_INTERVAL * 3,
.channel_id = 7,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -308,17 +321,17 @@ static struct tiva_pwm_chan_s g_pwm_chan7 =
};
#endif
-/************************************************************************************
+/****************************************************************************
* Private Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: tiva_pwm_gen[n]_interrupt
*
* Description:
* Pulse count interrupt handlers for PWM[n]
*
- ************************************************************************************/
+ ****************************************************************************/
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN0)
static int tiva_pwm_gen0_interrupt(int irq, FAR void *context, FAR void *arg)
@@ -348,13 +361,13 @@ static int tiva_pwm_gen3_interrupt(int irq, FAR void *context, FAR void *arg)
}
#endif
-/************************************************************************************
+/****************************************************************************
* Name: tiva_pwm_interrupt
*
* Description:
* Common pulse count interrupt handler.
*
- ************************************************************************************/
+ ****************************************************************************/
#if defined(CONFIG_PWM_PULSECOUNT) && \
(defined(CONFIG_TIVA_PWM0_CHAN0) || defined(CONFIG_TIVA_PWM0_CHAN2) || \
@@ -373,7 +386,8 @@ static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan)
if (chan->cur_count == 0)
{
- tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, CTL_DISABLE << TIVA_PWMn_CTL_ENABLE);
+ tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET,
+ CTL_DISABLE << TIVA_PWMn_CTL_ENABLE);
chan->cur_count = chan->count;
pwm_expired(chan->handle);
}
@@ -382,28 +396,28 @@ static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan)
}
#endif
-/************************************************************************************
+/****************************************************************************
* Name: tiva_pwm_getreg
*
* Description:
* Get a 32-bit register value by offset
*
- ************************************************************************************/
+ ****************************************************************************/
static inline uint32_t tiva_pwm_getreg(struct tiva_pwm_chan_s *chan,
unsigned int offset)
{
- uintptr_t regaddr = chan->generator_base + offset;
- return getreg32(regaddr);
+ uintptr_t regaddr = chan->generator_base + offset;
+ return getreg32(regaddr);
}
-/************************************************************************************
+/****************************************************************************
* Name: tiva_pwm_putreg
*
* Description:
* Put a 32-bit register value by offset
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void tiva_pwm_putreg(struct tiva_pwm_chan_s *chan,
unsigned int offset, uint32_t regval)
@@ -500,7 +514,8 @@ static int tiva_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
#ifdef CONFIG_PWM_PULSECOUNT
static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
- FAR const struct pwm_info_s *info, FAR void *handle)
+ FAR const struct pwm_info_s *info,
+ FAR void *handle)
{
FAR struct tiva_pwm_chan_s *chan = (FAR struct tiva_pwm_chan_s *)dev;
pwminfo("start PWM for channel %d\n", chan->channel_id);
@@ -533,7 +548,8 @@ static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
/* Disable interrupt */
- uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_INTEN_OFFSET);
+ uint32_t enable = getreg32(chan->controller_base +
+ TIVA_PWM_INTEN_OFFSET);
enable &= ~(INT_ENABLE << chan->generator_id);
putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
}
@@ -541,7 +557,8 @@ static int tiva_pwm_start(FAR struct pwm_lowerhalf_s *dev,
{
/* Enable interrupt */
- uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_INTEN_OFFSET);
+ uint32_t enable = getreg32(chan->controller_base +
+ TIVA_PWM_INTEN_OFFSET);
enable |= (INT_ENABLE << chan->generator_id);
putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
}
@@ -642,7 +659,9 @@ static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan,
/* Enable the PWM generator (refer to TM4C1294NCPDT 23.4.10) */
- tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, CTL_ENABLE << TIVA_PWMn_CTL_ENABLE);
+ tiva_pwm_putreg(chan,
+ TIVA_PWMn_CTL_OFFSET,
+ CTL_ENABLE << TIVA_PWMn_CTL_ENABLE);
/* Enable PWM channel (refer to TM4C1294NCPDT 23.4.11) */
@@ -817,7 +836,8 @@ FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel)
* TODO: need an algorithm to choose the best divider and load value combo.
*/
- putreg32(CC_USEPWM << TIVA_PWM_CC_USEPWM | CC_PWMDIV_64 << TIVA_PWM_CC_PWMDIV,
+ putreg32(CC_USEPWM << TIVA_PWM_CC_USEPWM |
+ CC_PWMDIV_64 << TIVA_PWM_CC_PWMDIV,
chan->controller_base + TIVA_PWM_CC);
#ifdef CONFIG_PWM_PULSECOUNT
@@ -826,7 +846,7 @@ FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel)
tiva_pwm_putreg(chan, TIVA_PWMn_INTEN_OFFSET, INT_SET << INTCMPAD);
- /* Attach IRQ handler and enable interrupt*/
+ /* Attach IRQ handler and enable interrupt */
switch (chan->channel_id)
{
diff --git a/arch/arm/src/tiva/common/tiva_timerlib.c b/arch/arm/src/tiva/common/tiva_timerlib.c
index 83d7b86..9e96b4e 100644
--- a/arch/arm/src/tiva/common/tiva_timerlib.c
+++ b/arch/arm/src/tiva/common/tiva_timerlib.c
@@ -55,6 +55,7 @@
/****************************************************************************
* Private Types
****************************************************************************/
+
/* This structure retains the fixed, well-known attributes of a GPTM module */
struct tiva_gptmattr_s
@@ -86,23 +87,25 @@ struct tiva_gptmstate_s
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Register level debug */
- bool wrlast; /* Last was a write */
- uintptr_t addrlast; /* Last address */
- uint32_t vallast; /* Last value */
- int ntimes; /* Number of times */
+ bool wrlast; /* Last was a write */
+ uintptr_t addrlast; /* Last address */
+ uint32_t vallast; /* Last value */
+ int ntimes; /* Number of times */
#endif
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
+
/* Register Access */
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
static bool tiva_timer_checkreg(struct tiva_gptmstate_s *priv, bool wr,
uint32_t regval, uintptr_t regaddr);
#endif
-static uint32_t tiva_getreg(struct tiva_gptmstate_s *priv, unsigned int offset);
+static uint32_t tiva_getreg(struct tiva_gptmstate_s *priv,
+ unsigned int offset);
static void tiva_putreg(struct tiva_gptmstate_s *priv, unsigned int offset,
uint32_t regval);
@@ -140,36 +143,52 @@ static int tiva_gptm7_interrupt(int irq, FAR void *context, FAR void *arg);
static int tiva_timer16_interrupt(struct tiva_gptmstate_s *priv,
int tmndx);
#ifdef CONFIG_TIVA_TIMER0
-static int tiva_timer0a_interrupt(int irq, FAR void *context, FAR void *arg);
-static int tiva_timer0b_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_timer0a_interrupt(int irq, FAR void *context,
+ FAR void *arg);
+static int tiva_timer0b_interrupt(int irq, FAR void *context,
+ FAR void *arg);
#endif
#ifdef CONFIG_TIVA_TIMER1
-static int tiva_timer1a_interrupt(int irq, FAR void *context, FAR void *arg);
-static int tiva_timer1b_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_timer1a_interrupt(int irq, FAR void *context,
+ FAR void *arg);
+static int tiva_timer1b_interrupt(int irq, FAR void *context,
+ FAR void *arg);
#endif
#ifdef CONFIG_TIVA_TIMER2
-static int tiva_timer2a_interrupt(int irq, FAR void *context, FAR void *arg);
-static int tiva_timer2b_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_timer2a_interrupt(int irq, FAR void *context,
+ FAR void *arg);
+static int tiva_timer2b_interrupt(int irq, FAR void *context,
+ FAR void *arg);
#endif
#ifdef CONFIG_TIVA_TIMER3
-static int tiva_timer3a_interrupt(int irq, FAR void *context, FAR void *arg);
-static int tiva_timer3b_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_timer3a_interrupt(int irq, FAR void *context,
+ FAR void *arg);
+static int tiva_timer3b_interrupt(int irq, FAR void *context,
+ FAR void *arg);
#endif
#ifdef CONFIG_TIVA_TIMER4
-static int tiva_timer4a_interrupt(int irq, FAR void *context, FAR void *arg);
-static int tiva_timer4b_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_timer4a_interrupt(int irq, FAR void *context,
+ FAR void *arg);
+static int tiva_timer4b_interrupt(int irq, FAR void *context,
+ FAR void *arg);
#endif
#ifdef CONFIG_TIVA_TIMER5
-static int tiva_timer5a_interrupt(int irq, FAR void *context, FAR void *arg);
-static int tiva_timer5b_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_timer5a_interrupt(int irq, FAR void *context,
+ FAR void *arg);
+static int tiva_timer5b_interrupt(int irq, FAR void *context,
+ FAR void *arg);
#endif
#ifdef CONFIG_TIVA_TIMER6
-static int tiva_timer6a_interrupt(int irq, FAR void *context, FAR void *arg);
-static int tiva_timer6b_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_timer6a_interrupt(int irq, FAR void *context,
+ FAR void *arg);
+static int tiva_timer6b_interrupt(int irq, FAR void *context,
+ FAR void *arg);
#endif
#ifdef CONFIG_TIVA_TIMER7
-static int tiva_timer7a_interrupt(int irq, FAR void *context, FAR void *arg);
-static int tiva_timer7b_interrupt(int irq, FAR void *context, FAR void *arg);
+static int tiva_timer7a_interrupt(int irq, FAR void *context,
+ FAR void *arg);
+static int tiva_timer7b_interrupt(int irq, FAR void *context,
+ FAR void *arg);
#endif
#endif /* CONFIG_TIVA_TIMER_16BIT */
@@ -196,9 +215,10 @@ static int tiva_input_time_mode16(struct tiva_gptmstate_s *priv,
const struct tiva_timer16config_s *timer, int tmndx);
#endif
#ifdef CONFIG_TIVA_TIMER16_PWM
-static uint32_t tiva_pwm16_sel_event(struct tiva_gptmstate_s *priv,
- const struct tiva_timer16config_s *timer,
- int tmndx);
+static uint32_t
+tiva_pwm16_sel_event(struct tiva_gptmstate_s *priv,
+ const struct tiva_timer16config_s *timer,
+ int tmndx);
#endif
#ifdef CONFIG_TIVA_TIMER16_PWM
static int tiva_pwm_mode16(struct tiva_gptmstate_s *priv,
@@ -222,12 +242,18 @@ static int tiva_timer16_configure(struct tiva_gptmstate_s *priv,
static const struct tiva_gptmattr_s g_gptm0_attr =
{
.base = TIVA_TIMER0_BASE,
- .irq = { TIVA_IRQ_TIMER0A, TIVA_IRQ_TIMER0B },
+ .irq =
+ {
+ TIVA_IRQ_TIMER0A, TIVA_IRQ_TIMER0B
+ },
#ifdef CONFIG_TIVA_TIMER_32BIT
.handler32 = tiva_gptm0_interrupt,
#endif
#ifdef CONFIG_TIVA_TIMER_16BIT
- .handler16 = { tiva_timer0a_interrupt, tiva_timer0b_interrupt },
+ .handler16 =
+ {
+ tiva_timer0a_interrupt, tiva_timer0b_interrupt
+ },
#endif
};
@@ -238,12 +264,18 @@ static struct tiva_gptmstate_s g_gptm0_state;
static const struct tiva_gptmattr_s g_gptm1_attr =
{
.base = TIVA_TIMER1_BASE,
- .irq = { TIVA_IRQ_TIMER1A, TIVA_IRQ_TIMER1B },
+ .irq =
+ {
+ TIVA_IRQ_TIMER1A, TIVA_IRQ_TIMER1B
+ },
#ifdef CONFIG_TIVA_TIMER_32BIT
.handler32 = tiva_gptm1_interrupt,
#endif
#ifdef CONFIG_TIVA_TIMER_16BIT
- .handler16 = { tiva_timer1a_interrupt, tiva_timer1b_interrupt },
+ .handler16 =
+ {
+ tiva_timer1a_interrupt, tiva_timer1b_interrupt
+ },
#endif
};
@@ -254,12 +286,18 @@ static struct tiva_gptmstate_s g_gptm1_state;
static const struct tiva_gptmattr_s g_gptm2_attr =
{
.base = TIVA_TIMER2_BASE,
- .irq = { TIVA_IRQ_TIMER2A, TIVA_IRQ_TIMER2B },
+ .irq =
+ {
+ TIVA_IRQ_TIMER2A, TIVA_IRQ_TIMER2B
+ },
#ifdef CONFIG_TIVA_TIMER_32BIT
.handler32 = tiva_gptm2_interrupt,
#endif
#ifdef CONFIG_TIVA_TIMER_16BIT
- .handler16 = { tiva_timer2a_interrupt, tiva_timer2b_interrupt },
+ .handler16 =
+ {
+ tiva_timer2a_interrupt, tiva_timer2b_interrupt
+ },
#endif
};
@@ -270,12 +308,18 @@ static struct tiva_gptmstate_s g_gptm2_state;
static const struct tiva_gptmattr_s g_gptm3_attr =
{
.base = TIVA_TIMER3_BASE,
- .irq = { TIVA_IRQ_TIMER3A, TIVA_IRQ_TIMER3B },
+ .irq =
+ {
+ TIVA_IRQ_TIMER3A, TIVA_IRQ_TIMER3B
+ },
#ifdef CONFIG_TIVA_TIMER_32BIT
.handler32 = tiva_gptm3_interrupt,
#endif
#ifdef CONFIG_TIVA_TIMER_16BIT
- .handler16 = { tiva_timer3a_interrupt, tiva_timer3b_interrupt },
+ .handler16 =
+ {
+ tiva_timer3a_interrupt, tiva_timer3b_interrupt
+ },
#endif
};
@@ -286,12 +330,18 @@ static struct tiva_gptmstate_s g_gptm3_state;
static const struct tiva_gptmattr_s g_gptm4_attr =
{
.base = TIVA_TIMER4_BASE,
- .irq = { TIVA_IRQ_TIMER4A, TIVA_IRQ_TIMER4B },
+ .irq =
+ {
+ TIVA_IRQ_TIMER4A, TIVA_IRQ_TIMER4B
+ },
#ifdef CONFIG_TIVA_TIMER_32BIT
.handler32 = tiva_gptm4_interrupt,
#endif
#ifdef CONFIG_TIVA_TIMER_16BIT
- .handler16 = { tiva_timer4a_interrupt, tiva_timer4b_interrupt },
+ .handler16 =
+ {
+ tiva_timer4a_interrupt, tiva_timer4b_interrupt
+ },
#endif
};
@@ -302,12 +352,18 @@ static struct tiva_gptmstate_s g_gptm4_state;
static const struct tiva_gptmattr_s g_gptm5_attr =
{
.base = TIVA_TIMER5_BASE,
- .irq = { TIVA_IRQ_TIMER5A, TIVA_IRQ_TIMER5B },
+ .irq =
+ {
+ TIVA_IRQ_TIMER5A, TIVA_IRQ_TIMER5B
+ },
#ifdef CONFIG_TIVA_TIMER_32BIT
.handler32 = tiva_gptm5_interrupt,
#endif
#ifdef CONFIG_TIVA_TIMER_16BIT
- .handler16 = { tiva_timer5a_interrupt, tiva_timer5b_interrupt },
+ .handler16 =
+ {
+ tiva_timer5a_interrupt, tiva_timer5b_interrupt
+ },
#endif
};
@@ -318,12 +374,18 @@ static struct tiva_gptmstate_s g_gptm5_state;
static const struct tiva_gptmattr_s g_gptm6_attr =
{
.base = TIVA_TIMER6_BASE,
- .irq = { TIVA_IRQ_TIMER6A, TIVA_IRQ_TIMER6B },
+ .irq =
+ {
+ TIVA_IRQ_TIMER6A, TIVA_IRQ_TIMER6B
+ },
#ifdef CONFIG_TIVA_TIMER_32BIT
.handler32 = tiva_gptm6_interrupt,
#endif
#ifdef CONFIG_TIVA_TIMER_16BIT
- .handler16 = { tiva_timer6a_interrupt, tiva_timer6b_interrupt },
+ .handler16 =
+ {
+ tiva_timer6a_interrupt, tiva_timer6b_interrupt
+ },
#endif
};
@@ -334,12 +396,18 @@ static struct tiva_gptmstate_s g_gptm6_state;
static const struct tiva_gptmattr_s g_gptm7_attr =
{
.base = TIVA_TIMER7_BASE,
- .irq = { TIVA_IRQ_TIMER7A, TIVA_IRQ_TIMER7B },
+ .irq =
+ {
+ TIVA_IRQ_TIMER7A, TIVA_IRQ_TIMER7B
+ },
#ifdef CONFIG_TIVA_TIMER_32BIT
.handler32 = tiva_gptm7_interrupt,
#endif
#ifdef CONFIG_TIVA_TIMER_16BIT
- .handler16 = { tiva_timer7a_interrupt, tiva_timer7b_interrupt },
+ .handler16 =
+ {
+ tiva_timer7a_interrupt, tiva_timer7b_interrupt
+ },
#endif
};
@@ -412,7 +480,8 @@ static bool tiva_timer_checkreg(struct tiva_gptmstate_s *priv, bool wr,
*
****************************************************************************/
-static uint32_t tiva_getreg(struct tiva_gptmstate_s *priv, unsigned int offset)
+static uint32_t tiva_getreg(struct tiva_gptmstate_s *priv,
+ unsigned int offset)
{
uintptr_t regaddr = priv->attr->base + offset;
uint32_t regval = getreg32(regaddr);
@@ -460,7 +529,8 @@ static void tiva_putreg(struct tiva_gptmstate_s *priv, unsigned int offset,
*
****************************************************************************/
-static void tiva_modifyreg(struct tiva_gptmstate_s *priv, unsigned int offset,
+static void tiva_modifyreg(struct tiva_gptmstate_s *priv,
+ unsigned int offset,
uint32_t clrbits, uint32_t setbits)
{
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
@@ -623,7 +693,9 @@ static int tiva_timer16_interrupt(struct tiva_gptmstate_s *priv, int tmndx)
DEBUGASSERT(priv && priv->attr && priv->config && (unsigned)tmndx < 2);
- /* Read the masked interrupt status, masking out bits only for this timer. */
+ /* Read the masked interrupt status,
+ * masking out bits only for this timer.
+ */
intmask = tmndx ? TIMERB_INTS : TIMERA_INTS;
status = tiva_getreg(priv, TIVA_TIMER_MIS_OFFSET) & intmask;
@@ -780,8 +852,9 @@ static int tiva_timer7b_interrupt(int irq, FAR void *context, FAR void *arg)
****************************************************************************/
#ifdef CONFIG_TIVA_TIMER32_PERIODIC
-static int tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
- const struct tiva_timer32config_s *timer)
+static int
+tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
+ const struct tiva_timer32config_s *timer)
{
uint32_t regval;
@@ -798,7 +871,7 @@ static int tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
* operation.
*/
- tiva_putreg(priv, TIVA_TIMER_CFG_OFFSET, TIMER_CFG_CFG_32);
+ tiva_putreg(priv, TIVA_TIMER_CFG_OFFSET, TIMER_CFG_CFG_32);
/* 3. Configure the TAMR field in the GPTM Timer n Mode Register
* (GPTMTAMR):
@@ -864,15 +937,15 @@ static int tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
/* Enable snapshot mode?
*
- * In periodic, snap-shot mode (TnMR field is 0x2 and the TnSNAPS bit is
- * set in the GPTMTnMR register), the value of the timer at the time-out
- * event is loaded into the GPTMTnR register and the value of the
- * prescaler is loaded into the GPTMTnPS register. The free-running
- * counter value is shown in the GPTMTnV register. In this manner,
- * software can determine the time elapsed from the interrupt assertion
- * to the ISR entry by examining the snapshot values and the current value
- * of the free-running timer. Snapshot mode is not available when the
- * timer is configured in one-shot mode.
+ * In periodic, snap-shot mode (TnMR field is 0x2 and the TnSNAPS bit is
+ * set in the GPTMTnMR register), the value of the timer at the time-out
+ * event is loaded into the GPTMTnR register and the value of the
+ * prescaler is loaded into the GPTMTnPS register. The free-running
+ * counter value is shown in the GPTMTnV register. In this manner,
+ * software can determine the time elapsed from the interrupt assertion
+ * to the ISR entry by examining the snapshot values and the current value
+ * of the free-running timer. Snapshot mode is not available when the
+ * timer is configured in one-shot mode.
*
* TODO: Not implemented
*/
@@ -894,6 +967,7 @@ static int tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
tiva_putreg(priv, TIVA_TIMER_TAMR_OFFSET, regval);
/* Enable and configure ADC trigger outputs */
+
if (TIMER_ISADCTIMEOUT(timer) || TIMER_ISADCMATCH(timer))
{
#ifdef CONFIG_ARCH_CHIP_TM4C129
@@ -988,9 +1062,10 @@ static int tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
****************************************************************************/
#ifdef CONFIG_TIVA_TIMER16_PERIODIC
-static int tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
- const struct tiva_timer16config_s *timer,
- int tmndx)
+static int
+tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
+ const struct tiva_timer16config_s *timer,
+ int tmndx)
{
unsigned int regoffset;
uint32_t regval;
@@ -1047,10 +1122,11 @@ static int tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
* register. If the timer prescaler is used, the prescaler
* snapshot is loaded into the GPTM Timer A/B (GPTMTnPR).
* TnWOT - GPTM Timer A/B Wait-on-Trigger
- * 0: The 16-bit begins counting as soon as it is enabled (default).
- * 1: If the 16-bit timer is enabled, it does not begin counting
- * until it receives a trigger from the timer in the
- * previous position in the daisy chain.
+ * 0: The 16-bit begins counting as soon as it is enabled
+ * (default).
+ * 1: If the 16-bit timer is enabled, it does not begin
+ * counting until it receives a trigger from the timer in
+ * the previous position in the daisy chain.
* TnINTD - One-shot/Periodic Interrupt Disable
* 0: Time-out interrupt functions as normal.
* 1: Time-out interrupt are disabled (default).
@@ -1078,9 +1154,9 @@ static int tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
* prescaler is loaded into the GPTMTnPS register. The free-running
* counter value is shown in the GPTMTnV register. In this manner,
* software can determine the time elapsed from the interrupt assertion
- * to the ISR entry by examining the snapshot values and the current value
- * of the free-running timer. Snapshot mode is not available when the
- * timer is configured in one-shot mode.
+ * to the ISR entry by examining the snapshot values and the current
+ * value of the free-running timer. Snapshot mode is not available when
+ * the timer is configured in one-shot mode.
*
* TODO: Not implemented
*/
@@ -1227,7 +1303,7 @@ static int tiva_rtc_mode32(struct tiva_gptmstate_s *priv,
* the 32-bit RTC mode.
*/
- tiva_putreg(priv, TIVA_TIMER_CFG_OFFSET, TIMER_CFG_CFG_RTC);
+ tiva_putreg(priv, TIVA_TIMER_CFG_OFFSET, TIMER_CFG_CFG_RTC);
/* 4. Write the match value to the GPTM Timer n Match Register
* (GPTMTnMATCHR).
@@ -1286,11 +1362,13 @@ static int tiva_rtc_mode32(struct tiva_gptmstate_s *priv,
****************************************************************************/
#ifdef CONFIG_TIVA_TIMER16_EDGECOUNT
-static int tiva_input_edgecount_mode16(struct tiva_gptmstate_s *priv,
- const struct tiva_timer16config_s *timer,
- int tmndx)
+static int
+tiva_input_edgecount_mode16(struct tiva_gptmstate_s *priv,
+ const struct tiva_timer16config_s *timer,
+ int tmndx)
{
- /* A timer is configured to Input Edge-Count mode by the following sequence:
+ /* A timer is configured to Input Edge-Count mode by the following
+ * sequence:
*
* 1. Ensure the timer is disabled (the TnEN bit is cleared) before making
* any changes.
@@ -1457,9 +1535,10 @@ static int tiva_input_time_mode16(struct tiva_gptmstate_s *priv,
****************************************************************************/
#ifdef CONFIG_TIVA_TIMER16_PWM
-static uint32_t tiva_pwm16_sel_event(struct tiva_gptmstate_s *priv,
- const struct tiva_timer16config_s *timer,
- int tmndx)
+static uint32_t
+tiva_pwm16_sel_event(struct tiva_gptmstate_s *priv,
+ const struct tiva_timer16config_s *timer,
+ int tmndx)
{
/* For PWM interrupt edge selection, we can interrupt on positive edge
* (TIMER_CTL_TnEVENT_POS), negative edge (TIMER_CTL_TnEVENT_NEG), or both
@@ -1473,6 +1552,7 @@ static uint32_t tiva_pwm16_sel_event(struct tiva_gptmstate_s *priv,
/* When interrupting on both edges, it doesn't matter if PWM output
* is inverted.
*/
+
return tmndx ? TIMER_CTL_TBEVENT_BOTH : TIMER_CTL_TAEVENT_BOTH;
}
@@ -1557,7 +1637,8 @@ static int tiva_pwm_mode16(struct tiva_gptmstate_s *priv,
regoffset = tmndx ? TIVA_TIMER_TBMR_OFFSET : TIVA_TIMER_TAMR_OFFSET;
clrbits = TIMER_TnMR_TnMR_MASK | TIMER_TnMR_TnCMR | TIMER_TnMR_TnAMS;
- setbits = TIMER_TnMR_TnMR_PERIODIC | TIMER_TnMR_TnCMR_EDGECOUNT | TIMER_TnMR_TnAMS_PWM;
+ setbits = TIMER_TnMR_TnMR_PERIODIC | TIMER_TnMR_TnCMR_EDGECOUNT |
+ TIMER_TnMR_TnAMS_PWM;
tiva_modifyreg(priv, regoffset, clrbits, setbits);
/* 4. Configure the output state of the PWM signal (whether or not it is
@@ -1596,12 +1677,13 @@ static int tiva_pwm_mode16(struct tiva_gptmstate_s *priv,
tiva_modifyreg(priv, regoffset, 0, TIMER_TnMR_TnPWMIE);
/* 6. Set PWM period: This is a 24-bit value. Put the high byte (bits 16
- * through 23) in the prescaler register (TIVA_TIMER_TnPR_OFFSET). Put the
- * low word (bits 0 through 15) in the interval load register
+ * through 23) in the prescaler register (TIVA_TIMER_TnPR_OFFSET).
+ * Put the low word (bits 0 through 15) in the interval load register
* (TIVA_TIMER_TnILR_OFFSET).
*
- * NOTE: This is done when tiva_timer16pwm_setperiodduty() is called.
- * That must be done by other logic, prior to starting the clock running.
+ * NOTE:
+ * This is done when tiva_timer16pwm_setperiodduty() is called. That
+ * must be done by other logic, prior to starting the clock running.
*
* The following note was here before implementation of this function
* was written:
@@ -1624,12 +1706,13 @@ static int tiva_pwm_mode16(struct tiva_gptmstate_s *priv,
*/
/* 7. Set PWM duty cycle: This is a 24-bit value. Put the high byte (bits
- * 16 through 23) in the prescale match register (TIVA_TIMER_TnPMR_OFFSET).
- * Put the low word (bits 0 through 16) in the match register
- * (TIVA_TIMER_TnMATCHR_OFFSET).
+ * 16 through 23) in the prescale match register
+ * (TIVA_TIMER_TnPMR_OFFSET). Put the low word (bits 0 through 16) in
+ * the match register (TIVA_TIMER_TnMATCHR_OFFSET).
*
- * NOTE: This is done when tiva_timer16pwm_setperiodduty() is called.
- * That must be done by other logic, prior to starting the clock running.
+ * NOTE:
+ * This is done when tiva_timer16pwm_setperiodduty() is called. That
+ * must be done by other logic, prior to starting the clock running.
* Once the period and initial duty cycle are set, the duty cycle can
* be changed at any time by calling tiva_timer16pwm_setduty().
*/
@@ -1768,6 +1851,7 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
{
#ifdef CONFIG_TIVA_TIMER0
case 0:
+
/* Enable GPTM0 clocking and power */
attr = &g_gptm0_attr;
@@ -1903,8 +1987,9 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
priv->clkin = ALTCLK_FREQUENCY;
#else
- tmrinfo("tiva_gptm_configure: Error: alternate clock only available on TM4C129 devices\n");
- return (TIMER_HANDLE)NULL;
+ tmrinfo("tiva_gptm_configure:");
+ tmrinfo(" Error: alternate clock only available on TM4C129 devices\n");
+ return (TIMER_HANDLE)NULL;
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
}
else
@@ -1950,7 +2035,8 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
ret = irq_attach(attr->irq[TIMER16A], attr->handler16[TIMER16A], NULL);
if (ret == OK)
{
- ret = irq_attach(attr->irq[TIMER16B], attr->handler16[TIMER16B], NULL);
+ ret = irq_attach(attr->irq[TIMER16B],
+ attr->handler16[TIMER16B], NULL);
}
if (ret == OK)
@@ -2060,7 +2146,8 @@ void tiva_gptm_release(TIMER_HANDLE handle)
*
****************************************************************************/
-void tiva_gptm_putreg(TIMER_HANDLE handle, unsigned int offset, uint32_t value)
+void tiva_gptm_putreg(TIMER_HANDLE handle,
+ unsigned int offset, uint32_t value)
{
DEBUGASSERT(handle);
tiva_putreg((struct tiva_gptmstate_s *)handle, offset, value);
@@ -2079,8 +2166,8 @@ void tiva_gptm_putreg(TIMER_HANDLE handle, unsigned int offset, uint32_t value)
* offset - The offset to the timer register to be written
*
* Returned Value:
- * The 32-bit value read at the provided offset into the timer register base
- * address.
+ * The 32-bit value read at the provided offset into the timer register
+ * base address.
*
****************************************************************************/
@@ -2159,8 +2246,8 @@ void tiva_timer32_start(TIMER_HANDLE handle)
* Name: tiva_timer16_start
*
* Description:
- * After tiva_gptm_configure() has been called to configure 16-bit timer(s),
- * this function must be called to start one 16-bit timer.
+ * After tiva_gptm_configure() has been called to configure 16-bit
+ * timer(s), this function must be called to start one 16-bit timer.
*
* Input Parameters:
* handle - The handle value returned by tiva_gptm_configure()
@@ -2363,9 +2450,10 @@ uint32_t tiva_timer16_counter(TIMER_HANDLE handle, int tmndx)
}
else
{
- /* We are counting down. The prescaler contains the least-significant
- * bits of the count. Sample these registers until we are assured that
- * there is no roll-over from the counter to the counter register.
+ /* We are counting down.
+ * The prescaler contains the least-significant bits of the count.
+ * Sample these registers until we are assured that there is no
+ * roll-over from the counter to the counter register.
*/
do
@@ -2488,6 +2576,7 @@ void tiva_timer32_setinterval(TIMER_HANDLE handle, uint32_t interval)
/* Clearing the TACINTD bit allows the time-out interrupt to be
* generated as normal
*/
+
moder = base + TIVA_TIMER_TAMR_OFFSET;
modev1 = getreg32(moder);
modev2 = modev1 & ~TIMER_TnMR_TnCINTD;
@@ -2558,7 +2647,8 @@ void tiva_timer32_setinterval(TIMER_HANDLE handle, uint32_t interval)
****************************************************************************/
#ifdef CONFIG_TIVA_TIMER_16BIT
-void tiva_timer16_setinterval(TIMER_HANDLE handle, uint16_t interval, int tmndx)
+void tiva_timer16_setinterval(TIMER_HANDLE handle,
+ uint16_t interval, int tmndx)
{
struct tiva_gptmstate_s *priv = (struct tiva_gptmstate_s *)handle;
const struct tiva_gptm16config_s *config;
@@ -2739,7 +2829,8 @@ uint32_t tiva_timer32_remaining(TIMER_HANDLE handle)
* timeout event (the value in the GPTMTAILR, the timer reloads
* with zero.
*
- * Get the current timer interval value */
+ * Get the current timer interval value
+ */
interval = tiva_getreg(priv, TIVA_TIMER_TAILR_OFFSET);
@@ -2970,7 +3061,6 @@ void tiva_timer32_relmatch(TIMER_HANDLE handle, uint32_t relmatch)
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
tmrinfo("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
#endif /* CONFIG_TIVA_TIMER_REGDEBUG */
-
}
#endif /* CONFIG_TIVA_TIMER32_PERIODIC */
@@ -3273,7 +3363,8 @@ void tiva_timer16pwm_setperiodduty(TIMER_HANDLE handle, uint32_t period,
/* Enable the capture mode event interrupt at the timer peripheral.
* The interrupt will not fire until enabled at the NVIC. That will be
- * done when tiva_timer16_start() is called. */
+ * done when tiva_timer16_start() is called.
+ */
if (toints)
{
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi2_refsys.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi2_refsys.h
index 6aa143d..af04ad5 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi2_refsys.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi2_refsys.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi2_refsys.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,24 +37,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_ADI2_REFSYS_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_ADI2_REFSYS_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
#include "hardware/tiva_ddi.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* ADI2 REFSYS Register Offsets *************************************************************************************/
+/* ADI2 REFSYS Register Offsets *********************************************/
#define TIVA_ADI2_REFSYS_REFSYSCTL0_OFFSET 0x0000
#define TIVA_ADI2_REFSYS_SOCLDOCTL0_OFFSET 0x0002
@@ -66,7 +67,7 @@
#define TIVA_ADI2_REFSYS_HPOSCCTL1_OFFSET 0x000b
#define TIVA_ADI2_REFSYS_HPOSCCTL2_OFFSET 0x000c
-/* ADI2 REFSYS Register Addresses ***********************************************************************************/
+/* ADI2 REFSYS Register Addresses *******************************************/
#define TIVA_ADI2_REFSYS_REFSYSCTL0 (TIVA_ADI2_BASE + TIVA_ADI2_REFSYS_REFSYSCTL0_OFFSET)
#define TIVA_ADI2_REFSYS_SOCLDOCTL0 (TIVA_ADI2_BASE + TIVA_ADI2_REFSYS_SOCLDOCTL0_OFFSET)
@@ -79,7 +80,9 @@
#define TIVA_ADI2_REFSYS_HPOSCCTL1 (TIVA_ADI2_BASE + TIVA_ADI2_REFSYS_HPOSCCTL1_OFFSET)
#define TIVA_ADI2_REFSYS_HPOSCCTL2 (TIVA_ADI2_BASE + TIVA_ADI2_REFSYS_HPOSCCTL2_OFFSET)
-/* Offsets may also be used in conjunction with access as described in cc13x0_ddi.h */
+/* Offsets may also be used in conjunction with access as described in
+ * cc13x0_ddi.h
+ */
#define TIVA_ADI2_REFSYS_DIR (TIVA_ADI2_BASE + TIVA_DDI_DIR_OFFSET)
#define TIVA_ADI2_REFSYS_SET (TIVA_ADI2_BASE + TIVA_DDI_SET_OFFSET)
@@ -88,7 +91,7 @@
#define TIVA_ADI2_REFSYS_MASK8B (TIVA_ADI2_BASE + TIVA_DDI_MASK8B_OFFSET)
#define TIVA_ADI2_REFSYS_MASK16B (TIVA_ADI2_BASE + TIVA_DDI_MASK16B_OFFSET)
-/* ADI2 REFSYS Bitfield Definitions *********************************************************************************/
+/* ADI2 REFSYS Bitfield Definitions *****************************************/
/* TIVA_ADI2_REFSYS_REFSYSCTL0 */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi3_refsys.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi3_refsys.h
index 075f039..2a1a112 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi3_refsys.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi3_refsys.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi3_refsys.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,24 +37,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_ADI3_REFSYS_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_ADI3_REFSYS_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
#include "hardware/tiva_ddi.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* ADI3 REFSYS Register Offsets *************************************************************************************/
+/* ADI3 REFSYS Register Offsets *********************************************/
#define TIVA_ADI3_REFSYS_SPARE0_OFFSET 0x0001 /* Analog Test Control */
#define TIVA_ADI3_REFSYS_REFSYSCTL0_OFFSET 0x0002
@@ -67,7 +68,7 @@
#define TIVA_ADI3_REFSYS_DCDCCTL4_OFFSET 0x000a
#define TIVA_ADI3_REFSYS_DCDCCTL5_OFFSET 0x000b
-/* ADI3 REFSYS Register Addresses ***********************************************************************************/
+/* ADI3 REFSYS Register Addresses *******************************************/
#define TIVA_ADI3_REFSYS_SPARE0 (TIVA_ADI3_BASE + TIVA_ADI3_REFSYS_SPARE0_OFFSET)
#define TIVA_ADI3_REFSYS_REFSYSCTL0 (TIVA_ADI3_BASE + TIVA_ADI3_REFSYS_REFSYSCTL0_OFFSET)
@@ -81,7 +82,9 @@
#define TIVA_ADI3_REFSYS_DCDCCTL4 (TIVA_ADI3_BASE + TIVA_ADI3_REFSYS_DCDCCTL4_OFFSET)
#define TIVA_ADI3_REFSYS_DCDCCTL5 (TIVA_ADI3_BASE + TIVA_ADI3_REFSYS_DCDCCTL5_OFFSET)
-/* Offsets may also be used in conjunction with access as described in cc13x0_ddi.h */
+/* Offsets may also be used in conjunction with access as described in
+ * cc13x0_ddi.h
+ */
#define TIVA_ADI3_REFSYS_DIR (TIVA_ADI3_BASE + TIVA_DDI_DIR_OFFSET)
#define TIVA_ADI3_REFSYS_SET (TIVA_ADI3_BASE + TIVA_DDI_SET_OFFSET)
@@ -90,7 +93,7 @@
#define TIVA_ADI3_REFSYS_MASK8B (TIVA_ADI3_BASE + TIVA_DDI_MASK8B_OFFSET)
#define TIVA_ADI3_REFSYS_MASK16B (TIVA_ADI3_BASE + TIVA_DDI_MASK16B_OFFSET)
-/* ADI3 REFSYS Bitfield Definitions *********************************************************************************/
+/* ADI3 REFSYS Bitfield Definitions *****************************************/
/* TIVA_ADI3_REFSYS_SPARE0 */
@@ -182,6 +185,7 @@
# define ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_TYPICAL (5 << ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_SHIFT) /* Typical voltage after trim voltage 1.71V */
# define ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_MAX (21 << ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_SHIFT) /* Max voltage 1.96V */
# define ADI3_REFS */YS_DCDCCTL0_VDDR_TRIM_MIN (22 << ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_SHIFT) /* Min voltage 1.47V */
+
#define ADI3_REFSYS_DCDCCTL0_GLDO_ISRC_SHIFT (5) /* Bits 5-7: Set charge and re-charge current level */
/* 2's complement encoding */
#define ADI3_REFSYS_DCDCCTL0_GLDO_ISRC_MASK (7 << ADI3_REFSYS_DCDCCTL0_GLDO_ISRC_SHIFT)
@@ -200,6 +204,7 @@
# define ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_TYPICAL (nn << ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_SHIFT) /* Typical voltage after trim voltage 1.52V */
# define ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_MAX (nn << ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_SHIFT) /* Max voltage 1.96V */
# define ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_MIN (nn << ADI3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_SHIFT) /* Min voltage 1.47V */
+
#define ADI3_REFSYS_DCDCCTL1_VDDR_OK_HYST (1 << 5) /* Bit 5: Increase the hysteresis for when VDDR is considered ok */
/* 0: Hysteresis = 60mV; 1: Hysteresis = 70mV */
#define ADI3_REFSYS_DCDCCTL1_IPTAT_TRIM_SHIFT (6) /* Bits 6-7: Trim GLDO bias current */
@@ -221,6 +226,7 @@
# define ADI3_REFSYS_DCDCCTL2_TESTSEL_PASSGATE (2 << ADI3_REFSYS_DCDCCTL2_TESTSEL_SHIFT) /* Pass transistor gate voltage connected to test bus */
# define ADI3_REFSYS_DCDCCTL2_TESTSEL_IB1U (4 << ADI3_REFSYS_DCDCCTL2_TESTSEL_SHIFT) /* 1uA bias current connected to test bus */
# define ADI3_REFSYS_DCDCCTL2_TESTSEL_VDDROK (8 << ADI3_REFSYS_DCDCCTL2_TESTSEL_SHIFT) /* VDDR_OK connected to test bus */
+
#define ADI3_REFSYS_DCDCCTL2_BIAS_DIS (1 << 4) /* Bit 4: Disable dummy bias current */
#define ADI3_REFSYS_DCDCCTL2_TEST_VDDR (1 << 5) /* Bit 5: Connect VDDR to ATEST bus */
#define ADI3_REFSYS_DCDCCTL2_TURNON_EA_SW (1 << 6) /* Bit 6: Turns on GLDO error amp switch */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_batmon.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_batmon.h
index cab60d4..3b8ef15 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_batmon.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_batmon.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_batmon.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_BATMON_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_BATMON_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AON BATMON Register Offsets **************************************************************************************/
+/* AON BATMON Register Offsets **********************************************/
#define TIVA_AON_BATMON_CTL_OFFSET 0x0000
#define TIVA_AON_BATMON_MEASCFG_OFFSET 0x0004
@@ -68,7 +69,7 @@
#define TIVA_AON_BATMON_TEMP_OFFSET 0x0030 /* Temperature */
#define TIVA_AON_BATMON_TEMPUPD_OFFSET 0x0034 /* Temperature Update */
-/* AON BATMON Register Addresses ************************************************************************************/
+/* AON BATMON Register Addresses ********************************************/
#define TIVA_AON_BATMON_CTL (TIVA_AON_BATMON_BASE + TIVA_AON_BATMON_CTL_OFFSET)
#define TIVA_AON_BATMON_MEASCFG (TIVA_AON_BATMON_BASE + TIVA_AON_BATMON_MEASCFG_OFFSET)
@@ -84,7 +85,7 @@
#define TIVA_AON_BATMON_TEMP (TIVA_AON_BATMON_BASE + TIVA_AON_BATMON_TEMP_OFFSET)
#define TIVA_AON_BATMON_TEMPUPD (TIVA_AON_BATMON_BASE + TIVA_AON_BATMON_TEMPUPD_OFFSET)
-/* AON BATMON Register Bitfield Definitions *************************************************************************/
+/* AON BATMON Register Bitfield Definitions *********************************/
/* AON_BATMON_CTL */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h
index ba825a3..6caca56 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_ioc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_IOC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_IOC_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AON IOC Register Offsets *****************************************************************************************/
+/* AON IOC Register Offsets *************************************************/
#define TIVA_AON_IOC_IOSTRMIN_OFFSET 0x0000
#define TIVA_AON_IOC_IOSTRMED_OFFSET 0x0004
@@ -61,7 +62,7 @@
#define TIVA_AON_IOC_CLK32KCTL_OFFSET 0x0010 /* SCLK_LF External Output Control */
#define TIVA_AON_IOC_TCKCTL_OFFSET 0x0014 /* TCK IO Pin Control */
-/* AON IOC Register Addresses ***************************************************************************************/
+/* AON IOC Register Addresses ***********************************************/
#define TIVA_AON_IOC_IOSTRMIN (TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMIN_OFFSET)
#define TIVA_AON_IOC_IOSTRMED (TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMED_OFFSET)
@@ -69,7 +70,7 @@
#define TIVA_AON_IOC_IOCLATCH (TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOCLATCH_OFFSET)
#define TIVA_AON_IOC_CLK32KCTL (TIVA_AON_IOC_BASE + TIVA_AON_IOC_CLK32KCTL_OFFSET)
-/* AON IOC Bitfield Definitions *************************************************************************************/
+/* AON IOC Bitfield Definitions *********************************************/
/* TIVA_AON_IOC_IOSTRMIN */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h
index bd1c7f6..db68ac8 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_RTC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_RTC_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AON RTC Register Offsets *****************************************************************************************/
+/* AON RTC Register Offsets *************************************************/
#define TIVA_AON_RTC_CTL_OFFSET 0x0000 /* Control */
#define TIVA_AON_RTC_EVFLAGS_OFFSET 0x0004 /* Event Flags, RTC Status */
@@ -67,7 +68,7 @@
#define TIVA_AON_RTC_CH1CAPT_OFFSET 0x0028 /* Channel 1 Capture Value */
#define TIVA_AON_RTC_SYNC_OFFSET 0x002c /* AON Synchronization */
-/* AON RTC Register Addresses ***************************************************************************************/
+/* AON RTC Register Addresses ***********************************************/
#define TIVA_AON_RTC_CTL (TIVA_AON_RTC_BASE + TIVA_AON_RTC_CTL_OFFSET)
#define TIVA_AON_RTC_EVFLAGS (TIVA_AON_RTC_BASE + TIVA_AON_RTC_EVFLAGS_OFFSET)
@@ -82,7 +83,7 @@
#define TIVA_AON_RTC_CH1CAPT (TIVA_AON_RTC_BASE + TIVA_AON_RTC_CH1CAPT_OFFSET)
#define TIVA_AON_RTC_SYNC (TIVA_AON_RTC_BASE + TIVA_AON_RTC_SYNC_OFFSET)
-/* AON RTC Bitfield Definitions *************************************************************************************/
+/* AON RTC Bitfield Definitions *********************************************/
/* TIVA_AON_RTC_CTL */
@@ -106,6 +107,7 @@
# define AON_RTC_CTL_EV_DELAY_D112 (11 << AON_RTC_CTL_EV_DELAY_SHIFT) /* Delay by 112 clock cycles */
# define AON_RTC_CTL_EV_DELAY_D128 (12 << AON_RTC_CTL_EV_DELAY_SHIFT) /* Delay by 128 clock cycles */
# define AON_RTC_CTL_EV_DELAY_D144 (13 << AON_RTC_CTL_EV_DELAY_SHIFT) /* Delay by 144 clock cycles */
+
#define AON_RTC_CTL_COMB_EV_MASK_SHIFT (16) /* Bits 16-18: Select how delayed event form combined events */
#define AON_RTC_CTL_COMB_EV_MASK_MASK (7 << AON_RTC_CTL_COMB_EV_MASK_SHIFT)
# define AON_RTC_CTL_COMB_EV_MASK_NONE (0 << AON_RTC_CTL_COMB_EV_MASK_SHIFT) /* No event for combined event */
@@ -120,7 +122,9 @@
#define AON_RTC_EVFLAGS_CH2 (1 << 16) /* Bit 16: Channel 2 event flag */
/* TIVA_AON_RTC_SEC (32-bit value, units of seconds) */
+
/* TIVA_AON_RTC_SUBSEC (32-bit value, b32 fractional seconds) */
+
/* TIVA_AON_RTC_SUBSECINC (32-bit value) */
/* TIVA_AON_RTC_CHCTL */
@@ -128,14 +132,19 @@
#define AON_RTC_CHCTL_CH0_EN (1 << 0) /* Bit 0: RTC Channel 0 enable */
#define AON_RTC_CHCTL_CH1_EN (1 << 8) /* Bit 8: RTC Channel 1 enable */
#define AON_RTC_CHCTL_CH1_CAPT_EN (1 << 9) /* Bit 9: Channel 1 mode */
+
# define AON_RTC_CHCTL_CH1_CAPT_CMP (0) /* Compare mode */
# define AON_RTC_CHCTL_CH1_CAPT_CAPT AON_RTC_CHCTL_CH1_CAPT_EN /* Capture mode */
+
#define AON_RTC_CHCTL_CH2_EN (1 << 16) /* Bit 16: RTC Channel 2 Enable */
#define AON_RTC_CHCTL_CH2_CONT_EN (1 << 18) /* Bit 18: Enable Channel 2 Continuous Operation */
/* TIVA_AON_RTC_CH0CMP (32-bit value) */
+
/* TIVA_AON_RTC_CH1CMP (32-bit value) */
+
/* TIVA_AON_RTC_CH2CMP (32-bit value) */
+
/* TIVA_AON_RTC_CH2CMPINC (32-bit value) */
/* TIVA_AON_RTC_CH1CAPT */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h
index dc1c46c..dd4e278 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,35 +37,35 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_SYSCTL_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_SYSCTL_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AON SYSCTL Register Offsets **************************************************************************************/
+/* AON SYSCTL Register Offsets **********************************************/
#define TIVA_AON_SYSCTL_PWRCTL_OFFSET 0x0000 /* Power Management */
#define TIVA_AON_SYSCTL_RESETCTL_OFFSET 0x0004 /* Reset Management */
#define TIVA_AON_SYSCTL_SLEEPCTL_OFFSET 0x0008 /* Sleep Mode */
-/* AON SYSCTL Register Addresses ************************************************************************************/
+/* AON SYSCTL Register Addresses ********************************************/
#define TIVA_AON_SYSCTL_PWRCTL (TIVA_AON_SYSCTL_BASE + TIVA_AON_SYSCTL_PWRCTL_OFFSET)
#define TIVA_AON_SYSCTL_RESETCTL (TIVA_AON_SYSCTL_BASE + TIVA_AON_SYSCTL_RESETCTL_OFFSET)
#define TIVA_AON_SYSCTL_SLEEPCTL (TIVA_AON_SYSCTL_BASE + TIVA_AON_SYSCTL_SLEEPCTL_OFFSET)
-/* AON SYSCTL Register Bitfield Definitions *************************************************************************/
+/* AON SYSCTL Register Bitfield Definitions *********************************/
/* AON_SYSCTL_PWRCTL */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_wuc.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_wuc.h
index 904ff3b..efdfb64 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_wuc.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_wuc.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_wuc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_WUC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_WUC_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AON SYSCTL Register Offsets **************************************************************************************/
+/* AON SYSCTL Register Offsets **********************************************/
#define TIVA_AON_WUC_MCUCLK_OFFSET 0x0000 /* MCU Clock Management */
#define TIVA_AON_WUC_AUXCLK_OFFSET 0x0004 /* AUX Clock Management */
@@ -69,7 +70,7 @@
#define TIVA_AON_WUC_JTAGCFG_OFFSET 0x0040 /* JTAG Configuration */
#define TIVA_AON_WUC_JTAGUSERCODE_OFFSET 0x0044 /* JTAG USERCODE */
-/* AON SYSCTL Register Addresses ************************************************************************************/
+/* AON SYSCTL Register Addresses ********************************************/
#define TIVA_AON_WUC_MCUCLK (TIVA_AON_WUC_BASE + TIVA_AON_WUC_MCUCLK_OFFSET)
#define TIVA_AON_WUC_AUXCLK (TIVA_AON_WUC_BASE + TIVA_AON_WUC_AUXCLK_OFFSET)
@@ -86,7 +87,7 @@
#define TIVA_AON_WUC_JTAGCFG (TIVA_AON_WUC_BASE + TIVA_AON_WUC_JTAGCFG_OFFSET)
#define TIVA_AON_WUC_JTAGUSERCODE (TIVA_AON_WUC_BASE + TIVA_AON_WUC_JTAGUSERCODE_OFFSET)
-/* AON SYSCTL Register Bitfield Definitions *************************************************************************/
+/* AON SYSCTL Register Bitfield Definitions *********************************/
/* AON_WUC_MCUCLK */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h
index 4dc4cf6..cbedf16 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AUX_WUC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AUX_WUC_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AUX WUC Register Offsets *****************************************************************************************/
+/* AUX WUC Register Offsets *************************************************/
#define TIVA_AUX_WUC_MODCLKEN0_OFFSET 0x0000 /* Module Clock Enable */
#define TIVA_AUX_WUC_PWROFFREQ_OFFSET 0x0004 /* Power Off Request */
@@ -74,7 +75,7 @@
#define TIVA_AUX_WUC_AUXIOLATCH_OFFSET 0x0054 /* AUX Input Output Latch */
#define TIVA_AUX_WUC_MODCLKEN1_OFFSET 0x005c /* Module Clock Enable 1 */
-/* AUX WUC Register Addresses ***************************************************************************************/
+/* AUX WUC Register Addresses ***********************************************/
#define TIVA_AUX_WUC_MODCLKEN0 (TIVA_AUX_WUC_BASE + TIVA_AUX_WUC_MODCLKEN0_OFFSET)
#define TIVA_AUX_WUC_PWROFFREQ (TIVA_AUX_WUC_BASE + TIVA_AUX_WUC_PWROFFREQ_OFFSET)
@@ -96,7 +97,7 @@
#define TIVA_AUX_WUC_AUXIOLATCH (TIVA_AUX_WUC_BASE + TIVA_AUX_WUC_AUXIOLATCH_OFFSET)
#define TIVA_AUX_WUC_MODCLKEN1 (TIVA_AUX_WUC_BASE + TIVA_AUX_WUC_MODCLKEN1_OFFSET)
-/* AUX WUC Register Bitfield Definitions ****************************************************************************/
+/* AUX WUC Register Bitfield Definitions ************************************/
/* AUX_WUC_MODCLKEN0 */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ccfg.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ccfg.h
index 0f6f08e..79f4e16 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ccfg.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ccfg.h
@@ -1,4 +1,4 @@
-/************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_ccfg.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@@ -37,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_CCFG_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_CCFG_H
-/************************************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************************************/
+ ****************************************************************************/
-/* CCFG Register Offsets ************************************************************************************/
+/* CCFG Register Offsets ****************************************************/
#define TIVA_CCFG_EXT_LF_CLK_OFFSET 0x0fa8 /* Extern LF clock configuration */
#define TIVA_CCFG_MODE_CONF_1_OFFSET 0x0fac /* Mode Configuration 1 */
@@ -78,7 +78,7 @@
#define TIVA_CCFG_CCFG_PROT_95_64_OFFSET 0x0ff8 /* Protect Sectors 64-95 */
#define TIVA_CCFG_CCFG_PROT_127_96_OFFSET 0x0ffc /* Protect Sectors 96-127 */
-/* CCFG Register Addresses **********************************************************************************/
+/* CCFG Register Addresses **************************************************/
#define TIVA_CCFG_EXT_LF_CLK (TIVA_CCFG_BASE + TIVA_CCFG_EXT_LF_CLK_OFFSET)
#define TIVA_CCFG_MODE_CONF_1 (TIVA_CCFG_BASE + TIVA_CCFG_MODE_CONF_1_OFFSET)
@@ -103,7 +103,7 @@
#define TIVA_CCFG_CCFG_PROT_95_64 (TIVA_CCFG_BASE + TIVA_CCFG_CCFG_PROT_95_64_OFFSET)
#define TIVA_CCFG_CCFG_PROT_127_96 (TIVA_CCFG_BASE + TIVA_CCFG_CCFG_PROT_127_96_OFFSET)
-/* CCFG Bifield Definitions *********************************************************************************/
+/* CCFG Bifield Definitions *************************************************/
/* TIVA_CCFG_EXT_LF_CLK */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ddi0_osc.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ddi0_osc.h
index b954dbc..ea25a12 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ddi0_osc.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ddi0_osc.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_ddi0_osc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,24 +37,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_DDI0_OSC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_DDI0_OSC_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
#include "hardware/tiva_ddi.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* DDI0 OSC Register Offsets ****************************************************************************************/
+/* DDI0 OSC Register Offsets ************************************************/
#define TIVA_DDI0_OSC_CTL0_OFFSET 0x0000 /* Control 0 */
#define TIVA_DDI0_OSC_CTL1_OFFSET 0x0004 /* Control 1 */
@@ -72,7 +73,8 @@
#define TIVA_DDI0_OSC_STAT1_OFFSET 0x0038 /* Status 1 */
#define TIVA_DDI0_OSC_STAT2_OFFSET 0x003c /* Status 2 */
-/* DDI0 OSC Register Addresses **************************************************************************************/
+/* DDI0 OSC Register Addresses **********************************************/
+
/* Direct access */
#define TIVA_DDI0_OSC_CTL0 (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI0_OSC_CTL0_OFFSET)
@@ -92,7 +94,9 @@
#define TIVA_DDI0_OSC_STAT1 (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI0_OSC_STAT1_OFFSET)
#define TIVA_DDI0_OSC_STAT2 (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI0_OSC_STAT2_OFFSET)
-/* Offsets may also be used in conjunction with access as described in cc13x0_ddi.h */
+/* Offsets may also be used in conjunction with access as described in
+ * cc13x0_ddi.h
+ */
#define TIVA_DDI0_OSC_DIR (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_DIR_OFFSET)
#define TIVA_DDI0_OSC_SET (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_SET_OFFSET)
@@ -101,17 +105,20 @@
#define TIVA_DDI0_OSC_MASK8B (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_MASK8B_OFFSET)
#define TIVA_DDI0_OSC_MASK16B (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_MASK16B_OFFSET)
-/* DDI0 OSC Bitfield Definitions ************************************************************************************/
+/* DDI0 OSC Bitfield Definitions ********************************************/
/* DDI0_OSC_CTL0 */
#define DDI0_OSC_CTL0_SCLK_HF_SRC_SEL (1 << 0) /* Bit 0: Source select for sclk_hf */
# define DDI0_OSC_CTL0_SCLK_HF_SRC_RCOSC (0) /* High frequency RCOSC clock */
+
# define DDI0_OSC_CTL0_SCLK_HF_SRC_XOSC DDI0_OSC_CTL0_SCLK_HF_SRC_SEL /* High frequency XOSC clock */
+
#define DDI0_OSC_CTL0_SCLK_MF_SRC_SEL (1 << 1) /* Bit 1 */
# define DDI0_OSC_CTL0_SCLK_MF_SRC_SEL_RCOSCHFDMF 0
# define DDI0_OSC_CTL0_SCLK_MF_SRC_SEL_XCOSCHFDMF DDI0_OSC_CTL0_SCLK_MF_SRC_SEL /* Medium frequency clock derived
* from high frequency XOSC */
+
#define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT (2) /* Bits 2-3: Source select for sclk_lf */
#define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_MASK (3 << DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT)
# define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_XOSCHFDLF (1 << DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT) /* Low frequency clock derived
@@ -120,26 +127,31 @@
* from High Frequency RCOSC */
# define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_RCOSCLF (2 << DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT) /* Low frequency RCOSC */
# define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_XOSCLF (3 << DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT) /* Low frequency XOSC */
+
#define DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT (5) /* Bits 5-6: Source select for aclk_ref */
#define DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_MASK (3 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT)
# define DDI0_OSC_CTL0_ACLK_REF_SRC_RCOSCHF (0 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT) /* RCOSC_HF derived (31.25kHz) */
# define DDI0_OSC_CTL0_ACLK_REF_SRC_XOSCHF (1 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT) /* XOSC_HF derived (31.25kHz) */
# define DDI0_OSC_CTL0_ACLK_REF_SRC_RCOSCLF (2 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT) /* RCOSC_LF (32kHz) */
# define DDI0_OSC_CTL0_ACLK_REF_SRC_XOSCLF (3 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT) /* XOSC_LF (32.768kHz) */
+
#define DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT (7) /* Bits 7-8: ource select for aclk_tdc */
#define DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_MASK (3 << DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT)
# define DDI0_OSC_CTL0_ACLK_TDC_SRC_RCOSCHF48 (0 << DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT) /* RCOSC_HF (48MHz) */
# define DDI0_OSC_CTL0_ACLK_TDC_SRC_RCOSCHF24 (1 << DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT) /* RCOSC_HF (24MHz) */
# define DDI0_OSC_CTL0_ACLK_TDC_SRC_XOSCHF24 (2 << DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT) /* XOSC_HF (24MHz) */
+
#define DDI0_OSC_CTL0_CLK_LOSS_EN (1 << 9) /* Bit 9: Enable SCLK_HF, SCLK_MF and SCLK_LF clock
* loss detection and indicators to the system
* controller */
#define DDI0_OSC_CTL0_XOSC_LF_DIG_BYPASS (1 << 10) /* Bit 10: Bypass XOSC_LF and use the digital
* input clock from AON for the xosc_lf */
+
# define DDI0_OSC_CTL0_XOSC_LF_DIG_32KHZ (0) /* Use 32kHz XOSC as xosc_lf
* clock source */
# define DDI0_OSC_CTL0_XOSC_LF_DIG_DIGINPUT DDI0_OSC_CTL0_XOSC_LF_DIG_BYPASS /* Use digital input (from AON)
* as xosc_lf clock source */
+
#define DDI0_OSC_CTL0_XOSC_HF_POWER_MODE (1 << 11) /* Bit 11 */
#define DDI0_OSC_CTL0_RCOSC_LF_TRIMMED (1 << 12) /* Bit 12 */
#define DDI0_OSC_CTL0_HPOSC_MODE_EN (1 << 14) /* Bit 14 */
@@ -326,8 +338,11 @@
#define DDI0_OSC_STAT0_RCOSC_LF_EN (1 << 21) /* Bit 21: RCOSC_LF enable */
#define DDI0_OSC_STAT0_RCOSC_HF_EN (1 << 22) /* Bit 22: RSOSC_HF enable */
#define DDI0_OSC_STAT0_SCLK_HF_SRC (1 << 28) /* Bit 28: Indicates source for sclk_hf */
+
# define DDI0_OSC_STAT0_SCLK_HF_SRC_RCOSC (0) /* High frequency RCOSC clock */
+
# define DDI0_OSC_STAT0_SCLK_HF_SRC_XOSC DDI0_OSC_STAT0_SCLK_HF_SRC /* High frequency XOSC */
+
#define DDI0_OSC_STAT0_SCLK_LF_SRC_SHIFT (29) /* Bits 29-30: Indicates source for the sclk_lf */
#define DDI0_OSC_STAT0_SCLK_LF_SRC_MASK (3 << DDI0_OSC_STAT0_SCLK_LF_SRC_SHIFT)
# define DDI0_OSC_STAT0_SCLK_LF_SRC(n) ((uint32_t)(n) << DDI0_OSC_STAT0_SCLK_LF_SRC_SHIFT)
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h
index d034769..fa51b85 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_FCFG1_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_FCFG1_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* FCFG1 Register Offsets *******************************************************************************************/
+/* FCFG1 Register Offsets ***************************************************/
#define TIVA_FCFG1_MISC_CONF_1_OFFSET 0x00a0 /* Misc configurations */
#define TIVA_FCFG1_MISC_CONF_2_OFFSET 0x00a4
@@ -137,7 +138,7 @@
#define TIVA_FCFG1_PWD_CURR_110C_OFFSET 0x03b4 /* Power Down Current Control 110C */
#define TIVA_FCFG1_PWD_CURR_125C_OFFSET 0x03b8 /* Power Down Current Control 125C */
-/* FCFG1 Register Register Addresses ********************************************************************************/
+/* FCFG1 Register Register Addresses ****************************************/
#define TIVA_FCFG1_MISC_CONF_1 (TIVA_FCFG1_BASE + TIVA_FCFG1_MISC_CONF_1_OFFSET)
#define TIVA_FCFG1_MISC_CONF_2 (TIVA_FCFG1_BASE + TIVA_FCFG1_MISC_CONF_2_OFFSET)
@@ -222,7 +223,7 @@
#define TIVA_FCFG1_PWD_CURR_110C (TIVA_FCFG1_BASE + TIVA_FCFG1_PWD_CURR_110C_OFFSET)
#define TIVA_FCFG1_PWD_CURR_125C (TIVA_FCFG1_BASE + TIVA_FCFG1_PWD_CURR_125C_OFFSET)
-/* FCFG1 Bitfield Definitions ***************************************************************************************/
+/* FCFG1 Bitfield Definitions ***********************************************/
/* TIVA_FCFG1_MISC_CONF_1 */
@@ -512,10 +513,21 @@
#define FCFG1_CONFIG_MISC_ADC_DIV30_MIN_ALLOWED_RTRIM_MASK (15 << FCFG1_CONFIG_MISC_ADC_DIV30_MIN_ALLOWED_RTRIM_SHIFT)
# define FCFG1_CONFIG_MISC_ADC_DIV30_MIN_ALLOWED_RTRIM(n) ((uint32_t)(n) << FCFG1_CONFIG_MISC_ADC_DIV30_MIN_ALLOWED_RTRIM_SHIFT)
-/* TIVA_FCFG1_SHDW_DIE_ID_0 (32-bit value, Shadow of the DIE_ID_0 register in eFuse row number 3) */
-/* TIVA_FCFG1_SHDW_DIE_ID_1 (32-bit value, Shadow of the DIE_ID_1 register in eFuse row number 4) */
-/* TIVA_FCFG1_SHDW_DIE_ID_2 (32-bit value, Shadow of the DIE_ID_2 register in eFuse row number 5) */
-/* TIVA_FCFG1_SHDW_DIE_ID_3 (32-bit value, Shadow of the DIE_ID_3 register in eFuse row number 6) */
+/* TIVA_FCFG1_SHDW_DIE_ID_0 (32-bit value,
+ * Shadow of the DIE_ID_0 register in eFuse row number 3)
+ */
+
+/* TIVA_FCFG1_SHDW_DIE_ID_1 (32-bit value,
+ * Shadow of the DIE_ID_1 register in eFuse row number 4)
+ */
+
+/* TIVA_FCFG1_SHDW_DIE_ID_2 (32-bit value,
+ * Shadow of the DIE_ID_2 register in eFuse row number 5)
+ */
+
+/* TIVA_FCFG1_SHDW_DIE_ID_3 (32-bit value,
+ * Shadow of the DIE_ID_3 register in eFuse row number 6)
+ */
/* TIVA_FCFG1_SHDW_OSC_BIAS_LDO_TRIM */
@@ -716,6 +728,7 @@
# define FCFG1_USER_ID_PROTOCOL_RF4CE (2 << FCFG1_USER_ID_PROTOCOL_SHIFT) /* RF4CE */
# define FCFG1_USER_ID_PROTOCOL_802154 (4 << FCFG1_USER_ID_PROTOCOL_SHIFT) /* Zigbee/6lowpan */
# define FCFG1_USER_ID_PROTOCOL_PROP (8 << FCFG1_USER_ID_PROTOCOL_SHIFT) /* Proprietary */
+
#define FCFG1_USER_ID_PKG_SHIFT (16) /* Bits 16-18: Package type */
#define FCFG1_USER_ID_PKG_MASK (7 << FCFG1_USER_ID_PKG_SHIFT)
# define FCFG1_USER_ID_PKG_RHG (0 << FCFG1_USER_ID_PKG_SHIFT) /* 4x4mm QFN (RHB) package */
@@ -723,6 +736,7 @@
# define FCFG1_USER_ID_PKG_RGZ (2 << FCFG1_USER_ID_PKG_SHIFT) /* 7x7mm QFN (RGZ) package */
# define FCFG1_USER_ID_PKG_WSP (3 << FCFG1_USER_ID_PKG_SHIFT) /* Wafer sale package (naked die) */
# define FCFG1_USER_ID_PKG_QFNWF (5 << FCFG1_USER_ID_PKG_SHIFT) /* 7x7mm QFN package with Wettable Flanks */
+
#define FCFG1_USER_ID_SEQUENCE_SHIFT (19) /* Bits 19-22: Sequence */
#define FCFG1_USER_ID_SEQUENCE_MASK (15 << FCFG1_USER_ID_SEQUENCE_SHIFT)
# define FCFG1_USER_ID_SEQUENCE(n) ((uint32_t)(n) << FCFG1_USER_ID_SEQUENCE_SHIFT)
@@ -812,10 +826,21 @@
#define FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_MASK (15 << FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_SHIFT)
# define FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD(n) ((uint32_t)(n) << FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_SHIFT)
-/* TIVA_FCFG1_MAC_BLE_0 (32-bit value, The first 32-bits of the 64-bit MAC BLE address) */
-/* TIVA_FCFG1_MAC_BLE_1 (32-bit value, The last 32-bits of the 64-bit MAC BLE address) */
-/* TIVA_FCFG1_MAC_15_4_0 (32-bit value, The first 32-bits of the 64-bit MAC 15.4 address) */
-/* TIVA_FCFG1_MAC_15_4_1 (32-bit value, The last 32-bits of the 64-bit MAC 15.4 address) */
+/* TIVA_FCFG1_MAC_BLE_0
+ * (32-bit value, The first 32-bits of the 64-bit MAC BLE address)
+ */
+
+/* TIVA_FCFG1_MAC_BLE_1
+ * (32-bit value, The last 32-bits of the 64-bit MAC BLE address)
+ */
+
+/* TIVA_FCFG1_MAC_15_4_0
+ * (32-bit value, The first 32-bits of the 64-bit MAC 15.4 address)
+ */
+
+/* TIVA_FCFG1_MAC_15_4_1
+ * (32-bit value, The last 32-bits of the 64-bit MAC 15.4 address)
+ */
/* TIVA_FCFG1_FLASH_OTP_DATA4 */
@@ -858,8 +883,8 @@
/* TIVA_FCFG1_MISC_TRIM */
-#define FCFG1_MISC_TRIM_TEMPVSLOPE_SHIFT (0) /* Bits 0-7: TEMP slope with battery voltage, in
-degrees C */
+#define FCFG1_MISC_TRIM_TEMPVSLOPE_SHIFT (0) /* Bits 0-7: TEMP slope with battery voltage,
+ * degrees in C */
#define FCFG1_MISC_TRIM_TEMPVSLOPE_MASK (0xff << FCFG1_MISC_TRIM_TEMPVSLOPE_SHIFT)
# define FCFG1_MISC_TRIM_TEMPVSLOPE(n) ((uint32_t)(n) << FCFG1_MISC_TRIM_TEMPVSLOPE_SHIFT)
@@ -899,7 +924,9 @@ degrees C */
#define FCFG1_ICEPICK_DEVICE_ID_PG_REV_MASK (15 << FCFG1_ICEPICK_DEVICE_ID_PG_REV_SHIFT)
# define FCFG1_ICEPICK_DEVICE_ID_PG_REV(n) ((uint32_t)(n) << FCFG1_ICEPICK_DEVICE_ID_PG_REV_SHIFT)
-/* TIVA_FCFG1_FCFG1_REVISION (32-bit value, The revision number of the FCFG1 layout) */
+/* TIVA_FCFG1_FCFG1_REVISION
+ * (32-bit value, The revision number of the FCFG1 layout)
+ */
/* TIVA_FCFG1_MISC_OTP_DATA */
@@ -1100,7 +1127,7 @@ degrees C */
#define FCFG1_CONFIG_MISC_ADC_RSSITRIMCOMPLETE_N (1 << 17) /* Bit 17 */
#define FCFG1_CONFIG_MISC_ADC_MIN_ALLOWED_RTRIM_SHIFT (18) /* Bits 18-21 */
#define FCFG1_CONFIG_MISC_ADC_MIN_ALLOWED_RTRIM_MASK (15 << FCFG1_CONFIG_MISC_ADC_MIN_ALLOWED_RTRIM_SHIFT)
-# define FCFG1_CONFIG_MISC_ADC_MIN_ALLOWED_RTRIM(n) ((uint32_t)(n) << FCFG1_CONFIG_MISC_ADC_MIN_ALLOWED_RTRIM_SHIFT)
+# define FCFG1_CONFIG_MISC_ADC_MIN_ALLOWED_RTRIM(n) ((uint32_t)(n) << FCFG1_CONFIG_MISC_ADC_MIN_ALLOWED_RTRIM_SHIFT)
/* TIVA_FCFG1_VOLT_TRIM */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_flash.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_flash.h
index 79d7e8e..5280b41 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_flash.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_flash.h
@@ -1,10 +1,11 @@
-/****************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_flash.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ****************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_FLASH_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_FLASH_H
-/****************************************************************************************************
+/****************************************************************************
* Included Files
- ****************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/****************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ****************************************************************************************************/
+ ****************************************************************************/
-/* FLASH Register Offsets ***************************************************************************/
+/* FLASH Register Offsets ***************************************************/
#define TIVA_FLASH_STAT_OFFSET 0x001c /* FMC and Efuse Status */
#define TIVA_FLASH_CFG_OFFSET 0x0024
@@ -178,7 +179,7 @@
#define TIVA_FLASH_FCFG_B7_START_OFFSET 0x242c
#define TIVA_FLASH_FCFG_B0_SSIZE0_OFFSET 0x2430
-/* FLASH Register Addresses *************************************************************************/
+/* FLASH Register Addresses *************************************************/
#define TIVA_FLASH_STAT (TIVA_FLASH_BASE + TIVA_FLASH_STAT_OFFSET)
#define TIVA_FLASH_CFG (TIVA_FLASH_BASE + TIVA_FLASH_CFG_OFFSET)
@@ -304,7 +305,7 @@
#define TIVA_FLASH_FCFG_B7_START (TIVA_FLASH_BASE + TIVA_FLASH_FCFG_B7_START_OFFSET)
#define TIVA_FLASH_FCFG_B0_SSIZE0 (TIVA_FLASH_BASE + TIVA_FLASH_FCFG_B0_SSIZE0_OFFSET)
-/* FLASH Bitfield Definitions ***********************************************************************/
+/* FLASH Bitfield Definitions ***********************************************/
/* TIVA_FLASH_STAT */
@@ -494,6 +495,7 @@
#define FLASH_TWOBIT_FROMN_MASK (0x7fffffff << FLASH_TWOBIT_FROMN_SHIFT)
/* TIVA_FLASH_SELFTESTCYC (32-bit value) */
+
/* TIVA_FLASH_SELFTESTSIGN (32-bit value) */
/* TIVA_FLASH_FRDCTL */
@@ -726,12 +728,19 @@
#define FLASH_FTCTL_WDATA_BLK_CLR (1 << 16) /* Bit 16 */
/* TIVA_FLASH_FWPWRITE0 (32-bit value) */
+
/* TIVA_FLASH_FWPWRITE1 (32-bit value) */
+
/* TIVA_FLASH_FWPWRITE2 (32-bit value) */
+
/* TIVA_FLASH_FWPWRITE3 (32-bit value) */
+
/* TIVA_FLASH_FWPWRITE4 (32-bit value) */
+
/* TIVA_FLASH_FWPWRITE5 (32-bit value) */
+
/* TIVA_FLASH_FWPWRITE6 (32-bit value) */
+
/* TIVA_FLASH_FWPWRITE7 (32-bit value) */
/* TIVA_FLASH_FWPWRITE_ECC */
@@ -991,10 +1000,15 @@
#define FLASH_FSM_EXECUTE_SUSPEND_NOW_MASK (15 << FLASH_FSM_EXECUTE_SUSPEND_NOW_SHIFT)
/* TIVA_FLASH_FSM_SECTOR1 (32-bit value) */
+
/* TIVA_FLASH_FSM_SECTOR2 (32-bit value) */
+
/* TIVA_FLASH_FSM_BSLE0 (32-bit value) */
+
/* TIVA_FLASH_FSM_BSLE1 (32-bit value) */
+
/* TIVA_FLASH_FSM_BSLP0 (32-bit value) */
+
/* TIVA_FLASH_FSM_BSLP1 (32-bit value) */
/* TIVA_FLASH_FCFG_BANK */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h
index f3b4eae..e72ba75 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_GPIO_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_GPIO_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* GPIO Register Offsets ************************************************************/
+/* GPIO Register Offsets ****************************************************/
#define TIVA_GPIO_DOUT_PIN_OFFSET(n) ((n) & ~3)
# define TIVA_GPIO_DOUT_PIN3_0_OFFSET 0x0000 /* Data Out 0 to 3 */
@@ -71,7 +72,7 @@
#define TIVA_GPIO_DOE_OFFSET 0x00d0 /* Data Output Enable for DIO 0 to 31 */
#define TIVA_GPIO_EVFLAGS_OFFSET 0x00e0 /* Event Register for DIO 0 to 31 */
-/* GPIO Register Addresses **********************************************************/
+/* GPIO Register Addresses **************************************************/
#define TIVA_GPIO_DOUT_PIN_BASE(n) (TIVA_GPIO_BASE + TIVA_GPIO_DOUT_PIN_OFFSET(n))
# define TIVA_GPIO_DOUT_PIN3_0 (TIVA_GPIO_BASE + TIVA_GPIO_DOUT_PIN3_0_OFFSET)
@@ -90,7 +91,7 @@
#define TIVA_GPIO_DOE (TIVA_GPIO_BASE + TIVA_GPIO_DOE_OFFSET)
#define TIVA_GPIO_EVFLAGS (TIVA_GPIO_BASE + TIVA_GPIO_EVFLAGS_OFFSET)
-/* GPIO Register Bitfield Definitions ***********************************************/
+/* GPIO Register Bitfield Definitions ***************************************/
/* Data Out n to n + 3 */
@@ -125,16 +126,16 @@
#define GPIO_EVFLAGS(n) (1 << (n))
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_GPIO_H */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h
index 4f08610..9bae6c5 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h
@@ -1,10 +1,11 @@
-/********************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,16 +37,16 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_I2C_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_I2C_H
-/********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************/
+ ****************************************************************************/
-/* I2C register offsets *********************************************************************/
+/* I2C register offsets *****************************************************/
#define TIVA_I2C_SOAR_OFFSET 0x0000 /* Slave Own Address */
#define TIVA_I2C_SSTAT_OFFSET 0x0004 /* Slave Status */
@@ -67,7 +68,7 @@
#define TIVA_I2C_MICR_OFFSET 0x081c /* Master Interrupt Clear */
#define TIVA_I2C_MCR_OFFSET 0x0820 /* Master Configuration */
-/* I2C register addresses *******************************************************************/
+/* I2C register addresses ***************************************************/
#define TIVA_I2C0_SOAR (TIVA_I2C0_BASE + TIVA_I2C_SOAR_OFFSET)
#define TIVA_I2C0_SSTAT (TIVA_I2C0_BASE + TIVA_I2C_SSTAT_OFFSET)
@@ -89,7 +90,7 @@
#define TIVA_I2C0_MICR (TIVA_I2C0_BASE + TIVA_I2C_MICR_OFFSET)
#define TIVA_I2C0_MCR (TIVA_I2C0_BASE + TIVA_I2C_MCR_OFFSET)
-/* I2C bitfield definitions *****************************************************************/
+/* I2C bitfield definitions *************************************************/
/* Slave Own Address */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ioc.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ioc.h
index 58daf03..a410d81 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ioc.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_ioc.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_ioc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,25 +37,25 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2CC13X20_CC26X2IOC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2CC13X20_CC26X2IOC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/chip/chip.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
#define TIVA_NDIO 32 /* DIO0-31 */
-/* IOC register offsets ************************************************************/
+/* IOC register offsets *****************************************************/
#define TIVA_IOC_IOCFG_OFFSET(n) ((n) << 2)
# define TIVA_IOC_IOCFG0_OFFSET 0x0000 /* Configuration of DIO0 */
@@ -90,7 +91,7 @@
# define TIVA_IOC_IOCFG30_OFFSET 0x0078 /* Configuration of DIO30 */
# define TIVA_IOC_IOCFG31_OFFSET 0x007c /* Configuration of DIO31 */
-/* IOC register addresses **********************************************************/
+/* IOC register addresses ***************************************************/
#define TIVA_IOC_IOCFG(n) (TIVA_IOC_BASE + TIVA_IOC_IOCFG_OFFSET(n))
# define TIVA_IOC_IOCFG0 (TIVA_IOC_BASE + TIVA_IOC_IOCFG0_OFFSET)
@@ -126,36 +127,41 @@
# define TIVA_IOC_IOCFG30 (TIVA_IOC_BASE + TIVA_IOC_IOCFG30_OFFSET)
# define TIVA_IOC_IOCFG31 (TIVA_IOC_BASE + TIVA_IOC_IOCFG31_OFFSET)
-/* IOC register bit settings *******************************************************/
+/* IOC register bit settings ************************************************/
/* Common bitfield for all DIO configuration registers */
#define IOC_IOCFG_PORTID_SHIFT (0) /* Bits 0-5: Selects DIO usage */
#define IOC_IOCFG_PORTID_MASK (0x3f << IOC_IOCFG_PORTID_SHIFT)
# define IOC_IOCFG_PORTID(n) ((uint32_t)(n) << IOC_IOCFG_PORTID_SHIFT) /* See PORT ID definitions */
+
#define IOC_IOCFG_IOSTR_SHIFT (8) /* Bits 8-9: I/O drive strength */
#define IOC_IOCFG_IOSTR_MASK (3 << IOC_IOCFG_IOSTR_SHIFT)
# define IOC_IOCFG_IOSTR_AUTO (0 << IOC_IOCFG_IOSTR_SHIFT) /* Automatic drive strength */
# define IOC_IOCFG_IOSTR_MIN (1 << IOC_IOCFG_IOSTR_SHIFT) /* Minimum drive strength */
# define IOC_IOCFG_IOSTR_MED (2 << IOC_IOCFG_IOSTR_SHIFT) /* Medium drive strength */
# define IOC_IOCFG_IOSTR_MAX (3 << IOC_IOCFG_IOSTR_SHIFT) /* Maximum drive strength */
+
#define IOC_IOCFG_IOCURR_SHIFT (10) /* Bits 10-11: I/O current mode */
#define IOC_IOCFG_IOCURR_MASK (3 << IOC_IOCFG_IOCURR_SHIFT)
# define IOC_IOCFG_IOCURR_2MA (0 << IOC_IOCFG_IOCURR_SHIFT) /* Extended-Current (EC) mode */
# define IOC_IOCFG_IOCURR_4MA (1 << IOC_IOCFG_IOCURR_SHIFT) /* High-Current (HC) mode */
# define IOC_IOCFG_IOCURR_8MA (2 << IOC_IOCFG_IOCURR_SHIFT) /* Low-Current (LC) mode */
+
#define IOC_IOCFG_SLEW_RED (1 << 12) /* Bit 12: Reduces output slew rate */
#define IOC_IOCFG_PULLCTL_SHIFT (13) /* Bits 13-14: Pull Control */
#define IOC_IOCFG_PULLCTL_MASK (3 << IOC_IOCFG_PULLCTL_SHIFT)
# define IOC_IOCFG_PULLCTL_DIS (3 << IOC_IOCFG_PULLCTL_SHIFT) /* No pull */
# define IOC_IOCFG_PULLCTL_DWN (1 << IOC_IOCFG_PULLCTL_SHIFT) /* Pull down */
# define IOC_IOCFG_PULLCTL_UP (2 << IOC_IOCFG_PULLCTL_SHIFT) /* Pull up */
+
#define IOC_IOCFG_EDGEDET_SHIFT (16) /* Bits 16-17: Enable edge events generation */
#define IOC_IOCFG_EDGEDET_MASK (3 << IOC_IOCFG_EDGEDET_SHIFT)
# define IOC_IOCFG_EDGEDET_NONE (0 << IOC_IOCFG_EDGEDET_SHIFT) /* No edge detection */
# define IOC_IOCFG_EDGEDET_NEG (1 << IOC_IOCFG_EDGEDET_SHIFT) /* Negative edge detection */
# define IOC_IOCFG_EDGEDET_POS (2 << IOC_IOCFG_EDGEDET_SHIFT) /* Positive edge detection */
# define IOC_IOCFG_EDGEDET_BOTH (3 << IOC_IOCFG_EDGEDET_SHIFT) /* Both edge detection */
+
#define IOC_IOCFG_EDGE_IRQEN (1 << 18) /* Bit 18: Enable interrupt generation */
#define IOC_IOCFG_IOMODE_SHIFT (24) /* Bits 24-26: I/O Mode */
#define IOC_IOCFG_IOMODE_MASK (7 << IOC_IOCFG_IOMODE_SHIFT)
@@ -165,12 +171,14 @@
# define IOC_IOCFG_IOMODE_OPENDRINV (5 << IOC_IOCFG_IOMODE_SHIFT) /* Open drain, inverted I/O */
# define IOC_IOCFG_IOMODE_OPENSRC (6 << IOC_IOCFG_IOMODE_SHIFT) /* Open source */
# define IOC_IOCFG_IOMODE_OPENSRCINV (7 << IOC_IOCFG_IOMODE_SHIFT) /* Open source, inverted I/O */
+
#define IOC_IOCFG_WUCFG_SHIFT (27) /* Bits 27-28: Wakeup Configuration */
#define IOC_IOCFG_WUCFG_MASK (3 << IOC_IOCFG_WUCFG_SHIFT)
# define IOC_IOCFG_WUCFG_NONE (0 << IOC_IOCFG_WUCFG_SHIFT) /* 0, 1: Wakeup disabled */
# define IOC_IOCFG_WUCFG_ENABLE (2 << IOC_IOCFG_WUCFG_SHIFT) /* 2, 3: Wakeup enabled */
# define IOC_IOCFG_WUCFG_WAKEUPL (2 << IOC_IOCFG_WUCFG_SHIFT) /* 2: Wakeup on transition low */
# define IOC_IOCFG_WUCFG_WEKUPH (3 << IOC_IOCFG_WUCFG_SHIFT) /* 3: Wakeup on transition high */
+
#define IOC_IOCFG_IE (1 << 29) /* Bit 29: Input enable */
#define IOC_IOCFG_HYSTEN (1 << 30) /* Bit 30: Input hysteresis enable */
@@ -219,16 +227,16 @@
#define IOC_IOCFG_PORTID_RFC_SMI_CLOUT 0x37
#define IOC_IOCFG_PORTID_RFC_SMI_CLIN 0x38
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2CC13X20_CC26X2IOC_H */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h
index 12f5a4a..cade8f7 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h
@@ -1,10 +1,11 @@
-/****************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ****************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_PRCM_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_PRCM_H
-/****************************************************************************************************
+/****************************************************************************
* Included Files
- ****************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/****************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ****************************************************************************************************/
+ ****************************************************************************/
-/* PRCM Register Offsets ****************************************************************************/
+/* PRCM Register Offsets ****************************************************/
#define TIVA_PRCM_INFRCLKDIVR_OFFSET 0x0000 /* Infrastructure Clock Division Factor For Run Mode */
#define TIVA_PRCM_INFRCLKDIVS_OFFSET 0x0004 /* Infrastructure Clock Division Factor For Sleep Mode */
@@ -114,7 +115,7 @@
#define TIVA_PRCM_PWRPROFSTAT_OFFSET 0x01e0 /* Power Profiler Register */
#define TIVA_PRCM_RAMRETEN_OFFSET 0x0224 /* Memory Retention Control */
-/* PRCM Register Addresses *************************************************************************/
+/* PRCM Register Addresses **************************************************/
#define TIVA_PRCM_INFRCLKDIVR (TIVA_PRCM_BASE + TIVA_PRCM_INFRCLKDIVR_OFFSET)
#define TIVA_PRCM_INFRCLKDIVS (TIVA_PRCM_BASE + TIVA_PRCM_INFRCLKDIVS_OFFSET)
@@ -176,7 +177,7 @@
#define TIVA_PRCM_PWRPROFSTAT (TIVA_PRCM_BASE + TIVA_PRCM_PWRPROFSTAT_OFFSET)
#define TIVA_PRCM_RAMRETEN (TIVA_PRCM_BASE + TIVA_PRCM_RAMRETEN_OFFSET)
-/* PRCM Register Bitfield Definitions **************************************************************/
+/* PRCM Register Bitfield Definitions ***************************************/
/* Infrastructure Clock Division Factor For Run Mode */
@@ -322,6 +323,7 @@
# define PRCM_I2SCLKCTL_WCLKPHASE_SINGLE (0 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) /* Single phase */
# define PRCM_I2SCLKCTL_WCLKPHASE_DUAL (1 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) /* Dual phase */
# define PRCM_I2SCLKCTL_WCLKPHASE_USER (2 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) /* User Defined */
+
#define PRCM_I2SCLKCTL_POSEDGE (1 << 3) /* Bit 3: Sample/clock on positive edge */
# define PRCM_I2SCLKCTL_NEGEDGE (0) /* Sample/clock on negative edge */
@@ -475,16 +477,16 @@
# define PRCM_RAMRETEN_VIMS_CRAM (2 << PRCM_RAMRETEN_VIMS_SHIFT)
#define PRCM_RAMRETEN_RFC (1 << 2) /* Bit 2: RFC SRAM retention enabled */
-/****************************************************************************************************
+/****************************************************************************
* Public Types
- ****************************************************************************************************/
+ ****************************************************************************/
-/****************************************************************************************************
+/****************************************************************************
* Public Data
- ****************************************************************************************************/
+ ****************************************************************************/
-/****************************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ****************************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_PRCM_H */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_timer.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_timer.h
index da427e5..7c255d5 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_timer.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_timer.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_timer.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,37 +37,37 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_TIMER_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_TIMER_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* TIMER Register Offsets ***********************************************************/
+/* TIMER Register Offsets ***************************************************/
-/* TIMER Register Addresses *********************************************************/
+/* TIMER Register Addresses *************************************************/
-/* TIMER Register Bitfield Definitions **********************************************/
+/* TIMER Register Bitfield Definitions **************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_TIMER_H */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_uart.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_uart.h
index 8eece39..9cc681b 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_uart.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_uart.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_uart.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_UART_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_UART_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/chip/chip.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* UART register offsets ************************************************************/
+/* UART register offsets ****************************************************/
#define TIVA_UART_DR_OFFSET 0x0000 /* UART Data */
#define TIVA_UART_RSR_OFFSET 0x0004 /* UART Receive Status */
@@ -82,7 +83,7 @@
#define TIVA_UART_PCELLID2_OFFSET 0x0ff8 /* UART PrimeCell Identification 2 */
#define TIVA_UART_PCELLID3_OFFSET 0x0ffc /* UART PrimeCell Identification 3 */
-/* UART register addresses **********************************************************/
+/* UART register addresses **************************************************/
#define TIVA_UART_BASE(n) (TIVA_UART0_BASE + (n)*0x01000)
@@ -118,7 +119,7 @@
# define TIVA_UART0_DMACTL (TIVA_UART0_BASE + TIVA_UART_DMACTL_OFFSET)
#endif
-/* UART register bit settings *******************************************************/
+/* UART register bit settings ***********************************************/
/* UART Data (DR) */
@@ -255,12 +256,12 @@
#define UART_DMACTL_TXDMAE (1 << 1) /* Bit 1: Transmit DMA Enable */
#define UART_DMACTL_DMAERR (1 << 2) /* Bit 2: DMA on Error */
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_UART_H */
diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_vims.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_vims.h
index 518809a..bcedd87 100644
--- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_vims.h
+++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_vims.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_vims.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,33 +37,33 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_VIMS_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_VIMS_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* VIMS Register Offsets ********************************************************************************************/
+/* VIMS Register Offsets ****************************************************/
#define TIVA_VIMS_STAT_OFFSET 0x0000 /* Status */
#define TIVA_VIMS_CTL_OFFSET 0x0004 /* Control */
-/* VIMS Register Addresses ******************************************************************************************/
+/* VIMS Register Addresses **************************************************/
#define TIVA_VIMS_STAT (TIVA_VIMS_BASE + TIVA_VIMS_STAT_OFFSET)
#define TIVA_VIMS_CTL (TIVA_VIMS_BASE + TIVA_VIMS_CTL_OFFSET)
-/* VIMS Bitfield Definitions ****************************************************************************************/
+/* VIMS Bitfield Definitions ************************************************/
/* VIMS_STAT */
@@ -71,6 +72,7 @@
# define VIMS_STAT_MODE_GPRAM (0 << VIMS_STAT_MODE_SHIFT) /* VIMS GPRAM mode */
# define VIMS_STAT_MODE_CACHE (1 << VIMS_STAT_MODE_SHIFT) /* VIMS Cache mode */
# define VIMS_STAT_MODE_OFF (3 << VIMS_STAT_MODE_SHIFT) /* VIMS Off mode */
+
#define VIMS_STAT_INV (1 << 2) /* Bit 2: Invalidation of caching memory in-progress */
#define VIMS_STAT_MODE_CHANGING (1 << 3) /* Bit 3: VIMS mode change status */
#define VIMS_STAT_SYSBUS_LB_DIS (1 << 4) /* Bit 4: Sysbus flash line buffer control */
@@ -83,6 +85,7 @@
# define VIMS_CTL_MODE_GPRAM (0 << VIMS_CTL_MODE_SHIFT) /* VIMS GPRAM mode */
# define VIMS_CTL_MODE_CACHE (1 << VIMS_CTL_MODE_SHIFT) /* VIMS Cache mode */
# define VIMS_CTL_MODE_OFF (3 << VIMS_CTL_MODE_SHIFT) /* VIMS Off mode */
+
#define VIMS_CTL_PREF_EN (1 << 2) /* Bit 2: Tag prefetch control */
#define VIMS_CTL_ARB_CFG (1 << 3) /* Bit 3: Icode/Dcode and sysbus arbitation scheme */
# define VIMS_CTL_ARB_STATIC (0)
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_adi2_refsys.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_adi2_refsys.h
index aa1bad9..2cceba7 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_adi2_refsys.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_adi2_refsys.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_adi2_refsys.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,24 +37,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_ADI2_REFSYS_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_ADI2_REFSYS_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
#include "hardware/tiva_ddi.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* ADI2 REFSYS Register Offsets *************************************************************************************/
+/* ADI2 REFSYS Register Offsets *********************************************/
#define TIVA_ADI2_REFSYS_REFSYSCTL0_OFFSET 0x0000
#define TIVA_ADI2_REFSYS_SOCLDOCTL0_OFFSET 0x0002
@@ -66,7 +67,7 @@
#define TIVA_ADI2_REFSYS_HPOSCCTL1_OFFSET 0x000b
#define TIVA_ADI2_REFSYS_HPOSCCTL2_OFFSET 0x000c
-/* ADI2 REFSYS Register Addresses ***********************************************************************************/
+/* ADI2 REFSYS Register Addresses *******************************************/
#define TIVA_ADI2_REFSYS_REFSYSCTL0 (TIVA_ADI2_BASE + TIVA_ADI2_REFSYS_REFSYSCTL0_OFFSET)
#define TIVA_ADI2_REFSYS_SOCLDOCTL0 (TIVA_ADI2_BASE + TIVA_ADI2_REFSYS_SOCLDOCTL0_OFFSET)
@@ -79,7 +80,9 @@
#define TIVA_ADI2_REFSYS_HPOSCCTL1 (TIVA_ADI2_BASE + TIVA_ADI2_REFSYS_HPOSCCTL1_OFFSET)
#define TIVA_ADI2_REFSYS_HPOSCCTL2 (TIVA_ADI2_BASE + TIVA_ADI2_REFSYS_HPOSCCTL2_OFFSET)
-/* Offsets may also be used in conjunction with access as described in cc13x2_cc26x2_ddi.h */
+/* Offsets may also be used in conjunction with access as described in
+ * cc13x2_cc26x2_ddi.h
+ */
#define TIVA_ADI2_REFSYS_DIR (TIVA_ADI2_BASE + TIVA_DDI_DIR_OFFSET)
#define TIVA_ADI2_REFSYS_SET (TIVA_ADI2_BASE + TIVA_DDI_SET_OFFSET)
@@ -88,7 +91,7 @@
#define TIVA_ADI2_REFSYS_MASK8B (TIVA_ADI2_BASE + TIVA_DDI_MASK8B_OFFSET)
#define TIVA_ADI2_REFSYS_MASK16B (TIVA_ADI2_BASE + TIVA_DDI_MASK16B_OFFSET)
-/* ADI2 REFSYS Bitfield Definitions *********************************************************************************/
+/* ADI2 REFSYS Bitfield Definitions *****************************************/
/* TIVA_ADI2_REFSYS_REFSYSCTL0 */
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h
index 256395a..6ca9ce4 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AON_BATMON_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AON_BATMON_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AON BATMON Register Offsets **************************************************************************************/
+/* AON BATMON Register Offsets **********************************************/
#define TIVA_AON_BATMON_CTL_OFFSET 0x0000
#define TIVA_AON_BATMON_MEASCFG_OFFSET 0x0004
@@ -74,7 +75,7 @@
#define TIVA_AON_BATMON_TEMPUL_OFFSET 0x0058 /* Temperature Upper Limit */
#define TIVA_AON_BATMON_TEMPLL_OFFSET 0x005c /* Temperature Lower Limit */
-/* AON BATMON Register Addresses ************************************************************************************/
+/* AON BATMON Register Addresses ********************************************/
#define TIVA_AON_BATMON_CTL (TIVA_AON_BATMON_BASE + TIVA_AON_BATMON_CTL_OFFSET)
#define TIVA_AON_BATMON_MEASCFG (TIVA_AON_BATMON_BASE + TIVA_AON_BATMON_MEASCFG_OFFSET)
@@ -96,7 +97,7 @@
#define TIVA_AON_BATMON_TEMPUL (TIVA_AON_BATMON_BASE + TIVA_AON_BATMON_TEMPUL_OFFSET)
#define TIVA_AON_BATMON_TEMPLL (TIVA_AON_BATMON_BASE + TIVA_AON_BATMON_TEMPLL_OFFSET)
-/* AON BATMON Register Bitfield Definitions *************************************************************************/
+/* AON BATMON Register Bitfield Definitions *********************************/
/* AON_BATMON_CTL */
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h
index c6fa6d8..35999b3 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_ioc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AON_IOC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AON_IOC_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AON IOC Register Offsets *****************************************************************************************/
+/* AON IOC Register Offsets *************************************************/
#define TIVA_AON_IOC_IOSTRMIN_OFFSET 0x0000
#define TIVA_AON_IOC_IOSTRMED_OFFSET 0x0004
@@ -61,7 +62,7 @@
#define TIVA_AON_IOC_CLK32KCTL_OFFSET 0x0010 /* SCLK_LF External Output Control */
#define TIVA_AON_IOC_TCKCTL_OFFSET 0x0014 /* TCK IO Pin Control */
-/* AON IOC Register Addresses ***************************************************************************************/
+/* AON IOC Register Addresses ***********************************************/
#define TIVA_AON_IOC_IOSTRMIN (TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMIN_OFFSET)
#define TIVA_AON_IOC_IOSTRMED (TIVA_AON_IOC_BASE + TIVA_AON_IOC_IOSTRMED_OFFSET)
@@ -70,7 +71,7 @@
#define TIVA_AON_IOC_CLK32KCTL (TIVA_AON_IOC_BASE + TIVA_AON_IOC_CLK32KCTL_OFFSET)
#define TIVA_AON_IOC_TCKCTL (TIVA_AON_IOC_BASE + TIVA_AON_IOC_TCKCTL_OFFSET)
-/* AON IOC Bitfield Definitions *************************************************************************************/
+/* AON IOC Bitfield Definitions *********************************************/
/* TIVA_AON_IOC_IOSTRMIN */
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_sysif.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_sysif.h
index 534db31..c8baa3c 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_sysif.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_sysif.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_sysif.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AUX_SYSIF_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AUX_SYSIF_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* AUX SYSIF Register Offsets ***************************************************************************************/
+/* AUX SYSIF Register Offsets ***********************************************/
#define TIVA_AUX_SYSIF_OPMODEREQ_OFFSET 0x0000 /* Operational Mode Request */
#define TIVA_AUX_SYSIF_OPMODEACK_OFFSET 0x0004 /* Operational Mode Acknowledgement */
@@ -96,7 +97,7 @@
#define TIVA_AUX_SYSIF_TIMER2BRIDGE_OFFSET 0x00b0 /* AUX_TIMER2 Bridge */
#define TIVA_AUX_SYSIF_SWPWRPROF_OFFSET 0x00b4 /* Software Power Profiler */
-/* AUX SYSIF Register Addresses *************************************************************************************/
+/* AUX SYSIF Register Addresses *********************************************/
#define TIVA_AUX_SYSIF_OPMODEREQ (TIVA_AUX_SYSIF_BASE + TIVA_AUX_SYSIF_OPMODEREQ_OFFSET)
#define TIVA_AUX_SYSIF_OPMODEACK (TIVA_AUX_SYSIF_BASE + TIVA_AUX_SYSIF_OPMODEACK_OFFSET)
@@ -140,7 +141,7 @@
#define TIVA_AUX_SYSIF_TIMER2BRIDGE (TIVA_AUX_SYSIF_BASE + TIVA_AUX_SYSIF_TIMER2BRIDGE_OFFSET)
#define TIVA_AUX_SYSIF_SWPWRPROF (TIVA_AUX_SYSIF_BASE + TIVA_AUX_SYSIF_SWPWRPROF_OFFSET)
-/* AUX SYSIF Register Bifield Definitions ***************************************************************************/
+/* AUX SYSIF Register Bifield Definitions ***********************************/
/* AUX_SYSIF_OPMODEREQ */
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h
index b4d78bf..bfd1374 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h
@@ -1,10 +1,11 @@
-/********************************************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a
+ * compatible BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,24 +37,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_DDI0_OSC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_DDI0_OSC_H
-/********************************************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
#include "hardware/tiva_ddi.h"
-/********************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************************************/
+ ****************************************************************************/
-/* DDI0 OSC Register Offsets ****************************************************************************************/
+/* DDI0 OSC Register Offsets ************************************************/
#define TIVA_DDI0_OSC_CTL0_OFFSET 0x0000 /* Control 0 */
#define TIVA_DDI0_OSC_CTL1_OFFSET 0x0004 /* Control 1 */
@@ -73,7 +74,8 @@
#define TIVA_DDI0_OSC_STAT1_OFFSET 0x0040 /* Status 1 */
#define TIVA_DDI0_OSC_STAT2_OFFSET 0x0044 /* Status 2 */
-/* DDI0 OSC Register Addresses **************************************************************************************/
+/* DDI0 OSC Register Addresses **********************************************/
+
/* Direct access */
#define TIVA_DDI0_OSC_CTL0 (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI0_OSC_CTL0_OFFSET)
@@ -94,7 +96,9 @@
#define TIVA_DDI0_OSC_STAT1 (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI0_OSC_STAT1_OFFSET)
#define TIVA_DDI0_OSC_STAT2 (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI0_OSC_STAT2_OFFSET)
-/* Offsets may also be used in conjunction with access as described in cc13x2_cc26x2_ddi.h */
+/* Offsets may also be used in conjunction with access as described in
+ * cc13x2_cc26x2_ddi.h
+ */
#define TIVA_DDI0_OSC_DIR (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_DIR_OFFSET)
#define TIVA_DDI0_OSC_SET (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_SET_OFFSET)
@@ -103,13 +107,15 @@
#define TIVA_DDI0_OSC_MASK8B (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_MASK8B_OFFSET)
#define TIVA_DDI0_OSC_MASK16B (TIVA_AUX_DDI0_OSC_BASE + TIVA_DDI_MASK16B_OFFSET)
-/* DDI0 OSC Bitfield Definitions ************************************************************************************/
+/* DDI0 OSC Bitfield Definitions ********************************************/
/* DDI0_OSC_CTL0 */
#define DDI0_OSC_CTL0_SCLK_HF_SRC_SEL (1 << 0) /* Bit 0: Source select for sclk_hf */
# define DDI0_OSC_CTL0_SCLK_HF_SRC_RCOSC (0) /* High frequency RCOSC clock */
+
# define DDI0_OSC_CTL0_SCLK_HF_SRC_XOSC DDI0_OSC_CTL0_SCLK_HF_SRC_SEL /* High frequency XOSC clock */
+
#define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT (2) /* Bits 2-3: Source select for sclk_lf */
#define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_MASK (3 << DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT)
# define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_XOSCHFDLF (1 << DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT) /* Low frequency clock derived
@@ -118,6 +124,7 @@
* from High Frequency RCOSC */
# define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_RCOSCLF (2 << DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT) /* Low frequency RCOSC */
# define DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_XOSCLF (3 << DDI0_OSC_CTL0_SCLK_LF_SRC_SEL_SHIFT) /* Low frequency XOSC */
+
#define DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT (4) /* Bits 4-6: Source select for aclk_ref */
#define DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_MASK (7 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT)
# define DDI0_OSC_CTL0_ACLK_REF_SRC_RCOSCHF (0 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT) /* RCOSC_HF derived (31.25kHz) */
@@ -125,20 +132,25 @@
# define DDI0_OSC_CTL0_ACLK_REF_SRC_RCOSCLF (2 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT) /* RCOSC_LF (32kHz) */
# define DDI0_OSC_CTL0_ACLK_REF_SRC_XOSCLF (3 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT) /* XOSC_LF (32.768kHz) */
# define DDI0_OSC_CTL0_ACLK_REF_SRC_RCOSCMF (4 << DDI0_OSC_CTL0_ACLK_REF_SRC_SEL_SHIFT) /* RCOSC_MF (2MHz) */
+
#define DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT (7) /* Bits 7-8: ource select for aclk_tdc */
#define DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_MASK (3 << DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT)
# define DDI0_OSC_CTL0_ACLK_TDC_SRC_RCOSCHF48 (0 << DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT) /* RCOSC_HF (48MHz) */
# define DDI0_OSC_CTL0_ACLK_TDC_SRC_RCOSCHF24 (1 << DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT) /* RCOSC_HF (24MHz) */
# define DDI0_OSC_CTL0_ACLK_TDC_SRC_XOSCHF24 (2 << DDI0_OSC_CTL0_ACLK_TDC_SRC_SEL_SHIFT) /* XOSC_HF (24MHz) */
+
#define DDI0_OSC_CTL0_CLK_LOSS_EN (1 << 9) /* Bit 9: Enable SCLK_HF, SCLK_MF and SCLK_LF clock
* loss detection and indicators to the system
* controller */
+
#define DDI0_OSC_CTL0_XOSC_LF_DIG_BYPASS (1 << 10) /* Bit 10: Bypass XOSC_LF and use the digital
* input clock from AON for the xosc_lf */
+
# define DDI0_OSC_CTL0_XOSC_LF_DIG_32KHZ (0) /* Use 32kHz XOSC as xosc_lf
* clock source */
# define DDI0_OSC_CTL0_XOSC_LF_DIG_DIGINPUT DDI0_OSC_CTL0_XOSC_LF_DIG_BYPASS /* Use digital input (from AON)
* as xosc_lf clock source */
+
#define DDI0_OSC_CTL0_XOSC_HF_POWER_MODE (1 << 11) /* Bit 11 */
#define DDI0_OSC_CTL0_RCOSC_LF_TRIMMED (1 << 12) /* Bit 12 */
#define DDI0_OSC_CTL0_HPOSC_MODE_EN (1 << 14) /* Bit 14 */
@@ -264,6 +276,7 @@
# define DDI0_OSC_ATESTCTL_ATEST_RCOSCMF_BIAS (3 << DDI0_OSC_ATESTCTL_ATEST_RCOSCMF_SHIFT) /* ATEST enabled, bias current connected,
* ATEST internal to RCOSC_MF enabled
* to send out 2MHz clock. */
+
#define DDI0_OSC_ATESTCTL_TEST_RCOSCMF_SHIFT (14) /* Bits 14-15: Test mode control for RCOSC_MF */
#define DDI0_OSC_ATESTCTL_TEST_RCOSCMF_MASK (3 << DDI0_OSC_ATESTCTL_TEST_RCOSCMF_SHIFT)
# define DDI0_OSC_ATESTCTL_TEST_RCOSCMF_DISABLE (0 << DDI0_OSC_ATESTCTL_TEST_RCOSCMF_SHIFT) /* Test modes disabled */
@@ -273,6 +286,7 @@
# define DDI0_OSC_ATESTCTL_TEST_RCOSCMF_BOOSTDIS (3 << DDI0_OSC_ATESTCTL_TEST_RCOSCMF_SHIFT) /* Boosted bias current into self
* biased inverter + clock qualification
* disabled */
+
#define DDI0_OSC_ATESTCTL_SCLK_LF_AUX_EN (1 << 31) /* Bit 31: Enable 32 kHz clock to AUX_COMPB */
/* DDI0_OSC_ADCDOUBLERNANOAMPCTL */
@@ -332,6 +346,7 @@
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_BIAS_ADJ_MIN (8 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_BIAS_ADJ_SHIFT) /* minimum current */
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_BIAS_ADJ_DEFAULT (0 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_BIAS_ADJ_SHIFT) /* default current */
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_BIAS_ADJ_MAX (7 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_BIAS_ADJ_SHIFT) /* maximum current */
+
#define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_SHIFT (4) /* Bits 4-5: Select fine resistor for frequency adjustment */
#define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_MASK (3 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_SHIFT)
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_11K (0 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_SHIFT) /* 11kohms, minimum resistance,
@@ -340,6 +355,7 @@
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_16K (2 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_SHIFT) /* 16kohms */
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_20K (3 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_FINE_SHIFT) /* 20kohms, max resistance,
* min freq */
+
#define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_SHIFT (6) /* Bits 6-7: Select coarse resistor for frequency adjustment */
#define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_MASK (3 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_SHIFT)
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_DEFAULT (0 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_SHIFT) /* 400kohms, default */
@@ -349,6 +365,7 @@
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_400KOHM (0 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_SHIFT) /* 400kohms */
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_500KOHM (3 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_SHIFT) /* 500kohms */
# define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_600KOHM (2 << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_RES_COARSE_SHIFT) /* 600kohms */
+
#define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_REG_SEL (1 << 8) /* Bit 8: Select alternate regulator type */
#define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_CAP_ARRAY_SHIFT (9) /* Bits 9-15: Adjust RCOSC_MF capacitor array */
#define DDI0_OSC_RCOSCMFCTL_RCOSC_MF_CAP_ARRAY_MASK (0x7f << DDI0_OSC_RCOSCMFCTL_RCOSC_MF_CAP_ARRAY_SHIFT)
@@ -382,8 +399,11 @@
#define DDI0_OSC_STAT0_RCOSC_LF_EN (1 << 21) /* Bit 21: RCOSC_LF enable */
#define DDI0_OSC_STAT0_RCOSC_HF_EN (1 << 22) /* Bit 22: RSOSC_HF enable */
#define DDI0_OSC_STAT0_SCLK_HF_SRC (1 << 28) /* Bit 28: Indicates source for sclk_hf */
+
# define DDI0_OSC_STAT0_SCLK_HF_SRC_RCOSC (0) /* High frequency RCOSC clock */
+
# define DDI0_OSC_STAT0_SCLK_HF_SRC_XOSC DDI0_OSC_STAT0_SCLK_HF_SRC /* High frequency XOSC */
+
#define DDI0_OSC_STAT0_SCLK_LF_SRC_SHIFT (29) /* Bits 29-30: Indicates source for the sclk_lf */
#define DDI0_OSC_STAT0_SCLK_LF_SRC_MASK (3 << DDI0_OSC_STAT0_SCLK_LF_SRC_SHIFT)
# define DDI0_OSC_STAT0_SCLK_LF_SRC(n) ((uint32_t)(n) << DDI0_OSC_STAT0_SCLK_LF_SRC_SHIFT)
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h
index f1f19a9..8e9fee5 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_GPIO_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_GPIO_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* GPIO Register Offsets ************************************************************/
+/* GPIO Register Offsets ****************************************************/
#define TIVA_GPIO_DOUT_PIN_OFFSET(n) ((n) & ~3)
# define TIVA_GPIO_DOUT_PIN3_0_OFFSET 0x0000 /* Data Out 0 to 3 */
@@ -71,7 +72,7 @@
#define TIVA_GPIO_DOE_OFFSET 0x00d0 /* Data Output Enable for DIO 0 to 31 */
#define TIVA_GPIO_EVFLAGS_OFFSET 0x00e0 /* Event Register for DIO 0 to 31 */
-/* GPIO Register Addresses **********************************************************/
+/* GPIO Register Addresses **************************************************/
#define TIVA_GPIO_DOUT_PIN_BASE(n) (TIVA_GPIO_BASE + TIVA_GPIO_DOUT_PIN_OFFSET(n))
# define TIVA_GPIO_DOUT_PIN3_0 (TIVA_GPIO_BASE + TIVA_GPIO_DOUT_PIN3_0_OFFSET)
@@ -90,7 +91,7 @@
#define TIVA_GPIO_DOE (TIVA_GPIO_BASE + TIVA_GPIO_DOE_OFFSET)
#define TIVA_GPIO_EVFLAGS (TIVA_GPIO_BASE + TIVA_GPIO_EVFLAGS_OFFSET)
-/* GPIO Register Bitfield Definitions ***********************************************/
+/* GPIO Register Bitfield Definitions ***************************************/
/* Data Out n to n + 3 */
@@ -125,16 +126,16 @@
#define GPIO_EVFLAGS(n) (1 << (n))
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_GPIO_H */
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h
index f6c40ba..0119abb 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h
@@ -1,10 +1,11 @@
-/********************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,16 +37,16 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2_CC13X20_CC26X2_I2C_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2_CC13X20_CC26X2_I2C_H
-/********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************/
+ ****************************************************************************/
-/* I2C register offsets *********************************************************************/
+/* I2C register offsets *****************************************************/
#define TIVA_I2C_SOAR_OFFSET 0x0000 /* Slave Own Address */
#define TIVA_I2C_SSTAT_OFFSET 0x0004 /* Slave Status */
@@ -67,7 +68,7 @@
#define TIVA_I2C_MICR_OFFSET 0x081c /* Master Interrupt Clear */
#define TIVA_I2C_MCR_OFFSET 0x0820 /* Master Configuration */
-/* I2C register addresses *******************************************************************/
+/* I2C register addresses ***************************************************/
#define TIVA_I2C0_SOAR (TIVA_I2C0_BASE + TIVA_I2C_SOAR_OFFSET)
#define TIVA_I2C0_SSTAT (TIVA_I2C0_BASE + TIVA_I2C_SSTAT_OFFSET)
@@ -89,7 +90,7 @@
#define TIVA_I2C0_MICR (TIVA_I2C0_BASE + TIVA_I2C_MICR_OFFSET)
#define TIVA_I2C0_MCR (TIVA_I2C0_BASE + TIVA_I2C_MCR_OFFSET)
-/* I2C bitfield definitions *****************************************************************/
+/* I2C bitfield definitions *************************************************/
/* Slave Own Address */
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ioc.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ioc.h
index 3e54c71..ca9cba3 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ioc.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ioc.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ioc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,25 +37,25 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2CC13X20_CC26X2IOC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2CC13X20_CC26X2IOC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
#define TIVA_NDIO 32 /* DIO0-31 */
-/* IOC register offsets ************************************************************/
+/* IOC register offsets *****************************************************/
#define TIVA_IOC_IOCFG_OFFSET(n) ((n) << 2)
# define TIVA_IOC_IOCFG0_OFFSET 0x0000 /* Configuration of DIO0 */
@@ -90,7 +91,7 @@
# define TIVA_IOC_IOCFG30_OFFSET 0x0078 /* Configuration of DIO30 */
# define TIVA_IOC_IOCFG31_OFFSET 0x007c /* Configuration of DIO31 */
-/* IOC register addresses **********************************************************/
+/* IOC register addresses ***************************************************/
#define TIVA_IOC_IOCFG(n) (TIVA_IOC_BASE + TIVA_IOC_IOCFG_OFFSET(n))
# define TIVA_IOC_IOCFG0 (TIVA_IOC_BASE + TIVA_IOC_IOCFG0_OFFSET)
@@ -126,11 +127,12 @@
# define TIVA_IOC_IOCFG30 (TIVA_IOC_BASE + TIVA_IOC_IOCFG30_OFFSET)
# define TIVA_IOC_IOCFG31 (TIVA_IOC_BASE + TIVA_IOC_IOCFG31_OFFSET)
-/* IOC register bit settings *******************************************************/
+/* IOC register bit settings ************************************************/
#define IOC_IOCFG_PORTID_SHIFT (0) /* Bits 0-5: Selects DIO usage */
#define IOC_IOCFG_PORTID_MASK (0x3f << IOC_IOCFG_PORTID_SHIFT)
# define IOC_IOCFG_PORTID(n) ((uint32_t)(n) << IOC_IOCFG_PORTID_SHIFT) /* See PORT ID definitions */
+
#define IOC_IOCFG_IOEV_MCU_WUEN (1 << 6) /* Bit 6: Input edge asserts MCU_WU event */
#define IOC_IOCFG_IOEV_RTCEN (1 << 7) /* Bit 7: Input edge asserts RTC event */
#define IOC_IOCFG_IOSTR_SHIFT (8) /* Bits 8-9: I/O drive strength */
@@ -139,23 +141,27 @@
# define IOC_IOCFG_IOSTR_MIN (1 << IOC_IOCFG_IOSTR_SHIFT) /* Minimum drive strength */
# define IOC_IOCFG_IOSTR_MED (2 << IOC_IOCFG_IOSTR_SHIFT) /* Medium drive strength */
# define IOC_IOCFG_IOSTR_MAX (3 << IOC_IOCFG_IOSTR_SHIFT) /* Maximum drive strength */
+
#define IOC_IOCFG_IOCURR_SHIFT (10) /* Bits 10-11: I/O current mode */
#define IOC_IOCFG_IOCURR_MASK (3 << IOC_IOCFG_IOCURR_SHIFT)
# define IOC_IOCFG_IOCURR_2MA (0 << IOC_IOCFG_IOCURR_SHIFT) /* Extended-Current (EC) mode */
# define IOC_IOCFG_IOCURR_4MA (1 << IOC_IOCFG_IOCURR_SHIFT) /* High-Current (HC) mode */
# define IOC_IOCFG_IOCURR_8MA (2 << IOC_IOCFG_IOCURR_SHIFT) /* Low-Current (LC) mode */
+
#define IOC_IOCFG_SLEW_RED (1 << 12) /* Bit 12: Reduces output slew rate */
#define IOC_IOCFG_PULLCTL_SHIFT (13) /* Bits 13-14: Pull Control */
#define IOC_IOCFG_PULLCTL_MASK (3 << IOC_IOCFG_PULLCTL_SHIFT)
# define IOC_IOCFG_PULLCTL_DIS (3 << IOC_IOCFG_PULLCTL_SHIFT) /* No pull */
# define IOC_IOCFG_PULLCTL_DWN (1 << IOC_IOCFG_PULLCTL_SHIFT) /* Pull down */
# define IOC_IOCFG_PULLCTL_UP (2 << IOC_IOCFG_PULLCTL_SHIFT) /* Pull up */
+
#define IOC_IOCFG_EDGEDET_SHIFT (16) /* Bits 16-17: Enable edge events generation */
#define IOC_IOCFG_EDGEDET_MASK (3 << IOC_IOCFG_EDGEDET_SHIFT)
# define IOC_IOCFG_EDGEDET_NONE (0 << IOC_IOCFG_EDGEDET_SHIFT) /* No edge detection */
# define IOC_IOCFG_EDGEDET_NEG (1 << IOC_IOCFG_EDGEDET_SHIFT) /* Negative edge detection */
# define IOC_IOCFG_EDGEDET_POS (2 << IOC_IOCFG_EDGEDET_SHIFT) /* Positive edge detection */
# define IOC_IOCFG_EDGEDET_BOTH (3 << IOC_IOCFG_EDGEDET_SHIFT) /* Both edge detection */
+
#define IOC_IOCFG_EDGE_IRQEN (1 << 18) /* Bit 18: Enable interrupt generation */
#define IOC_IOCFG_IOEV_AON_PROG0 (1 << 21) /* Bit 21: Input edge asserts AON_PROG0 */
#define IOC_IOCFG_IOEV_AON_PROG1 (1 << 22) /* Bit 22: Input edge asserts AON_PROG1 */
@@ -168,12 +174,14 @@
# define IOC_IOCFG_IOMODE_OPENDRINV (5 << IOC_IOCFG_IOMODE_SHIFT) /* Open drain, inverted I/O */
# define IOC_IOCFG_IOMODE_OPENSRC (6 << IOC_IOCFG_IOMODE_SHIFT) /* Open source */
# define IOC_IOCFG_IOMODE_OPENSRCINV (7 << IOC_IOCFG_IOMODE_SHIFT) /* Open source, inverted I/O */
+
#define IOC_IOCFG_WUCFG_SHIFT (27) /* Bits 27-28: Wakeup Configuration */
#define IOC_IOCFG_WUCFG_MASK (3 << IOC_IOCFG_WUCFG_SHIFT)
# define IOC_IOCFG_WUCFG_NONE (0 << IOC_IOCFG_WUCFG_SHIFT) /* 0, 1: Wakeup disabled */
# define IOC_IOCFG_WUCFG_ENABLE (2 << IOC_IOCFG_WUCFG_SHIFT) /* 2, 3: Wakeup enabled */
# define IOC_IOCFG_WUCFG_WAKEUPL (2 << IOC_IOCFG_WUCFG_SHIFT) /* 2: Wakeup on transition low */
# define IOC_IOCFG_WUCFG_WEKUPH (3 << IOC_IOCFG_WUCFG_SHIFT) /* 3: Wakeup on transition high */
+
#define IOC_IOCFG_IE (1 << 29) /* Bit 29: Input enable */
#define IOC_IOCFG_HYSTEN (1 << 30) /* Bit 30: Input hysteresis enable */
@@ -226,16 +234,16 @@
#define IOC_IOCFG_PORTID_RFC_SMI_CLOUT 0x37
#define IOC_IOCFG_PORTID_RFC_SMI_CLIN 0x38
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2CC13X20_CC26X2IOC_H */
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_timer.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_timer.h
index 7507a74..27d7e9f 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_timer.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_timer.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_timer.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,38 +37,38 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_TIMER_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_TIMER_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* TIMER Register Offsets ***********************************************************/
+/* TIMER Register Offsets ***************************************************/
-/* TIMER Register Addresses *********************************************************/
+/* TIMER Register Addresses *************************************************/
-/* TIMER Register Bitfield Definitions **********************************************/
+/* TIMER Register Bitfield Definitions **************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_TIMER_H */
diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_uart.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_uart.h
index b934c3a..2a74511 100644
--- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_uart.h
+++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_uart.h
@@ -1,10 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_uart.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * Technical content derives from a TI header file that has a compatible BSD license:
+ * Technical content derives from a TI header file that has a compatible
+ * BSD license:
*
* Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved.
@@ -36,23 +37,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2_CC13X20_CC26X2_UART_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2_CC13X20_CC26X2_UART_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* UART register offsets ************************************************************/
+/* UART register offsets ****************************************************/
#define TIVA_UART_DR_OFFSET 0x0000 /* UART Data */
#define TIVA_UART_RSR_OFFSET 0x0004 /* UART Receive Status */
@@ -69,7 +70,7 @@
#define TIVA_UART_ICR_OFFSET 0x0044 /* UART Interrupt Clear */
#define TIVA_UART_DMACTL_OFFSET 0x0048 /* UART DMA Control */
-/* UART register addresses **********************************************************/
+/* UART register addresses **************************************************/
#define TIVA_UART_BASE(n) (TIVA_UART0_BASE + (n)*0x01000)
@@ -122,7 +123,7 @@
# define TIVA_UART1_DMACTL (TIVA_UART1_BASE + TIVA_UART_DMACTL_OFFSET)
#endif
-/* UART register bit settings *******************************************************/
+/* UART register bit settings ***********************************************/
/* UART Data (DR) */
@@ -264,12 +265,12 @@
#define UART_DMACTL_TXDMAE (1 << 1) /* Bit 1: Transmit DMA Enable */
#define UART_DMACTL_DMAERR (1 << 2) /* Bit 2: DMA on Error */
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X20_CC26X2_CC13X20_CC26X2_UART_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h b/arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h
index 1732640..83538a4 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_ethernet.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,25 +16,25 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_ETHERNET_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_ETHERNET_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/net/mii.h>
#include "chip.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Ethernet Controller Register Offsets *********************************************/
+/* Ethernet Controller Register Offsets *************************************/
/* Ethernet MAC Register Offsets */
@@ -59,7 +59,7 @@
/* MII Management Register Offsets (see include/nuttx/net/mii.h) */
-/* Ethernet Controller Register Addresses *******************************************/
+/* Ethernet Controller Register Addresses ***********************************/
#define TIVA_MAC_RIS (TIVA_ETHCON_BASE + TIVA_MAC_RIS_OFFSET)
#define TIVA_MAC_IACK (TIVA_ETHCON_BASE + TIVA_MAC_IACK_OFFSET)
@@ -96,9 +96,11 @@
#define MAC_MII_LEDCONFIG (TIVA_ETHCON_BASE + MII_TIVA_LEDCONFIG)
#define MAC_MII_MDICONTROL (TIVA_ETHCON_BASE + MII_TIVA_MDICONTROL)
-/* Ethernet Controller Register Bit Definitions *************************************/
+/* Ethernet Controller Register Bit Definitions *****************************/
-/* Ethernet MAC Raw Interrupt Status/Acknowledge (MACRIS/MACIACK), offset 0x000 */
+/* Ethernet MAC Raw Interrupt Status/Acknowledge
+ * (MACRIS/MACIACK), offset 0x000
+ */
#define MAC_RIS_RXINT (1 << 0) /* Bit 0: Packet Received */
#define MAC_RIS_TXER (1 << 1) /* Bit 1: Transmit Error */
@@ -173,16 +175,16 @@
#define MAC_TR_NEWTX (1 << 0) /* Bit 0: New Transmission */
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_ETHERNET_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_flash.h b/arch/arm/src/tiva/hardware/lm/lm3s_flash.h
index fdb38b6..23d0c72 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_flash.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_flash.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_flash.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_FLASH_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_FLASH_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* FLASH dimensions ****************************************************************/
+/* FLASH dimensions *********************************************************/
#if defined(CONFIG_ARCH_CHIP_LM3S6965) || defined(CONFIG_ARCH_CHIP_LM4F120) || \
defined(CONFIG_ARCH_CHIP_LM3S8962) || defined(CONFIG_ARCH_CHIP_LM3S9B96) || \
@@ -39,8 +39,8 @@
defined(CONFIG_ARCH_CHIP_TM4C123GH6ZRB) || defined(CONFIG_ARCH_CHIP_TM4C123GH6PM) || \
defined(CONFIG_ARCH_CHIP_TM4C123AH6PM)
-/* These parts all support a 1KiB erase page size and a total FLASH memory size
- * of 256Kib or 256 pages.
+/* These parts all support a 1KiB erase page size and a total FLASH memory
+ * size of 256Kib or 256 pages.
*/
# define TIVA_FLASH_NPAGES 256
@@ -49,10 +49,10 @@
#define TIVA_FLASH_SIZE (TIVA_FLASH_NPAGES * TIVA_FLASH_PAGESIZE)
-/* FLASH register offsets ***********************************************************/
+/* FLASH register offsets ***************************************************/
-/* The FMA, FMD, FMC, FCRIS, FCIM, and FCMISC registers are relative to the Flash
- * control base address of TIVA_FLASHCON_BASE.
+/* The FMA, FMD, FMC, FCRIS, FCIM, and FCMISC registers are relative to the
+ * Flash control base address of TIVA_FLASHCON_BASE.
*/
#define TIVA_FLASH_FMA_OFFSET 0x000 /* Flash memory address */
@@ -62,8 +62,8 @@
#define TIVA_FLASH_FCIM_OFFSET 0x010 /* Flash controller interrupt mask */
#define TIVA_FLASH_FCMISC_OFFSET 0x014 /* Flash controller masked interrupt status and clear */
-/* The FMPREn, FMPPEn, USECRL, USER_DBG, and USER_REGn registers are relative to the
- * System Control base address of TIVA_SYSCON_BASE
+/* The FMPREn, FMPPEn, USECRL, USER_DBG, and USER_REGn registers are relative
+ * to the System Control base address of TIVA_SYSCON_BASE
*/
#define TIVA_FLASH_FMPRE_OFFSET 0x130 /* Flash memory protection read enable */
@@ -81,10 +81,10 @@
#define TIVA_FLASH_FMPPE2_OFFSET 0x408 /* Flash Memory Protection Program Enable 2 */
#define TIVA_FLASH_FMPPE3_OFFSET 0x40c /* Flash Memory Protection Program Enable 3 */
-/* FLASH register addresses *********************************************************/
+/* FLASH register addresses *************************************************/
-/* The FMA, FMD, FMC, FCRIS, FCIM, and FCMISC registers are relative to the Flash
- * control base address of TIVA_FLASHCON_BASE.
+/* The FMA, FMD, FMC, FCRIS, FCIM, and FCMISC registers are relative to the
+ * Flash control base address of TIVA_FLASHCON_BASE.
*/
#define TIVA_FLASH_FMA (TIVA_FLASHCON_BASE + TIVA_FLASH_FMA_OFFSET)
@@ -94,8 +94,8 @@
#define TIVA_FLASH_FCIM (TIVA_FLASHCON_BASE + TIVA_FLASH_FCIM_OFFSET)
#define TIVA_FLASH_FCMISC (TIVA_FLASHCON_BASE + TIVA_FLASH_FCMISC_OFFSET)
-/* The FMPREn, FMPPEn, USECRL, USER_DBG, and USER_REGn registers are relative to the
- * System Control base address of TIVA_SYSCON_BASE
+/* The FMPREn, FMPPEn, USECRL, USER_DBG, and USER_REGn registers are relative
+ * to the System Control base address of TIVA_SYSCON_BASE
*/
#define TIVA_FLASH_FMPRE (TIVA_SYSCON_BASE + TIVA_FLASH_FMPRE_OFFSET)
@@ -113,7 +113,7 @@
#define TIVA_FLASH_FMPPE2 (TIVA_SYSCON_BASE + TIVA_FLASH_FMPPE2_OFFSET)
#define TIVA_FLASH_FMPPE3 (TIVA_SYSCON_BASE + TIVA_FLASH_FMPPE3_OFFSET)
-/* FLASH register bit definitions ***************************************************/
+/* FLASH register bit definitions *******************************************/
#define FLASH_FMA_OFFSET_SHIFT 0 /* Bits 17-0: Address Offset */
#define FLASH_FMA_OFFSET_MASK (0x0003ffff << FLASH_FMA_OFFSET_SHIFT)
@@ -132,16 +132,16 @@
#define FLASH_FMC_WRKEY_MASK (0xffff << FLASH_FMC_WRKEY_SHIFT)
#define FLASH_FMC_WRKEY (0xa442 << FLASH_FMC_WRKEY_SHIFT) /* Magic write key */
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_FLASH_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_gpio.h b/arch/arm/src/tiva/hardware/lm/lm3s_gpio.h
index 3af2fb8..a616371 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_gpio.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_gpio.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_gpio.h
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
@@ -32,20 +32,21 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_GPIO_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_GPIO_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
+
/* REVISIT: Why do we not use the AHB aperture for all GPIO accesses? */
#define TIVA_GPIOK_BASE TIVA_GPIOKAHB_BASE
@@ -58,7 +59,7 @@
#define TIVA_GPIOS_BASE TIVA_GPIOSAHB_BASE
#define TIVA_GPIOT_BASE TIVA_GPIOTAHB_BASE
-/* GPIO Register Offsets ************************************************************/
+/* GPIO Register Offsets ****************************************************/
#define TIVA_GPIO_DATA_OFFSET 0x0000 /* GPIO Data */
#define TIVA_GPIO_DIR_OFFSET 0x0400 /* GPIO Direction */
@@ -98,7 +99,7 @@
#define TIVA_GPIO_PCELLID2_OFFSET 0x0ff8 /* GPIO PrimeCell Identification 2 */
#define TIVA_GPIO_PCELLID3_OFFSET 0x0ffc /* GPIO PrimeCell Identification 3*/
-/* GPIO Register Addresses **********************************************************/
+/* GPIO Register Addresses **************************************************/
#if TIVA_NPORTS > 0
@@ -457,7 +458,7 @@
# define TIVA_GPIOJ_PCELLID3 (TIVA_GPIOJ_BASE + TIVA_GPIO_PCELLID3_OFFSET)
#endif
-/* GPIO Register Bitfield Definitions ***********************************************/
+/* GPIO Register Bitfield Definitions ***************************************/
/* GPIO Lock */
@@ -488,16 +489,16 @@
# define GPIO_PCTL_PMC7_MASK (15 << GPIO_PCTL_PMC7_SHIFT)
#endif
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_GPIO_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h b/arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h
index beb397d..51b064b 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_MEMORYMAP_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_MEMORYMAP_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Memory map ***********************************************************************/
+/* Memory map ***************************************************************/
#if defined(CONFIG_ARCH_CHIP_LM3S6918) || defined(CONFIG_ARCH_CHIP_LM3S6432) || \
defined(CONFIG_ARCH_CHIP_LM3S6965) || defined(CONFIG_ARCH_CHIP_LM3S8962)
@@ -68,7 +68,7 @@
# define TIVA_ITM_BASE 0xe0000000 /* -0xe0000fff: Instrumentation Trace Macrocell */
# define TIVA_DWT_BASE 0xe0001000 /* -0xe0001fff: Data Watchpoint and Trace */
# define TIVA_FPB_BASE 0xe0002000 /* -0xe0002fff: Flash Patch and Breakpoint */
- /* -0xe000dfff: Reserved */
+ /* -0xe000dfff: Reserved */
# define TIVA_NVIC_BASE 0xe000e000 /* -0xe000efff: Nested Vectored Interrupt Controller */
/* -0xe003ffff: Reserved */
# define TIVA_TPIU_BASE 0xe0040000 /* -0xe0040fff: Trace Port Interface Unit */
@@ -77,11 +77,13 @@
# error "Memory map not specified for this LM3S chip"
#endif
-/* Peripheral base addresses ********************************************************/
-/* The LM3S6918 and LM3S6965 differ by only the presence or absence of a few different
- * peripheral modules. They could probably be combined into one peripheral memory
- * map. However, keeping them separate does also provide so early, compile-time
- * error detection that makes the duplication worthwhile.
+/* Peripheral base addresses ************************************************/
+
+/* The LM3S6918 and LM3S6965 differ by only the presence or absence of a few
+ * different peripheral modules. They could probably be combined into one
+ * peripheral memory map. However, keeping them separate does also provide
+ * so early, compile-time error detection that makes the duplication
+ * worthwhile.
*/
#if defined(CONFIG_ARCH_CHIP_LM3S6918)
@@ -99,6 +101,7 @@
# define TIVA_UART0_BASE (TIVA_PERIPH_BASE + 0x0c000) /* -0x0cfff: UART0 */
# define TIVA_UART1_BASE (TIVA_PERIPH_BASE + 0x0d000) /* -0x0dfff: UART1 */
/* -0x1ffff: Reserved */
+
/* Peripheral Base Addresses */
# define TIVA_I2C0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x20fff: I2C0 */
@@ -138,6 +141,7 @@
# define TIVA_UART0_BASE (TIVA_PERIPH_BASE + 0x0c000) /* -0x0cfff: UART0 */
# define TIVA_UART1_BASE (TIVA_PERIPH_BASE + 0x0d000) /* -0x0dfff: UART1 */
/* -0x1ffff: Reserved */
+
/* Peripheral Base Addresses */
# define TIVA_I2C0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x20fff: I2C0 */
@@ -178,6 +182,7 @@
# define TIVA_UART1_BASE (TIVA_PERIPH_BASE + 0x0d000) /* -0x0dfff: UART1 */
# define TIVA_UART2_BASE (TIVA_PERIPH_BASE + 0x0e000) /* -0x0dfff: UART2 */
/* -0x1ffff: Reserved */
+
/* Peripheral Base Addresses */
# define TIVA_I2C0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x20fff: I2C0 */
@@ -221,6 +226,7 @@
# define TIVA_UART0_BASE (TIVA_PERIPH_BASE + 0x0c000) /* -0x0cfff: UART0 */
# define TIVA_UART1_BASE (TIVA_PERIPH_BASE + 0x0d000) /* -0x0dfff: UART1 */
/* -0x1ffff: Reserved */
+
/* Peripheral Base Addresses */
# define TIVA_I2C0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x20fff: I2C0 */
@@ -267,6 +273,7 @@
# define TIVA_UART1_BASE (TIVA_PERIPH_BASE + 0x0d000) /* -0x0dfff: UART1 */
# define TIVA_UART2_BASE (TIVA_PERIPH_BASE + 0x0e000) /* -0x0dfff: UART2 */
/* -0x1ffff: Reserved */
+
/* Peripheral Base Addresses */
# define TIVA_I2C0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x207ff: I2C0 */
@@ -322,16 +329,16 @@
# error "Peripheral base addresses not specified for this Stellaris chip"
#endif
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_MEMORYMAP_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h b/arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h
index 57ca601..d056279 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,23 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_PINMAP_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_PINMAP_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* The following lists the input value to tiva_configgpio to setup the alternate,
- * hardware function for each pin.
+/* The following lists the input value to tiva_configgpio to setup the
+ * alternate, hardware function for each pin.
*/
#if defined(CONFIG_ARCH_CHIP_LM3S6918)
@@ -261,18 +261,18 @@
# define GPIO_QEI1_IDX (GPIO_FUNC_PFINPUT | GPIO_PORTE | 1) /* PF1: QEI module 1 index. ) */
# define GPIO_ETHPHY_LED1 (GPIO_FUNC_PFOUTPUT | GPIO_PORTF | 2) /* PF2: LED1 */
# define GPIO_ETHPHY_LED0 (GPIO_FUNC_PFOUTPUT | GPIO_PORTF | 3) /* PF3: LED0 */
-# define GPIO_PWM0_1 (GPIO_FUNC_PFOUTPUT | GPIO_PORTG | 1) /* PG1:PWM Generator 0, PWM1 */
+# define GPIO_PWM0_1 (GPIO_FUNC_PFOUTPUT | GPIO_PORTG | 1) /* PG1:PWM Generator 0, PWM1 */
#else
# error "Unknown Stellaris chip"
#endif
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
/****************************************************************************
* Public Function Prototypes
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h b/arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h
index 8eff264..07871f4 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_sysctrl.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_SYSCONTROL_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_SYSCONTROL_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* System Control Register Offsets **************************************************/
+/* System Control Register Offsets ******************************************/
#define TIVA_SYSCON_DID0_OFFSET 0x000 /* Device Identification 0 */
#define TIVA_SYSCON_DID1_OFFSET 0x004 /* Device Identification 1 */
@@ -63,7 +63,7 @@
#define TIVA_SYSCON_DCGC2_OFFSET 0x128 /* Deep Sleep Mode Clock Gating Control Register 2 */
#define TIVA_SYSCON_DSLPCLKCFG_OFFSET 0x144 /* Deep Sleep Clock Configuration*/
-/* System Control Register Addresses ************************************************/
+/* System Control Register Addresses ****************************************/
#define TIVA_SYSCON_DID0 (TIVA_SYSCON_BASE + TIVA_SYSCON_DID0_OFFSET)
#define TIVA_SYSCON_DID1 (TIVA_SYSCON_BASE + TIVA_SYSCON_DID1_OFFSET)
@@ -95,7 +95,7 @@
#define TIVA_SYSCON_DCGC2 (TIVA_SYSCON_BASE + TIVA_SYSCON_DCGC2_OFFSET)
#define TIVA_SYSCON_DSLPCLKCFG (TIVA_SYSCON_BASE + TIVA_SYSCON_DSLPCLKCFG_OFFSET)
-/* System Control Register Bit Definitions ******************************************/
+/* System Control Register Bit Definitions **********************************/
/* Device Identification 0 (DID0), offset 0x000 */
@@ -113,7 +113,7 @@
#define SYSCON_DID1_QUAL_SHIFT 0 /* Bits 1-0: Qualification Status */
#define SYSCON_DID1_QUAL_MASK (0x03 << SYSCON_DID1_QUAL_SHIFT)
#define SYSCON_DID1_ROHS (1 << 2) /* Bit 2: RoHS-Compliance */
-#define SYSCON_DID1_PKG_SHIFT 3 /* Bits 4-3: Package Type */
+#define SYSCON_DID1_PKG_SHIFT 3 /* Bits 4-3: Package Type */
#define SYSCON_DID1_PKG_MASK (0x03 << SYSCON_DID1_PKG_SHIFT)
#define SYSCON_DID1_TEMP_SHIFT 5 /* Bits 7-5: Temperature Range */
#define SYSCON_DID1_TEMP_MASK (0x07 << SYSCON_DID1_TEMP_SHIFT)
@@ -289,6 +289,7 @@
# define SYSCON_RCC_OSCSRC_PIOSC (1 << SYSCON_RCC_OSCSRC_SHIFT) /* Internal oscillator (reset) */
# define SYSCON_RCC_OSCSRC_PIOSC4 (2 << SYSCON_RCC_OSCSRC_SHIFT) /* Internal oscillator / 4 */
# define SYSCON_RCC_OSCSRC_LFIOSC (3 << SYSCON_RCC_OSCSRC_SHIFT) /* 30KHz internal oscillator */
+
#define SYSCON_RCC_XTAL_SHIFT 6 /* Bits 10-6: Crystal Value */
#define SYSCON_RCC_XTAL_MASK (0x1f << SYSCON_RCC_XTAL_SHIFT)
# define SYSCON_RCC_XTAL1000KHZ ( 0 << SYSCON_RCC_XTAL_SHIFT) /* 1.0000MHz (NO PLL) */
@@ -349,6 +350,7 @@
# define SYSCON_RCC2_OSCSRC2_PIOSC4 (2 << SYSCON_RCC2_OSCSRC2_SHIFT) /* Internal oscillator / 4 */
# define SYSCON_RCC2_OSCSRC2_LFIOSC (3 << SYSCON_RCC2_OSCSRC2_SHIFT) /* 30KHz internal oscillator */
# define SYSCON_RCC2_OSCSRC2_32768HZ (7 << SYSCON_RCC2_OSCSRC2_SHIFT) /* 32.768KHz external oscillator */
+
#define SYSCON_RCC2_BYPASS2 (1 << 11) /* Bit 11: Bypass PLL */
#define SYSCON_RCC2_PWRDN2 (1 << 13) /* Bit 13: Power-Down PLL */
#define SYSCON_RCC2_SYSDIV2_SHIFT 23 /* Bits 28-23: System Clock Divisor */
@@ -474,22 +476,22 @@
#define SYSCON_DSLPCLKCFG_DSOSCSRC_SHIFT 4 /* Bits 6-4: Clock Source */
#define SYSCON_DSLPCLKCFG_DSOSCSRC_MASK (0x07 << SYSCON_DSLPCLKCFG_DSOSCSRC_SHIFT)
-/* UART Run Mode Clock Gating Control*/
+/* UART Run Mode Clock Gating Control */
#ifdef CONFIG_ARCH_CHIP_LM3S9B92
# define SYSCON_RCGCUART(n) (1 << (n)) /* Bit n: UART Module n Run Mode Clock Gating Control */
#endif
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_SYSCONTROL_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_timer.h b/arch/arm/src/tiva/hardware/lm/lm3s_timer.h
index 2430423..2c5a5b0 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_timer.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_timer.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm3s_timer.h
*
* Originally:
@@ -44,23 +44,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_TIMER_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_TIMER_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* GPTM register offsets ************************************************************/
+/* GPTM register offsets ****************************************************/
#define TIVA_TIMER_CFG_OFFSET 0x0000 /* GPTM Configuration */
#define TIVA_TIMER_TAMR_OFFSET 0x0004 /* GPTM Timer A Mode */
@@ -81,7 +81,7 @@
#define TIVA_TIMER_TAR_OFFSET 0x0048 /* GPTM Timer A */
#define TIVA_TIMER_TBR_OFFSET 0x004c /* GPTM Timer B */
-/* GPTM register addresses **********************************************************/
+/* GPTM register addresses **************************************************/
#if TIVA_NTIMERS > 0
#define TIVA_TIMER0_CFG (TIVA_TIMER0_BASE + TIVA_TIMER_CFG_OFFSET)
@@ -251,7 +251,8 @@
#define TIVA_TIMER7_TBR (TIVA_TIMER7_BASE + TIVA_TIMER_TBR_OFFSET)
#endif /* TIVA_NTIMERS > 7 */
-/* GPTM register bit definitions ****************************************************/
+/* GPTM register bit definitions ********************************************/
+
/* GPTM Configuration (CFG) */
#define TIMER_CFG_CFG_SHIFT 0 /* Bits 2-0: Configuration */
@@ -263,15 +264,20 @@
/* GPTM Timer A/B Mode (TAMR and TBMR) */
#define TIMER_TnMR_TnMR_SHIFT (0) /* Bits 1-0: Timer A/B Mode */
+
#define TIMER_TnMR_TnMR_MASK (3 << TIMER_TnMR_TnMR_SHIFT) /* Bits 1-0: Timer A/B Mode */
# define TIMER_TnMR_TnMR_ONESHOT (1 << TIMER_TnMR_TnMR_SHIFT) /* One-Shot Timer mode */
# define TIMER_TnMR_TnMR_PERIODIC (2 << TIMER_TnMR_TnMR_SHIFT) /* Periodic Timer mode */
# define TIMER_TnMR_TnMR_CAPTURE (3 << TIMER_TnMR_TnMR_SHIFT) /* Capture mode */
+
#define TIMER_TnMR_TnCMR_SHIFT (2) /* Bit 2: Timer A/B Capture Mode */
+
#define TIMER_TnMR_TnCMR (1 << TIMER_TnMR_TnCMR_SHIFT) /* Bit 2: Timer A/B Capture Mode */
# define TIMER_TnMR_TnCMR_EDGECOUNT (0 << TIMER_TnMR_TnCMR_SHIFT) /* Edge-Count mode */
# define TIMER_TnMR_TnCMR_EDGETIME (1 << TIMER_TnMR_TnCMR_SHIFT) /* Edge-Time mode */
+
#define TIMER_TnMR_TnAMS_SHIFT (3) /* Bit 3: Timer A/B Alternate Mode Select */
+
#define TIMER_TnMR_TnAMS (1 << TIMER_TnMR_TnAMS_SHIFT) /* Bit 3: Timer A/B Alternate Mode Select */
# define TIMER_TnMR_TnAMS_CAPTURE (0 << TIMER_TnMR_TnAMS_SHIFT) /* Capture mode is enabled */
# define TIMER_TnMR_TnAMS_PWM (1 << TIMER_TnMR_TnAMS_SHIFT) /* PWM mode is enabled */
@@ -285,6 +291,7 @@
# define TIMER_CTL_TAEVENT_POS (0 << TIMER_CTL_TAEVENT_SHIFT) /* Positive edge */
# define TIMER_CTL_TAEVENT_NEG (1 << TIMER_CTL_TAEVENT_SHIFT) /* Negative edge */
# define TIMER_CTL_TAEVENT_BOTH (3 << TIMER_CTL_TAEVENT_SHIFT) /* Both edges */
+
#define TIMER_CTL_RTCEN (1 << 4) /* Bit 4: GPTM RTC Stall Enable */
#define TIMER_CTL_TAOTE (1 << 5) /* Bit 5: GPTM Timer A Output Trigger Enable */
#define TIMER_CTL_TAPWML (1 << 6) /* Bit 6: GPTM Timer A PWM Output Level */
@@ -295,6 +302,7 @@
# define TIMER_CTL_TBEVENT_POS (0 << TIMER_CTL_TBEVENT_SHFIT) /* Positive edge */
# define TIMER_CTL_TBEVENT_NEG (1 << TIMER_CTL_TBEVENT_SHFIT) /* Negative edge */
# define TIMER_CTL_TBEVENT_BOTH (3 << TIMER_CTL_TBEVENT_SHFIT) /* Both edges */
+
#define TIMER_CTL_TBOTE (1 << 13) /* Bit 13: GPTM Timer B Output Trigger Enable */
#define TIMER_CTL_TBPWML (1 << 14) /* Bit 14: GPTM Timer B PWM Output Level */
@@ -313,8 +321,11 @@
#define TIMER_ALLINTS 0x00000101
/* GPTM Timer A Interval Load (TAILR) (32-bit value) */
+
/* GPTM Timer B Interval Load (TBILR) (32-bit value) */
+
/* GPTM Timer A Match (TAMATCHR) (32-bit value) */
+
/* GPTM Timer B Match (TBMATCHR) (32-bit value) */
/* GPTM Timer A/B Prescale (TnPR) */
@@ -330,6 +341,7 @@
# define TIMER_TnPMR_TnPSMR(n) ((uint32_t)(n) << TIMER_TnPMR_TnPSMR_SHIFT)
/* GPTM Timer A (TAR) (16/32-bit value) */
+
/* GPTM Timer B (TBR) (16/32-bit value) */
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM3S_TIMER_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm4f_gpio.h b/arch/arm/src/tiva/hardware/lm/lm4f_gpio.h
index aeeba2a..4e7e476 100644
--- a/arch/arm/src/tiva/hardware/lm/lm4f_gpio.h
+++ b/arch/arm/src/tiva/hardware/lm/lm4f_gpio.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm4f_gpio.h
*
* Copyright (C) 2009-2010, 2013, 2018 Gregory Nutt. All rights reserved.
@@ -32,20 +32,21 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_GPIO_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_GPIO_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
+
/* REVISIT: Why do we not use the AHB aperture for all GPIO accesses? */
#define TIVA_GPIOK_BASE TIVA_GPIOKAHB_BASE
@@ -58,7 +59,7 @@
#define TIVA_GPIOS_BASE TIVA_GPIOSAHB_BASE
#define TIVA_GPIOT_BASE TIVA_GPIOTAHB_BASE
-/* GPIO Register Offsets ************************************************************/
+/* GPIO Register Offsets ****************************************************/
#define TIVA_GPIO_DATA_OFFSET 0x0000 /* GPIO Data */
#define TIVA_GPIO_DIR_OFFSET 0x0400 /* GPIO Direction */
@@ -96,9 +97,9 @@
#define TIVA_GPIO_PCELLID0_OFFSET 0x0ff0 /* GPIO PrimeCell Identification 0 */
#define TIVA_GPIO_PCELLID1_OFFSET 0x0ff4 /* GPIO PrimeCell Identification 1 */
#define TIVA_GPIO_PCELLID2_OFFSET 0x0ff8 /* GPIO PrimeCell Identification 2 */
-#define TIVA_GPIO_PCELLID3_OFFSET 0x0ffc /* GPIO PrimeCell Identification 3*/
+#define TIVA_GPIO_PCELLID3_OFFSET 0x0ffc /* GPIO PrimeCell Identification 3 */
-/* GPIO Register Addresses **********************************************************/
+/* GPIO Register Addresses **************************************************/
#if TIVA_NPORTS > 0
@@ -346,7 +347,7 @@
# define TIVA_GPIOF_PCELLID3 (TIVA_GPIOF_BASE + TIVA_GPIO_PCELLID3_OFFSET)
#endif
-/* GPIO Register Bitfield Definitions ***********************************************/
+/* GPIO Register Bitfield Definitions ***************************************/
/* GPIO Lock */
@@ -375,16 +376,16 @@
#define GPIO_PCTL_PMC7_SHIFT (28) /* Bits 28-31: Port Mux Control 7 */
#define GPIO_PCTL_PMC7_MASK (15 << GPIO_PCTL_PMC7_SHIFT)
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_GPIO_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm4f_memorymap.h b/arch/arm/src/tiva/hardware/lm/lm4f_memorymap.h
index 8ecefc3..7bde11d 100644
--- a/arch/arm/src/tiva/hardware/lm/lm4f_memorymap.h
+++ b/arch/arm/src/tiva/hardware/lm/lm4f_memorymap.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm4f_memorymap.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
@@ -32,22 +32,22 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_MEMORYMAP_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_MEMORYMAP_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Memory map ***********************************************************************/
+/* Memory map ***************************************************************/
#if defined(CONFIG_ARCH_CHIP_LM4F120)
# define TIVA_FLASH_BASE 0x00000000 /* -0x0003ffff: On-chip FLASH */
@@ -74,7 +74,7 @@
# error "Memory map not specified for this LM4F chip"
#endif
-/* Peripheral base addresses ********************************************************/
+/* Peripheral base addresses ************************************************/
#if defined(CONFIG_ARCH_CHIP_LM4F120)
/* FiRM Peripheral Base Addresses */
@@ -99,6 +99,7 @@
# define TIVA_UART6_BASE (TIVA_PERIPH_BASE + 0x12000) /* -0x12fff: UART6 */
# define TIVA_UART7_BASE (TIVA_PERIPH_BASE + 0x13000) /* -0x13fff: UART7 */
/* -0x1ffff: Reserved */
+
/* Peripheral Base Addresses */
# define TIVA_I2C0_BASE (TIVA_PERIPH_BASE + 0x20000) /* -0x20fff: I2C0 */
@@ -148,16 +149,16 @@
# error "Peripheral base addresses not specified for this Stellaris chip"
#endif
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_MEMORYMAP_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h b/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h
index 3922c9e..adc63ed 100644
--- a/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h
+++ b/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,38 +16,40 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_PINMAP_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_PINMAP_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
-/* Alternate Pin Functions. All members of the LM4F family share the same pin
- * multiplexing (although they may differ in the pins physically available).
+ ****************************************************************************/
+
+/* Alternate Pin Functions.
+ * All members of the LM4F family share the same pin multiplexing
+ * (although they may differ in the pins physically available).
*
- * Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
- * Drivers, however, will use the pin selection without the numeric suffix.
- * Additional definitions are required in the board.h file. For example, if
- * CAN1_RX connects vis PA11 on some board, then the following definitions should
- * appear in the board.h header file for that board:
+ * Alternative pin selections are provided with a numeric suffix like _1, _2,
+ * etc. Drivers, however, will use the pin selection without the numeric
+ * suffix. Additional definitions are required in the board.h file. For
+ * example, if CAN1_RX connects vis PA11 on some board, then the following
+ * definitions should appear in the board.h header file for that board:
*
* #define GPIO_CAN1_RX GPIO_CAN1_RX_1
*
* The driver will then automatically configure PA11 as the CAN1 RX pin.
*/
-/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
- * Additional effort is required to select specific GPIO options such as frequency,
- * open-drain/push-pull, and pull-up/down! Just the basics are defined for most
- * pins in this file.
+/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
+ * Additional effort is required to select specific GPIO options such as
+ * frequency, open-drain/push-pull, and pull-up/down! Just the basics are
+ * defined for most pins in this file.
*/
#if defined(CONFIG_ARCH_CHIP_LM4F120)
@@ -185,13 +187,13 @@
# error "Unknown Stellaris chip"
#endif
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
/****************************************************************************
* Public Function Prototypes
diff --git a/arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h b/arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h
index abb871c..e49ea7d 100644
--- a/arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h
+++ b/arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h
@@ -1,4 +1,4 @@
-/********************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm4f_sysctrl.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_SYSCONTROL_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_SYSCONTROL_H
-/********************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************/
+ ****************************************************************************/
-/* System Control Register Offsets **********************************************************/
+/* System Control Register Offsets ******************************************/
#define TIVA_SYSCON_DID0_OFFSET 0x000 /* Device Identification 0 */
#define TIVA_SYSCON_DID1_OFFSET 0x004 /* Device Identification 1 */
@@ -146,7 +146,7 @@
#define TIVA_SYSCON_PREEPROM_OFFSET 0xa58 /* EEPROM Peripheral Ready */
#define TIVA_SYSCON_PRWTIMER_OFFSET 0xa5c /* 2/64-BitWide Timer Peripheral Ready */
-/* System Control Legacy Register Offsets ***************************************************/
+/* System Control Legacy Register Offsets ***********************************/
#define TIVA_SYSCON_DC0_OFFSET 0x008 /* Device Capabilities 0 */
#define TIVA_SYSCON_DC1_OFFSET 0x010 /* Device Capabilities 1 */
@@ -177,7 +177,7 @@
#define TIVA_SYSCON_DC9_OFFSET 0x190 /* Device Capabilities */
#define TIVA_SYSCON_NVMSTAT_OFFSET 0x1a0 /* Non-Volatile Memory Information */
-/* System Control Register Addresses ********************************************************/
+/* System Control Register Addresses ****************************************/
#define TIVA_SYSCON_DID0 (TIVA_SYSCON_BASE + TIVA_SYSCON_DID0_OFFSET)
#define TIVA_SYSCON_DID1 (TIVA_SYSCON_BASE + TIVA_SYSCON_DID1_OFFSET)
@@ -292,7 +292,7 @@
#define TIVA_SYSCON_PREEPROM (TIVA_SYSCON_BASE + TIVA_SYSCON_PREEPROM_OFFSET)
#define TIVA_SYSCON_PRWTIMER (TIVA_SYSCON_BASE + TIVA_SYSCON_PRWTIMER_OFFSET)
-/* System Control Legacy Register Addresses *************************************************/
+/* System Control Legacy Register Addresses *********************************/
#define TIVA_SYSCON_DC0 (TIVA_SYSCON_BASE + TIVA_SYSCON_DC0_OFFSET)
#define TIVA_SYSCON_DC1 (TIVA_SYSCON_BASE + TIVA_SYSCON_DC1_OFFSET)
@@ -323,7 +323,7 @@
#define TIVA_SYSCON_DC9 (TIVA_SYSCON_BASE + TIVA_SYSCON_DC9_OFFSET)
#define TIVA_SYSCON_NVMSTAT (TIVA_SYSCON_BASE + TIVA_SYSCON_NVMSTAT_OFFSET)
-/* System Control Register Bit Definitions **************************************************/
+/* System Control Register Bit Definitions **********************************/
/* Device Identification 0 */
@@ -341,7 +341,7 @@
#define SYSCON_DID1_QUAL_SHIFT 0 /* Bits 1-0: Qualification Status */
#define SYSCON_DID1_QUAL_MASK (0x03 << SYSCON_DID1_QUAL_SHIFT)
#define SYSCON_DID1_ROHS (1 << 2) /* Bit 2: RoHS-Compliance */
-#define SYSCON_DID1_PKG_SHIFT 3 /* Bits 4-3: Package Type */
+#define SYSCON_DID1_PKG_SHIFT 3 /* Bits 4-3: Package Type */
#define SYSCON_DID1_PKG_MASK (0x03 << SYSCON_DID1_PKG_SHIFT)
#define SYSCON_DID1_TEMP_SHIFT 5 /* Bits 7-5: Temperature Range */
#define SYSCON_DID1_TEMP_MASK (0x07 << SYSCON_DID1_TEMP_SHIFT)
@@ -408,6 +408,7 @@
# define SYSCON_RCC_OSCSRC_PIOSC (1 << SYSCON_RCC_OSCSRC_SHIFT) /* Precision internal oscillator (reset) */
# define SYSCON_RCC_OSCSRC_PIOSC4 (2 << SYSCON_RCC_OSCSRC_SHIFT) /* Precision internal oscillator / 4 */
# define SYSCON_RCC_OSCSRC_LFIOSC (3 << SYSCON_RCC_OSCSRC_SHIFT) /* Low-frequency internal oscillator */
+
#define SYSCON_RCC_XTAL_SHIFT 6 /* Bits 10-6: Crystal Value */
#define SYSCON_RCC_XTAL_MASK (31 << SYSCON_RCC_XTAL_SHIFT)
# define SYSCON_RCC_XTAL4000KHZ (6 << SYSCON_RCC_XTAL_SHIFT) /* 4 MHz (NO PLL) */
@@ -431,6 +432,7 @@
# define SYSCON_RCC_XTAL20000KHZ (24 << SYSCON_RCC_XTAL_SHIFT) /* 20.0 MHz (USB) */
# define SYSCON_RCC_XTAL24000KHZ (25 << SYSCON_RCC_XTAL_SHIFT) /* 24.0 MHz (USB) */
# define SYSCON_RCC_XTAL25000KHZ (26 << SYSCON_RCC_XTAL_SHIFT) /* 25.0 MHz (USB) */
+
#define SYSCON_RCC_BYPASS (1 << 11) /* Bit 11: PLL Bypass */
#define SYSCON_RCC_PWRDN (1 << 13) /* Bit 13: PLL Power Down */
#define SYSCON_RCC_USESYSDIV (1 << 22) /* Bit 22: Enable System Clock Divider */
@@ -457,6 +459,7 @@
# define SYSCON_RCC2_OSCSRC2_PIOSC4 (2 << SYSCON_RCC2_OSCSRC2_SHIFT) /* Precision internal oscillator / 4 */
# define SYSCON_RCC2_OSCSRC2_LFIOSC (4 << SYSCON_RCC2_OSCSRC2_SHIFT) /* Low-frequency internal oscillator */
# define SYSCON_RCC2_OSCSRC2_32768HZ (7 << SYSCON_RCC2_OSCSRC2_SHIFT) /* 32.768KHz external oscillator */
+
#define SYSCON_RCC2_BYPASS2 (1 << 11) /* Bit 11: Bypass PLL */
#define SYSCON_RCC2_PWRDN2 (1 << 13) /* Bit 13: Power-Down PLL */
#define SYSCON_RCC2_USBPWRDN (1 << 14) /* Bit 14: Power-Down USB PLL */
@@ -483,6 +486,7 @@
# define SYSCON_DSLPCLKCFG_DSOSCSRC_PIOSC4 (2 << SYSCON_DSLPCLKCFG_DSOSCSRC_SHIFT) /* Precision internal oscillator / 4 */
# define SYSCON_DSLPCLKCFG_DSOSCSRC_LFIOSC (4 << SYSCON_DSLPCLKCFG_DSOSCSRC_SHIFT) /* Low-frequency internal oscillator */
# define SYSCON_DSLPCLKCFG_DSOSCSRC_32768KHZ (7 << SYSCON_DSLPCLKCFG_DSOSCSRC_SHIFT) /* 32.768KHz external oscillator */
+
#define SYSCON_DSLPCLKCFG_DSDIVORIDE_SHIFT 23 /* Bits 28-23: Divider Field Override */
#define SYSCON_DSLPCLKCFG_DSDIVORIDE_MASK (0x3f << SYSCON_DSLPCLKCFG_DSDIVORIDE_SHIFT)
# define SYSCON_DSLPCLKCFG_DSDIVORIDE(b) (((n)-1) << SYSCON_DSLPCLKCFG_DSDIVORIDE_SHIFT)
@@ -679,7 +683,7 @@
#define SYSCON_SRHIB_R0 (1 << 0) /* Bit 0: Hibernation Module Software Reset */
-/* UART Software Reset*/
+/* UART Software Reset */
#define SYSCON_SRUARTR(n) (1 << (n)) /* Bit n: UART Module n Software Reset */
# define SYSCON_SRUARTR_R0 (1 << 0) /* Bit 0: UART Module 0 Software Reset */
@@ -756,7 +760,7 @@
# define SYSCON_RCGCTIMER_R4 (1 << 4) /* Bit 4: 16/32-Bit General-Purpose Timer 4 Run Mode Clock Gating Control */
# define SYSCON_RCGCTIMER_R5 (1 << 5) /* Bit 5: 16/32-Bit General-Purpose Timer 5 Run Mode Clock Gating Control */
-/* GPIO Run Mode Clock Gating Control*/
+/* GPIO Run Mode Clock Gating Control */
#define SYSCON_RCGCGPIO(n) (1 << (n)) /* Bit n: 16/32-Bit GPIO Port n Run Mode Clock Gating Control */
# define SYSCON_RCGCGPIO_R0 (1 << 0) /* Bit 0: 16/32-Bit GPIO Port A Run Mode Clock Gating Control */
@@ -766,7 +770,7 @@
# define SYSCON_RCGCGPIO_R4 (1 << 4) /* Bit 4: 16/32-Bit GPIO Port E Run Mode Clock Gating Control */
# define SYSCON_RCGCGPIO_R5 (1 << 5) /* Bit 5: 16/32-Bit GPIO Port F Run Mode Clock Gating Control */
-/* uDMA Run Mode Clock Gating Control*/
+/* uDMA Run Mode Clock Gating Control */
#define SYSCON_RCGCDMA_R0 (1 << 0) /* Bit 0: μDMA Module Run Mode Clock Gating Control */
@@ -774,7 +778,7 @@
#define SYSCON_RCGCHIB_R0 (1 << 0) /* Bit 0: Hibernation Module Run Mode Clock Gating Control */
-/* UART Run Mode Clock Gating Control*/
+/* UART Run Mode Clock Gating Control */
#define SYSCON_RCGCUART(n) (1 << (n)) /* Bit n: UART Module n Run Mode Clock Gating Control */
# define SYSCON_RCGCUART_R0 (1 << 0) /* Bit 0: UART Module 0 Run Mode Clock Gating Control */
@@ -786,7 +790,7 @@
# define SYSCON_RCGCUART_R6 (1 << 6) /* Bit 6: UART Module 6 Run Mode Clock Gating Control */
# define SYSCON_RCGCUART_R7 (1 << 7) /* Bit 7: UART Module 7 Run Mode Clock Gating Control */
-/* SSI Run Mode Clock Gating Control*/
+/* SSI Run Mode Clock Gating Control */
#define SYSCON_RCGCSSI(n) (1 << (n)) /* Bit n: SSI Module n Run Mode Clock Gating Control */
# define SYSCON_RCGCSSI_R0 (1 << 0) /* Bit 0: SSI Module 0 Run Mode Clock Gating Control */
@@ -1012,7 +1016,6 @@
#define SYSCON_DCGCEEPROM_D0 (1 << 0) /* Bit 0: EEPROM Module Deep-Sleep Mode Clock Gating Control */
-
/* 32/64-BitWide Timer Deep-Sleep Mode Clock Gating Control */
#define SYSCON_DCGCWTIMER(n) (1 << (n)) /* Bit n: UART Module n Deep-Sleep Mode Clock Gating Control */
@@ -1117,7 +1120,8 @@
# define SYSCON_PRWTIMER_R4 (1 << 4) /* Bit 4: 32/64-Bit Wide General-Purpose Timer 4 Peripheral Ready */
# define SYSCON_PRWTIMER_R5 (1 << 5) /* Bit 5: 32/64-Bit Wide General-Purpose Timer 5 Peripheral Ready */
-/* System Control Legacy Register Bit Definitions *******************************************/
+/* System Control Legacy Register Bit Definitions ***************************/
+
/* Device Capabilities 0 */
#define SYSCON_DC0_FLASHSZ_SHIFT 0 /* Bits 15-0: FLASH Size */
@@ -1506,16 +1510,16 @@
#define TIVA_SYSCON_NVMSTAT_FWB (1 << 0) /* Bit 0: 32 Word Flash Write Buffer Available */
-/********************************************************************************************
+/****************************************************************************
* Public Types
- ********************************************************************************************/
+ ****************************************************************************/
-/********************************************************************************************
+/****************************************************************************
* Public Data
- ********************************************************************************************/
+ ****************************************************************************/
-/********************************************************************************************
- * Public Functions
- ********************************************************************************************/
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_SYSCONTROL_H */
diff --git a/arch/arm/src/tiva/hardware/lm/lm4f_timer.h b/arch/arm/src/tiva/hardware/lm/lm4f_timer.h
index 0400100..1136f72 100644
--- a/arch/arm/src/tiva/hardware/lm/lm4f_timer.h
+++ b/arch/arm/src/tiva/hardware/lm/lm4f_timer.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm4f_timer.h
*
* Originally:
@@ -44,23 +44,23 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_TIMER_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM4F_TIMER_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "hardware/tiva_memorymap.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* GPTM register offsets ************************************************************/
+/* GPTM register offsets ****************************************************/
#define TIVA_TIMER_CFG_OFFSET 0x0000 /* GPTM Configuration */
#define TIVA_TIMER_TAMR_OFFSET 0x0004 /* GPTM Timer A Mode */
@@ -90,7 +90,7 @@
#define TIVA_TIMER_TBPV_OFFSET 0x0068 /* GPTM Timer B Prescale Value */
#define TIVA_TIMER_PP_OFFSET 0x0fc0 /* GPTM Peripheral Properties */
-/* GPTM register addresses **********************************************************/
+/* GPTM register addresses **************************************************/
#if TIVA_NTIMERS > 0
#define TIVA_TIMER0_CFG (TIVA_TIMER0_BASE + TIVA_TIMER_CFG_OFFSET)
@@ -325,7 +325,8 @@
#define TIVA_TIMER7_PP (TIVA_TIMER7_BASE + TIVA_TIMER_PP_OFFSET)
#endif /* TIVA_NTIMERS > 7 */
-/* GPTM register bit definitions ****************************************************/
+/* GPTM register bit definitions ********************************************/
+
/* GPTM Configuration (CFG) */
#define TIMER_CFG_CFG_SHIFT 0 /* Bits 2-0: Configuration */
@@ -341,18 +342,25 @@
# define TIMER_TnMR_TnMR_ONESHOT (1 << TIMER_TnMR_TnMR_SHIFT) /* One-Shot Timer mode */
# define TIMER_TnMR_TnMR_PERIODIC (2 << TIMER_TnMR_TnMR_SHIFT) /* Periodic Timer mode */
# define TIMER_TnMR_TnMR_CAPTURE (3 << TIMER_TnMR_TnMR_SHIFT) /* Capture mode */
+
#define TIMER_TnMR_TnCMR_SHIFT (2) /* Bit 2: Timer A/B Capture Mode */
+
#define TIMER_TnMR_TnCMR (1 << TIMER_TnMR_TnCMR_SHIFT) /* Bit 2: Timer A/B Capture Mode */
# define TIMER_TnMR_TnCMR_EDGECOUNT (0 << TIMER_TnMR_TnCMR_SHIFT) /* Edge-Count mode */
# define TIMER_TnMR_TnCMR_EDGETIME (1 << TIMER_TnMR_TnCMR_SHIFT) /* Edge-Time mode */
+
#define TIMER_TnMR_TnAMS_SHIFT (3) /* Bit 3: Timer A/B Alternate Mode Select */
+
#define TIMER_TnMR_TnAMS (1 << TIMER_TnMR_TnAMS_SHIFT) /* Bit 3: Timer A/B Alternate Mode Select */
# define TIMER_TnMR_TnAMS_CAPTURE (0 << TIMER_TnMR_TnAMS_SHIFT) /* Capture mode is enabled */
# define TIMER_TnMR_TnAMS_PWM (1 << TIMER_TnMR_TnAMS_SHIFT) /* PWM mode is enabled */
+
#define TIMER_TnMR_TnCDIR_SHIFT (4) /* Bit 4: Timer A/B Count Direction */
+
#define TIMER_TnMR_TnCDIR (1 << TIMER_TnMR_TnCDIR_SHIFT) /* Bit 4: Timer A/B Count Direction */
# define TIMER_TnMR_TnCDIR_DOWN (0 << TIMER_TnMR_TnCDIR_SHIFT) /* Timer counts down */
# define TIMER_TnMR_TnCDIR_UP (1 << TIMER_TnMR_TnCDIR_SHIFT) /* Timer counts up (one-shot/periodic modes) */
+
#define TIMER_TnMR_TnMIE (1 << 5) /* Bit 5: Timer A/B Match Interrupt Enable */
#define TIMER_TnMR_TnWOT (1 << 6) /* Bit 6: GPTM Timer A/B Wait-on-Trigger */
#define TIMER_TnMR_TnSNAPS (1 << 7) /* Bit 7: GPTM Timer A/B Snap-Shot Mode */
@@ -370,6 +378,7 @@
# define TIMER_CTL_TAEVENT_POS (0 << TIMER_CTL_TAEVENT_SHIFT) /* Positive edge */
# define TIMER_CTL_TAEVENT_NEG (1 << TIMER_CTL_TAEVENT_SHIFT) /* Negative edge */
# define TIMER_CTL_TAEVENT_BOTH (3 << TIMER_CTL_TAEVENT_SHIFT) /* Both edges */
+
#define TIMER_CTL_RTCEN (1 << 4) /* Bit 4: GPTM RTC Stall Enable */
#define TIMER_CTL_TAOTE (1 << 5) /* Bit 5: GPTM Timer A Output Trigger Enable */
#define TIMER_CTL_TAPWML (1 << 6) /* Bit 6: GPTM Timer A PWM Output Level */
@@ -380,6 +389,7 @@
# define TIMER_CTL_TBEVENT_POS (0 << TIMER_CTL_TBEVENT_SHFIT) /* Positive edge */
# define TIMER_CTL_TBEVENT_NEG (1 << TIMER_CTL_TBEVENT_SHFIT) /* Negative edge */
# define TIMER_CTL_TBEVENT_BOTH (3 << TIMER_CTL_TBEVENT_SHFIT) /* Both edges */
+
#define TIMER_CTL_TBOTE (1 << 13) /* Bit 13: GPTM Timer B Output Trigger Enable */
#define TIMER_CTL_TBPWML (1 << 14) /* Bit 14: GPTM Timer B PWM Output Level */
@@ -528,8 +538,11 @@
#define TIMER_ALLINTS 0x00010f1f
/* GPTM Timer A Interval Load (TAILR) (32-bit value) */
+
/* GPTM Timer B Interval Load (TBILR) (32-bit value) */
+
/* GPTM Timer A Match (TAMATCHR) (32-bit value) */
+
/* GPTM Timer B Match (TBMATCHR) (32-bit value) */
/* GPTM Timer A/B Prescale (TnPR) */
@@ -545,8 +558,11 @@
# define TIMER_TnPMR_TnPSMR(n) ((uint32_t)(n) << TIMER_TnPMR_TnPSMR_SHIFT)
/* GPTM Timer A (TAR) (16/32-bit value) */
+
/* GPTM Timer B (TBR) (16/32-bit value) */
+
/* GPTM Timer A Value (TAV) (16/32-bit value) */
+
/* GPTM Timer B Value (TBV) (16/32-bit value) */
/* GPTM RTC Predivide (RTCPD) */
diff --git a/arch/arm/src/tiva/hardware/lm/lm_i2c.h b/arch/arm/src/tiva/hardware/lm/lm_i2c.h
index 6da3975..0bfdeb2 100644
--- a/arch/arm/src/tiva/hardware/lm/lm_i2c.h
+++ b/arch/arm/src/tiva/hardware/lm/lm_i2c.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm_i2c.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,23 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM_I2C_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM_I2C_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* I2C Register Offsets *************************************************************/
+/* I2C Register Offsets *****************************************************/
/* I2C Master */
@@ -56,7 +56,7 @@
#define TIVA_I2CS_MIS_OFFSET 0x0814 /* I2C Slave Masked Interrupt Status */
#define TIVA_I2CS_ICR_OFFSET 0x0818 /* I2C Slave Interrupt Clear */
-/* I2C Register Addresses ***********************************************************/
+/* I2C Register Addresses ***************************************************/
#if TIVA_NI2C > 0
@@ -318,7 +318,7 @@
#endif /* TIVA_NI2C > 9 */
-/* I2C_Register Bit Definitions *****************************************************/
+/* I2C_Register Bit Definitions *********************************************/
/* I2C Master Slave Address (I2CM_SA) */
@@ -406,13 +406,13 @@
#define I2CS_ICR_DATAIC (1 << 0) /* Bit 0: Data Interrupt Clear */
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
/****************************************************************************
* Public Function Prototypes
diff --git a/arch/arm/src/tiva/hardware/lm/lm_uart.h b/arch/arm/src/tiva/hardware/lm/lm_uart.h
index 9e5f6ef..2b60e03 100644
--- a/arch/arm/src/tiva/hardware/lm/lm_uart.h
+++ b/arch/arm/src/tiva/hardware/lm/lm_uart.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/lm/lm_uart.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,23 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM_UART_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM_UART_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/chip/chip.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* UART register offsets ************************************************************/
+/* UART register offsets ****************************************************/
#define TIVA_UART_DR_OFFSET 0x0000 /* UART Data */
#define TIVA_UART_RSR_OFFSET 0x0004 /* UART Receive Status */
@@ -62,7 +62,7 @@
#define TIVA_UART_PCELLID2_OFFSET 0x0ff8 /* UART PrimeCell Identification 2 */
#define TIVA_UART_PCELLID3_OFFSET 0x0ffc /* UART PrimeCell Identification 3 */
-/* UART register addresses **********************************************************/
+/* UART register addresses **************************************************/
#define TIVA_UART_BASE(n) (TIVA_UART0_BASE + (n)*0x01000)
@@ -334,7 +334,7 @@
# define TIVA_UART7_PCELLID3 (TIVA_UART7_BASE + TIVA_UART_PCELLID3_OFFSET)
#endif
-/* UART register bit settings *******************************************************/
+/* UART register bit settings ***********************************************/
/* UART Data (DR) */
@@ -511,12 +511,12 @@
#define UART_CELLID3_MASK (0xff) /* UART PrimeCell ID Register[31:24] */
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_LM_LM_UART_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_adc.h b/arch/arm/src/tiva/hardware/tiva_adc.h
index 1e92ce7..78836b7 100644
--- a/arch/arm/src/tiva/hardware/tiva_adc.h
+++ b/arch/arm/src/tiva/hardware/tiva_adc.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_adc.h
*
* Copyright (C) 2015 Calvin Maguranis. All rights reserved.
@@ -31,22 +31,22 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* ADC register offsets *************************************************************/
+/* ADC register offsets *****************************************************/
#define TIVA_ADC_ACTSS_OFFSET 0x000 /* ADC Active Sample Sequencer */
#define TIVA_ADC_RIS_OFFSET 0x004 /* ADC Raw Interrupt Status */
@@ -96,7 +96,7 @@
#define TIVA_ADC_PC_OFFSET 0xfc4 /* ADC Peripheral Configuration */
#define TIVA_ADC_CC_OFFSET 0xfc8 /* ADC Clock Configuration */
-/* ADC register addresses ***********************************************************/
+/* ADC register addresses ***************************************************/
#define TIVA_ADC_BASE(n) (TIVA_ADC0_BASE + (n)*0x01000)
#define TIVA_ADC_SS(n) (TIVA_ADC_SS_BASE + ((n)*TIVA_ADC_SSMUX_OFFSET))
@@ -144,7 +144,7 @@
#define TIVA_ADC_DCCMP6(n) (TIVA_ADC_BASE(n)+TIVA_ADC_DCCMP6_OFFSET) /* ADC Digital Comparator Range 6 */
#define TIVA_ADC_DCCMP7(n) (TIVA_ADC_BASE(n)+TIVA_ADC_DCCMP7_OFFSET) /* ADC Digital Comparator Range 7 */
-/* ADC register address expansion ***************************************************/
+/* ADC register address expansion *******************************************/
#define TIVA_ADC0_ACTSS (TIVA_ADC_BASE(0) + TIVA_ADC_ACTSS_OFFSET) /* ADC Active Sample Sequencer */
#define TIVA_ADC0_RIS (TIVA_ADC_BASE(0) + TIVA_ADC_RIS_OFFSET) /* ADC Raw Interrupt Status */
@@ -286,7 +286,7 @@
#define TIVA_ADC1_DCCMP6 (TIVA_ADC_BASE(1) + TIVA_ADC_DCCMP6_OFFSET) /* ADC Digital Comparator Range 6 */
#define TIVA_ADC1_DCCMP7 (TIVA_ADC_BASE(1) + TIVA_ADC_DCCMP7_OFFSET) /* ADC Digital Comparator Range 7 */
-/* ADC register bit settings ********************************************************/
+/* ADC register bit settings ************************************************/
/* Bit fields in the TIVA_ADC_ACTSS register. */
diff --git a/arch/arm/src/tiva/hardware/tiva_adi2_refsys.h b/arch/arm/src/tiva/hardware/tiva_adi2_refsys.h
index 127b8b2..01c0b82 100644
--- a/arch/arm/src/tiva/hardware/tiva_adi2_refsys.h
+++ b/arch/arm/src/tiva/hardware/tiva_adi2_refsys.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_adi2_refsys.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI2_REFSYS_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI2_REFSYS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
/* These architectures do not support the ADI2 REFSYS block */
@@ -39,20 +41,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink ADI2 REFSYS"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI2_REFSYS_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_adi3_refsys.h b/arch/arm/src/tiva/hardware/tiva_adi3_refsys.h
index 597033b..aec15b0 100644
--- a/arch/arm/src/tiva/hardware/tiva_adi3_refsys.h
+++ b/arch/arm/src/tiva/hardware/tiva_adi3_refsys.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_adi3_refsys.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI3_REFSYS_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI3_REFSYS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the ADI3 REFSYS block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_adi3_refsys.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink ADI3 REFSYS"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI3_REFSYS_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_adi4_aux.h b/arch/arm/src/tiva/hardware/tiva_adi4_aux.h
index 7b4c0ca..73ec316 100644
--- a/arch/arm/src/tiva/hardware/tiva_adi4_aux.h
+++ b/arch/arm/src/tiva/hardware/tiva_adi4_aux.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_adi4_aux.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI4_AUX_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI4_AUX_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the ADI4 AUX block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_adi4_aux.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink ADI4 AUX"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADI4_AUX_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_batmon.h b/arch/arm/src/tiva/hardware/tiva_aon_batmon.h
index d30c148..e26dec9 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_batmon.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_batmon.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_batmon.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_BATMON_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_BATMON_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the AON BATMON block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_aon_batmon.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink AON BATMON"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_BATMON_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_ioc.h b/arch/arm/src/tiva/hardware/tiva_aon_ioc.h
index e61c84c..46ab7e1 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_ioc.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_ioc.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_ioc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_IOC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_IOC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the AON IOC block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_aon_ioc.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink AON IOC"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_IOC_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_pmctl.h b/arch/arm/src/tiva/hardware/tiva_aon_pmctl.h
index dd3507b..1efc776 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_pmctl.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_pmctl.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_pmctl.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,42 +16,45 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_PMCTL_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_PMCTL_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C) || \
defined(CONFIG_ARCH_CHIP_CC13X0)
- /* These architectures do not support the AON PMCTL block */
+
+/* These architectures do not support the AON PMCTL block */
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
# include "hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_pmctl.h"
#else
# error "Unsupported Tiva/Stellaris/SimpleLink AON PMCTL"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_PMCTL_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_rtc.h b/arch/arm/src/tiva/hardware/tiva_aon_rtc.h
index 3f80a8e..b25342d 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_rtc.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_rtc.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_rtc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_RTC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_RTC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the AON RTC block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_aon_rtc.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink AON RTC"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_RTC_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_sysctl.h b/arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
index 0fcd725..2be3775 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,21 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_SYSCTL_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_SYSCTL_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C) || \
defined(CONFIG_ARCH_CHIP_CC13X2)
+
/* These architectures do not support the AON SYSCTL block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_aon_sysctl.h"
@@ -38,20 +41,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink AON SYSCTL"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_SYSCTL_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aon_wuc.h b/arch/arm/src/tiva/hardware/tiva_aon_wuc.h
index a9c8988..df1af7b 100644
--- a/arch/arm/src/tiva/hardware/tiva_aon_wuc.h
+++ b/arch/arm/src/tiva/hardware/tiva_aon_wuc.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aon_wuc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_WUC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_WUC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C) || \
defined(CONFIG_ARCH_CHIP_CC13X2)
@@ -38,20 +40,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink AON WUC"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_WUC_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aux_smph.h b/arch/arm/src/tiva/hardware/tiva_aux_smph.h
index 8ac5788..1651fd8 100644
--- a/arch/arm/src/tiva/hardware/tiva_aux_smph.h
+++ b/arch/arm/src/tiva/hardware/tiva_aux_smph.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aux_smph.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SMPH_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SMPH_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the AUX SMPH block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_aux_smph.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink AUX SMPH"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SMPH_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aux_sysif.h b/arch/arm/src/tiva/hardware/tiva_aux_sysif.h
index aa3e767..7baf964 100644
--- a/arch/arm/src/tiva/hardware/tiva_aux_sysif.h
+++ b/arch/arm/src/tiva/hardware/tiva_aux_sysif.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aux_sysif.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,21 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SYSIF_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SYSIF_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C) || \
defined(CONFIG_ARCH_CHIP_CC13X0)
+
/* These architectures do not support the AUX SYSIF block */
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
# include "hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_sysif.h"
@@ -38,20 +41,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink AUX SYSIF"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SYSIF_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_aux_wuc.h b/arch/arm/src/tiva/hardware/tiva_aux_wuc.h
index 5a81cab..6cdc5eb 100644
--- a/arch/arm/src/tiva/hardware/tiva_aux_wuc.h
+++ b/arch/arm/src/tiva/hardware/tiva_aux_wuc.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_aux_wuc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_WUC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_WUC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C) || \
defined(CONFIG_ARCH_CHIP_CC13X2)
@@ -38,20 +40,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink AUX WUC"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_WUC_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_ccfg.h b/arch/arm/src/tiva/hardware/tiva_ccfg.h
index 27ccd94..41ec789 100644
--- a/arch/arm/src/tiva/hardware/tiva_ccfg.h
+++ b/arch/arm/src/tiva/hardware/tiva_ccfg.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_ccfg.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,21 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_CCFG_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_CCFG_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
- /* These architectures do not support the CCFG block */
+
+/* These architectures do not support the CCFG block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_ccfg.h"
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink CCFG"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_CCFG_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_ddi.h b/arch/arm/src/tiva/hardware/tiva_ddi.h
index e2efb94..e715ae9 100644
--- a/arch/arm/src/tiva/hardware/tiva_ddi.h
+++ b/arch/arm/src/tiva/hardware/tiva_ddi.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_ddi.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_DDI_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_DDI_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the DDI block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_ddi.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink DDI"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_DDI_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_ddi0_osc.h b/arch/arm/src/tiva/hardware/tiva_ddi0_osc.h
index 9ae278e..c607adf 100644
--- a/arch/arm/src/tiva/hardware/tiva_ddi0_osc.h
+++ b/arch/arm/src/tiva/hardware/tiva_ddi0_osc.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_ddi0_osc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_DDI0_OSC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_DDI0_OSC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the DDI0_OSC block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_ddi0_osc.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink DDI0_OSC"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_DDI0_OSC_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_eeprom.h b/arch/arm/src/tiva/hardware/tiva_eeprom.h
index 333fb60..4c6a1e0 100644
--- a/arch/arm/src/tiva/hardware/tiva_eeprom.h
+++ b/arch/arm/src/tiva/hardware/tiva_eeprom.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_eeprom.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
@@ -32,16 +32,16 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_EEPROM_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_EEPROM_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/* Register Offsets *****************************************************************/
+/* Register Offsets *********************************************************/
#define TIVA_EEPROM_EESIZE_OFFSET 0x0000 /* EEPROM Size Information */
#define TIVA_EEPROM_EEBLOCK_OFFSET 0x0004 /* EEPROM Current Block */
@@ -63,7 +63,7 @@
#define TIVA_EEPROM_EEDBGME_OFFSET 0x0080 /* EEPROM Debug Mass Erase */
#define TIVA_EEPROM_PP_OFFSET 0x0fc0 /* EEPROM Peripheral Properties */
-/* Register Addresses ***************************************************************/
+/* Register Addresses *******************************************************/
#define TIVA_EEPROM_EESIZE (TIVA_EEPROM_BASE + TIVA_EEPROM_EESIZE_OFFSET)
#define TIVA_EEPROM_EEBLOCK (TIVA_EEPROM_BASE + TIVA_EEPROM_EEBLOCK_OFFSET)
@@ -85,36 +85,48 @@
#define TIVA_EEPROM_EEDBGME (TIVA_EEPROM_BASE + TIVA_EEPROM_EEDBGME_OFFSET)
#define TIVA_EEPROM_PP (TIVA_EEPROM_BASE + TIVA_EEPROM_PP_OFFSET)
-/* Register Bit-Field Definitions ***************************************************/
+/* Register Bit-Field Definitions *******************************************/
-/* The following are defines for the bit fields in the EEPROM_EESIZE register. */
+/* The following are defines for the bit fields in the EEPROM_EESIZE
+ * register.
+ */
#define EEPROM_EESIZE_WORDCNT_M 0x0000ffff /* Number of 32-Bit Words */
#define EEPROM_EESIZE_BLKCNT_M 0x07ff0000 /* Number of 16-Word Blocks */
#define EEPROM_EESIZE_WORDCNT_S 0
#define EEPROM_EESIZE_BLKCNT_S 16
-/* The following are defines for the bit fields in the EEPROM_EEBLOCK register. */
+/* The following are defines for the bit fields in the EEPROM_EEBLOCK
+ * register.
+ */
#define EEPROM_EEBLOCK_BLOCK_M 0x0000ffff /* Current Block */
#define EEPROM_EEBLOCK_BLOCK_S 0
-/* The following are defines for the bit fields in the EEPROM_EEOFFSET register. */
+/* The following are defines for the bit fields in the EEPROM_EEOFFSET
+ * register.
+ */
#define EEPROM_EEOFFSET_OFFSET_M 0x0000000f /* Current Address Offset */
#define EEPROM_EEOFFSET_OFFSET_S 0
-/* The following are defines for the bit fields in the EEPROM_EERDWR register. */
+/* The following are defines for the bit fields in the EEPROM_EERDWR
+ * register.
+ */
#define EEPROM_EERDWR_VALUE_M 0xffffffff /* EEPROM Read or Write Data */
#define EEPROM_EERDWR_VALUE_S 0
-/* The following are defines for the bit fields in the EEPROM_EERDWRINC register. */
+/* The following are defines for the bit fields in the EEPROM_EERDWRINC
+ * register.
+ */
#define EEPROM_EERDWRINC_VALUE_M 0xffffffff /* EEPROM Read or Write Data with Increment */
#define EEPROM_EERDWRINC_VALUE_S 0
-/* The following are defines for the bit fields in the EEPROM_EEDONE register. */
+/* The following are defines for the bit fields in the EEPROM_EEDONE
+ * register.
+ */
#define EEPROM_EEDONE_WORKING 0x00000001 /* EEPROM Working */
#define EEPROM_EEDONE_WKERASE 0x00000004 /* Working on an Erase */
@@ -122,16 +134,22 @@
#define EEPROM_EEDONE_NOPERM 0x00000010 /* Write Without Permission */
#define EEPROM_EEDONE_WRBUSY 0x00000020 /* Write Busy */
-/* The following are defines for the bit fields in the EEPROM_EESUPP register. */
+/* The following are defines for the bit fields in the EEPROM_EESUPP
+ * register.
+ */
#define EEPROM_EESUPP_ERETRY 0x00000004 /* Erase Must Be Retried */
#define EEPROM_EESUPP_PRETRY 0x00000008 /* Programming Must Be Retried */
-/* The following are defines for the bit fields in the EEPROM_EEUNLOCK register. */
+/* The following are defines for the bit fields in the EEPROM_EEUNLOCK
+ * register.
+ */
#define EEPROM_EEUNLOCK_UNLOCK_M 0xffffffff /* EEPROM Unlock */
-/* The following are defines for the bit fields in the EEPROM_EEPROT register. */
+/* The following are defines for the bit fields in the EEPROM_EEPROT
+ * register.
+ */
#define EEPROM_EEPROT_PROT_M 0x00000007 /* Protection Control */
#define EEPROM_EEPROT_PROT_RWNPW 0x00000000 /* This setting is the default. If
@@ -145,48 +163,68 @@
* block is readable, not writable */
#define EEPROM_EEPROT_ACC 0x00000008 /* Access Control */
-/* The following are defines for the bit fields in the EEPROM_EEPASS0 register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEPASS0 register.
+ */
#define EEPROM_EEPASS0_PASS_M 0xffffffff /* Password */
#define EEPROM_EEPASS0_PASS_S 0
-/* The following are defines for the bit fields in the EEPROM_EEPASS1 register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEPASS1 register.
+ */
#define EEPROM_EEPASS1_PASS_M 0xffffffff /* Password */
#define EEPROM_EEPASS1_PASS_S 0
-/* The following are defines for the bit fields in the EEPROM_EEPASS2 register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEPASS2 register.
+ */
#define EEPROM_EEPASS2_PASS_M 0xffffffff /* Password */
#define EEPROM_EEPASS2_PASS_S 0
-/* The following are defines for the bit fields in the EEPROM_EEINT register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEINT register.
+ */
#define EEPROM_EEINT_INT 0x00000001 /* Interrupt Enable */
-/* The following are defines for the bit fields in the EEPROM_EEHIDE0 register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEHIDE0 register.
+ */
#define EEPROM_EEHIDE0_HN_M 0xfffffffe /* Hide Block */
-/* The following are defines for the bit fields in the EEPROM_EEHIDE register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEHIDE register.
+ */
#define EEPROM_EEHIDE_HN_M 0xfffffffe /* Hide Block */
-/* The following are defines for the bit fields in the EEPROM_EEHIDE1 register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEHIDE1 register.
+ */
#define EEPROM_EEHIDE1_HN_M 0xffffffff /* Hide Block */
-/* The following are defines for the bit fields in the EEPROM_EEHIDE2 register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEHIDE2 register.
+ */
#define EEPROM_EEHIDE2_HN_M 0xffffffff /* Hide Block */
-/* The following are defines for the bit fields in the EEPROM_EEDBGME register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_EEDBGME register.
+ */
#define EEPROM_EEDBGME_ME 0x00000001 /* Mass Erase */
#define EEPROM_EEDBGME_KEY_M 0xffff0000 /* Erase Key */
#define EEPROM_EEDBGME_KEY_S 16
-/* The following are defines for the bit fields in the EEPROM_PP register. */
+/* The following are defines for the bit fields in the
+ * EEPROM_PP register.
+ */
#define EEPROM_PP_SIZE_M 0x0000ffff /* EEPROM Size */
#define EEPROM_PP_SIZE_64 0x00000000 /* 64 bytes of EEPROM */
diff --git a/arch/arm/src/tiva/hardware/tiva_epi.h b/arch/arm/src/tiva/hardware/tiva_epi.h
index 958bce9..0c84263 100644
--- a/arch/arm/src/tiva/hardware/tiva_epi.h
+++ b/arch/arm/src/tiva/hardware/tiva_epi.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_epi.h
*
* Copyright (C) 2009-2013 Max Neklyudov. All rights reserved.
@@ -31,20 +31,20 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_EPI_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_EPI_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* External Peripheral Interface Register Offsets ***********************************/
+/* External Peripheral Interface Register Offsets ***************************/
#define TIVA_EPI_CFG_OFFSET 0x000
#define TIVA_EPI_SDRAMCFG_OFFSET 0x010
@@ -52,7 +52,7 @@
#define TIVA_EPI_STAT_OFFSET 0x060
#define TIVA_EPI_BAUD_OFFSET 0x004
-/* External Peripheral Interface Register Addresses *********************************/
+/* External Peripheral Interface Register Addresses *************************/
#define TIVA_EPI0_CFG (TIVA_EPI0_BASE + TIVA_EPI_CFG_OFFSET)
#define TIVA_EPI0_SDRAMCFG (TIVA_EPI0_BASE + TIVA_EPI_SDRAMCFG_OFFSET)
@@ -60,7 +60,7 @@
#define TIVA_EPI0_STAT (TIVA_EPI0_BASE + TIVA_EPI_STAT_OFFSET)
#define TIVA_EPI0_BAUD (TIVA_EPI0_BASE + TIVA_EPI_BAUD_OFFSET)
-/* External Peripheral Interface Register Bit Definitions ***************************/
+/* External Peripheral Interface Register Bit Definitions *******************/
/* EPI Configuration (EPICFG), offset 0x000 */
diff --git a/arch/arm/src/tiva/hardware/tiva_ethernet.h b/arch/arm/src/tiva/hardware/tiva_ethernet.h
index 649bd9f..65a4d4c 100644
--- a/arch/arm/src/tiva/hardware/tiva_ethernet.h
+++ b/arch/arm/src/tiva/hardware/tiva_ethernet.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_ethernet.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ETHERNET_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ETHERNET_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
diff --git a/arch/arm/src/tiva/hardware/tiva_fcfg1.h b/arch/arm/src/tiva/hardware/tiva_fcfg1.h
index 51baaee..582dbda 100644
--- a/arch/arm/src/tiva/hardware/tiva_fcfg1.h
+++ b/arch/arm/src/tiva/hardware/tiva_fcfg1.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_fcfg1.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_FCFG1_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_FCFG1_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
/* These architectures do not support the FCFG1 block */
@@ -39,20 +41,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink FCFG1"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_FCFG1_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_flash.h b/arch/arm/src/tiva/hardware/tiva_flash.h
index be18249..97c5ec8 100644
--- a/arch/arm/src/tiva/hardware/tiva_flash.h
+++ b/arch/arm/src/tiva/hardware/tiva_flash.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_flash.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,21 +16,21 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_FLASH_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_FLASH_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
-/* The TM4C129 family has a different FLASH register layout. Others (including LM4F
- * and TM4C123) are similar to the LM3S family
+/* The TM4C129 family has a different FLASH register layout.
+ * Others (including LM4F and TM4C123) are similar to the LM3S family
*/
# if defined(CONFIG_ARCH_CHIP_TM4C129)
diff --git a/arch/arm/src/tiva/hardware/tiva_gpio.h b/arch/arm/src/tiva/hardware/tiva_gpio.h
index 016c5e8..629c358 100644
--- a/arch/arm/src/tiva/hardware/tiva_gpio.h
+++ b/arch/arm/src/tiva/hardware/tiva_gpio.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_gpio.h
*
* Copyright (C) 2009-2010, 2013, 2018 Gregory Nutt. All rights reserved.
@@ -32,18 +32,20 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_GPIO_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_GPIO_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the GPIO header file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the GPIO header file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM3S)
# include "hardware/lm/lm3s_gpio.h"
@@ -61,20 +63,20 @@
# error "Unsupported Tiva/Stellaris system GPIO"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_GPIO_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_i2c.h b/arch/arm/src/tiva/hardware/tiva_i2c.h
index 3d613e8..ea1a906 100644
--- a/arch/arm/src/tiva/hardware/tiva_i2c.h
+++ b/arch/arm/src/tiva/hardware/tiva_i2c.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_i2c.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_I2C_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_I2C_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the I2C header file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the I2C header file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM)
# include "hardware/lm/lm_i2c.h"
@@ -43,20 +45,20 @@
# error "Unsupported Tiva/Stellaris system I2C"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_I2C_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_ioc.h b/arch/arm/src/tiva/hardware/tiva_ioc.h
index 919d508..1685327 100644
--- a/arch/arm/src/tiva/hardware/tiva_ioc.h
+++ b/arch/arm/src/tiva/hardware/tiva_ioc.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_ioc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_IOC_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_IOC_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
+
/* These architectures do not support the IOC block */
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_ioc.h"
@@ -39,20 +42,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink IOC"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_IOC_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_memorymap.h b/arch/arm/src/tiva/hardware/tiva_memorymap.h
index 5c6876c..6317803 100644
--- a/arch/arm/src/tiva/hardware/tiva_memorymap.h
+++ b/arch/arm/src/tiva/hardware/tiva_memorymap.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_MEMORYMAP_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_MEMORYMAP_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the memory map file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the memory map file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM3S)
# include "hardware/lm/lm3s_memorymap.h"
@@ -43,20 +45,20 @@
# error "Unsupported Tiva/Stellaris memory map"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_MEMORYMAP_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_pinmap.h b/arch/arm/src/tiva/hardware/tiva_pinmap.h
index dad210f..54a3328 100644
--- a/arch/arm/src/tiva/hardware/tiva_pinmap.h
+++ b/arch/arm/src/tiva/hardware/tiva_pinmap.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_pinmap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_PINMAP_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_PINMAP_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM3S)
# include "hardware/lm/lm3s_pinmap.h"
@@ -36,25 +38,26 @@
#elif defined(CONFIG_ARCH_CHIP_TM4C)
# include "hardware/tm4c/tm4c_pinmap.h"
#elif defined(CONFIG_ARCH_CHIP_CC13X0) || defined(CONFIG_ARCH_CHIP_CC13X2)
+
/* There are no pin multiplex header files for these architectures */
#else
# error "Unsupported Tiva/Stellaris/SimpleLink PIN mapping"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_PINMAP_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_prcm.h b/arch/arm/src/tiva/hardware/tiva_prcm.h
index 48085c3..0ca46c9 100644
--- a/arch/arm/src/tiva/hardware/tiva_prcm.h
+++ b/arch/arm/src/tiva/hardware/tiva_prcm.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/tiva/hardware/tiva_prcm.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_PRCM_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_PRCM_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
+/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink
+ * chip
+ */
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
/* These architectures do not support the PRCM block */
@@ -39,20 +41,20 @@
# error "Unsupported Tiva/Stellaris/SimpleLink PRCM"
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_PRCM_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_pwm.h b/arch/arm/src/tiva/hardware/tiva_pwm.h
index 4faee6e..9540c5d 100644
... 3111 lines suppressed ...
[incubator-nuttx] 03/03: arch: arm: tiva: fix Mixed case identifier
errors
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 5239764f676061f4fab9708a9a9f383596b93096
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 19:55:08 2021 +0100
arch: arm: tiva: fix Mixed case identifier errors
fix nxstyle error for Mixed Case Identifier
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/arm/arm.h | 100 +++++++++------
arch/arm/src/arm/pg_macros.h | 159 ++++++++++++------------
arch/arm/src/tiva/cc13xx/cc13x0_rom.c | 60 ++++-----
arch/arm/src/tiva/cc13xx/cc13x0_trim.c | 6 +-
arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h | 2 +-
arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c | 6 +-
arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c | 22 ++--
arch/arm/src/tiva/common/tiva_pwm.c | 64 +++++-----
arch/arm/src/tiva/common/tiva_timerlib.c | 36 +++---
arch/arm/src/tiva/hardware/lm/lm3s_timer.h | 26 ++--
arch/arm/src/tiva/hardware/tiva_pwm.h | 66 +++++-----
arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h | 64 +++++-----
arch/arm/src/tiva/tiva_chipinfo.h | 18 +--
13 files changed, 328 insertions(+), 301 deletions(-)
diff --git a/arch/arm/src/arm/arm.h b/arch/arm/src/arm/arm.h
index 29b3a0a..c68ab6e 100644
--- a/arch/arm/src/arm/arm.h
+++ b/arch/arm/src/arm/arm.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/arm/arm.h
*
* Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
@@ -31,20 +31,20 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARM_H
#define __ARCH_ARM_SRC_COMMON_ARM_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* ARM9EJS **************************************************************************/
+/* ARM9EJS ******************************************************************/
/* PSR bits */
@@ -146,6 +146,7 @@
/* Level 1 Section Descriptor. Section descriptors allow fast, single
* level mapping between 1Mb address regions.
*/
+
/* Bits 1:0: Type of mapping */
#define PMD_SECT_BUFFERABLE 0x00000004 /* Bit 2: 1=bufferable */
#define PMD_SECT_CACHEABLE 0x00000008 /* Bit 3: 1=cacheable */
@@ -171,32 +172,44 @@
/* Level 1 Coarse Table Descriptor. Coarse Table Descriptors support
* two level mapping between 16Kb memory regions.
*/
- /* Bits 1:0: Type of mapping */
- /* Bits 3:2: Should be zero */
- /* Bit 4: Common, must be one */
- /* Bits 8:5: Common domain control */
- /* Bits 9: Should be zero */
+
+ /* Bits 1:0: Type of mapping */
+
+ /* Bits 3:2: Should be zero */
+
+ /* Bit 4: Common, must be one */
+
+ /* Bits 8:5: Common domain control */
+
+ /* Bits 9: Should be zero */
+
#define PMD_COARSE_TEX_MASK 0xfffffc00 /* Bits 31:10: v5, Physical page */
/* Level 1 Fine Table Descriptor. Coarse Table Descriptors support
* two level mapping between 4Kb memory regions.
*/
- /* Bits 1:0: Type of mapping */
- /* Bits 3:2: Should be zero */
- /* Bit 4: Common, must be one */
- /* Bits 8:5: Common domain control */
- /* Bits 11:9: Should be zero */
+ /* Bits 1:0: Type of mapping */
+
+ /* Bits 3:2: Should be zero */
+
+ /* Bit 4: Common, must be one */
+
+ /* Bits 8:5: Common domain control */
+
+ /* Bits 11:9: Should be zero */
+
#define PMD_FINE_TEX_MASK 0xfffff000 /* Bits 31:12: v5, Physical page */
-/* Level 2 Table Descriptor (PTE). A section descriptor provides the base address
- * of a 1MB block of memory. The page table descriptors provide the base address of
- * a page table that contains second-level descriptors. There are two sizes of page
- * table:
+/* Level 2 Table Descriptor (PTE).
+ * A section descriptor provides the base address of a 1MB block of memory.
+ * The page table descriptors provide the base address of a page table that
+ * contains second-level descriptors.
+ * There are two sizes of page table:
* - Coarse page tables have 256 entries, splitting the 1MB that the table
* describes into 4KB blocks
- * - Fine/tiny page tables have 1024 entries, splitting the 1MB that the table
- * describes into 1KB blocks.
+ * - Fine/tiny page tables have 1024 entries, splitting the 1MB that the
+ * table describes into 1KB blocks.
*
* The following definitions apply to all L2 tables:
*/
@@ -211,8 +224,11 @@
/* Bits 31:4: Depend on type */
/* Large page -- 64Kb */
- /* Bits: 1:0: Type of mapping */
- /* Bits: 3:2: Bufferable/cacheable */
+
+ /* Bits: 1:0: Type of mapping */
+
+ /* Bits: 3:2: Bufferable/cacheable */
+
#define PTE_LARGE_AP_MASK (0xff << 4) /* Bits 11:4 Access permissions */
#define PTE_LARGE_AP_UNO_SRO (0x00 << 4)
#define PTE_LARGE_AP_UNO_SRW (0x55 << 4)
@@ -223,8 +239,10 @@
/* Small page -- 4Kb */
- /* Bits: 1:0: Type of mapping */
- /* Bits: 3:2: Bufferable/cacheable */
+ /* Bits: 1:0: Type of mapping */
+
+ /* Bits: 3:2: Bufferable/cacheable */
+
#define PTE_SMALL_AP_MASK (0xff << 4) /* Bits: 11:4: Access permissions */
#define PTE_SMALL_AP_UNO_SRO (0x00 << 4)
#define PTE_SMALL_AP_UNO_SRW (0x55 << 4)
@@ -236,8 +254,10 @@
/* Fine/Tiny page -- 1Kb */
- /* Bits: 1:0: Type of mapping */
- /* Bits: 3:2: Bufferable/cacheable */
+ /* Bits: 1:0: Type of mapping */
+
+ /* Bits: 3:2: Bufferable/cacheable */
+
#define PTE_EXT_AP_MASK (3 << 4) /* Bits: 5:4: Access persions */
#define PTE_EXT_AP_UNO_SRO (0 << 4)
#define PTE_EXT_AP_UNO_SRW (1 << 4)
@@ -266,18 +286,19 @@
#define SECTION_SIZE (1 << 20) /* 1Mb */
-/* CP15 register c2 contains a pointer to the base address of a paged table in
- * physical memory. Only bits 14-31 of the page table address is retained there;
- * The full 30-bit address is formed by ORing in bits 2-13 or the virtual address
- * (MVA). As a consequence, the page table must be aligned to a 16Kb address in
- * physical memory and could require up to 16Kb of memory.
+/* CP15 register c2 contains a pointer to the base address of a paged table
+ * in physical memory.
+ * Only bits 14-31 of the page table address is retained there;
+ * The full 30-bit address is formed by ORing in bits 2-13 or the virtual
+ * address (MVA). As a consequence, the page table must be aligned to a 16Kb
+ * address in physical memory and could require up to 16Kb of memory.
*/
#define PGTABLE_SIZE 0x00004000
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
@@ -288,7 +309,7 @@ static inline unsigned int get_cp15c1(void)
unsigned int retval;
__asm__ __volatile__
(
- "\tmrc p15, 0, %0, c1, c0"
+ "\tmrc p15, 0, %0, c1, c0"
: "=r" (retval)
:
: "memory");
@@ -302,12 +323,13 @@ static inline unsigned int get_cp15c2(void)
unsigned int retval;
__asm__ __volatile__
(
- "\tmrc p15, 0, %0, c2, c0"
+ "\tmrc p15, 0, %0, c2, c0"
: "=r" (retval)
:
: "memory");
return retval;
}
+
/* Get the current value of the CP15 C3 domain access register */
static inline unsigned int get_cp15c3(void)
@@ -315,7 +337,7 @@ static inline unsigned int get_cp15c3(void)
unsigned int retval;
__asm__ __volatile__
(
- "\tmrc p15, 0, %0, c3, c0"
+ "\tmrc p15, 0, %0, c3, c0"
: "=r" (retval)
:
: "memory");
diff --git a/arch/arm/src/arm/pg_macros.h b/arch/arm/src/arm/pg_macros.h
index 2cf8702..6d5d4b2 100644
--- a/arch/arm/src/arm/pg_macros.h
+++ b/arch/arm/src/arm/pg_macros.h
@@ -78,9 +78,9 @@
#ifndef PGTABLE_BASE_VADDR
# define PGTABLE_BASE_VADDR (PG_LOCKED_VBASE + PG_TEXT_VSIZE + PG_DATA_SIZE)
- /* Virtual base of the address of the L2 page tables need to recalculates
- * using this new virtual base address of the L2 page table.
- */
+/* Virtual base of the address of the L2 page tables need to recalculates
+ * using this new virtual base address of the L2 page table.
+ */
# undef PGTABLE_L2_FINE_VBASE
# define PGTABLE_L2_FINE_VBASE (PGTABLE_BASE_VADDR+PGTABLE_L2_FINE_OFFSET)
@@ -97,20 +97,20 @@
#if CONFIG_PAGING_PAGESIZE == 1024
- /* Base of the L2 page table (aligned to 4Kb byte boundaries) */
+/* Base of the L2 page table (aligned to 4Kb byte boundaries) */
# define PGTABLE_L2_BASE_PADDR PGTABLE_L2_FINE_PBASE
# define PGTABLE_L2_BASE_VADDR PGTABLE_L2_FINE_VBASE
- /* Number of pages in an L2 table per L1 entry */
+/* Number of pages in an L2 table per L1 entry */
# define PTE_NPAGES PTE_TINY_NPAGES
- /* Mask to get the page table physical address from an L1 entry */
+/* Mask to get the page table physical address from an L1 entry */
# define PG_L1_PADDRMASK PMD_FINE_TEX_MASK
- /* MMU Flags for each memory region */
+/* MMU Flags for each memory region */
# define MMU_L1_TEXTFLAGS (PMD_TYPE_FINE|PMD_BIT4)
# define MMU_L2_TEXTFLAGS (PTE_TYPE_TINY|PTE_EXT_AP_UNO_SRO|PTE_CACHEABLE)
@@ -125,20 +125,20 @@
#elif CONFIG_PAGING_PAGESIZE == 4096
- /* Base of the L2 page table (aligned to 1Kb byte boundaries) */
+/* Base of the L2 page table (aligned to 1Kb byte boundaries) */
# define PGTABLE_L2_BASE_PADDR PGTABLE_L2_COARSE_PBASE
# define PGTABLE_L2_BASE_VADDR PGTABLE_L2_COARSE_VBASE
- /* Number of pages in an L2 table per L1 entry */
+/* Number of pages in an L2 table per L1 entry */
# define PTE_NPAGES PTE_SMALL_NPAGES
- /* Mask to get the page table physical address from an L1 entry */
+/* Mask to get the page table physical address from an L1 entry */
# define PG_L1_PADDRMASK PMD_COARSE_TEX_MASK
- /* MMU Flags for each memory region. */
+/* MMU Flags for each memory region. */
# define MMU_L1_TEXTFLAGS (PMD_TYPE_COARSE|PMD_BIT4)
# define MMU_L2_TEXTFLAGS (PTE_TYPE_SMALL|PTE_SMALL_AP_UNO_SRO|PTE_CACHEABLE)
@@ -226,9 +226,9 @@
/* Vector Mapping ***********************************************************/
/* One page is required to map the vector table. The vector table could lie
- * at virtual address zero (or at the start of RAM which is aliased to address
- * zero on the ea3131) or at virtual address 0xfff00000. We only have logic
- * here to support the former case.
+ * at virtual address zero (or at the start of RAM which is aliased to
+ * address zero on the ea3131) or at virtual address 0xfff00000.
+ * We only have logic here to support the former case.
*
* NOTE: If the vectors are at address zero, the page table will be
* forced to the highest RAM addresses. If the vectors are at 0xfff0000,
@@ -271,7 +271,9 @@
# define PG_L2_VECT_PADDR (PGTABLE_L2_BASE_PADDR + PG_L2_VECT_OFFSET)
# define PG_L2_VECT_VADDR (PGTABLE_L2_BASE_VADDR + PG_L2_VECT_OFFSET)
-/* Case 3: High vectors or the locked region is not at the beginning or SRAM */
+/* Case 3:
+ * High vectors or the locked region is not at the beginning or SRAM
+ */
#else
# error "Logic missing for high vectors in this case"
@@ -334,7 +336,7 @@
* (virtual)address of the backing page memory.
*
* These are used as follows: If a miss occurs at some virtual address, va,
- * A new page index, ndx, is allocated. PG_POOL_PGPADDR(i) converts the index
+ * A new page index, ndx, is allocated. PG_POOL_PGPADDR(i) converts the index
* into the physical address of the page memory; PG_POOL_L2VADDR(va) converts
* the virtual address in the L2 page table there the new mapping will be
* written.
@@ -371,11 +373,11 @@
* written. This macro is used when CONFIG_PAGING is enable. This case,
* it is used as follows:
*
- * ldr r0, =PGTABLE_L2_BASE_PADDR <-- Address in L2 table
- * ldr r1, =PG_LOCKED_PBASE <-- Physical page memory address
- * ldr r2, =CONFIG_PAGING_NLOCKED <-- number of pages
- * ldr r3, =MMUFLAGS <-- L2 MMU flags
- * pg_l2map r0, r1, r2, r3, r4
+ * ldr r0, =PGTABLE_L2_BASE_PADDR <-- Address in L2 table
+ * ldr r1, =PG_LOCKED_PBASE <-- Physical page memory address
+ * ldr r2, =CONFIG_PAGING_NLOCKED <-- number of pages
+ * ld r3, =MMUFLAGS <-- L2 MMU flags
+ * pg_l2map r0, r1, r2, r3, r4
*
* Input Parameters:
* l2 - Physical or virtual start address in the L2 page table, depending
@@ -399,37 +401,38 @@
****************************************************************************/
#ifdef CONFIG_PAGING
- .macro pg_l2map, l2, ppage, npages, mmuflags, tmp
- b 2f
+ .macro pg_l2map, l2, ppage, npages, mmuflags, tmp
+ b 2f
1:
- /* Write the one L2 entries. First, get tmp = (ppage | mmuflags),
- * the value to write into the L2 PTE
- */
+ /* Write the one L2 entries. First, get tmp = (ppage | mmuflags),
+ * the value to write into the L2 PTE
+ */
- orr \tmp, \ppage, \mmuflags
+ orr \tmp, \ppage, \mmuflags
- /* Write value into table at the current table address
- * (and increment the L2 page table address by 4)
- */
+ /* Write value into table at the current table address
+ * (and increment the L2 page table address by 4)
+ */
- str \tmp, [\l2], #4
+ str \tmp, [\l2], #4
- /* Update the physical address that will correspond to the next
- * table entry.
- */
+ /* Update the physical address that will correspond to the next
+ * table entry.
+ */
- add \ppage, \ppage, #CONFIG_PAGING_PAGESIZE
+ add \ppage, \ppage, #CONFIG_PAGING_PAGESIZE
- /* Decrement the number of pages written */
+ /* Decrement the number of pages written */
- sub \npages, \npages, #1
+ sub \npages, \npages, #1
2:
- /* Check if all of the pages have been written. If not, then
- * loop and write the next PTE.
- */
- cmp \npages, #0
- bgt 1b
- .endm
+ /* Check if all of the pages have been written.
+ * If not, then loop and write the next PTE.
+ */
+
+ cmp \npages, #0
+ bgt 1b
+ .endm
#endif /* CONFIG_PAGING */
/****************************************************************************
@@ -441,17 +444,19 @@
* macro is used when CONFIG_PAGING is enable. This case, it is used as
* follows:
*
- * ldr r0, =PG_L1_PGTABLE_PADDR <-- Address in the L1 table
- * ldr r1, =PG_L2_PGTABLE_PADDR <-- Physical address of L2 page table
- * ldr r2, =PG_PGTABLE_NPAGES <-- Total number of pages
- * ldr r3, =PG_PGTABLE_NPAGE1 <-- Number of pages in the first PTE
- * ldr r4, =MMU_L1_PGTABFLAGS <-- L1 MMU flags
- * pg_l1span r0, r1, r2, r3, r4, r4
+ * ldr r0, =PG_L1_PGTABLE_PADDR <-- Address in the L1 table
+ * ldr r1, =PG_L2_PGTABLE_PADDR <-- Physical address of L2 page table
+ * ldr r2, =PG_PGTABLE_NPAGES <-- Total number of pages
+ * ldr r3, =PG_PGTABLE_NPAGE1 <-- Number of pages in the first PTE
+ * ldr r4, =MMU_L1_PGTABFLAGS <-- L1 MMU flags
+ * pg_l1span r0, r1, r2, r3, r4, r4
*
* Input Parameters (unmodified unless noted):
- * l1 - Physical or virtual address in the L1 table to begin writing (modified)
+ * l1 - Physical or virtual address in the L1 table to begin writing
+ * (modified)
* l2 - Physical start address in the L2 page table (modified)
- * npages - Number of pages to required to span that memory region (modified)
+ * npages - Number of pages to required to span that memory region
+ * (modified)
* ppage - The number of pages in page 1 (modified)
* mmuflags - L1 MMU flags to use
*
@@ -472,42 +477,42 @@
****************************************************************************/
#ifdef CONFIG_PAGING
- .macro pg_l1span, l1, l2, npages, ppage, mmuflags, tmp
- b 2f
+ .macro pg_l1span, l1, l2, npages, ppage, mmuflags, tmp
+ b 2f
1:
- /* Write the L1 table entry that refers to this (unmapped) coarse page
- * table.
- *
- * tmp = (l2table | mmuflags), the value to write into the page table
- */
+ /* Write the L1 table entry that refers to this (unmapped) coarse page
+ * table.
+ *
+ * tmp = (l2table | mmuflags), the value to write into the page table
+ */
- orr \tmp, \l2, \mmuflags
+ orr \tmp, \l2, \mmuflags
- /* Write the value into the L1 table at the correct offset.
- * (and increment the L1 table address by 4)
- */
+ /* Write the value into the L1 table at the correct offset.
+ * (and increment the L1 table address by 4)
+ */
- str \tmp, [\l1], #4
+ str \tmp, [\l1], #4
- /* Update the L2 page table address for the next L1 table entry. */
+ /* Update the L2 page table address for the next L1 table entry. */
- add \l2, \l2, #PT_SIZE /* Next L2 page table start address */
+ add \l2, \l2, #PT_SIZE /* Next L2 page table start address */
- /* Update the number of pages that we have account for (with
- * non-mappings). NOTE that the first page may have fewer than
- * the maximum entries per page table.
- */
+ /* Update the number of pages that we have account for (with
+ * non-mappings). NOTE that the first page may have fewer than
+ * the maximum entries per page table.
+ */
- sub \npages, \npages, \ppage
- mov \ppage, #PTE_NPAGES
+ sub \npages, \npages, \ppage
+ mov \ppage, #PTE_NPAGES
2:
- /* Check if all of the pages have been written. If not, then
- * loop and write the next L1 entry.
- */
+ /* Check if all of the pages have been written. If not, then
+ * loop and write the next L1 entry.
+ */
- cmp \npages, #0
- bgt 1b
- .endm
+ cmp \npages, #0
+ bgt 1b
+ .endm
#endif /* CONFIG_PAGING */
#endif /* __ASSEMBLY__ */
diff --git a/arch/arm/src/tiva/cc13xx/cc13x0_rom.c b/arch/arm/src/tiva/cc13xx/cc13x0_rom.c
index 5800d22..40ad9f2 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x0_rom.c
+++ b/arch/arm/src/tiva/cc13xx/cc13x0_rom.c
@@ -994,17 +994,17 @@ uint32_t rom_setup_get_trim_ampcompctrl(uint32_t fcfg1_revision)
uint32_t
rom_setup_get_trim_dblrloopfilter_resetvoltage(uint32_t fcfg1_revision)
{
- uint32_t dblrLoopFilterResetVoltageValue = 0; /* Reset value */
+ uint32_t dblr_loop_filter_reset_voltage_value = 0; /* Reset value */
if (fcfg1_revision >= 0x00000020)
{
- dblrLoopFilterResetVoltageValue =
+ dblr_loop_filter_reset_voltage_value =
(getreg32(TIVA_FCFG1_MISC_OTP_DATA_1) &
FCFG1_MISC_OTP_DATA_1_DBLR_LOOP_FILTER_RESET_VOLTAGE_MASK) >>
FCFG1_MISC_OTP_DATA_1_DBLR_LOOP_FILTER_RESET_VOLTAGE_SHIFT;
}
- return (dblrLoopFilterResetVoltageValue);
+ return (dblr_loop_filter_reset_voltage_value);
}
/****************************************************************************
@@ -1053,30 +1053,30 @@ uint32_t rom_setup_get_trim_adcshvbufen(uint32_t fcfg1_revision)
uint32_t rom_setup_get_trim_xosc_hfctrl(uint32_t fcfg1_revision)
{
- uint32_t getTrimForXoschfCtlValue = 0; /* Recommended default setting */
+ uint32_t get_trim_for_xoschf_ctl_value = 0; /* Recommended default setting */
- uint32_t fcfg1Data;
+ uint32_t f_cfg1_data;
if (fcfg1_revision >= 0x00000020)
{
- fcfg1Data = getreg32(TIVA_FCFG1_MISC_OTP_DATA_1);
- getTrimForXoschfCtlValue =
- (((fcfg1Data & FCFG1_MISC_OTP_DATA_1_PEAK_DET_ITRIM_MASK) >>
+ f_cfg1_data = getreg32(TIVA_FCFG1_MISC_OTP_DATA_1);
+ get_trim_for_xoschf_ctl_value =
+ (((f_cfg1_data & FCFG1_MISC_OTP_DATA_1_PEAK_DET_ITRIM_MASK) >>
FCFG1_MISC_OTP_DATA_1_PEAK_DET_ITRIM_SHIFT) <<
DDI0_OSC_XOSCHFCTL_PEAK_DET_ITRIM_SHIFT);
- getTrimForXoschfCtlValue |=
- (((fcfg1Data & FCFG1_MISC_OTP_DATA_1_HP_BUF_ITRIM_MASK) >>
+ get_trim_for_xoschf_ctl_value |=
+ (((f_cfg1_data & FCFG1_MISC_OTP_DATA_1_HP_BUF_ITRIM_MASK) >>
FCFG1_MISC_OTP_DATA_1_HP_BUF_ITRIM_SHIFT) <<
DDI0_OSC_XOSCHFCTL_HP_BUF_ITRIM_SHIFT);
- getTrimForXoschfCtlValue |=
- (((fcfg1Data & FCFG1_MISC_OTP_DATA_1_LP_BUF_ITRIM_MASK) >>
+ get_trim_for_xoschf_ctl_value |=
+ (((f_cfg1_data & FCFG1_MISC_OTP_DATA_1_LP_BUF_ITRIM_MASK) >>
FCFG1_MISC_OTP_DATA_1_LP_BUF_ITRIM_SHIFT) <<
DDI0_OSC_XOSCHFCTL_LP_BUF_ITRIM_SHIFT);
}
- return (getTrimForXoschfCtlValue);
+ return (get_trim_for_xoschf_ctl_value);
}
/****************************************************************************
@@ -1085,15 +1085,15 @@ uint32_t rom_setup_get_trim_xosc_hfctrl(uint32_t fcfg1_revision)
uint32_t rom_setup_get_trim_xosc_hffaststart(void)
{
- uint32_t ui32XoscHfFastStartValue;
+ uint32_t ui32_xoschf_fast_start_value;
/* Get value from FCFG1 */
- ui32XoscHfFastStartValue = (getreg32(TIVA_FCFG1_OSC_CONF) &
+ ui32_xoschf_fast_start_value = (getreg32(TIVA_FCFG1_OSC_CONF) &
FCFG1_OSC_CONF_XOSC_HF_FAST_START_MASK) >>
FCFG1_OSC_CONF_XOSC_HF_FAST_START_SHIFT;
- return (ui32XoscHfFastStartValue);
+ return (ui32_xoschf_fast_start_value);
}
/****************************************************************************
@@ -1102,31 +1102,31 @@ uint32_t rom_setup_get_trim_xosc_hffaststart(void)
uint32_t rom_setup_get_trim_radc_extcfg(uint32_t fcfg1_revision)
{
- uint32_t getTrimForRadcExtCfgValue = 0x403f8000; /* Recommended default
- * setting */
+ uint32_t get_trim_for_radc_ext_cfg_value = 0x403f8000; /* Recommended default
+ * setting */
- uint32_t fcfg1Data;
+ uint32_t f_cfg1_data;
if (fcfg1_revision >= 0x00000020)
{
- fcfg1Data = getreg32(TIVA_FCFG1_MISC_OTP_DATA_1);
- getTrimForRadcExtCfgValue =
- (((fcfg1Data & FCFG1_MISC_OTP_DATA_1_HPM_IBIAS_WAIT_CNT_MASK) >>
+ f_cfg1_data = getreg32(TIVA_FCFG1_MISC_OTP_DATA_1);
+ get_trim_for_radc_ext_cfg_value =
+ (((f_cfg1_data & FCFG1_MISC_OTP_DATA_1_HPM_IBIAS_WAIT_CNT_MASK) >>
FCFG1_MISC_OTP_DATA_1_HPM_IBIAS_WAIT_CNT_SHIFT) <<
DDI0_OSC_RADCEXTCFG_HPM_IBIAS_WAIT_CNT_SHIFT);
- getTrimForRadcExtCfgValue |=
- (((fcfg1Data & FCFG1_MISC_OTP_DATA_1_LPM_IBIAS_WAIT_CNT_MASK) >>
+ get_trim_for_radc_ext_cfg_value |=
+ (((f_cfg1_data & FCFG1_MISC_OTP_DATA_1_LPM_IBIAS_WAIT_CNT_MASK) >>
FCFG1_MISC_OTP_DATA_1_LPM_IBIAS_WAIT_CNT_SHIFT) <<
DDI0_OSC_RADCEXTCFG_LPM_IBIAS_WAIT_CNT_SHIFT);
- getTrimForRadcExtCfgValue |=
- (((fcfg1Data & FCFG1_MISC_OTP_DATA_1_IDAC_STEP_MASK) >>
+ get_trim_for_radc_ext_cfg_value |=
+ (((f_cfg1_data & FCFG1_MISC_OTP_DATA_1_IDAC_STEP_MASK) >>
FCFG1_MISC_OTP_DATA_1_IDAC_STEP_SHIFT) <<
DDI0_OSC_RADCEXTCFG_IDAC_STEP_SHIFT);
}
- return (getTrimForRadcExtCfgValue);
+ return (get_trim_for_radc_ext_cfg_value);
}
/****************************************************************************
@@ -1158,18 +1158,18 @@ rom_setup_get_trim_lfregulator_cmirrwr_ratio(uint32_t fcfg1_revision)
{
/* Default value for both fields */
- uint32_t trimForXoscLfRegulatorAndCmirrwrRatioValue = 0;
+ uint32_t trim_for_xosc_lf_regulator_and_cmirrwr_ratio_val = 0;
if (fcfg1_revision >= 0x00000022)
{
- trimForXoscLfRegulatorAndCmirrwrRatioValue =
+ trim_for_xosc_lf_regulator_and_cmirrwr_ratio_val =
(getreg32(TIVA_FCFG1_OSC_CONF) &
(FCFG1_OSC_CONF_XOSCLF_REGULATOR_TRIM_MASK |
FCFG1_OSC_CONF_XOSCLF_CMIRRWR_RATIO_MASK)) >>
FCFG1_OSC_CONF_XOSCLF_CMIRRWR_RATIO_SHIFT;
}
- return (trimForXoscLfRegulatorAndCmirrwrRatioValue);
+ return (trim_for_xosc_lf_regulator_and_cmirrwr_ratio_val);
}
/****************************************************************************
diff --git a/arch/arm/src/tiva/cc13xx/cc13x0_trim.c b/arch/arm/src/tiva/cc13xx/cc13x0_trim.c
index a2fd195..ad73488 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x0_trim.c
+++ b/arch/arm/src/tiva/cc13xx/cc13x0_trim.c
@@ -183,19 +183,19 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
if (mp1rev < 542)
{
- uint32_t ldoTrimReg = getreg32(TIVA_FCFG1_BAT_RC_LDO_TRIM);
+ uint32_t ldo_trim_reg = getreg32(TIVA_FCFG1_BAT_RC_LDO_TRIM);
uint32_t vtrim_bod;
uint32_t vtrim_udig;
uint8_t regval8;
/* bit[27:24] unsigned */
- vtrim_bod = ((ldoTrimReg & FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_MASK) >>
+ vtrim_bod = ((ldo_trim_reg & FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_MASK) >>
FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_SHIFT);
/* bit[19:16] signed but treated as unsigned */
- vtrim_udig = ((ldoTrimReg & FCFG1_BAT_RC_LDO_TRIM_VTRIM_UDIG_MASK) >>
+ vtrim_udig = ((ldo_trim_reg & FCFG1_BAT_RC_LDO_TRIM_VTRIM_UDIG_MASK) >>
FCFG1_BAT_RC_LDO_TRIM_VTRIM_UDIG_SHIFT);
if (vtrim_bod > 0)
diff --git a/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h b/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h
index 81eb361..150b2d4 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h
+++ b/arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.h
@@ -872,7 +872,7 @@ typedef void (*fptr_dacvref_t) (uint8_t /* signal */);
struct hard_api_s
{
fptr_crc32_t crc32;
- fptr_getflsize_t FlashGetSize;
+ fptr_getflsize_t flashgetsize;
fptr_getchipid_t get_chipid;
fptr_reserved1_t reserved1;
fptr_reserved2_t reserved2;
diff --git a/arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c b/arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c
index c3bd1af..31f090b 100644
--- a/arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c
+++ b/arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c
@@ -83,7 +83,7 @@ static void trim_wakeup_frompowerdown(void)
}
/****************************************************************************
- * Name: Step_RCOSCHF_CTRIM
+ * Name: step_rcoschf_ctrim
*
* Description:
* Special shadow register trim propagation on first batch of devices.
@@ -93,7 +93,7 @@ static void trim_wakeup_frompowerdown(void)
*
****************************************************************************/
-static void Step_RCOSCHF_CTRIM(uint32_t tocode)
+static void step_rcoschf_ctrim(uint32_t tocode)
{
uint32_t current_rcoschfctrl;
uint32_t current_trim;
@@ -278,7 +278,7 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
fusedata = getreg32(TIVA_FCFG1_SHDW_OSC_BIAS_LDO_TRIM);
- Step_RCOSCHF_CTRIM((fusedata &
+ step_rcoschf_ctrim((fusedata &
FCFG1_SHDW_OSC_BIAS_LDO_TRIM_RCOSCHF_CTRIM_MASK) >>
FCFG1_SHDW_OSC_BIAS_LDO_TRIM_RCOSCHF_CTRIM_SHIFT);
diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c b/arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c
index 7d61141..cf1288a 100644
--- a/arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c
+++ b/arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c
@@ -95,7 +95,7 @@ enum cc13xx_package_e chipinfo_packagetype(void)
pkgtype = (enum cc13xx_package_e)((regval & FCFG1_USER_ID_PKG_MASK) >>
FCFG1_USER_ID_PKG_SHIFT);
- if (pkgtype < PACKAGE_4x4 || pkgtype > PACKAGE_4x4)
+ if (pkgtype < PACKAGE_4X4 || pkgtype > PACKAGE_4X4)
{
pkgtype = PACKAGE_UNKNOWN;
}
@@ -132,7 +132,7 @@ enum cc13xx_chiptype_e chipinfo_chiptype(void)
FCFG1_USER_ID_PROTOCOL_SHIFT);
#if defined(CONFIG_ARCH_CHIP_CC13X0)
- if (chipfamily == FAMILY_CC13x0)
+ if (chipfamily == FAMILY_CC13X0)
{
switch (protocol)
{
@@ -151,7 +151,7 @@ enum cc13xx_chiptype_e chipinfo_chiptype(void)
cc13 = ((userid & FCFG1_USER_ID_CC13) != 0); /* CC13xx device type (vs CC26xx) */
pa = ((userid & FCFG1_USER_ID_PA) != 0); /* Supports 20dBM PA */
- if (chipfamily == FAMILY_CC13x2_CC26x2)
+ if (chipfamily == FAMILY_CC13X2_CC26X2)
{
switch (protocol)
{
@@ -220,13 +220,13 @@ enum cc13xx_chipfamily_e chipinfo_chipfamily(void)
#if defined(CONFIG_ARCH_CHIP_CC13X0)
if (waferid == 0xb9be)
{
- chipfamily = FAMILY_CC13x0;
+ chipfamily = FAMILY_CC13X0;
}
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
if (waferid == 0xbb41)
{
- chipfamily = FAMILY_CC13x2_CC26x2;
+ chipfamily = FAMILY_CC13X2_CC26X2;
}
#endif
@@ -259,15 +259,15 @@ enum cc13xx_revision_e chipinfo_hwrevision(void)
hwminorrev = chipinfo_hwminorrev();
#if defined(CONFIG_ARCH_CHIP_CC13X0)
- if (chipfamily == FAMILY_CC13x0)
+ if (chipfamily == FAMILY_CC13X0)
{
switch (fcg1rev)
{
- case 0: /* CC13x0 PG1.0 */
+ case 0: /* CC13X0 PG1.0 */
hwrev = HWREV_1_0;
break;
- case 2: /* CC13x0 PG2.0 (or later) */
+ case 2: /* CC13X0 PG2.0 (or later) */
hwrev = (enum cc13xx_revision_e)(((uint32_t)HWREV_2_0) +
hwminorrev);
break;
@@ -275,7 +275,7 @@ enum cc13xx_revision_e chipinfo_hwrevision(void)
}
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
- if (chipfamily == FAMILY_CC13x2_CC26x2)
+ if (chipfamily == FAMILY_CC13X2_CC26X2)
{
switch (fcg1rev)
{
@@ -322,9 +322,9 @@ void chipinfo_verify(void)
chip_family = chipinfo_chipfamily();
#if defined(CONFIG_ARCH_CHIP_CC13X0)
- DEBUGASSERT(chip_family == FAMILY_CC13x0);
+ DEBUGASSERT(chip_family == FAMILY_CC13X0);
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
- DEBUGASSERT(chip_family == FAMILY_CC13x2_CC26x2);
+ DEBUGASSERT(chip_family == FAMILY_CC13X2_CC26X2);
#else
DEBUPANIC();
#endif
diff --git a/arch/arm/src/tiva/common/tiva_pwm.c b/arch/arm/src/tiva/common/tiva_pwm.c
index a84462e..bc32402 100644
--- a/arch/arm/src/tiva/common/tiva_pwm.c
+++ b/arch/arm/src/tiva/common/tiva_pwm.c
@@ -168,8 +168,8 @@ static struct tiva_pwm_chan_s g_pwm_chan0 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 0,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
- TIVA_PWMn_INTERVAL * 0,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
+ TIVA_PWMN_INTERVAL * 0,
.channel_id = 0,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -188,8 +188,8 @@ static struct tiva_pwm_chan_s g_pwm_chan1 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 0,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
- TIVA_PWMn_INTERVAL * 0,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
+ TIVA_PWMN_INTERVAL * 0,
.channel_id = 1,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -208,8 +208,8 @@ static struct tiva_pwm_chan_s g_pwm_chan2 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 1,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
- TIVA_PWMn_INTERVAL * 1,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
+ TIVA_PWMN_INTERVAL * 1,
.channel_id = 2,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -228,8 +228,8 @@ static struct tiva_pwm_chan_s g_pwm_chan3 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 1,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
- TIVA_PWMn_INTERVAL * 1,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
+ TIVA_PWMN_INTERVAL * 1,
.channel_id = 3,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -248,8 +248,8 @@ static struct tiva_pwm_chan_s g_pwm_chan4 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 2,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
- TIVA_PWMn_INTERVAL * 2,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
+ TIVA_PWMN_INTERVAL * 2,
.channel_id = 4,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -268,8 +268,8 @@ static struct tiva_pwm_chan_s g_pwm_chan5 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 2,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
- TIVA_PWMn_INTERVAL * 2,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
+ TIVA_PWMN_INTERVAL * 2,
.channel_id = 5,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -288,8 +288,8 @@ static struct tiva_pwm_chan_s g_pwm_chan6 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 3,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
- TIVA_PWMn_INTERVAL * 3,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
+ TIVA_PWMN_INTERVAL * 3,
.channel_id = 6,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -308,8 +308,8 @@ static struct tiva_pwm_chan_s g_pwm_chan7 =
.controller_id = 0,
.controller_base = TIVA_PWM0_BASE,
.generator_id = 3,
- .generator_base = TIVA_PWM0_BASE + TIVA_PWMn_BASE +
- TIVA_PWMn_INTERVAL * 3,
+ .generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
+ TIVA_PWMN_INTERVAL * 3,
.channel_id = 7,
#ifdef CONFIG_PWM_PULSECOUNT
.inited = false,
@@ -376,7 +376,7 @@ static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan)
{
/* Clear interrupt */
- tiva_pwm_putreg(chan, TIVA_PWMn_ISC_OFFSET, INT_SET << INTCMPAD);
+ tiva_pwm_putreg(chan, TIVA_PWMN_ISC_OFFSET, INT_SET << INTCMPAD);
/* Count down current pulse count */
@@ -386,8 +386,8 @@ static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan)
if (chan->cur_count == 0)
{
- tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET,
- CTL_DISABLE << TIVA_PWMn_CTL_ENABLE);
+ tiva_pwm_putreg(chan, TIVA_PWMN_CTL_OFFSET,
+ CTL_DISABLE << TIVA_PWMN_CTL_ENABLE);
chan->cur_count = chan->count;
pwm_expired(chan->handle);
}
@@ -606,18 +606,18 @@ static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan,
/* Configure PWM countdown mode (refer to TM4C1294NCPDT 23.4.6) */
- tiva_pwm_putreg(chan, TIVA_PWMn_CTL_OFFSET, 0);
+ tiva_pwm_putreg(chan, TIVA_PWMN_CTL_OFFSET, 0);
if (chan->channel_id % 2 == 0)
{
- tiva_pwm_putreg(chan, TIVA_PWMn_GENA_OFFSET,
- GENx_LOW << TIVA_PWMn_GENx_ACTCMPAD |
- GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD);
+ tiva_pwm_putreg(chan, TIVA_PWMN_GENA_OFFSET,
+ GENX_LOW << TIVA_PWMN_GENX_ACTCMPAD |
+ GENX_HIGH << TIVA_PWMN_GENX_ACTLOAD);
}
else
{
- tiva_pwm_putreg(chan, TIVA_PWMn_GENB_OFFSET,
- GENx_LOW << TIVA_PWMn_GENx_ACTCMPBD |
- GENx_HIGH << TIVA_PWMn_GENx_ACTLOAD);
+ tiva_pwm_putreg(chan, TIVA_PWMN_GENB_OFFSET,
+ GENX_LOW << TIVA_PWMN_GENX_ACTCMPBD |
+ GENX_HIGH << TIVA_PWMN_GENX_ACTLOAD);
}
/* Set the PWM period (refer to TM4C1294NCPDT 23.4.7) */
@@ -635,7 +635,7 @@ static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan,
return -ERANGE;
}
- tiva_pwm_putreg(chan, TIVA_PWMn_LOAD_OFFSET, load - 1);
+ tiva_pwm_putreg(chan, TIVA_PWMN_LOAD_OFFSET, load - 1);
/* Configure PWM duty (refer to TM4C1294NCPDT 23.4.8-9)
*
@@ -650,18 +650,18 @@ static inline int tiva_pwm_timer(FAR struct tiva_pwm_chan_s *chan,
if (chan->channel_id % 2 == 0)
{
- tiva_pwm_putreg(chan, TIVA_PWMn_CMPA_OFFSET, comp - 1);
+ tiva_pwm_putreg(chan, TIVA_PWMN_CMPA_OFFSET, comp - 1);
}
else
{
- tiva_pwm_putreg(chan, TIVA_PWMn_CMPB_OFFSET, comp - 1);
+ tiva_pwm_putreg(chan, TIVA_PWMN_CMPB_OFFSET, comp - 1);
}
/* Enable the PWM generator (refer to TM4C1294NCPDT 23.4.10) */
tiva_pwm_putreg(chan,
- TIVA_PWMn_CTL_OFFSET,
- CTL_ENABLE << TIVA_PWMn_CTL_ENABLE);
+ TIVA_PWMN_CTL_OFFSET,
+ CTL_ENABLE << TIVA_PWMN_CTL_ENABLE);
/* Enable PWM channel (refer to TM4C1294NCPDT 23.4.11) */
@@ -844,7 +844,7 @@ FAR struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel)
/* Enable interrupt INTCMPAD mode */
- tiva_pwm_putreg(chan, TIVA_PWMn_INTEN_OFFSET, INT_SET << INTCMPAD);
+ tiva_pwm_putreg(chan, TIVA_PWMN_INTEN_OFFSET, INT_SET << INTCMPAD);
/* Attach IRQ handler and enable interrupt */
diff --git a/arch/arm/src/tiva/common/tiva_timerlib.c b/arch/arm/src/tiva/common/tiva_timerlib.c
index 9e96b4e..379e0c3 100644
--- a/arch/arm/src/tiva/common/tiva_timerlib.c
+++ b/arch/arm/src/tiva/common/tiva_timerlib.c
@@ -884,15 +884,15 @@ tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
*/
regval = tiva_getreg(priv, TIVA_TIMER_TAMR_OFFSET);
- regval &= ~TIMER_TnMR_TnMR_MASK;
+ regval &= ~TIMER_TNMR_TNMR_MASK;
if (priv->config->mode == TIMER32_MODE_ONESHOT)
{
- regval |= TIMER_TnMR_TnMR_ONESHOT;
+ regval |= TIMER_TNMR_TNMR_ONESHOT;
}
else /* if (priv->config->mode == TIMER32_MODE_PERIODIC) */
{
- regval |= TIMER_TnMR_TnMR_PERIODIC;
+ regval |= TIMER_TNMR_TNMR_PERIODIC;
}
tiva_putreg(priv, TIVA_TIMER_TAMR_OFFSET, regval);
@@ -930,9 +930,9 @@ tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
/* Setup defaults */
- regval &= (TIMER_TnMR_TnCDIR | TIMER_TnMR_TnWOT | TIMER_TnMR_TnCDIR);
+ regval &= (TIMER_TNMR_TNCDIR | TIMER_TNMR_TNWOT | TIMER_TNMR_TNCDIR);
#ifdef CONFIG_ARCH_CHIP_TM4C129
- regval |= TIMER_TnMR_TnCINTD;
+ regval |= TIMER_TNMR_TNCINTD;
#endif
/* Enable snapshot mode?
@@ -961,7 +961,7 @@ tiva_oneshot_periodic_mode32(struct tiva_gptmstate_s *priv,
if (TIMER_ISCOUNTUP(timer))
{
- regval |= TIMER_TnMR_TnCDIR_UP;
+ regval |= TIMER_TNMR_TNCDIR_UP;
}
tiva_putreg(priv, TIVA_TIMER_TAMR_OFFSET, regval);
@@ -1093,15 +1093,15 @@ tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
regoffset = tmndx ? TIVA_TIMER_TBMR_OFFSET : TIVA_TIMER_TAMR_OFFSET;
regval = tiva_getreg(priv, regoffset);
- regval &= ~TIMER_TnMR_TnMR_MASK;
+ regval &= ~TIMER_TNMR_TNMR_MASK;
if (timer->mode == TIMER16_MODE_ONESHOT)
{
- regval |= TIMER_TnMR_TnMR_ONESHOT;
+ regval |= TIMER_TNMR_TNMR_ONESHOT;
}
else /* if (timer->mode == TIMER16_MODE_PERIODIC) */
{
- regval |= TIMER_TnMR_TnMR_PERIODIC;
+ regval |= TIMER_TNMR_TNMR_PERIODIC;
}
tiva_putreg(priv, regoffset, regval);
@@ -1141,9 +1141,9 @@ tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
/* Setup defaults */
- regval &= (TIMER_TnMR_TnCDIR | TIMER_TnMR_TnWOT | TIMER_TnMR_TnCDIR);
+ regval &= (TIMER_TNMR_TNCDIR | TIMER_TNMR_TNWOT | TIMER_TNMR_TNCDIR);
#ifdef CONFIG_ARCH_CHIP_TM4C129
- regval |= TIMER_TnMR_TnCINTD;
+ regval |= TIMER_TNMR_TNCINTD;
#endif
/* Enable snapshot mode?
@@ -1172,7 +1172,7 @@ tiva_oneshot_periodic_mode16(struct tiva_gptmstate_s *priv,
if (TIMER_ISCOUNTUP(timer))
{
- regval |= TIMER_TnMR_TnCDIR_UP;
+ regval |= TIMER_TNMR_TNCDIR_UP;
}
tiva_putreg(priv, regoffset, regval);
@@ -1636,9 +1636,9 @@ static int tiva_pwm_mode16(struct tiva_gptmstate_s *priv,
*/
regoffset = tmndx ? TIVA_TIMER_TBMR_OFFSET : TIVA_TIMER_TAMR_OFFSET;
- clrbits = TIMER_TnMR_TnMR_MASK | TIMER_TnMR_TnCMR | TIMER_TnMR_TnAMS;
- setbits = TIMER_TnMR_TnMR_PERIODIC | TIMER_TnMR_TnCMR_EDGECOUNT |
- TIMER_TnMR_TnAMS_PWM;
+ clrbits = TIMER_TNMR_TNMR_MASK | TIMER_TNMR_TNCMR | TIMER_TNMR_TNAMS;
+ setbits = TIMER_TNMR_TNMR_PERIODIC | TIMER_TNMR_TNCMR_EDGECOUNT |
+ TIMER_TNMR_TNAMS_PWM;
tiva_modifyreg(priv, regoffset, clrbits, setbits);
/* 4. Configure the output state of the PWM signal (whether or not it is
@@ -1674,7 +1674,7 @@ static int tiva_pwm_mode16(struct tiva_gptmstate_s *priv,
tiva_modifyreg(priv, TIVA_TIMER_CTL_OFFSET, clrbits, setbits);
regoffset = tmndx ? TIVA_TIMER_TBMR_OFFSET : TIVA_TIMER_TAMR_OFFSET;
- tiva_modifyreg(priv, regoffset, 0, TIMER_TnMR_TnPWMIE);
+ tiva_modifyreg(priv, regoffset, 0, TIMER_TNMR_TNPWMIE);
/* 6. Set PWM period: This is a 24-bit value. Put the high byte (bits 16
* through 23) in the prescaler register (TIVA_TIMER_TnPR_OFFSET).
@@ -2579,7 +2579,7 @@ void tiva_timer32_setinterval(TIMER_HANDLE handle, uint32_t interval)
moder = base + TIVA_TIMER_TAMR_OFFSET;
modev1 = getreg32(moder);
- modev2 = modev1 & ~TIMER_TnMR_TnCINTD;
+ modev2 = modev1 & ~TIMER_TNMR_TNCINTD;
putreg32(modev2, moder);
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
@@ -2728,7 +2728,7 @@ void tiva_timer16_setinterval(TIMER_HANDLE handle,
*/
modev1 = getreg32(moder);
- modev2 = modev1 & ~TIMER_TnMR_TnCINTD;
+ modev2 = modev1 & ~TIMER_TNMR_TNCINTD;
putreg32(modev2, moder);
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
diff --git a/arch/arm/src/tiva/hardware/lm/lm3s_timer.h b/arch/arm/src/tiva/hardware/lm/lm3s_timer.h
index 2c5a5b0..26e55b0 100644
--- a/arch/arm/src/tiva/hardware/lm/lm3s_timer.h
+++ b/arch/arm/src/tiva/hardware/lm/lm3s_timer.h
@@ -263,24 +263,24 @@
/* GPTM Timer A/B Mode (TAMR and TBMR) */
-#define TIMER_TnMR_TnMR_SHIFT (0) /* Bits 1-0: Timer A/B Mode */
+#define TIMER_TNMR_TNMR_SHIFT (0) /* Bits 1-0: Timer A/B Mode */
-#define TIMER_TnMR_TnMR_MASK (3 << TIMER_TnMR_TnMR_SHIFT) /* Bits 1-0: Timer A/B Mode */
-# define TIMER_TnMR_TnMR_ONESHOT (1 << TIMER_TnMR_TnMR_SHIFT) /* One-Shot Timer mode */
-# define TIMER_TnMR_TnMR_PERIODIC (2 << TIMER_TnMR_TnMR_SHIFT) /* Periodic Timer mode */
-# define TIMER_TnMR_TnMR_CAPTURE (3 << TIMER_TnMR_TnMR_SHIFT) /* Capture mode */
+#define TIMER_TNMR_TNMR_MASK (3 << TIMER_TNMR_TNMR_SHIFT) /* Bits 1-0: Timer A/B Mode */
+# define TIMER_TNMR_TNMR_ONESHOT (1 << TIMER_TNMR_TNMR_SHIFT) /* One-Shot Timer mode */
+# define TIMER_TNMR_TNMR_PERIODIC (2 << TIMER_TNMR_TNMR_SHIFT) /* Periodic Timer mode */
+# define TIMER_TNMR_TNMR_CAPTURE (3 << TIMER_TNMR_TNMR_SHIFT) /* Capture mode */
-#define TIMER_TnMR_TnCMR_SHIFT (2) /* Bit 2: Timer A/B Capture Mode */
+#define TIMER_TNMR_TNCMR_SHIFT (2) /* Bit 2: Timer A/B Capture Mode */
-#define TIMER_TnMR_TnCMR (1 << TIMER_TnMR_TnCMR_SHIFT) /* Bit 2: Timer A/B Capture Mode */
-# define TIMER_TnMR_TnCMR_EDGECOUNT (0 << TIMER_TnMR_TnCMR_SHIFT) /* Edge-Count mode */
-# define TIMER_TnMR_TnCMR_EDGETIME (1 << TIMER_TnMR_TnCMR_SHIFT) /* Edge-Time mode */
+#define TIMER_TNMR_TNCMR (1 << TIMER_TNMR_TNCMR_SHIFT) /* Bit 2: Timer A/B Capture Mode */
+# define TIMER_TNMR_TNCMR_EDGECOUNT (0 << TIMER_TNMR_TNCMR_SHIFT) /* Edge-Count mode */
+# define TIMER_TNMR_TNCMR_EDGETIME (1 << TIMER_TNMR_TNCMR_SHIFT) /* Edge-Time mode */
-#define TIMER_TnMR_TnAMS_SHIFT (3) /* Bit 3: Timer A/B Alternate Mode Select */
+#define TIMER_TNMR_TNAMS_SHIFT (3) /* Bit 3: Timer A/B Alternate Mode Select */
-#define TIMER_TnMR_TnAMS (1 << TIMER_TnMR_TnAMS_SHIFT) /* Bit 3: Timer A/B Alternate Mode Select */
-# define TIMER_TnMR_TnAMS_CAPTURE (0 << TIMER_TnMR_TnAMS_SHIFT) /* Capture mode is enabled */
-# define TIMER_TnMR_TnAMS_PWM (1 << TIMER_TnMR_TnAMS_SHIFT) /* PWM mode is enabled */
+#define TIMER_TNMR_TNAMS (1 << TIMER_TNMR_TNAMS_SHIFT) /* Bit 3: Timer A/B Alternate Mode Select */
+# define TIMER_TNMR_TNAMS_CAPTURE (0 << TIMER_TNMR_TNAMS_SHIFT) /* Capture mode is enabled */
+# define TIMER_TNMR_TNAMS_PWM (1 << TIMER_TNMR_TNAMS_SHIFT) /* PWM mode is enabled */
/* GPTM Control (CTL) */
diff --git a/arch/arm/src/tiva/hardware/tiva_pwm.h b/arch/arm/src/tiva/hardware/tiva_pwm.h
index 9540c5d..b2ff718 100644
--- a/arch/arm/src/tiva/hardware/tiva_pwm.h
+++ b/arch/arm/src/tiva/hardware/tiva_pwm.h
@@ -56,45 +56,45 @@
#define TIVA_PWM_FAULTVAL_OFFSET (0x24) /* PWM Fault Condition Value */
#define TIVA_PWM_ENUPD_OFFSET (0x28) /* PWM Enable Update */
-#define TIVA_PWMn_BASE (0x40) /* PWMn Base */
-#define TIVA_PWMn_INTERVAL (0x40) /* PWMn Interval */
+#define TIVA_PWMN_BASE (0x40) /* PWMn Base */
+#define TIVA_PWMN_INTERVAL (0x40) /* PWMn Interval */
-#define TIVA_PWMn_CTL_OFFSET (0x0) /* PWMn Control */
-#define TIVA_PWMn_INTEN_OFFSET (0x4) /* PWMn Interrupt and Trigger Enable */
-#define TIVA_PWMn_RIS_OFFSET (0x8) /* PWMn Raw Interrupt Status */
-#define TIVA_PWMn_ISC_OFFSET (0xc) /* PWMn Interrupt Status and Clear */
-#define TIVA_PWMn_LOAD_OFFSET (0x10) /* PWMn Load */
-#define TIVA_PWMn_COUNT_OFFSET (0x14) /* PWMn Counter */
-#define TIVA_PWMn_CMPA_OFFSET (0x18) /* PWMn Compare A */
-#define TIVA_PWMn_CMPB_OFFSET (0x1c) /* PWMn Compare B */
-#define TIVA_PWMn_GENA_OFFSET (0x20) /* PWMn Generator A Control */
-#define TIVA_PWMn_GENB_OFFSET (0x24) /* PWMn Generator B Control */
-#define TIVA_PWMn_DBCTL_OFFSET (0x28) /* PWMn Dead-Band Control */
-#define TIVA_PWMn_DBRISE_OFFSET (0x2c) /* PWMn Dead-Band Rising-Edge-Delay */
-#define TIVA_PWMn_DBFALL_OFFSET (0x30) /* PWMn Dead-Band Falling-Edge-Delay */
-#define TIVA_PWMn_FLTSRC0_OFFSET (0x34) /* PWMn Fault Source 0 */
-#define TIVA_PWMn_FLTSRC1_OFFSET (0x38) /* PWMn Fault Source 1 */
-#define TIVA_PWMn_MINFLTPER_OFFSET (0x3c) /* PWMn Minimum Fault Period */
+#define TIVA_PWMN_CTL_OFFSET (0x0) /* PWMn Control */
+#define TIVA_PWMN_INTEN_OFFSET (0x4) /* PWMn Interrupt and Trigger Enable */
+#define TIVA_PWMN_RIS_OFFSET (0x8) /* PWMn Raw Interrupt Status */
+#define TIVA_PWMN_ISC_OFFSET (0xc) /* PWMn Interrupt Status and Clear */
+#define TIVA_PWMN_LOAD_OFFSET (0x10) /* PWMn Load */
+#define TIVA_PWMN_COUNT_OFFSET (0x14) /* PWMn Counter */
+#define TIVA_PWMN_CMPA_OFFSET (0x18) /* PWMn Compare A */
+#define TIVA_PWMN_CMPB_OFFSET (0x1c) /* PWMn Compare B */
+#define TIVA_PWMN_GENA_OFFSET (0x20) /* PWMn Generator A Control */
+#define TIVA_PWMN_GENB_OFFSET (0x24) /* PWMn Generator B Control */
+#define TIVA_PWMN_DBCTL_OFFSET (0x28) /* PWMn Dead-Band Control */
+#define TIVA_PWMN_DBRISE_OFFSET (0x2c) /* PWMn Dead-Band Rising-Edge-Delay */
+#define TIVA_PWMN_DBFALL_OFFSET (0x30) /* PWMn Dead-Band Falling-Edge-Delay */
+#define TIVA_PWMN_FLTSRC0_OFFSET (0x34) /* PWMn Fault Source 0 */
+#define TIVA_PWMN_FLTSRC1_OFFSET (0x38) /* PWMn Fault Source 1 */
+#define TIVA_PWMN_MINFLTPER_OFFSET (0x3c) /* PWMn Minimum Fault Period */
-#define TIVA_PWMn_FAULT_BASE (0x800) /* PWMn Fault Base */
-#define TIVA_PWMn_FAULT_INTERVAL (0x80) /* PWMn Fault Interval */
+#define TIVA_PWMN_FAULT_BASE (0x800) /* PWMn Fault Base */
+#define TIVA_PWMN_FAULT_INTERVAL (0x80) /* PWMn Fault Interval */
-#define TIVA_PWMn_FAULT_SEN_OFFSET (0x0) /* PWMn Fault Pin Logic Sense */
-#define TIVA_PWMn_FAULT_STAT0_OFFSET (0x4) /* PWMn Fault Status 0 */
-#define TIVA_PWMn_FAULT_STAT1_OFFSET (0x8) /* PWMn Fault Status 1 */
+#define TIVA_PWMN_FAULT_SEN_OFFSET (0x0) /* PWMn Fault Pin Logic Sense */
+#define TIVA_PWMN_FAULT_STAT0_OFFSET (0x4) /* PWMn Fault Status 0 */
+#define TIVA_PWMN_FAULT_STAT1_OFFSET (0x8) /* PWMn Fault Status 1 */
#define TIVA_PWM_PP (0xfc0) /* PWM Peripheral Properties */
#define TIVA_PWM_CC (0xfc8) /* PWM Clock Configuration */
-#define TIVA_PWMn_GENx_ACTCMPBD (10) /* (Bit) Action for Comparator B Down */
-#define TIVA_PWMn_GENx_ACTCMPBU (8) /* (Bit) Action for Comparator B Up */
-#define TIVA_PWMn_GENx_ACTCMPAD (6) /* (Bit) Action for Comparator A Down */
-#define TIVA_PWMn_GENx_ACTCMPAU (4) /* (Bit) Action for Comparator A Up */
-#define TIVA_PWMn_GENx_ACTLOAD (2) /* (Bit) Action for Counter equals LOAD */
-#define TIVA_PWMn_GENx_ACTZERO (0) /* (Bit) Action for Counter equals ZERO */
-#define GENx_INVERT (0x1) /* (Value) Invert */
-#define GENx_LOW (0x2) /* (Value) Drive Low */
-#define GENx_HIGH (0x3) /* (Value) Drive High */
+#define TIVA_PWMN_GENX_ACTCMPBD (10) /* (Bit) Action for Comparator B Down */
+#define TIVA_PWMN_GENX_ACTCMPBU (8) /* (Bit) Action for Comparator B Up */
+#define TIVA_PWMN_GENX_ACTCMPAD (6) /* (Bit) Action for Comparator A Down */
+#define TIVA_PWMN_GENX_ACTCMPAU (4) /* (Bit) Action for Comparator A Up */
+#define TIVA_PWMN_GENX_ACTLOAD (2) /* (Bit) Action for Counter equals LOAD */
+#define TIVA_PWMN_GENX_ACTZERO (0) /* (Bit) Action for Counter equals ZERO */
+#define GENX_INVERT (0x1) /* (Value) Invert */
+#define GENX_LOW (0x2) /* (Value) Drive Low */
+#define GENX_HIGH (0x3) /* (Value) Drive High */
#define TIVA_PWM_CC_USEPWM (8) /* (Bit) Use PWM Clock Divisor */
#define TIVA_PWM_CC_PWMDIV (0) /* (Bit) PWM Clock Divider */
@@ -106,7 +106,7 @@
#define CC_PWMDIV_32 (0x4) /* (Value) Divided by 32 */
#define CC_PWMDIV_64 (0x5) /* (Value) Divided by 64 */
-#define TIVA_PWMn_CTL_ENABLE (0) /* (Bit) PWM Block Enable */
+#define TIVA_PWMN_CTL_ENABLE (0) /* (Bit) PWM Block Enable */
#define CTL_DISABLE (0) /* (Value) Disable */
#define CTL_ENABLE (1) /* (Value) Enable */
diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h b/arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h
index c858ce6..9ae637b 100644
--- a/arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h
+++ b/arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h
@@ -364,38 +364,38 @@
/* GPTM Timer A/B Mode (TAMR and TBMR) */
-#define TIMER_TnMR_TnMR_SHIFT (0) /* Bits 1-0: Timer A/B Mode */
-#define TIMER_TnMR_TnMR_MASK (3 << TIMER_TnMR_TnMR_SHIFT)
-# define TIMER_TnMR_TnMR_ONESHOT (1 << TIMER_TnMR_TnMR_SHIFT) /* One-Shot Timer mode */
-# define TIMER_TnMR_TnMR_PERIODIC (2 << TIMER_TnMR_TnMR_SHIFT) /* Periodic Timer mode */
-# define TIMER_TnMR_TnMR_CAPTURE (3 << TIMER_TnMR_TnMR_SHIFT) /* Capture mode */
-
-#define TIMER_TnMR_TnCMR_SHIFT (2) /* Bit 2: Timer A/B Capture Mode */
-
-#define TIMER_TnMR_TnCMR (1 << TIMER_TnMR_TnCMR_SHIFT) /* Bit 2: Timer A/B Capture Mode */
-# define TIMER_TnMR_TnCMR_EDGECOUNT (0 << TIMER_TnMR_TnCMR_SHIFT) /* Edge-Count mode */
-# define TIMER_TnMR_TnCMR_EDGETIME (1 << TIMER_TnMR_TnCMR_SHIFT) /* Edge-Time mode */
-
-#define TIMER_TnMR_TnAMS_SHIFT (3) /* Bit 3: Timer A/B Alternate Mode Select */
-
-#define TIMER_TnMR_TnAMS (1 << TIMER_TnMR_TnAMS_SHIFT) /* Bit 3: Timer A/B Alternate Mode Select */
-# define TIMER_TnMR_TnAMS_CAPTURE (0 << TIMER_TnMR_TnAMS_SHIFT) /* Capture mode is enabled */
-# define TIMER_TnMR_TnAMS_PWM (1 << TIMER_TnMR_TnAMS_SHIFT) /* PWM mode is enabled */
-
-#define TIMER_TnMR_TnCDIR_SHIFT (4) /* Bit 4: Timer A/B Count Direction */
-
-#define TIMER_TnMR_TnCDIR (1 << TIMER_TnMR_TnCDIR_SHIFT) /* Bit 4: Timer A/B Count Direction */
-# define TIMER_TnMR_TnCDIR_DOWN (0 << TIMER_TnMR_TnCDIR_SHIFT) /* Timer counts down */
-# define TIMER_TnMR_TnCDIR_UP (1 << TIMER_TnMR_TnCDIR_SHIFT) /* Timer counts up (one-shot/periodic modes) */
-
-#define TIMER_TnMR_TnMIE (1 << 5) /* Bit 5: Timer A/B Match Interrupt Enable */
-#define TIMER_TnMR_TnWOT (1 << 6) /* Bit 6: GPTM Timer A/B Wait-on-Trigger */
-#define TIMER_TnMR_TnSNAPS (1 << 7) /* Bit 7: GPTM Timer A/B Snap-Shot Mode */
-#define TIMER_TnMR_TnILD (1 << 8) /* Bit 8: GPTM Timer A/B Interval Load Write */
-#define TIMER_TnMR_TnPWMIE (1 << 9) /* Bit 9: GPTM Timer A/B PWM Interrupt Enable */
-#define TIMER_TnMR_TnMRSU (1 << 10) /* Bit 10: GPTM Timer A/B Match Register Update */
-#define TIMER_TnMR_TnPLO (1 << 11) /* Bit 11: GPTM Timer A/B PWM Legacy Operation */
-#define TIMER_TnMR_TnCINTD (1 << 12) /* Bit 12: One-shot/Periodic Interrupt Disable */
+#define TIMER_TNMR_TNMR_SHIFT (0) /* Bits 1-0: Timer A/B Mode */
+#define TIMER_TNMR_TNMR_MASK (3 << TIMER_TNMR_TNMR_SHIFT)
+# define TIMER_TNMR_TNMR_ONESHOT (1 << TIMER_TNMR_TNMR_SHIFT) /* One-Shot Timer mode */
+# define TIMER_TNMR_TNMR_PERIODIC (2 << TIMER_TNMR_TNMR_SHIFT) /* Periodic Timer mode */
+# define TIMER_TNMR_TNMR_CAPTURE (3 << TIMER_TNMR_TNMR_SHIFT) /* Capture mode */
+
+#define TIMER_TNMR_TNCMR_SHIFT (2) /* Bit 2: Timer A/B Capture Mode */
+
+#define TIMER_TNMR_TNCMR (1 << TIMER_TNMR_TNCMR_SHIFT) /* Bit 2: Timer A/B Capture Mode */
+# define TIMER_TNMR_TNCMR_EDGECOUNT (0 << TIMER_TNMR_TNCMR_SHIFT) /* Edge-Count mode */
+# define TIMER_TNMR_TNCMR_EDGETIME (1 << TIMER_TNMR_TNCMR_SHIFT) /* Edge-Time mode */
+
+#define TIMER_TNMR_TNAMS_SHIFT (3) /* Bit 3: Timer A/B Alternate Mode Select */
+
+#define TIMER_TNMR_TNAMS (1 << TIMER_TNMR_TNAMS_SHIFT) /* Bit 3: Timer A/B Alternate Mode Select */
+# define TIMER_TNMR_TNAMS_CAPTURE (0 << TIMER_TNMR_TNAMS_SHIFT) /* Capture mode is enabled */
+# define TIMER_TNMR_TNAMS_PWM (1 << TIMER_TNMR_TNAMS_SHIFT) /* PWM mode is enabled */
+
+#define TIMER_TNMR_TNCDIR_SHIFT (4) /* Bit 4: Timer A/B Count Direction */
+
+#define TIMER_TNMR_TNCDIR (1 << TIMER_TNMR_TNCDIR_SHIFT) /* Bit 4: Timer A/B Count Direction */
+# define TIMER_TNMR_TNCDIR_DOWN (0 << TIMER_TNMR_TNCDIR_SHIFT) /* Timer counts down */
+# define TIMER_TNMR_TNCDIR_UP (1 << TIMER_TNMR_TNCDIR_SHIFT) /* Timer counts up (one-shot/periodic modes) */
+
+#define TIMER_TNMR_TNMIE (1 << 5) /* Bit 5: Timer A/B Match Interrupt Enable */
+#define TIMER_TNMR_TNWOT (1 << 6) /* Bit 6: GPTM Timer A/B Wait-on-Trigger */
+#define TIMER_TNMR_TNSNAPS (1 << 7) /* Bit 7: GPTM Timer A/B Snap-Shot Mode */
+#define TIMER_TNMR_TNILD (1 << 8) /* Bit 8: GPTM Timer A/B Interval Load Write */
+#define TIMER_TNMR_TNPWMIE (1 << 9) /* Bit 9: GPTM Timer A/B PWM Interrupt Enable */
+#define TIMER_TNMR_TNMRSU (1 << 10) /* Bit 10: GPTM Timer A/B Match Register Update */
+#define TIMER_TNMR_TNPLO (1 << 11) /* Bit 11: GPTM Timer A/B PWM Legacy Operation */
+#define TIMER_TNMR_TNCINTD (1 << 12) /* Bit 12: One-shot/Periodic Interrupt Disable */
#define TIMER_TnMR_TCACT_SHIFT (13) /* Bits 13-15: Timer Compare Action Select */
#define TIMER_TnMR_TCACT_MASK (7 << TIMER_TnMR_TCACT_SHIFT)
# define TIMER_TnMR_TCACT_NONE (0 << TIMER_TnMR_TCACT_SHIFT) /* Disable compare operations */
diff --git a/arch/arm/src/tiva/tiva_chipinfo.h b/arch/arm/src/tiva/tiva_chipinfo.h
index a43177f..f908da2 100644
--- a/arch/arm/src/tiva/tiva_chipinfo.h
+++ b/arch/arm/src/tiva/tiva_chipinfo.h
@@ -71,22 +71,22 @@ enum cc13xx_protocol_e
enum cc13xx_package_e
{
PACKAGE_UNKNOWN = -1, /* -1 means that current package type is unknown */
- PACKAGE_4x4 = 0, /* 0 This is a 4x4 mm QFN (RHB) package */
- PACKAGE_5x5 = 1, /* 1 This is a 5x5 mm QFN (RSM) package */
- PACKAGE_7x7 = 2, /* 2 This is a 7x7 mm QFN (RGZ) package */
+ PACKAGE_4X4 = 0, /* 0 This is a 4x4 mm QFN (RHB) package */
+ PACKAGE_5X5 = 1, /* 1 This is a 5x5 mm QFN (RSM) package */
+ PACKAGE_7X7 = 2, /* 2 This is a 7x7 mm QFN (RGZ) package */
PACKAGE_WAFER = 3, /* 3 This is a wafer sale package (naked die) */
PACKAGE_WCSP = 4, /* 4 This is a 2.7x2.7 mm WCSP (YFV) */
- PACKAGE_7x7_Q1 = 5 /* 5 This is a 7x7 mm QFN package with Wettable Flanks */
+ PACKAGE_7X7_Q1 = 5 /* 5 This is a 7x7 mm QFN package with Wettable Flanks */
};
enum cc13xx_chipfamily_e
{
FAMILY_UNKNOWN = -1, /* -1 The chip's family member is unknown */
- FAMILY_CC26x0 = 0, /* 0 The chip is a CC26x0 family member */
- FAMILY_CC13x0 = 1, /* 1 The chip is a CC13x0 family member */
- FAMILY_CC26x1 = 2, /* 2 The chip is a CC26x1 family member */
- FAMILY_CC26x0R2 = 3, /* 3 The chip is a CC26x0R2 family (new ROM contents) */
- FAMILY_CC13x2_CC26x2 = 4 /* 4 The chip is a CC13x2, CC26x2 family member */
+ FAMILY_CC26X0 = 0, /* 0 The chip is a CC26x0 family member */
+ FAMILY_CC13X0 = 1, /* 1 The chip is a CC13x0 family member */
+ FAMILY_CC26X1 = 2, /* 2 The chip is a CC26x1 family member */
+ FAMILY_CC26X0R2 = 3, /* 3 The chip is a CC26x0R2 family (new ROM contents) */
+ FAMILY_CC13X2_CC26X2 = 4 /* 4 The chip is a CC13x2, CC26x2 family member */
};
enum cc13xx_chiptype_e