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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2020/06/16 21:21:32 UTC
[GitHub] [incubator-nuttx] acassis edited a comment on pull request #1252: STM32L4: fix 48MHz MSI clock selection logic
acassis edited a comment on pull request #1252:
URL: https://github.com/apache/incubator-nuttx/pull/1252#issuecomment-645018299
Ok, it worked on 48MHz MSI.
These are the modification I did:
diff --git a/boards/arm/stm32l4/nucleo-l476rg/include/nucleo-l476rg.h b/boards/arm/stm32l4/nucleo-l476rg/include/nucleo-l476rg.h
index f6cfbd4d29..1bf31ad33d 100644
--- a/boards/arm/stm32l4/nucleo-l476rg/include/nucleo-l476rg.h
+++ b/boards/arm/stm32l4/nucleo-l476rg/include/nucleo-l476rg.h
@@ -49,11 +49,10 @@
* Pre-processor Definitions
****************************************************************************/
-#if 1
+#if 0
# define HSI_CLOCK_CONFIG /* HSI-16 clock configuration */
#elif 0
/* Make sure you installed one! */
-
# define HSE_CLOCK_CONFIG /* HSE with 8 MHz xtal */
#else
# define MSI_CLOCK_CONFIG /* MSI @ 4 MHz autotrimmed via LSE */
@@ -97,7 +96,7 @@
#define STM32L4_LSI_FREQUENCY 32000
#define STM32L4_LSE_FREQUENCY 32768
-#define STM32L4_BOARD_USEHSI 1
+#define STM32L4_BOARD_USEMSI 1
/* XXX sysclk mux = pllclk */
@@ -206,6 +205,8 @@
* as per comment above HSI) .
*/
+#define STM32L4_BOARD_NOPLL 1
+
#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1)
/* 'main' PLL config; we use this to generate our system clock via the R
@@ -252,12 +253,12 @@
#define STM32L4_PLLSAI2CFG_PLLR 0
#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED
-#define STM32L4_SYSCLK_FREQUENCY 80000000ul
+#define STM32L4_SYSCLK_FREQUENCY 48000000ul
/* CLK48 will come from PLLSAI1 (implicitly Q) */
#define STM32L4_USE_CLK48
-#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1
+#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_MSI
/* enable the LSE oscillator, used automatically trim the MSI, and for RTC */
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