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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/11/16 23:29:38 UTC
[GitHub] [incubator-nuttx] pkarashchenko commented on a diff in pull request #7595: SAMA5Dx ADC and TSD fixes
pkarashchenko commented on code in PR #7595:
URL: https://github.com/apache/incubator-nuttx/pull/7595#discussion_r1024604426
##########
arch/arm/src/sama5/Kconfig:
##########
@@ -3712,6 +3722,17 @@ config SAMA5_ADC_TIOA_BOTH
endchoice # ADTRG edge
endif # SAMA5_ADC_TIOATRIG
+
+if SAMA5_ADC_PERIODIC_TRIG
+
+config SAMA5_ADC_TRIGGER_PERIOD
+ int "ADC Periodic Trigger Rate, useconds"
+ default 50000
+ ---help---
+ This setting determines the periodic sample trigger rate in useconds.
Review Comment:
please use TABs only in Kconfig files
##########
arch/arm/src/sama5/hardware/sam_adc.h:
##########
@@ -119,6 +120,9 @@
#ifdef ATSAMA5D3
# define SAM_ADC_CGR (SAM_TSADC_VBASE+SAM_ADC_CGR_OFFSET)
+#endif
+
+#if defined (ATSAMA5D3) || defined (ATSAMA5D2)
Review Comment:
ditto
##########
arch/arm/src/sama5/sam_tsd.c:
##########
@@ -245,12 +257,7 @@ static const struct file_operations g_tsdops =
/* The driver state structure is pre-allocated. */
-static struct sam_tsd_s g_tsd =
-{
- .threshx = INVALID_THRESHOLD,
- .threshy = INVALID_THRESHOLD,
- .waitsem = SEM_INITIALIZER(0),
-};
+static struct sam_tsd_s g_tsd;
Review Comment:
why this is changed?
##########
arch/arm/src/sama5/hardware/sam_adc.h:
##########
@@ -36,7 +36,7 @@
/* General definitions ******************************************************/
-#if defined(ATSAMA5D3)
+#if defined(ATSAMA5D3) || defined (ATSAMA5D2)
Review Comment:
```suggestion
#if defined(ATSAMA5D3) || defined(ATSAMA5D2)
```
##########
arch/arm/src/sama5/hardware/sam_adc.h:
##########
@@ -129,7 +133,7 @@
#define SAM_ADC_CDR3 (SAM_TSADC_VBASE+SAM_ADC_CDR3_OFFSET)
#define SAM_ADC_CDR4 (SAM_TSADC_VBASE+SAM_ADC_CDR4_OFFSET)
-#ifdef ATSAMA5D3
+#if defined (ATSAMA5D3) || defined (ATSAMA5D2)
Review Comment:
ditto
##########
arch/arm/src/sama5/hardware/sam_adc.h:
##########
@@ -204,21 +208,30 @@
# define ADC_MR_STARTUP_960 (15 << ADC_MR_STARTUP_SHIFT) /* 960 periods of ADCClock */
#ifdef ATSAMA5D3
-# define ADC_MR_SETTLING_SHIFT (20) /* Bits 20-21: Analog Settling Time */
+# define ADC_MR_SETTLING_SHIFT (20) /* Bits 20-21: Analog Settling Time */
# define ADC_MR_SETTLING_MASK (15 << ADC_MR_SETTLING_SHIFT)
-# define ADC_MR_SETTLING_3 (0 << ADC_MR_SETTLING_SHIFT) /* 3 periods of ADCClock */
-# define ADC_MR_SETTLING_5 (1 << ADC_MR_SETTLING_SHIFT) /* 5 periods of ADCClock */
-# define ADC_MR_SETTLING_9 (2 << ADC_MR_SETTLING_SHIFT) /* 9 periods of ADCClock */
-# define ADC_MR_SETTLING_17 (3 << ADC_MR_SETTLING_SHIFT) /* 17 periods of ADCClock */
+# define ADC_MR_SETTLING_3 (0 << ADC_MR_SETTLING_SHIFT) /* 3 periods of ADCClock */
+# define ADC_MR_SETTLING_5 (1 << ADC_MR_SETTLING_SHIFT) /* 5 periods of ADCClock */
+# define ADC_MR_SETTLING_9 (2 << ADC_MR_SETTLING_SHIFT) /* 9 periods of ADCClock */
+# define ADC_MR_SETTLING_17 (3 << ADC_MR_SETTLING_SHIFT) /* 17 periods of ADCClock */
+#else
+# define ADC_MR_SETTLING_SHIFT (20) /* Not present in SAMA5D2 or SAMA5D4 */
+# define ADC_MR_SETTLING_MASK (0)
+# define ADC_MR_SETTLING_3 (0 << ADC_MR_SETTLING_SHIFT) /* n/a periods of ADCClock */
+# define ADC_MR_SETTLING_5 (0 << ADC_MR_SETTLING_SHIFT) /* n/a periods of ADCClock */
+# define ADC_MR_SETTLING_9 (0 << ADC_MR_SETTLING_SHIFT) /* n/a periods of ADCClock */
+# define ADC_MR_SETTLING_17 (0 << ADC_MR_SETTLING_SHIFT) /* n/a periods of ADCClock */
+#endif
+#if defined (ATSAMA5D3) || defined (ATSAMA5D2)
Review Comment:
```suggestion
#if defined(ATSAMA5D3) || defined(ATSAMA5D2)
```
##########
arch/arm/src/sama5/sam_adc.c:
##########
@@ -2132,6 +2247,9 @@ struct adc_dev_s *sam_adc_initialize(void)
ADC_MR_SETTLING_MASK);
regval |= (ADC_MR_STARTUP_512 | ADC_MR_TRACKTIM(0) |
ADC_MR_SETTLING_17);
+#if defined ATSAMA5D2
Review Comment:
```suggestion
#if defined(ATSAMA5D2)
```
##########
arch/arm/src/sama5/hardware/sam_adc.h:
##########
@@ -204,21 +208,30 @@
# define ADC_MR_STARTUP_960 (15 << ADC_MR_STARTUP_SHIFT) /* 960 periods of ADCClock */
#ifdef ATSAMA5D3
-# define ADC_MR_SETTLING_SHIFT (20) /* Bits 20-21: Analog Settling Time */
+# define ADC_MR_SETTLING_SHIFT (20) /* Bits 20-21: Analog Settling Time */
# define ADC_MR_SETTLING_MASK (15 << ADC_MR_SETTLING_SHIFT)
-# define ADC_MR_SETTLING_3 (0 << ADC_MR_SETTLING_SHIFT) /* 3 periods of ADCClock */
-# define ADC_MR_SETTLING_5 (1 << ADC_MR_SETTLING_SHIFT) /* 5 periods of ADCClock */
-# define ADC_MR_SETTLING_9 (2 << ADC_MR_SETTLING_SHIFT) /* 9 periods of ADCClock */
-# define ADC_MR_SETTLING_17 (3 << ADC_MR_SETTLING_SHIFT) /* 17 periods of ADCClock */
+# define ADC_MR_SETTLING_3 (0 << ADC_MR_SETTLING_SHIFT) /* 3 periods of ADCClock */
+# define ADC_MR_SETTLING_5 (1 << ADC_MR_SETTLING_SHIFT) /* 5 periods of ADCClock */
+# define ADC_MR_SETTLING_9 (2 << ADC_MR_SETTLING_SHIFT) /* 9 periods of ADCClock */
+# define ADC_MR_SETTLING_17 (3 << ADC_MR_SETTLING_SHIFT) /* 17 periods of ADCClock */
+#else
+# define ADC_MR_SETTLING_SHIFT (20) /* Not present in SAMA5D2 or SAMA5D4 */
+# define ADC_MR_SETTLING_MASK (0)
+# define ADC_MR_SETTLING_3 (0 << ADC_MR_SETTLING_SHIFT) /* n/a periods of ADCClock */
+# define ADC_MR_SETTLING_5 (0 << ADC_MR_SETTLING_SHIFT) /* n/a periods of ADCClock */
+# define ADC_MR_SETTLING_9 (0 << ADC_MR_SETTLING_SHIFT) /* n/a periods of ADCClock */
+# define ADC_MR_SETTLING_17 (0 << ADC_MR_SETTLING_SHIFT) /* n/a periods of ADCClock */
+#endif
+#if defined (ATSAMA5D3) || defined (ATSAMA5D2)
# define ADC_MR_ANACH (1 << 23) /* Bit 23: Analog Change */
#endif
#define ADC_MR_TRACKTIM_SHIFT (24) /* Bits 24-27: Tracking Time */
#define ADC_MR_TRACKTIM_MASK (15 << ADC_MR_TRACKTIM_SHIFT)
# define ADC_MR_TRACKTIM(n) ((uint32_t)(n) << ADC_MR_TRACKTIM_SHIFT)
-#ifdef ATSAMA5D3
+#if defined (ATSAMA5D3) || defined (ATSAMA5D2)
Review Comment:
ditto
##########
arch/arm/src/sama5/hardware/sam_adc.h:
##########
@@ -67,17 +67,18 @@
#ifdef ATSAMA5D3
# define SAM_ADC_CGR_OFFSET 0x0048 /* Channel Gain Register */
-# define SAM_ADC_COR_OFFSET 0x004c /* Channel Offset Register */
#endif
+#define SAM_ADC_COR_OFFSET 0x004c /* Channel Offset Register */
+
#define SAM_ADC_CDR_OFFSET(n) (0x0050+((n)<<2))
#define SAM_ADC_CDR0_OFFSET 0x0050 /* Channel Data Register 0 */
#define SAM_ADC_CDR1_OFFSET 0x0054 /* Channel Data Register 1 */
#define SAM_ADC_CDR2_OFFSET 0x0058 /* Channel Data Register 2 */
#define SAM_ADC_CDR3_OFFSET 0x005c /* Channel Data Register 3 */
#define SAM_ADC_CDR4_OFFSET 0x0060 /* Channel Data Register 4 */
-#ifdef ATSAMA5D3
+#if defined (ATSAMA5D3) || defined (ATSAMA5D2)
Review Comment:
```suggestion
#if defined(ATSAMA5D3) || defined(ATSAMA5D2)
```
##########
arch/arm/src/sama5/sam_tsd.c:
##########
@@ -137,6 +137,18 @@
# define MAX(a,b) (((a) > (b)) ? (a) : (b))
#endif
+#ifndef BOARD_TSSCTIM
+# define BOARD_TSSCTIM 0
Review Comment:
```suggestion
# define BOARD_TSSCTIM 0
```
##########
arch/arm/src/sama5/sam_tsd.c:
##########
@@ -137,6 +137,18 @@
# define MAX(a,b) (((a) > (b)) ? (a) : (b))
#endif
+#ifndef BOARD_TSSCTIM
+# define BOARD_TSSCTIM 0
+#endif
+
+#ifndef BOARD_TSD_PENDETSENS
+# define BOARD_TSD_PENDETSENS 0
Review Comment:
```suggestion
# define BOARD_TSD_PENDETSENS 0
```
##########
arch/arm/src/sama5/sam_tsd.c:
##########
@@ -137,6 +137,18 @@
# define MAX(a,b) (((a) > (b)) ? (a) : (b))
#endif
+#ifndef BOARD_TSSCTIM
+# define BOARD_TSSCTIM 0
+#endif
+
+#ifndef BOARD_TSD_PENDETSENS
+# define BOARD_TSD_PENDETSENS 0
+#endif
+
+#if !defined BOARD_TSD_IBCTL && defined ATSAMA5D2
+# define BOARD_TSD_IBCTL 0
Review Comment:
```suggestion
# define BOARD_TSD_IBCTL 0
```
##########
arch/arm/src/sama5/sam_tsd.c:
##########
@@ -1291,6 +1349,8 @@ static void sam_tsd_tracking(struct sam_tsd_s *priv, uint32_t time)
uint32_t tracktim;
uint32_t regval;
+#if defined (ATSAMA5D4)
Review Comment:
```suggestion
#if defined(ATSAMA5D4)
```
##########
arch/arm/src/sama5/sam_tsd.c:
##########
@@ -1551,21 +1609,42 @@ static void sam_tsd_initialize(struct sam_tsd_s *priv)
/* Enable pen contact detection */
+ regval = sam_adc_getreg(priv->adc, SAM_ADC_TSMR);
regval |= ADC_TSMR_PENDET;
sam_adc_putreg(priv->adc, SAM_ADC_TSMR, regval);
/* Set up pen debounce time */
sam_tsd_debounce(priv, BOARD_TSD_DEBOUNCE);
+ /* configure pen sensitivity */
+
+ regval = sam_adc_getreg(priv->adc, SAM_ADC_ACR);
+ regval &= ~ADC_ACR_PENDETSENS_MASK;
+ regval |= ADC_ACR_PENDETSENS(BOARD_TSD_PENDETSENS);
+#if defined ATSAMA5D2
Review Comment:
```suggestion
#if defined(ATSAMA5D2)
```
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