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Posted to commits@mynewt.apache.org by ja...@apache.org on 2022/09/12 07:28:52 UTC
[mynewt-nimble] branch master updated (1101fecc -> 2c3c3bf8)
This is an automated email from the ASF dual-hosted git repository.
janc pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
from 1101fecc nimble/ll: Fix txend callback
new 2a50a58d nimble/ll: Rename PLNA to FEM
new fb1ae2ec nimble/fem: Add support for runtime configuration of SKY66112
new 2c3c3bf8 nimble/ll: Add generic interface for controlling FEM antenna
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
.../controller/{ble_ll_plna.h => ble_ll_fem.h} | 27 +--
nimble/controller/pkg.yml | 10 +-
nimble/controller/src/ble_ll.c | 10 +-
nimble/controller/src/ble_ll_hci_vs.c | 27 +++
nimble/controller/syscfg.defunct.yml | 24 +++
nimble/controller/syscfg.yml | 34 ++--
.../fem/sky66112/include/sky66112/sky66112.h} | 19 +--
nimble/drivers/{plna => fem}/sky66112/pkg.yml | 7 +-
nimble/drivers/fem/sky66112/src/sky66112.c | 178 +++++++++++++++++++
nimble/drivers/{plna => fem}/sky66112/syscfg.yml | 11 +-
nimble/drivers/nrf52/src/ble_phy.c | 88 +++++-----
nimble/drivers/nrf5340/src/ble_phy.c | 188 ++++++++++-----------
nimble/drivers/plna/sky66112/src/sky66112.c | 117 -------------
nimble/include/nimble/hci_common.h | 5 +
14 files changed, 440 insertions(+), 305 deletions(-)
rename nimble/controller/include/controller/{ble_ll_plna.h => ble_ll_fem.h} (65%)
copy nimble/{host/services/ipss/include/services/ipss/ble_svc_ipss.h => drivers/fem/sky66112/include/sky66112/sky66112.h} (80%)
rename nimble/drivers/{plna => fem}/sky66112/pkg.yml (90%)
create mode 100644 nimble/drivers/fem/sky66112/src/sky66112.c
rename nimble/drivers/{plna => fem}/sky66112/syscfg.yml (89%)
delete mode 100644 nimble/drivers/plna/sky66112/src/sky66112.c
[mynewt-nimble] 01/03: nimble/ll: Rename PLNA to FEM
Posted by ja...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
janc pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
commit 2a50a58da6b547622b02fad0ea5cabe3bfa97f9c
Author: Szymon Janc <sz...@codecoup.pl>
AuthorDate: Wed Aug 31 14:59:19 2022 +0200
nimble/ll: Rename PLNA to FEM
This is in preparation to extend generic API with additions like
multiple antenna support which is offered by some FEMs.
---
.../controller/{ble_ll_plna.h => ble_ll_fem.h} | 22 +--
nimble/controller/pkg.yml | 8 +-
nimble/controller/src/ble_ll.c | 10 +-
nimble/controller/syscfg.defunct.yml | 24 +++
nimble/controller/syscfg.yml | 30 ++--
nimble/drivers/{plna => fem}/sky66112/pkg.yml | 6 +-
.../drivers/{plna => fem}/sky66112/src/sky66112.c | 14 +-
nimble/drivers/{plna => fem}/sky66112/syscfg.yml | 4 +-
nimble/drivers/nrf52/src/ble_phy.c | 88 +++++-----
nimble/drivers/nrf5340/src/ble_phy.c | 188 ++++++++++-----------
10 files changed, 209 insertions(+), 185 deletions(-)
diff --git a/nimble/controller/include/controller/ble_ll_plna.h b/nimble/controller/include/controller/ble_ll_fem.h
similarity index 73%
rename from nimble/controller/include/controller/ble_ll_plna.h
rename to nimble/controller/include/controller/ble_ll_fem.h
index c4fb65ea..3d645173 100644
--- a/nimble/controller/include/controller/ble_ll_plna.h
+++ b/nimble/controller/include/controller/ble_ll_fem.h
@@ -17,8 +17,8 @@
* under the License.
*/
-#ifndef H_BLE_LL_PLNA_
-#define H_BLE_LL_PLNA_
+#ifndef H_BLE_LL_FEM_
+#define H_BLE_LL_FEM_
#ifdef __cplusplus
extern "C" {
@@ -26,20 +26,20 @@ extern "C" {
#include "syscfg/syscfg.h"
-#if MYNEWT_VAL(BLE_LL_PA)
-void ble_ll_plna_pa_init(void);
-void ble_ll_plna_pa_enable(void);
-void ble_ll_plna_pa_disable(void);
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+void ble_ll_fem_pa_init(void);
+void ble_ll_fem_pa_enable(void);
+void ble_ll_fem_pa_disable(void);
#endif
-#if MYNEWT_VAL(BLE_LL_LNA)
-void ble_ll_plna_lna_init(void);
-void ble_ll_plna_lna_enable(void);
-void ble_ll_plna_lna_disable(void);
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+void ble_ll_fem_lna_init(void);
+void ble_ll_fem_lna_enable(void);
+void ble_ll_fem_lna_disable(void);
#endif
#ifdef __cplusplus
}
#endif
-#endif /* H_BLE_LL_PLNA_ */
+#endif /* H_BLE_LL_FEM_ */
diff --git a/nimble/controller/pkg.yml b/nimble/controller/pkg.yml
index 702f3d89..9115e452 100644
--- a/nimble/controller/pkg.yml
+++ b/nimble/controller/pkg.yml
@@ -29,10 +29,10 @@ pkg.req_apis:
- ble_driver
- ble_transport
- stats
-pkg.req_apis.BLE_LL_PA:
- - ble_ll_pa
-pkg.req_apis.BLE_LL_LNA:
- - ble_ll_lna
+pkg.req_apis.BLE_LL_FEM_PA:
+ - ble_ll_fem_pa
+pkg.req_apis.BLE_LL_FEM_LNA:
+ - ble_ll_fem_lna
pkg.deps:
- "@apache-mynewt-core/kernel/os"
diff --git a/nimble/controller/src/ble_ll.c b/nimble/controller/src/ble_ll.c
index 356bf4af..d394bc4f 100644
--- a/nimble/controller/src/ble_ll.c
+++ b/nimble/controller/src/ble_ll.c
@@ -43,7 +43,7 @@
#include "controller/ble_ll_rfmgmt.h"
#include "controller/ble_ll_trace.h"
#include "controller/ble_ll_sync.h"
-#include "controller/ble_ll_plna.h"
+#include "controller/ble_ll_fem.h"
#include "ble_ll_conn_priv.h"
#include "ble_ll_hci_priv.h"
#include "ble_ll_priv.h"
@@ -1640,11 +1640,11 @@ ble_ll_reset(void)
#endif
-#if MYNEWT_VAL(BLE_LL_PA)
- ble_ll_plna_pa_init();
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+ ble_ll_fem_pa_init();
#endif
-#if MYNEWT_VAL(BLE_LL_LNA)
- ble_ll_plna_lna_init();
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+ ble_ll_fem_lna_init();
#endif
/* Re-initialize the PHY */
diff --git a/nimble/controller/syscfg.defunct.yml b/nimble/controller/syscfg.defunct.yml
index 10206da0..6190c6bc 100644
--- a/nimble/controller/syscfg.defunct.yml
+++ b/nimble/controller/syscfg.defunct.yml
@@ -46,6 +46,30 @@ syscfg.defs:
description: use BLE_LL_MANUFACTURER_ID
value: 0x0B65
deprecated: 1
+ BLE_LL_PA:
+ description: use BLE_LL_FEM_PA
+ value: 0
+ deprecated: 1
+ BLE_LL_PA_GPIO:
+ description: use BLE_LL_FEM_PA_GPIO
+ value: -1
+ deprecated: 1
+ BLE_LL_PA_TURN_ON_US:
+ description: use BLE_LL_FEM_PA_TURN_ON_US
+ value: 1
+ deprecated: 1
+ BLE_LL_LNA:
+ description: use BLE_LL_FEM_LNA
+ value: 0
+ deprecated: 1
+ BLE_LL_LNA_GPIO:
+ description: use BLE_LL_FEM_LNA_GPIO
+ value: -1
+ deprecated: 1
+ BLE_LL_LNA_TURN_ON_US:
+ description: use BLE_LL_FEM_LNA_TURN_ON_US
+ value: 1
+ deprecated: 1
# defunct settings (to be removed eventually)
BLE_DEVICE:
diff --git a/nimble/controller/syscfg.yml b/nimble/controller/syscfg.yml
index acd0ef0d..11e582c5 100644
--- a/nimble/controller/syscfg.yml
+++ b/nimble/controller/syscfg.yml
@@ -406,30 +406,30 @@ syscfg.defs:
line number where assertion occured.
value: MYNEWT_VAL(BLE_LL_VND_EVENT_ON_ASSERT)
- BLE_LL_PA:
- description: Enable PA support
- value: 0
- BLE_LL_PA_GPIO:
+ BLE_LL_FEM_PA:
+ description: Enable FEM PA support
+ value: MYNEWT_VAL(BLE_LL_PA)
+ BLE_LL_FEM_PA_GPIO:
description: >
GPIO pin number to control PA. Pin is set to high state when PA
should be enabled.
- value: -1
- BLE_LL_PA_TURN_ON_US:
+ value: MYNEWT_VAL(BLE_LL_PA_GPIO)
+ BLE_LL_FEM_PA_TURN_ON_US:
description: >
Time required for PA to turn on, in microseconds.
- value: 1
- BLE_LL_LNA:
+ value: MYNEWT_VAL(BLE_LL_PA_TURN_ON_US)
+ BLE_LL_FEM_LNA:
description: Enable LNA support
- value: 0
- BLE_LL_LNA_GPIO:
+ value: MYNEWT_VAL(BLE_LL_LNA)
+ BLE_LL_FEM_LNA_GPIO:
description: >
GPIO pin number to control LNA. Pin is set to high state when LNA
should be enabled.
- value: -1
- BLE_LL_LNA_TURN_ON_US:
+ value: MYNEWT_VAL(BLE_LL_LNA_GPIO)
+ BLE_LL_FEM_LNA_TURN_ON_US:
description: >
Time required for LNA to turn on, in microseconds.
- value: 1
+ value: MYNEWT_VAL(BLE_LL_LNA_TURN_ON_US)
BLE_LL_SYSINIT_STAGE:
description: >
@@ -519,8 +519,8 @@ syscfg.vals.'!BLE_HOST && !BABBLESIM':
syscfg.restrictions:
- BLE_TRANSPORT_LL == "native"
- BLE_LL_PUBLIC_DEV_ADDR <= 0xffffffffffff
- - BLE_LL_PA == 0 || BLE_LL_PA_GPIO >= 0
- - BLE_LL_LNA == 0 || BLE_LL_LNA_GPIO >= 0
+ - BLE_LL_FEM_PA == 0 || BLE_LL_FEM_PA_GPIO >= 0
+ - BLE_LL_FEM_LNA == 0 || BLE_LL_FEM_LNA_GPIO >= 0
$import:
# defunct and deprecated settings
diff --git a/nimble/drivers/plna/sky66112/pkg.yml b/nimble/drivers/fem/sky66112/pkg.yml
similarity index 92%
rename from nimble/drivers/plna/sky66112/pkg.yml
rename to nimble/drivers/fem/sky66112/pkg.yml
index c3cb0fd3..5dd738a0 100644
--- a/nimble/drivers/plna/sky66112/pkg.yml
+++ b/nimble/drivers/fem/sky66112/pkg.yml
@@ -17,13 +17,13 @@
# under the License.
#
-pkg.name: nimble/drivers/plna/sky66112
+pkg.name: nimble/drivers/fem/sky66112
pkg.description: Driver for SKY66112 front-end module
pkg.author: "Apache Mynewt <de...@mynewt.apache.org>"
pkg.homepage: "https://mynewt.apache.org/"
pkg.apis:
- - ble_ll_pa
- - ble_ll_lna
+ - ble_ll_fem_pa
+ - ble_ll_fem_lna
pkg.deps:
- nimble/controller
diff --git a/nimble/drivers/plna/sky66112/src/sky66112.c b/nimble/drivers/fem/sky66112/src/sky66112.c
similarity index 91%
rename from nimble/drivers/plna/sky66112/src/sky66112.c
rename to nimble/drivers/fem/sky66112/src/sky66112.c
index 4a849fbb..7a957b0b 100644
--- a/nimble/drivers/plna/sky66112/src/sky66112.c
+++ b/nimble/drivers/fem/sky66112/src/sky66112.c
@@ -21,7 +21,7 @@
#include <stdint.h>
#include "syscfg/syscfg.h"
#include "hal/hal_gpio.h"
-#include "controller/ble_ll_plna.h"
+#include "controller/ble_ll_fem.h"
#define NO_BYPASS \
((MYNEWT_VAL(SKY66112_TX_BYPASS) == 0) && \
@@ -38,13 +38,13 @@ sky66112_bypass(uint8_t enabled)
}
void
-ble_ll_plna_pa_init(void)
+ble_ll_fem_pa_init(void)
{
/* Nothing to do here */
}
void
-ble_ll_plna_pa_enable(void)
+ble_ll_fem_pa_enable(void)
{
if (!MYNEWT_VAL(SKY66112_TX_BYPASS)) {
sky66112_bypass(0);
@@ -52,7 +52,7 @@ ble_ll_plna_pa_enable(void)
}
void
-ble_ll_plna_pa_disable(void)
+ble_ll_fem_pa_disable(void)
{
if (!MYNEWT_VAL(SKY66112_TX_BYPASS)) {
sky66112_bypass(1);
@@ -60,13 +60,13 @@ ble_ll_plna_pa_disable(void)
}
void
-ble_ll_plna_lna_init(void)
+ble_ll_fem_lna_init(void)
{
/* Nothing to do here */
}
void
-ble_ll_plna_lna_enable(void)
+ble_ll_fem_lna_enable(void)
{
if (!MYNEWT_VAL(SKY66112_RX_BYPASS)) {
sky66112_bypass(0);
@@ -74,7 +74,7 @@ ble_ll_plna_lna_enable(void)
}
void
-ble_ll_plna_lna_disable(void)
+ble_ll_fem_lna_disable(void)
{
if (!MYNEWT_VAL(SKY66112_RX_BYPASS)) {
sky66112_bypass(1);
diff --git a/nimble/drivers/plna/sky66112/syscfg.yml b/nimble/drivers/fem/sky66112/syscfg.yml
similarity index 97%
rename from nimble/drivers/plna/sky66112/syscfg.yml
rename to nimble/drivers/fem/sky66112/syscfg.yml
index 50434553..c7aaa0a8 100644
--- a/nimble/drivers/plna/sky66112/syscfg.yml
+++ b/nimble/drivers/fem/sky66112/syscfg.yml
@@ -57,10 +57,10 @@ syscfg.defs:
Only valid if CPS signal is controller by driver.
value: 0
-syscfg.vals.!BLE_LL_PA:
+syscfg.vals.!BLE_LL_FEM_PA:
# Enable TX bypass by default if PA is disabled
SKY66112_TX_BYPASS: 1
-syscfg.vals.!BLE_LL_LNA:
+syscfg.vals.!BLE_LL_FEM_LNA:
# Enable RX bypass by default if LNA is disabled
SKY66112_RX_BYPASS: 1
diff --git a/nimble/drivers/nrf52/src/ble_phy.c b/nimble/drivers/nrf52/src/ble_phy.c
index bfc111b6..a94cb2a7 100644
--- a/nimble/drivers/nrf52/src/ble_phy.c
+++ b/nimble/drivers/nrf52/src/ble_phy.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <string.h>
#include <assert.h>
+#include <controller/ble_ll_fem.h>
#include <hal/nrf_radio.h>
#include <hal/nrf_ccm.h>
#include <hal/nrf_aar.h>
@@ -37,7 +38,6 @@
#include "controller/ble_phy.h"
#include "controller/ble_phy_trace.h"
#include "controller/ble_ll.h"
-#include "controller/ble_ll_plna.h"
#include "nrfx.h"
#if MYNEWT
#include "mcu/nrf52_clock.h"
@@ -321,20 +321,20 @@ struct nrf_ccm_data g_nrf_ccm_data;
static int g_ble_phy_gpiote_idx;
-#if MYNEWT_VAL(BLE_LL_PA) || MYNEWT_VAL(BLE_LL_LNA)
+#if MYNEWT_VAL(BLE_LL_FEM_PA) || MYNEWT_VAL(BLE_LL_FEM_LNA)
-#define PLNA_SINGLE_GPIO \
- (!MYNEWT_VAL(BLE_LL_PA) || !MYNEWT_VAL(BLE_LL_LNA) || \
- (MYNEWT_VAL(BLE_LL_PA_GPIO) == MYNEWT_VAL(BLE_LL_LNA_GPIO)))
+#define FEM_SINGLE_GPIO \
+ (!MYNEWT_VAL(BLE_LL_FEM_PA) || !MYNEWT_VAL(BLE_LL_FEM_LNA) || \
+ (MYNEWT_VAL(BLE_LL_FEM_PA_GPIO) == MYNEWT_VAL(BLE_LL_FEM_LNA_GPIO)))
-#if PLNA_SINGLE_GPIO
-static uint8_t plna_idx;
+#if FEM_SINGLE_GPIO
+static uint8_t fem_idx;
#else
-#if MYNEWT_VAL(BLE_LL_PA)
-static uint8_t plna_pa_idx;
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+static uint8_t fem_pa_idx;
#endif
-#if MYNEWT_VAL(BLE_LL_LNA)
-static uint8_t plna_lna_idx;
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+static uint8_t fem_lna_idx;
#endif
#endif
@@ -466,14 +466,14 @@ ble_phy_mode_set(uint8_t tx_phy_mode, uint8_t rx_phy_mode)
#endif
static void
-ble_phy_plna_enable_pa(void)
+ble_phy_fem_enable_pa(void)
{
-#if MYNEWT_VAL(BLE_LL_PA)
- ble_ll_plna_pa_enable();
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+ ble_ll_fem_pa_enable();
-#if !PLNA_SINGLE_GPIO
- NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[plna_pa_idx]);
- NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[plna_pa_idx]);
+#if !FEM_SINGLE_GPIO
+ NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[fem_pa_idx]);
+ NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[fem_pa_idx]);
#endif
NRF_PPI->CHENSET = PPI_CHEN_CH6_Msk | PPI_CHEN_CH7_Msk;
@@ -481,14 +481,14 @@ ble_phy_plna_enable_pa(void)
}
static void
-ble_phy_plna_enable_lna(void)
+ble_phy_fem_enable_lna(void)
{
-#if MYNEWT_VAL(BLE_LL_LNA)
- ble_ll_plna_lna_enable();
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+ ble_ll_fem_lna_enable();
-#if !PLNA_SINGLE_GPIO
- NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[plna_lna_idx]);
- NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[plna_lna_idx]);
+#if !FEM_SINGLE_GPIO
+ NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[fem_lna_idx]);
+ NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[fem_lna_idx]);
#endif
NRF_PPI->CHENSET = PPI_CHEN_CH6_Msk | PPI_CHEN_CH7_Msk;
@@ -1054,7 +1054,7 @@ ble_phy_tx_end_isr(void)
NRF_TIMER0->EVENTS_COMPARE[0] = 0;
nrf_ppi_channels_enable(NRF_PPI, PPI_CHEN_CH21_Msk);
- ble_phy_plna_enable_lna();
+ ble_phy_fem_enable_lna();
} else if (transition == BLE_PHY_TRANSITION_TX_TX) {
/* Schedule TX exactly T_IFS after TX end captured in CC[2] */
tx_time = NRF_TIMER0->CC[2] + ble_phy_tifs_get();
@@ -1196,7 +1196,7 @@ ble_phy_rx_end_isr(void)
NRF_TIMER0->EVENTS_COMPARE[0] = 0;
nrf_ppi_channels_enable(NRF_PPI, PPI_CHEN_CH20_Msk);
- ble_phy_plna_enable_pa();
+ ble_phy_fem_enable_pa();
/*
* XXX: Hack warning!
@@ -1408,9 +1408,9 @@ ble_phy_isr(void)
switch (g_ble_phy_data.phy_state) {
case BLE_PHY_STATE_RX:
-#if MYNEWT_VAL(BLE_LL_LNA)
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
NRF_PPI->CHENCLR = PPI_CHEN_CH6_Msk | PPI_CHEN_CH7_Msk;
- ble_ll_plna_lna_disable();
+ ble_ll_fem_lna_disable();
#endif
if (g_ble_phy_data.phy_rx_started) {
ble_phy_rx_end_isr();
@@ -1419,9 +1419,9 @@ ble_phy_isr(void)
}
break;
case BLE_PHY_STATE_TX:
-#if MYNEWT_VAL(BLE_LL_PA)
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
NRF_PPI->CHENCLR = PPI_CHEN_CH6_Msk | PPI_CHEN_CH7_Msk;
- ble_ll_plna_pa_disable();
+ ble_ll_fem_pa_disable();
#endif
ble_phy_tx_end_isr();
break;
@@ -1441,8 +1441,8 @@ ble_phy_isr(void)
#if MYNEWT_VAL(BLE_PHY_DBG_TIME_TXRXEN_READY_PIN) >= 0 || \
MYNEWT_VAL(BLE_PHY_DBG_TIME_ADDRESS_END_PIN) >= 0 || \
MYNEWT_VAL(BLE_PHY_DBG_TIME_WFR_PIN) >= 0 || \
- MYNEWT_VAL(BLE_LL_PA) || \
- MYNEWT_VAL(BLE_LL_LNA)
+ MYNEWT_VAL(BLE_LL_FEM_PA) || \
+ MYNEWT_VAL(BLE_LL_FEM_LNA)
static int
ble_phy_gpiote_configure(int pin)
{
@@ -1630,19 +1630,19 @@ ble_phy_init(void)
(uint32_t)&(NRF_TIMER0->EVENTS_COMPARE[3]),
(uint32_t)&(NRF_RADIO->TASKS_DISABLE));
-#if MYNEWT_VAL(BLE_LL_PA) || MYNEWT_VAL(BLE_LL_LNA)
-#if PLNA_SINGLE_GPIO
- plna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_PA_GPIO));
- NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[plna_idx]);
- NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[plna_idx]);
+#if MYNEWT_VAL(BLE_LL_FEM_PA) || MYNEWT_VAL(BLE_LL_FEM_LNA)
+#if FEM_SINGLE_GPIO
+ fem_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_PA_GPIO));
+ NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[fem_idx]);
+ NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[fem_idx]);
#else
-#if MYNEWT_VAL(BLE_LL_PA)
- plna_pa_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_PA_GPIO));
- NRF_GPIOTE->TASKS_CLR[plna_pa_idx] = 1;
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+ fem_pa_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_PA_GPIO));
+ NRF_GPIOTE->TASKS_CLR[fem_pa_idx] = 1;
#endif
-#if MYNEWT_VAL(BLE_LL_LNA)
- plna_lna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_LNA_GPIO));
- NRF_GPIOTE->TASKS_CLR[plna_lna_idx] = 1;
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+ fem_lna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_LNA_GPIO));
+ NRF_GPIOTE->TASKS_CLR[fem_lna_idx] = 1;
#endif
#endif
@@ -1814,7 +1814,7 @@ ble_phy_tx_set_start_time(uint32_t cputime, uint8_t rem_usecs)
nrf_ppi_channels_enable(NRF_PPI, PPI_CHEN_CH20_Msk);
rc = 0;
- ble_phy_plna_enable_pa();
+ ble_phy_fem_enable_pa();
}
return rc;
@@ -1861,7 +1861,7 @@ ble_phy_rx_set_start_time(uint32_t cputime, uint8_t rem_usecs)
/* Enable PPI to automatically start RXEN */
nrf_ppi_channels_enable(NRF_PPI, PPI_CHEN_CH21_Msk);
- ble_phy_plna_enable_lna();
+ ble_phy_fem_enable_lna();
/* Start rx */
rc = ble_phy_rx();
diff --git a/nimble/drivers/nrf5340/src/ble_phy.c b/nimble/drivers/nrf5340/src/ble_phy.c
index 6999aee6..76c0289e 100644
--- a/nimble/drivers/nrf5340/src/ble_phy.c
+++ b/nimble/drivers/nrf5340/src/ble_phy.c
@@ -27,7 +27,7 @@
#include <nimble/nimble_opt.h>
#include <nimble/nimble_npl.h>
#include <controller/ble_phy.h>
-#include "controller/ble_ll_plna.h"
+#include "controller/ble_ll_fem.h"
#include <ble/xcvr.h>
#include <controller/ble_phy_trace.h>
@@ -59,8 +59,8 @@
#define DPPI_CH_ENABLE_ALL (DPPIC_CHEN_CH0_Msk | DPPIC_CHEN_CH1_Msk | DPPIC_CHEN_CH2_Msk | \
DPPIC_CHEN_CH3_Msk | DPPIC_CHEN_CH4_Msk | DPPIC_CHEN_CH5_Msk)
-#define DPPI_CH_MASK_PLNA (DPPI_CH_MASK(TIMER0_EVENTS_COMPARE_4) | \
- DPPI_CH_MASK(RADIO_EVENTS_DISABLED))
+#define DPPI_CH_MASK_FEM (DPPI_CH_MASK(TIMER0_EVENTS_COMPARE_4) | \
+ DPPI_CH_MASK(RADIO_EVENTS_DISABLED))
extern uint8_t g_nrf_num_irks;
extern uint32_t g_nrf_irk_list[];
@@ -244,20 +244,20 @@ static struct nrf_ccm_data nrf_ccm_data;
static int g_ble_phy_gpiote_idx;
-#if MYNEWT_VAL(BLE_LL_PA) || MYNEWT_VAL(BLE_LL_LNA)
+#if MYNEWT_VAL(BLE_LL_FEM_PA) || MYNEWT_VAL(BLE_LL_FEM_LNA)
-#define PLNA_SINGLE_GPIO \
- (!MYNEWT_VAL(BLE_LL_PA) || !MYNEWT_VAL(BLE_LL_LNA) || \
- (MYNEWT_VAL(BLE_LL_PA_GPIO) == MYNEWT_VAL(BLE_LL_LNA_GPIO)))
+#define FEM_SINGLE_GPIO \
+ (!MYNEWT_VAL(BLE_LL_FEM_PA) || !MYNEWT_VAL(BLE_LL_FEM_LNA) || \
+ (MYNEWT_VAL(BLE_LL_FEM_PA_GPIO) == MYNEWT_VAL(BLE_LL_FEM_LNA_GPIO)))
-#if PLNA_SINGLE_GPIO
-static uint8_t plna_idx;
+#if FEM_SINGLE_GPIO
+static uint8_t fem_idx;
#else
-#if MYNEWT_VAL(BLE_LL_PA)
-static uint8_t plna_pa_idx;
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+static uint8_t fem_pa_idx;
#endif
-#if MYNEWT_VAL(BLE_LL_LNA)
-static uint8_t plna_lna_idx;
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+static uint8_t fem_lna_idx;
#endif
#endif
@@ -329,80 +329,80 @@ ble_phy_mode_set(uint8_t tx_phy_mode, uint8_t rx_phy_mode)
}
static void
-ble_phy_plna_enable_pa(void)
+ble_phy_fem_enable_pa(void)
{
-#if MYNEWT_VAL(BLE_LL_PA)
- ble_ll_plna_pa_enable();
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+ ble_ll_fem_pa_enable();
/* CC[0] is set to radio enable */
NRF_TIMER0_NS->CC[4] = NRF_TIMER0_NS->CC[0] + BLE_PHY_T_RXENFAST -
- MYNEWT_VAL(BLE_LL_PA_TURN_ON_US);
+ MYNEWT_VAL(BLE_LL_FEM_PA_TURN_ON_US);
-#if PLNA_SINGLE_GPIO
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4);
+#if FEM_SINGLE_GPIO
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4);
#else
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_pa_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4);
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_pa_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4);
#endif
#endif
}
static void
-ble_phy_plna_disable_pa(void)
+ble_phy_fem_disable_pa(void)
{
-#if MYNEWT_VAL(BLE_LL_PA)
- ble_ll_plna_pa_disable();
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+ ble_ll_fem_pa_disable();
-#if PLNA_SINGLE_GPIO
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
+#if FEM_SINGLE_GPIO
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
#else
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
#endif
#endif
}
static void
-ble_phy_plna_enable_lna(void)
+ble_phy_fem_enable_lna(void)
{
-#if MYNEWT_VAL(BLE_LL_LNA)
- ble_ll_plna_lna_enable();
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+ ble_ll_fem_lna_enable();
/* CC[0] is set to radio enable */
NRF_TIMER0_NS->CC[4] = NRF_TIMER0_NS->CC[0] + BLE_PHY_T_RXENFAST -
- MYNEWT_VAL(BLE_LL_LNA_TURN_ON_US);
+ MYNEWT_VAL(BLE_LL_FEM_LNA_TURN_ON_US);
-#if PLNA_SINGLE_GPIO
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4);
+#if FEM_SINGLE_GPIO
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4);
#else
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_lna_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4);
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_lna_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4);
#endif
#endif
}
static void
-ble_phy_plna_disable_lna(void)
+ble_phy_fem_disable_lna(void)
{
-#if MYNEWT_VAL(BLE_LL_LNA)
- ble_ll_plna_lna_disable();
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+ ble_ll_fem_lna_disable();
-#if PLNA_SINGLE_GPIO
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
+#if FEM_SINGLE_GPIO
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
#else
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
#endif
#endif
}
static void
-ble_phy_plna_force_disable(void)
+ble_phy_fem_force_disable(void)
{
-#if PLNA_SINGLE_GPIO
- NRF_GPIOTE_NS->TASKS_CLR[plna_idx] = 1;
+#if FEM_SINGLE_GPIO
+ NRF_GPIOTE_NS->TASKS_CLR[fem_idx] = 1;
#else
-#if MYNEWT_VAL(BLE_LL_PA)
- NRF_GPIOTE_NS->TASKS_CLR[plna_pa_idx] = 1;
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+ NRF_GPIOTE_NS->TASKS_CLR[fem_pa_idx] = 1;
#endif
-#if MYNEWT_VAL(BLE_LL_LNA)
- NRF_GPIOTE_NS->TASKS_CLR[plna_lna_idx] = 1;
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+ NRF_GPIOTE_NS->TASKS_CLR[fem_lna_idx] = 1;
#endif
#endif
}
@@ -576,14 +576,14 @@ ble_phy_set_start_time(uint32_t cputime, uint8_t rem_usecs, bool tx)
* it's used as a base for turn-on time calculation and thus cannot wrap
* around on subtraction.
*/
- if (MYNEWT_VAL(BLE_LL_PA) && tx &&
- (rem_usecs + BLE_PHY_T_RXENFAST <= MYNEWT_VAL(BLE_LL_PA_TURN_ON_US))) {
+ if (MYNEWT_VAL(BLE_LL_FEM_PA) && tx &&
+ (rem_usecs + BLE_PHY_T_RXENFAST <= MYNEWT_VAL(BLE_LL_FEM_PA_TURN_ON_US))) {
cputime--;
rem_usecs += 30;
}
- if (MYNEWT_VAL(BLE_LL_LNA) && !tx &&
- (rem_usecs + BLE_PHY_T_RXENFAST <= MYNEWT_VAL(BLE_LL_LNA_TURN_ON_US))) {
+ if (MYNEWT_VAL(BLE_LL_FEM_LNA) && !tx &&
+ (rem_usecs + BLE_PHY_T_RXENFAST <= MYNEWT_VAL(BLE_LL_FEM_LNA_TURN_ON_US))) {
cputime--;
rem_usecs += 30;
}
@@ -930,7 +930,7 @@ ble_phy_tx_end_isr(void)
/* Start radio on timer */
NRF_RADIO_NS->SUBSCRIBE_RXEN = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_0);
- ble_phy_plna_enable_lna();
+ ble_phy_fem_enable_lna();
} else {
NRF_TIMER0_NS->TASKS_STOP = 1;
NRF_TIMER0_NS->TASKS_SHUTDOWN = 1;
@@ -1054,7 +1054,7 @@ ble_phy_rx_end_isr(void)
/* Enable automatic TX */
NRF_RADIO_NS->SUBSCRIBE_TXEN = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_0);
- ble_phy_plna_enable_pa();
+ ble_phy_fem_enable_pa();
/*
* XXX: Hack warning!
@@ -1257,20 +1257,20 @@ ble_phy_isr(void)
NRF_RADIO_NS->INTENCLR = RADIO_INTENCLR_DISABLED_Msk;
switch (g_ble_phy_data.phy_state) {
- case BLE_PHY_STATE_RX:
- ble_phy_plna_disable_lna();
- if (g_ble_phy_data.phy_rx_started) {
- ble_phy_rx_end_isr();
- } else {
- ble_ll_wfr_timer_exp(NULL);
- }
- break;
- case BLE_PHY_STATE_TX:
- ble_phy_plna_disable_pa();
- ble_phy_tx_end_isr();
- break;
- default:
- BLE_LL_ASSERT(0);
+ case BLE_PHY_STATE_RX:
+ ble_phy_fem_disable_lna();
+ if (g_ble_phy_data.phy_rx_started) {
+ ble_phy_rx_end_isr();
+ } else {
+ ble_ll_wfr_timer_exp(NULL);
+ }
+ break;
+ case BLE_PHY_STATE_TX:
+ ble_phy_fem_disable_pa();
+ ble_phy_tx_end_isr();
+ break;
+ default:
+ BLE_LL_ASSERT(0);
}
}
@@ -1284,8 +1284,8 @@ ble_phy_isr(void)
#if MYNEWT_VAL(BLE_PHY_DBG_TIME_TXRXEN_READY_PIN) >= 0 || \
MYNEWT_VAL(BLE_PHY_DBG_TIME_ADDRESS_END_PIN) >= 0 || \
MYNEWT_VAL(BLE_PHY_DBG_TIME_WFR_PIN) >= 0 || \
- MYNEWT_VAL(BLE_LL_PA) || \
- MYNEWT_VAL(BLE_LL_LNA)
+ MYNEWT_VAL(BLE_LL_FEM_PA) || \
+ MYNEWT_VAL(BLE_LL_FEM_LNA)
static int
ble_phy_gpiote_configure(int pin)
{
@@ -1463,7 +1463,7 @@ ble_phy_init(void)
NRF_TIMER0_NS->SUBSCRIBE_CAPTURE[1] = DPPI_CH_SUB(RADIO_EVENTS_ADDRESS);
NRF_TIMER0_NS->SUBSCRIBE_CAPTURE[2] = DPPI_CH_SUB(RADIO_EVENTS_END);
-#if MYNEWT_VAL(BLE_LL_PA) || MYNEWT_VAL(BLE_LL_LNA)
+#if MYNEWT_VAL(BLE_LL_FEM_PA) || MYNEWT_VAL(BLE_LL_FEM_LNA)
/* We keep both channels enabled and CLR task subscribed all the time. It's
* enough to just (un)subscribe SET task when needed.
* TODO: figure out if this affects power consumption
@@ -1476,27 +1476,27 @@ ble_phy_init(void)
NRF_RADIO_NS->PUBLISH_DISABLED = DPPI_CH_PUB(RADIO_EVENTS_DISABLED);
NRF_DPPIC_NS->CHENSET = DPPI_CH_MASK(RADIO_EVENTS_DISABLED);
-#if PLNA_SINGLE_GPIO
- plna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_PA_GPIO));
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_0);
- NRF_GPIOTE_NS->SUBSCRIBE_CLR[plna_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED);
- NRF_GPIOTE_NS->TASKS_CLR[plna_idx] = 1;
+#if FEM_SINGLE_GPIO
+ fem_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_PA_GPIO));
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_0);
+ NRF_GPIOTE_NS->SUBSCRIBE_CLR[fem_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED);
+ NRF_GPIOTE_NS->TASKS_CLR[fem_idx] = 1;
#else
-#if MYNEWT_VAL(BLE_LL_PA)
- plna_pa_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_PA_GPIO));
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
- NRF_GPIOTE_NS->SUBSCRIBE_CLR[plna_pa_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED);
- NRF_GPIOTE_NS->TASKS_CLR[plna_pa_idx] = 1;
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+ fem_pa_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_PA_GPIO));
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
+ NRF_GPIOTE_NS->SUBSCRIBE_CLR[fem_pa_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED);
+ NRF_GPIOTE_NS->TASKS_CLR[fem_pa_idx] = 1;
#endif
-#if MYNEWT_VAL(BLE_LL_LNA)
- plna_lna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_LNA_GPIO));
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
- NRF_GPIOTE_NS->SUBSCRIBE_CLR[plna_lna_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED);
- NRF_GPIOTE_NS->TASKS_CLR[plna_lna_idx] = 1;
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+ fem_lna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_LNA_GPIO));
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
+ NRF_GPIOTE_NS->SUBSCRIBE_CLR[fem_lna_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED);
+ NRF_GPIOTE_NS->TASKS_CLR[fem_lna_idx] = 1;
#endif
#endif
- NRF_DPPIC_NS->CHENSET = DPPI_CH_MASK_PLNA;
+ NRF_DPPIC_NS->CHENSET = DPPI_CH_MASK_FEM;
#endif
/* Set isr in vector table and enable interrupt */
@@ -1630,7 +1630,7 @@ ble_phy_tx_set_start_time(uint32_t cputime, uint8_t rem_usecs)
NRF_RADIO_NS->SUBSCRIBE_TXEN = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_0);
rc = 0;
- ble_phy_plna_enable_pa();
+ ble_phy_fem_enable_pa();
}
return rc;
}
@@ -1663,7 +1663,7 @@ ble_phy_rx_set_start_time(uint32_t cputime, uint8_t rem_usecs)
/* Enable PPI to automatically start RXEN */
NRF_RADIO_NS->SUBSCRIBE_RXEN = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_0);
- ble_phy_plna_enable_lna();
+ ble_phy_fem_enable_lna();
/* Start rx */
rc = ble_phy_rx();
@@ -1940,14 +1940,14 @@ ble_phy_disable_irq_and_ppi(void)
NRF_AAR_NS->SUBSCRIBE_START = DPPI_CH_UNSUB(RADIO_EVENTS_BCMATCH);
NRF_CCM_NS->SUBSCRIBE_CRYPT = DPPI_CH_UNSUB(RADIO_EVENTS_ADDRESS);
-#if PLNA_SINGLE_GPIO
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_UNSUB(RADIO_EVENTS_READY);
+#if FEM_SINGLE_GPIO
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_UNSUB(RADIO_EVENTS_READY);
#else
-#if MYNEWT_VAL(BLE_LL_PA)
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
+#if MYNEWT_VAL(BLE_LL_FEM_PA)
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
#endif
-#if MYNEWT_VAL(BLE_LL_LNA)
- NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
+#if MYNEWT_VAL(BLE_LL_FEM_LNA)
+ NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4);
#endif
#endif
@@ -1989,7 +1989,7 @@ ble_phy_disable(void)
ble_phy_stop_usec_timer();
ble_phy_disable_irq_and_ppi();
- ble_phy_plna_force_disable();
+ ble_phy_fem_force_disable();
ble_phy_dbg_clear_pins();
}
[mynewt-nimble] 03/03: nimble/ll: Add generic interface for controlling FEM antenna
Posted by ja...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
janc pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
commit 2c3c3bf82c6288dcbacc948a6f877d69a3651f89
Author: Szymon Janc <sz...@codecoup.pl>
AuthorDate: Thu Sep 8 09:20:34 2022 +0200
nimble/ll: Add generic interface for controlling FEM antenna
This allows to select active antenna if supported by FEM.
0 means default antenna, while any other value is FEM specific.
---
nimble/controller/include/controller/ble_ll_fem.h | 5 ++++
nimble/controller/pkg.yml | 2 ++
nimble/controller/src/ble_ll_hci_vs.c | 27 ++++++++++++++++++++
nimble/controller/syscfg.yml | 4 +++
.../fem/sky66112/include/sky66112/sky66112.h | 1 -
nimble/drivers/fem/sky66112/pkg.yml | 1 +
nimble/drivers/fem/sky66112/src/sky66112.c | 29 ++++++++++++++++------
nimble/include/nimble/hci_common.h | 5 ++++
8 files changed, 66 insertions(+), 8 deletions(-)
diff --git a/nimble/controller/include/controller/ble_ll_fem.h b/nimble/controller/include/controller/ble_ll_fem.h
index 3d645173..d8c6dbec 100644
--- a/nimble/controller/include/controller/ble_ll_fem.h
+++ b/nimble/controller/include/controller/ble_ll_fem.h
@@ -38,6 +38,11 @@ void ble_ll_fem_lna_enable(void);
void ble_ll_fem_lna_disable(void);
#endif
+#if MYNEWT_VAL(BLE_LL_FEM_ANTENNA)
+/* 0 sets default antenna, any other value is FEM specific */
+int ble_ll_fem_antenna(uint8_t antenna);
+#endif
+
#ifdef __cplusplus
}
#endif
diff --git a/nimble/controller/pkg.yml b/nimble/controller/pkg.yml
index 9115e452..4462823c 100644
--- a/nimble/controller/pkg.yml
+++ b/nimble/controller/pkg.yml
@@ -33,6 +33,8 @@ pkg.req_apis.BLE_LL_FEM_PA:
- ble_ll_fem_pa
pkg.req_apis.BLE_LL_FEM_LNA:
- ble_ll_fem_lna
+pkg.req_apis.BLE_LL_FEM_ANTENNA:
+ - ble_ll_fem_antenna
pkg.deps:
- "@apache-mynewt-core/kernel/os"
diff --git a/nimble/controller/src/ble_ll_hci_vs.c b/nimble/controller/src/ble_ll_hci_vs.c
index 9b9cf268..c6c1e256 100644
--- a/nimble/controller/src/ble_ll_hci_vs.c
+++ b/nimble/controller/src/ble_ll_hci_vs.c
@@ -25,6 +25,7 @@
#include "controller/ble_ll_adv.h"
#include "controller/ble_ll_scan.h"
#include "controller/ble_hw.h"
+#include "controller/ble_ll_fem.h"
#include "ble_ll_conn_priv.h"
#include "ble_ll_priv.h"
@@ -351,6 +352,29 @@ ble_ll_hci_vs_set_data_len(uint16_t ocf, const uint8_t *cmdbuf, uint8_t cmdlen,
}
#endif
+#if MYNEWT_VAL(BLE_LL_FEM_ANTENNA)
+static int
+ble_ll_hci_vs_set_antenna(uint16_t ocf, const uint8_t *cmdbuf, uint8_t cmdlen,
+ uint8_t *rspbuf, uint8_t *rsplen)
+{
+ const struct ble_hci_vs_set_antenna_cp *cmd = (const void *) cmdbuf;
+
+ if (cmdlen != sizeof(*cmd)) {
+ return BLE_ERR_INV_HCI_CMD_PARMS;
+ }
+
+ if (ble_ll_hci_vs_is_controller_busy()) {
+ return BLE_ERR_CMD_DISALLOWED;
+ }
+
+ if (ble_ll_fem_antenna(cmd->antenna)) {
+ return BLE_ERR_INV_HCI_CMD_PARMS;
+ }
+
+ return BLE_ERR_SUCCESS;
+}
+#endif
+
static struct ble_ll_hci_vs_cmd g_ble_ll_hci_vs_cmds[] = {
BLE_LL_HCI_VS_CMD(BLE_HCI_OCF_VS_RD_STATIC_ADDR,
ble_ll_hci_vs_rd_static_addr),
@@ -374,6 +398,9 @@ static struct ble_ll_hci_vs_cmd g_ble_ll_hci_vs_cmds[] = {
BLE_LL_HCI_VS_CMD(BLE_HCI_OCF_VS_SET_DATA_LEN,
ble_ll_hci_vs_set_data_len),
#endif
+#if MYNEWT_VAL(BLE_LL_FEM_ANTENNA)
+ BLE_LL_HCI_VS_CMD(BLE_HCI_OCF_VS_SET_ANTENNA, ble_ll_hci_vs_set_antenna),
+#endif
};
static struct ble_ll_hci_vs_cmd *
diff --git a/nimble/controller/syscfg.yml b/nimble/controller/syscfg.yml
index 11e582c5..364e9f58 100644
--- a/nimble/controller/syscfg.yml
+++ b/nimble/controller/syscfg.yml
@@ -430,6 +430,10 @@ syscfg.defs:
description: >
Time required for LNA to turn on, in microseconds.
value: MYNEWT_VAL(BLE_LL_LNA_TURN_ON_US)
+ BLE_LL_FEM_ANTENNA:
+ description: >
+ Enable support for runtime antenna selection in FEM.
+ value: 0
BLE_LL_SYSINIT_STAGE:
description: >
diff --git a/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h b/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h
index 2403e7c0..6bdf59f7 100644
--- a/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h
+++ b/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h
@@ -28,7 +28,6 @@ extern "C" {
#endif
void sky66112_tx_hp_mode(uint8_t enabled);
-void sky66112_antenna_port(uint8_t port);
void sky66112_rx_bypass(uint8_t enabled);
void sky66112_tx_bypass(uint8_t enabled);
#ifdef __cplusplus
diff --git a/nimble/drivers/fem/sky66112/pkg.yml b/nimble/drivers/fem/sky66112/pkg.yml
index 5dd738a0..532fe212 100644
--- a/nimble/drivers/fem/sky66112/pkg.yml
+++ b/nimble/drivers/fem/sky66112/pkg.yml
@@ -24,6 +24,7 @@ pkg.homepage: "https://mynewt.apache.org/"
pkg.apis:
- ble_ll_fem_pa
- ble_ll_fem_lna
+ - ble_ll_fem_antenna
pkg.deps:
- nimble/controller
diff --git a/nimble/drivers/fem/sky66112/src/sky66112.c b/nimble/drivers/fem/sky66112/src/sky66112.c
index 9b74c45c..9e9ceab6 100644
--- a/nimble/drivers/fem/sky66112/src/sky66112.c
+++ b/nimble/drivers/fem/sky66112/src/sky66112.c
@@ -94,23 +94,26 @@ sky66112_tx_hp_mode(uint8_t enabled)
}
}
-void
-sky66112_antenna_port(uint8_t port)
+int
+ble_ll_fem_antenna(uint8_t port)
{
int pin = MYNEWT_VAL(SKY66112_PIN_SEL);
if (pin >= 0) {
switch (port) {
+ case 0:
case 1:
- hal_gpio_init_out(pin, 0);
+ hal_gpio_write(pin, 0);
break;
case 2:
- hal_gpio_init_out(pin, 1);
+ hal_gpio_write(pin, 1);
break;
default:
- assert(0);
+ return -1;
}
}
+
+ return 0;
}
void
@@ -158,6 +161,18 @@ sky66112_init(void)
hal_gpio_init_out(pin, 0);
}
- sky66112_tx_hp_mode(MYNEWT_VAL(SKY66112_TX_HP_MODE));
- sky66112_antenna_port(MYNEWT_VAL(SKY66112_ANTENNA_PORT));
+ /* configure default antenna */
+ pin = MYNEWT_VAL(SKY66112_PIN_SEL);
+ if (pin >= 0) {
+ switch (MYNEWT_VAL(SKY66112_ANTENNA_PORT)) {
+ case 1:
+ hal_gpio_init_out(pin, 0);
+ break;
+ case 2:
+ hal_gpio_init_out(pin, 1);
+ break;
+ default:
+ assert(0);
+ }
+ }
}
diff --git a/nimble/include/nimble/hci_common.h b/nimble/include/nimble/hci_common.h
index a3c3dc3f..7c5ebe9a 100644
--- a/nimble/include/nimble/hci_common.h
+++ b/nimble/include/nimble/hci_common.h
@@ -1179,6 +1179,11 @@ struct ble_hci_vs_set_data_len_cp {
struct ble_hci_vs_set_data_len_rp {
uint16_t conn_handle;
} __attribute__((packed));
+#define BLE_HCI_OCF_VS_SET_ANTENNA (MYNEWT_VAL(BLE_HCI_VS_OCF_OFFSET) + (0x0009))
+struct ble_hci_vs_set_antenna_cp {
+ uint8_t antenna;
+} __attribute__((packed));
+
/* Command Specific Definitions */
[mynewt-nimble] 02/03: nimble/fem: Add support for runtime configuration of SKY66112
Posted by ja...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
janc pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
commit fb1ae2ec75ffec664d234f4683a3f23f329d8e52
Author: Szymon Janc <sz...@codecoup.pl>
AuthorDate: Wed Aug 31 15:28:11 2022 +0200
nimble/fem: Add support for runtime configuration of SKY66112
This allows to configure FEM operation mode at runtime.
---
.../fem/sky66112/include/sky66112/sky66112.h | 38 ++++++++
nimble/drivers/fem/sky66112/src/sky66112.c | 106 +++++++++++++++------
nimble/drivers/fem/sky66112/syscfg.yml | 7 ++
3 files changed, 121 insertions(+), 30 deletions(-)
diff --git a/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h b/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h
new file mode 100644
index 00000000..2403e7c0
--- /dev/null
+++ b/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h
@@ -0,0 +1,38 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+
+#ifndef _SKY66112_H
+#define _SKY66112_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void sky66112_tx_hp_mode(uint8_t enabled);
+void sky66112_antenna_port(uint8_t port);
+void sky66112_rx_bypass(uint8_t enabled);
+void sky66112_tx_bypass(uint8_t enabled);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SKY66112_H */
diff --git a/nimble/drivers/fem/sky66112/src/sky66112.c b/nimble/drivers/fem/sky66112/src/sky66112.c
index 7a957b0b..9b74c45c 100644
--- a/nimble/drivers/fem/sky66112/src/sky66112.c
+++ b/nimble/drivers/fem/sky66112/src/sky66112.c
@@ -18,22 +18,25 @@
*/
#include <assert.h>
-#include <stdint.h>
+#include <sky66112/sky66112.h>
#include "syscfg/syscfg.h"
#include "hal/hal_gpio.h"
#include "controller/ble_ll_fem.h"
-#define NO_BYPASS \
- ((MYNEWT_VAL(SKY66112_TX_BYPASS) == 0) && \
- (MYNEWT_VAL(SKY66112_RX_BYPASS) == 0))
+static struct {
+ uint8_t rx_bypass : 1;
+ uint8_t tx_bypass : 1;
+} sky66112_config = {
+ .rx_bypass = MYNEWT_VAL(SKY66112_RX_BYPASS),
+ .tx_bypass = MYNEWT_VAL(SKY66112_TX_BYPASS),
+};
static void
sky66112_bypass(uint8_t enabled)
{
- if (NO_BYPASS) {
- return;
- }
-
+ /* this is called only if bypass is enabled which means CPS PIN is
+ * correctly set and there is no need to check it here.
+ */
hal_gpio_write(MYNEWT_VAL(SKY66112_PIN_CPS), enabled);
}
@@ -46,16 +49,16 @@ ble_ll_fem_pa_init(void)
void
ble_ll_fem_pa_enable(void)
{
- if (!MYNEWT_VAL(SKY66112_TX_BYPASS)) {
- sky66112_bypass(0);
+ if (sky66112_config.tx_bypass) {
+ sky66112_bypass(1);
}
}
void
ble_ll_fem_pa_disable(void)
{
- if (!MYNEWT_VAL(SKY66112_TX_BYPASS)) {
- sky66112_bypass(1);
+ if (sky66112_config.tx_bypass) {
+ sky66112_bypass(0);
}
}
@@ -68,50 +71,93 @@ ble_ll_fem_lna_init(void)
void
ble_ll_fem_lna_enable(void)
{
- if (!MYNEWT_VAL(SKY66112_RX_BYPASS)) {
- sky66112_bypass(0);
+ if (sky66112_config.rx_bypass) {
+ sky66112_bypass(1);
}
}
void
ble_ll_fem_lna_disable(void)
{
- if (!MYNEWT_VAL(SKY66112_RX_BYPASS)) {
- sky66112_bypass(1);
+ if (sky66112_config.rx_bypass) {
+ sky66112_bypass(0);
}
}
void
-sky66112_init(void)
+sky66112_tx_hp_mode(uint8_t enabled)
{
- int pin;
+ int pin = MYNEWT_VAL(SKY66112_PIN_CHL);
- /* Use CRX and CTX to enable sleep mode */
- pin = MYNEWT_VAL(SKY66112_PIN_CSD);
if (pin >= 0) {
- hal_gpio_init_out(pin, 1);
+ hal_gpio_write(pin, enabled);
}
+}
- pin = MYNEWT_VAL(SKY66112_PIN_CPS);
- if (NO_BYPASS) {
- /* Disable bypass */
- if (pin >= 0) {
+void
+sky66112_antenna_port(uint8_t port)
+{
+ int pin = MYNEWT_VAL(SKY66112_PIN_SEL);
+
+ if (pin >= 0) {
+ switch (port) {
+ case 1:
hal_gpio_init_out(pin, 0);
+ break;
+ case 2:
+ hal_gpio_init_out(pin, 1);
+ break;
+ default:
+ assert(0);
}
- } else {
- /* Enable bypass, we'll disable it when needed */
- assert(pin >= 0);
+ }
+}
+
+void
+sky66112_rx_bypass(uint8_t enabled)
+{
+ int pin = MYNEWT_VAL(SKY66112_PIN_CPS);
+
+ if (pin >= 0) {
+ sky66112_config.rx_bypass = enabled;
+ sky66112_bypass(enabled);
+ }
+}
+
+void
+sky66112_tx_bypass(uint8_t enabled)
+{
+ int pin = MYNEWT_VAL(SKY66112_PIN_CPS);
+
+ if (pin >= 0) {
+ sky66112_config.tx_bypass = enabled;
+ sky66112_bypass(enabled);
+ }
+}
+
+void
+sky66112_init(void)
+{
+ int pin;
+
+ /* Use CRX and CTX to enable sleep mode */
+ pin = MYNEWT_VAL(SKY66112_PIN_CSD);
+ if (pin >= 0) {
hal_gpio_init_out(pin, 1);
}
+ /* Set default tx power mode */
pin = MYNEWT_VAL(SKY66112_PIN_CHL);
if (pin >= 0) {
hal_gpio_init_out(pin, MYNEWT_VAL(SKY66112_TX_HP_MODE));
}
- /* Select ANT1 */
- pin = MYNEWT_VAL(SKY66112_PIN_SEL);
+ /* Disable bypass, we'll enable it when needed */
+ pin = MYNEWT_VAL(SKY66112_PIN_CPS);
if (pin >= 0) {
hal_gpio_init_out(pin, 0);
}
+
+ sky66112_tx_hp_mode(MYNEWT_VAL(SKY66112_TX_HP_MODE));
+ sky66112_antenna_port(MYNEWT_VAL(SKY66112_ANTENNA_PORT));
}
diff --git a/nimble/drivers/fem/sky66112/syscfg.yml b/nimble/drivers/fem/sky66112/syscfg.yml
index c7aaa0a8..1da83978 100644
--- a/nimble/drivers/fem/sky66112/syscfg.yml
+++ b/nimble/drivers/fem/sky66112/syscfg.yml
@@ -56,6 +56,13 @@ syscfg.defs:
Enables bypass for RX which effectively disables operation as PA.
Only valid if CPS signal is controller by driver.
value: 0
+ SKY66112_ANTENNA_PORT:
+ description: >
+ Selects which antenna port should be enabled:
+ 1 for ANT1 port enabled
+ 2 for ANT2 port enabled
+ range: 1, 2
+ value: 1
syscfg.vals.!BLE_LL_FEM_PA:
# Enable TX bypass by default if PA is disabled