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Posted to commits@mynewt.apache.org by ja...@apache.org on 2022/09/12 07:28:54 UTC
[mynewt-nimble] 02/03: nimble/fem: Add support for runtime configuration of SKY66112
This is an automated email from the ASF dual-hosted git repository.
janc pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
commit fb1ae2ec75ffec664d234f4683a3f23f329d8e52
Author: Szymon Janc <sz...@codecoup.pl>
AuthorDate: Wed Aug 31 15:28:11 2022 +0200
nimble/fem: Add support for runtime configuration of SKY66112
This allows to configure FEM operation mode at runtime.
---
.../fem/sky66112/include/sky66112/sky66112.h | 38 ++++++++
nimble/drivers/fem/sky66112/src/sky66112.c | 106 +++++++++++++++------
nimble/drivers/fem/sky66112/syscfg.yml | 7 ++
3 files changed, 121 insertions(+), 30 deletions(-)
diff --git a/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h b/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h
new file mode 100644
index 00000000..2403e7c0
--- /dev/null
+++ b/nimble/drivers/fem/sky66112/include/sky66112/sky66112.h
@@ -0,0 +1,38 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+
+#ifndef _SKY66112_H
+#define _SKY66112_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void sky66112_tx_hp_mode(uint8_t enabled);
+void sky66112_antenna_port(uint8_t port);
+void sky66112_rx_bypass(uint8_t enabled);
+void sky66112_tx_bypass(uint8_t enabled);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SKY66112_H */
diff --git a/nimble/drivers/fem/sky66112/src/sky66112.c b/nimble/drivers/fem/sky66112/src/sky66112.c
index 7a957b0b..9b74c45c 100644
--- a/nimble/drivers/fem/sky66112/src/sky66112.c
+++ b/nimble/drivers/fem/sky66112/src/sky66112.c
@@ -18,22 +18,25 @@
*/
#include <assert.h>
-#include <stdint.h>
+#include <sky66112/sky66112.h>
#include "syscfg/syscfg.h"
#include "hal/hal_gpio.h"
#include "controller/ble_ll_fem.h"
-#define NO_BYPASS \
- ((MYNEWT_VAL(SKY66112_TX_BYPASS) == 0) && \
- (MYNEWT_VAL(SKY66112_RX_BYPASS) == 0))
+static struct {
+ uint8_t rx_bypass : 1;
+ uint8_t tx_bypass : 1;
+} sky66112_config = {
+ .rx_bypass = MYNEWT_VAL(SKY66112_RX_BYPASS),
+ .tx_bypass = MYNEWT_VAL(SKY66112_TX_BYPASS),
+};
static void
sky66112_bypass(uint8_t enabled)
{
- if (NO_BYPASS) {
- return;
- }
-
+ /* this is called only if bypass is enabled which means CPS PIN is
+ * correctly set and there is no need to check it here.
+ */
hal_gpio_write(MYNEWT_VAL(SKY66112_PIN_CPS), enabled);
}
@@ -46,16 +49,16 @@ ble_ll_fem_pa_init(void)
void
ble_ll_fem_pa_enable(void)
{
- if (!MYNEWT_VAL(SKY66112_TX_BYPASS)) {
- sky66112_bypass(0);
+ if (sky66112_config.tx_bypass) {
+ sky66112_bypass(1);
}
}
void
ble_ll_fem_pa_disable(void)
{
- if (!MYNEWT_VAL(SKY66112_TX_BYPASS)) {
- sky66112_bypass(1);
+ if (sky66112_config.tx_bypass) {
+ sky66112_bypass(0);
}
}
@@ -68,50 +71,93 @@ ble_ll_fem_lna_init(void)
void
ble_ll_fem_lna_enable(void)
{
- if (!MYNEWT_VAL(SKY66112_RX_BYPASS)) {
- sky66112_bypass(0);
+ if (sky66112_config.rx_bypass) {
+ sky66112_bypass(1);
}
}
void
ble_ll_fem_lna_disable(void)
{
- if (!MYNEWT_VAL(SKY66112_RX_BYPASS)) {
- sky66112_bypass(1);
+ if (sky66112_config.rx_bypass) {
+ sky66112_bypass(0);
}
}
void
-sky66112_init(void)
+sky66112_tx_hp_mode(uint8_t enabled)
{
- int pin;
+ int pin = MYNEWT_VAL(SKY66112_PIN_CHL);
- /* Use CRX and CTX to enable sleep mode */
- pin = MYNEWT_VAL(SKY66112_PIN_CSD);
if (pin >= 0) {
- hal_gpio_init_out(pin, 1);
+ hal_gpio_write(pin, enabled);
}
+}
- pin = MYNEWT_VAL(SKY66112_PIN_CPS);
- if (NO_BYPASS) {
- /* Disable bypass */
- if (pin >= 0) {
+void
+sky66112_antenna_port(uint8_t port)
+{
+ int pin = MYNEWT_VAL(SKY66112_PIN_SEL);
+
+ if (pin >= 0) {
+ switch (port) {
+ case 1:
hal_gpio_init_out(pin, 0);
+ break;
+ case 2:
+ hal_gpio_init_out(pin, 1);
+ break;
+ default:
+ assert(0);
}
- } else {
- /* Enable bypass, we'll disable it when needed */
- assert(pin >= 0);
+ }
+}
+
+void
+sky66112_rx_bypass(uint8_t enabled)
+{
+ int pin = MYNEWT_VAL(SKY66112_PIN_CPS);
+
+ if (pin >= 0) {
+ sky66112_config.rx_bypass = enabled;
+ sky66112_bypass(enabled);
+ }
+}
+
+void
+sky66112_tx_bypass(uint8_t enabled)
+{
+ int pin = MYNEWT_VAL(SKY66112_PIN_CPS);
+
+ if (pin >= 0) {
+ sky66112_config.tx_bypass = enabled;
+ sky66112_bypass(enabled);
+ }
+}
+
+void
+sky66112_init(void)
+{
+ int pin;
+
+ /* Use CRX and CTX to enable sleep mode */
+ pin = MYNEWT_VAL(SKY66112_PIN_CSD);
+ if (pin >= 0) {
hal_gpio_init_out(pin, 1);
}
+ /* Set default tx power mode */
pin = MYNEWT_VAL(SKY66112_PIN_CHL);
if (pin >= 0) {
hal_gpio_init_out(pin, MYNEWT_VAL(SKY66112_TX_HP_MODE));
}
- /* Select ANT1 */
- pin = MYNEWT_VAL(SKY66112_PIN_SEL);
+ /* Disable bypass, we'll enable it when needed */
+ pin = MYNEWT_VAL(SKY66112_PIN_CPS);
if (pin >= 0) {
hal_gpio_init_out(pin, 0);
}
+
+ sky66112_tx_hp_mode(MYNEWT_VAL(SKY66112_TX_HP_MODE));
+ sky66112_antenna_port(MYNEWT_VAL(SKY66112_ANTENNA_PORT));
}
diff --git a/nimble/drivers/fem/sky66112/syscfg.yml b/nimble/drivers/fem/sky66112/syscfg.yml
index c7aaa0a8..1da83978 100644
--- a/nimble/drivers/fem/sky66112/syscfg.yml
+++ b/nimble/drivers/fem/sky66112/syscfg.yml
@@ -56,6 +56,13 @@ syscfg.defs:
Enables bypass for RX which effectively disables operation as PA.
Only valid if CPS signal is controller by driver.
value: 0
+ SKY66112_ANTENNA_PORT:
+ description: >
+ Selects which antenna port should be enabled:
+ 1 for ANT1 port enabled
+ 2 for ANT2 port enabled
+ range: 1, 2
+ value: 1
syscfg.vals.!BLE_LL_FEM_PA:
# Enable TX bypass by default if PA is disabled