You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@harmony.apache.org by ge...@apache.org on 2006/10/14 13:46:34 UTC
svn commit: r463917 - in
/incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32:
Ia32I8Lowerer.cpp Ia32RCE.cpp
Author: geirm
Date: Sat Oct 14 04:46:32 2006
New Revision: 463917
URL: http://svn.apache.org/viewvc?view=rev&rev=463917
Log:
HARMONY-1774
Classlib test org.apache.harmony.luni.tests.java.lang.LongTest fails in OPT mode
Included tests in JIRA now pass, as do standard DRLVM suite.
Ubuntu 6
Modified:
incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp
incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32RCE.cpp
Modified: incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp
URL: http://svn.apache.org/viewvc/incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp?view=diff&rev=463917&r1=463916&r2=463917
==============================================================================
--- incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp (original)
+++ incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp Sat Oct 14 04:46:32 2006
@@ -378,14 +378,16 @@
ControlFlowGraph* subCFG = irManager->createSubCFG(true, false);
Node* bbHMain = subCFG->getEntryNode();
+ Node* bbHCmp = subCFG->createBlockNode();
Node* bbLMain = subCFG->createBlockNode();
Node* sinkNode = subCFG->getReturnNode();
bbHMain->appendInst(irManager->newInst(Mnemonic_CMP, src1_2, src2_2));
- bbHMain->appendInst(irManager->newBranchInst(Mnemonic_JNZ, sinkNode, bbLMain));
+ bbHMain->appendInst(irManager->newBranchInst(Mnemonic_JNZ, bbHCmp, bbLMain));
bbLMain->appendInst(irManager->newInst(Mnemonic_CMP, src1_1, src2_1));
+ bbHCmp->appendInst(irManager->newInst(Mnemonic_CMP, src1_2, src2_2));
Node* bbFT = bb->getFalseEdgeTarget();
Node* bbDB = bb->getTrueEdgeTarget();
@@ -400,7 +402,8 @@
}
bbLMain->appendInst(irManager->newBranchInst(mnem, bbDB, bbFT));
- subCFG->addEdge(bbHMain, sinkNode, 0.1);
+ subCFG->addEdge(bbHMain, bbHCmp, 0.1);
+ subCFG->addEdge(bbHCmp, sinkNode, 1);
subCFG->addEdge(bbHMain, bbLMain, 0.9);
subCFG->addEdge(bbLMain, bbFT, 0.1);
subCFG->addEdge(bbLMain, bbDB, 0.9);
Modified: incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32RCE.cpp
URL: http://svn.apache.org/viewvc/incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32RCE.cpp?view=diff&rev=463917&r1=463916&r2=463917
==============================================================================
--- incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32RCE.cpp (original)
+++ incubator/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32RCE.cpp Sat Oct 14 04:46:32 2006
@@ -93,21 +93,21 @@
Inst * inst, * cmpInst, *condInst;
Opnd * cmpOp = NULL;
cmpInst = condInst = NULL;
- const Nodes& nodes = irManager->getFlowGraph()->getNodes();
+ const Nodes& nodes = irManager->getFlowGraph()->getNodesPostOrder();
for (Nodes::const_iterator it = nodes.begin(), end = nodes.end(); it!=end; ++it) {
Node* node = *it;
if (node->isBlockNode()) {
if(node->isEmpty()) {
continue;
}
- cmpInst = condInst = NULL;
+ cmpInst = NULL;
Inst* prevInst = NULL;
for(inst = (Inst*)node->getLastInst(); inst != NULL; inst = prevInst) {
prevInst = inst->getPrevInst();
//find conditional instruction
Mnemonic baseMnem = getBaseConditionMnemonic(inst->getMnemonic());
if (baseMnem != Mnemonic_NULL) {
- condInst = inst;
+ condInst = condInst ? NULL : inst;
cmpInst = NULL;
} else if (condInst) {
//find CMP instruction corresponds to conditional instruction
@@ -153,7 +153,7 @@
//find flags affected instruction precedes cmpInst
} else if (isUsingFlagsAffected(inst, condInst)) {
if (cmpInst) {
- if (isSuitableToRemove(inst, condInst, cmpInst, cmpOp))
+ if (isSuitableToRemove(inst, condInst, cmpInst, cmpOp))
{
cmpInst->unlink();//replace cmp
}