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Posted to commits@nuttx.apache.org by ac...@apache.org on 2021/06/14 21:45:15 UTC

[incubator-nuttx] branch master updated: Adds PWM example to nucleo-g431kb board.

This is an automated email from the ASF dual-hosted git repository.

acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 4b351fc  Adds PWM example to nucleo-g431kb board.
4b351fc is described below

commit 4b351fc447902a5f856e5e8e6a91ed1cb10ee779
Author: Daniel P. Carvalho <da...@gmail.com>
AuthorDate: Mon Jun 14 14:40:58 2021 -0300

    Adds PWM example to nucleo-g431kb board.
---
 arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h    | 32 +++++-----
 .../arm/stm32/nucleo-g431kb/configs/pwm/defconfig  | 43 +++++++++++++
 boards/arm/stm32/nucleo-g431kb/include/board.h     |  6 ++
 boards/arm/stm32/nucleo-g431kb/src/Make.defs       |  4 ++
 boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h | 17 ++++++
 boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c | 10 +++
 .../src/{stm32_bringup.c => stm32_pwm.c}           | 71 +++++++++++-----------
 7 files changed, 132 insertions(+), 51 deletions(-)

diff --git a/arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h b/arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h
index 6f71a22..b7ba8df 100644
--- a/arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h
@@ -269,25 +269,25 @@
 #define GPIO_TIM1_BKIN_2               (GPIO_ALT | GPIO_AF6 | GPIO_PORTA | GPIO_PIN14)
 #define GPIO_TIM1_BKIN_3               (GPIO_ALT | GPIO_AF9 | GPIO_PORTA | GPIO_PIN15)
 #define GPIO_TIM1_BKIN_4               (GPIO_ALT | GPIO_AF12 | GPIO_PORTB | GPIO_PIN8)
-#define GPIO_TIM1_CH1IN                (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN8)
+#define GPIO_TIM1_CH1IN_1              (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN8)
 #define GPIO_TIM1_CH1NIN_1             (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN7)
 #define GPIO_TIM1_CH1NIN_2             (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN11)
 #define GPIO_TIM1_CH1NOUT_1            (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN7)
 #define GPIO_TIM1_CH1NOUT_2            (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11)
-#define GPIO_TIM1_CH1OUT               (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN8)
-#define GPIO_TIM1_CH2IN                (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN9)
+#define GPIO_TIM1_CH1OUT_1             (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN8)
+#define GPIO_TIM1_CH2IN_1              (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN9)
 #define GPIO_TIM1_CH2NIN_1             (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN12)
 #define GPIO_TIM1_CH2NIN_2             (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN0)
 #define GPIO_TIM1_CH2NOUT_1            (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN12)
 #define GPIO_TIM1_CH2NOUT_2            (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN0)
-#define GPIO_TIM1_CH2OUT               (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN9)
-#define GPIO_TIM1_CH3IN                (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN10)
+#define GPIO_TIM1_CH2OUT_1             (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN9)
+#define GPIO_TIM1_CH3IN_1              (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN10)
 #define GPIO_TIM1_CH3NIN_1             (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN1)
 #define GPIO_TIM1_CH3NOUT_1            (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN1)
-#define GPIO_TIM1_CH3OUT               (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN10)
-#define GPIO_TIM1_CH4IN                (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN11)
-#define GPIO_TIM1_CH4OUT               (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11)
-#define GPIO_TIM1_ETR                  (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN12)
+#define GPIO_TIM1_CH3OUT_1             (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN10)
+#define GPIO_TIM1_CH4IN_1              (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN11)
+#define GPIO_TIM1_CH4OUT_1             (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11)
+#define GPIO_TIM1_ETR_1                (GPIO_ALT | GPIO_AF11 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN12)
 
 #define GPIO_TIM2_CH1IN_1              (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN0)
 #define GPIO_TIM2_CH1IN_2              (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN5)
@@ -321,11 +321,11 @@
 #define GPIO_TIM3_CH2OUT_1             (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN4)
 #define GPIO_TIM3_CH2OUT_2             (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN7)
 #define GPIO_TIM3_CH2OUT_3             (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN5)
-#define GPIO_TIM3_CH3IN                (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN0)
-#define GPIO_TIM3_CH3OUT               (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN0)
+#define GPIO_TIM3_CH3IN_1              (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN0)
+#define GPIO_TIM3_CH3OUT_1             (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN0)
 #define GPIO_TIM3_CH4IN_2              (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN7)
 #define GPIO_TIM3_CH4OUT_2             (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN7)
-#define GPIO_TIM3_ETR                  (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN3)
+#define GPIO_TIM3_ETR_1                (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN3)
 
 #define GPIO_TIM4_CH1IN_1              (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN11)
 #define GPIO_TIM4_CH1IN_2              (GPIO_ALT | GPIO_AF2 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN6)
@@ -368,7 +368,7 @@
 #define GPIO_TIM8_ETR_1                (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN0)
 #define GPIO_TIM8_ETR_2                (GPIO_ALT | GPIO_AF6 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN6)
 
-#define GPIO_TIM15_BKIN                (GPIO_ALT | GPIO_AF9 | GPIO_PORTA | GPIO_PIN9)
+#define GPIO_TIM15_BKIN_1              (GPIO_ALT | GPIO_AF9 | GPIO_PORTA | GPIO_PIN9)
 #define GPIO_TIM15_CH1IN_1             (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN2)
 #define GPIO_TIM15_CH1NIN_1            (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN1)
 #define GPIO_TIM15_CH1NOUT_1           (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN1)
@@ -376,7 +376,7 @@
 #define GPIO_TIM15_CH2IN_1             (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN3)
 #define GPIO_TIM15_CH2OUT_1            (GPIO_ALT | GPIO_AF9 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN3)
 
-#define GPIO_TIM16_BKIN                (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN5)
+#define GPIO_TIM16_BKIN_1              (GPIO_ALT | GPIO_AF1 | GPIO_PORTB | GPIO_PIN5)
 #define GPIO_TIM16_CH1IN_1             (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN6)
 #define GPIO_TIM16_CH1IN_2             (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN12)
 #define GPIO_TIM16_CH1IN_3             (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN4)
@@ -394,8 +394,8 @@
 #define GPIO_TIM17_BKIN_2              (GPIO_ALT | GPIO_AF10 | GPIO_PORTB | GPIO_PIN4)
 #define GPIO_TIM17_CH1IN_1             (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTA | GPIO_PIN7)
 #define GPIO_TIM17_CH1IN_2             (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN5)
-#define GPIO_TIM17_CH1NIN              (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN7)
-#define GPIO_TIM17_CH1NOUT             (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN7)
+#define GPIO_TIM17_CH1NIN_1            (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN7)
+#define GPIO_TIM17_CH1NOUT_1           (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN7)
 #define GPIO_TIM17_CH1OUT_1            (GPIO_ALT | GPIO_AF1 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN7)
 #define GPIO_TIM17_CH1OUT_2            (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_50MHz | GPIO_PUSHPULL | GPIO_PORTB | GPIO_PIN5)
 
diff --git a/boards/arm/stm32/nucleo-g431kb/configs/pwm/defconfig b/boards/arm/stm32/nucleo-g431kb/configs/pwm/defconfig
new file mode 100644
index 0000000..5f1c322
--- /dev/null
+++ b/boards/arm/stm32/nucleo-g431kb/configs/pwm/defconfig
@@ -0,0 +1,43 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-g431kb"
+CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32G431K=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=5483
+CONFIG_BUILTIN=y
+CONFIG_DEFAULT_SMALL=y
+CONFIG_EXAMPLES_PWM=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MAX_TASKS=16
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_PWM=y
+CONFIG_RAM_SIZE=22528
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_START_DAY=14
+CONFIG_START_YEAR=2021
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+CONFIG_STM32_FORCEPOWER=y
+CONFIG_STM32_JTAG_FULL_ENABLE=y
+CONFIG_STM32_TIM1=y
+CONFIG_STM32_TIM1_CH1OUT=y
+CONFIG_STM32_TIM1_PWM=y
+CONFIG_STM32_USART2=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/arm/stm32/nucleo-g431kb/include/board.h b/boards/arm/stm32/nucleo-g431kb/include/board.h
index 1fe71ff..4729dc0 100755
--- a/boards/arm/stm32/nucleo-g431kb/include/board.h
+++ b/boards/arm/stm32/nucleo-g431kb/include/board.h
@@ -241,4 +241,10 @@
 #define DMACHAN_USART2_TX DMAMAP_DMA12_USART2TX_0 /* DMA1 */
 #define DMACHAN_USART2_RX DMAMAP_DMA12_USART2RX_0 /* DMA1 */
 
+/* PWM configuration ********************************************************/
+
+/* TIM1 PWM */
+
+#define GPIO_TIM1_CH1OUT  GPIO_TIM1_CH1OUT_1  /* PA8 */
+
 #endif /* __BOARDS_ARM_STM32_NUCLEO_G431KB_INCLUDE_BOARD_H */
diff --git a/boards/arm/stm32/nucleo-g431kb/src/Make.defs b/boards/arm/stm32/nucleo-g431kb/src/Make.defs
index 0d952c8..22b1461 100755
--- a/boards/arm/stm32/nucleo-g431kb/src/Make.defs
+++ b/boards/arm/stm32/nucleo-g431kb/src/Make.defs
@@ -29,6 +29,10 @@ else
 CSRCS += stm32_userleds.c
 endif
 
+ifeq ($(CONFIG_PWM),y)
+CSRCS += stm32_pwm.c
+endif
+
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += stm32_appinit.c
 endif
diff --git a/boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h b/boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h
index 3033b87..854ac09 100755
--- a/boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h
+++ b/boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h
@@ -57,6 +57,11 @@
 
 #define LED_DRIVER_PATH                "/dev/userleds"
 
+/* PWM */
+
+#define NUCLEOG431KB_PWM_TIMER   1
+#define NUCLEOG431KB_PWM_PATH    "/dev/pwm0"
+
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -85,4 +90,16 @@
 
 int stm32_bringup(void);
 
+/****************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
 #endif /* __BOARDS_ARM_STM32_NUCLEO_G431KB_SRC_NUCLEO_G431KB_H */
diff --git a/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c b/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
index c7110dc..11e8e59 100755
--- a/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
+++ b/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
@@ -78,6 +78,16 @@ int stm32_bringup(void)
     }
 #endif
 
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM driver. */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup failed: %d\n", ret);
+    }
+#endif
+
   UNUSED(ret);
   return OK;
 }
diff --git a/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c b/boards/arm/stm32/nucleo-g431kb/src/stm32_pwm.c
old mode 100755
new mode 100644
similarity index 61%
copy from boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
copy to boards/arm/stm32/nucleo-g431kb/src/stm32_pwm.c
index c7110dc..d6ee921
--- a/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
+++ b/boards/arm/stm32/nucleo-g431kb/src/stm32_pwm.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
+ * boards/arm/stm32/nucleo-g431kb/src/stm32_pwm.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -24,60 +24,61 @@
 
 #include <nuttx/config.h>
 
-#include <sys/types.h>
-#include <syslog.h>
+#include <errno.h>
+#include <debug.h>
 
-#include <nuttx/board.h>
-
-#ifdef CONFIG_USERLED
-#  include <nuttx/leds/userled.h>
-#endif
+#include <nuttx/timers/pwm.h>
+#include <arch/board/board.h>
 
+#include "chip.h"
+#include "arm_arch.h"
+#include "stm32_pwm.h"
 #include "nucleo-g431kb.h"
 
 /****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#undef HAVE_LEDS
-
-#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
-#  define HAVE_LEDS 1
-#endif
-
-/****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: stm32_bringup
+ * Name: stm32_pwm_setup
  *
  * Description:
- *   Perform architecture-specific initialization
- *
- *   CONFIG_BOARD_LATE_INITIALIZE=y :
- *     Called from board_late_initialize().
- *
- *   CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
- *     Called from the NSH library
+ *   Initialize PWM and register the PWM device.
  *
  ****************************************************************************/
 
-int stm32_bringup(void)
+int stm32_pwm_setup(void)
 {
+  static bool initialized = false;
+  struct pwm_lowerhalf_s *pwm;
   int ret;
 
-#ifdef HAVE_LEDS
-  /* Register the LED driver */
+  /* Have we already initialized? */
 
-  ret = userled_lower_initialize(LED_DRIVER_PATH);
-  if (ret < 0)
+  if (!initialized)
     {
-      syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
-      return ret;
+      /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+      pwm = stm32_pwminitialize(NUCLEOG431KB_PWM_TIMER);
+      if (!pwm)
+        {
+          tmrerr("Failed to get the STM32 PWM lower half\n");
+          return -ENODEV;
+        }
+
+      /* Register the PWM driver at "/dev/pwm0" */
+
+      ret = pwm_register(NUCLEOG431KB_PWM_PATH, pwm);
+      if (ret < 0)
+        {
+          tmrerr("pwm_register failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Now we are initialized */
+
+      initialized = true;
     }
-#endif
 
-  UNUSED(ret);
   return OK;
 }