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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/09/21 10:07:14 UTC
[incubator-nuttx] 04/04: armv7-r: add VBAR cp15 opearation
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 6903f02d4111b9815aa77159132ebd86c9276a6a
Author: ligd <li...@xiaomi.com>
AuthorDate: Mon Sep 19 12:00:54 2022 +0800
armv7-r: add VBAR cp15 opearation
Signed-off-by: ligd <li...@xiaomi.com>
---
arch/arm/src/armv7-r/barriers.h | 2 ++
arch/arm/src/armv7-r/cp15.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/arch/arm/src/armv7-r/barriers.h b/arch/arm/src/armv7-r/barriers.h
index dbdd232713..030b5f4a50 100644
--- a/arch/arm/src/armv7-r/barriers.h
+++ b/arch/arm/src/armv7-r/barriers.h
@@ -34,9 +34,11 @@
#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
+#define arm_nop(n) __asm__ __volatile__ ("nop\n")
#define ARM_DSB() arm_dsb(15)
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
+#define ARM_NOP() arm_nop(15)
#endif /* __ARCH_ARM_SRC_ARMV7_R_BARRIERS_H */
diff --git a/arch/arm/src/armv7-r/cp15.h b/arch/arm/src/armv7-r/cp15.h
index b51ac20d4b..074d10314a 100644
--- a/arch/arm/src/armv7-r/cp15.h
+++ b/arch/arm/src/armv7-r/cp15.h
@@ -142,6 +142,9 @@
#define CP15_PMINTENSET(r) _CP15(0, r, c9, c14, 1) /* Interrupt Enable Set Register */
#define CP15_PMINTENCLR(r) _CP15(0, r, c9, c14, 2) /* Interrupt Enable Clear Register */
+#define CP15_VBAR(r) _CP15(0, r, c12, c0, 0) /* Vector Base Address Register */
+#define CP15_MVBAR(r) _CP15(0, r, c12, c0, 1) /* Monitor Vector Base Address Register */
+
#define CP15_CONTEXTIDR(r) _CP15(0, r, c13, c0, 1) /* Context ID Register */
#define CP15_TPIDRURW(r) _CP15(0, r, c13, c0, 2) /* Software Thread ID Registers */
#define CP15_TPIDRURO(r) _CP15(0, r, c13, c0, 3)