[incubator-nuttx] 04/04: arch/arm/src/stm32h7/stm32_ethernet.c: Comment and debug assertion fixes

[gn...@apache.org]

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commit 4967352c3388e7b09d0b6a4c3f659eb38ec12a3d
Author: Jukka Laitinen <ju...@intel.com>
AuthorDate: Wed Nov 27 08:28:36 2019 +0200

    arch/arm/src/stm32h7/stm32_ethernet.c: Comment and debug assertion fixes
    
    Modify some comments and debug assertions, which inherit from previous versions
    and make no sense. Also add a few nerr printouts to make it easier to debug
    running out of buffers
    
    Signed-off-by: Jukka Laitinen <ju...@intel.com>
---
 arch/arm/src/stm32h7/stm32_ethernet.c | 26 +++++++++++++++++---------
 1 file changed, 17 insertions(+), 9 deletions(-)

diff --git a/arch/arm/src/stm32h7/stm32_ethernet.c b/arch/arm/src/stm32h7/stm32_ethernet.c
index 8c52e2c..cd3bfda 100644
--- a/arch/arm/src/stm32h7/stm32_ethernet.c
+++ b/arch/arm/src/stm32h7/stm32_ethernet.c
@@ -1102,7 +1102,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
   ninfo("d_len: %d d_buf: %p txhead: %p tdes3: %08x\n",
         priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->des3);
 
-  DEBUGASSERT(txdesc && (txdesc->des3 & ETH_TDES3_RD_OWN) == 0);
+  DEBUGASSERT(txdesc);
 
   /* Flush the contents of the TX buffer into physical memory */
 
@@ -1133,8 +1133,6 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
 
       for (i = 0; i < bufcount; i++)
         {
-          /* This could be a normal event but the design does not handle it */
-
           DEBUGASSERT((txdesc->des3 & ETH_TDES3_RD_OWN) == 0);
 
           /* Set the Buffer1 address pointer */
@@ -1170,7 +1168,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
 
               /* The size of the transfer is the whole buffer */
 
-              txdesc->des2  = ALIGNED_BUFSIZE | ETH_TDES2_RD_IOC;
+              txdesc->des2  = ALIGNED_BUFSIZE;
               buffer        += ALIGNED_BUFSIZE;
             }
 
@@ -1193,6 +1191,8 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
   else
 #endif
     {
+      DEBUGASSERT((txdesc->des3 & ETH_TDES3_RD_OWN) == 0);
+
       /* Set the Buffer1 address pointer */
 
       txdesc->des0 = (uint32_t)priv->dev.d_buf;
@@ -1266,8 +1266,6 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
       stm32_disableint(priv, ETH_DMACIER_RIE);
     }
 
-  /* Check if the TX Buffer unavailable flag is set */
-
   MEMORY_SYNC();
 
   /* Enable TX interrupts */
@@ -1367,6 +1365,8 @@ static int stm32_txpoll(struct net_driver_s *dev)
            * available for another transfer.
            */
 
+          nerr("No tx descriptors available");
+
           return -EBUSY;
         }
 
@@ -1382,6 +1382,8 @@ static int stm32_txpoll(struct net_driver_s *dev)
         {
           /* Terminate the poll. */
 
+          nerr("No tx buffer available");
+
           return -ENOMEM;
         }
     }
@@ -1457,6 +1459,14 @@ static void stm32_dopoll(struct stm32_ethmac_s *priv)
               dev->d_buf = NULL;
             }
         }
+      else
+        {
+          nerr("No tx buffers");
+        }
+    }
+  else
+    {
+      nerr("No tx descriptors\n");
     }
 }
 
@@ -1602,9 +1612,7 @@ static void stm32_freesegment(struct stm32_ethmac_s *priv,
       up_clean_dcache((uintptr_t)rxdesc,
                       (uintptr_t)rxdesc + sizeof(struct eth_desc_s));
 
-      /* Get the next RX descriptor in the chain (cache coherency should not
-       * be an issue because the link address is constant.
-       */
+      /* Get the next RX descriptor in the chain */
 
       rxdesc = stm32_get_next_rxdesc(priv, rxdesc);