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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2023/01/06 09:52:07 UTC

[GitHub] [nuttx] donghengqaz opened a new pull request, #8047: xtensa/esp32: SPI support to configure as R/W/RW mode

donghengqaz opened a new pull request, #8047:
URL: https://github.com/apache/nuttx/pull/8047

   ## Summary
   
   xtensa/esp32: SPI support to configure as R/W/RW mode.
   
   ## Impact
   
   Users can save GPIOs in SPI master/slave mode and use these in some other peripherals.
   
   ## Testing
   
   


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[GitHub] [nuttx] donghengqaz commented on a diff in pull request #8047: xtensa/esp32: SPI support to configure as R/W/RW mode

Posted by GitBox <gi...@apache.org>.
donghengqaz commented on code in PR #8047:
URL: https://github.com/apache/nuttx/pull/8047#discussion_r1065274229


##########
arch/xtensa/src/esp32/Kconfig:
##########
@@ -1158,6 +1158,37 @@ config ESP32_SPI2_MISOPIN
 	default 12
 	range 0 39
 
+choice ESP32_SPI2_MASTER_IO
+	prompt "SPI2 master I/O mode"
+	default ESP32_SPI2_MASTER_IO_RW

Review Comment:
   It should have been designed as you said, but because ESP32 has not enough GPIOs and peripherals, so some hardware needs to switch connection from SPI master to slave, like:
   1. ESP32 SPI0 & 1 connect to SPI flash and PSRAM
   2. ESP32 SPI2 connects to some sensors
   3. ESP32 SPI3 works as master mode and configure the camera
   4. ESP32 SPI3 switches to slave mode, then receive data from camera
   
   So in the case, we have to make the master and slave mode co-exist in specific GPIOs and peripheral.



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[GitHub] [nuttx] xiaoxiang781216 commented on a diff in pull request #8047: xtensa/esp32: SPI support to configure as R/W/RW mode

Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on code in PR #8047:
URL: https://github.com/apache/nuttx/pull/8047#discussion_r1065006792


##########
arch/xtensa/src/esp32/Kconfig:
##########
@@ -1158,6 +1158,37 @@ config ESP32_SPI2_MISOPIN
 	default 12
 	range 0 39
 
+choice ESP32_SPI2_MASTER_IO
+	prompt "SPI2 master I/O mode"
+	default ESP32_SPI2_MASTER_IO_RW

Review Comment:
   but the current design allow use select ESP32_SPI2_MASTER_IO_RW and ESP32_SPI2_SLAVE_IO_RW, which looks wrong. You should merge ESP32_SPI2_MASTER_IO_RW and ESP32_SPI2_SLAVE_IO_RW into one choice to avoid the invalid combination.



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[GitHub] [nuttx] donghengqaz commented on a diff in pull request #8047: xtensa/esp32: SPI support to configure as R/W/RW mode

Posted by GitBox <gi...@apache.org>.
donghengqaz commented on code in PR #8047:
URL: https://github.com/apache/nuttx/pull/8047#discussion_r1064248927


##########
arch/xtensa/src/esp32/Kconfig:
##########
@@ -1158,6 +1158,37 @@ config ESP32_SPI2_MISOPIN
 	default 12
 	range 0 39
 
+choice ESP32_SPI2_MASTER_IO
+	prompt "SPI2 master I/O mode"
+	default ESP32_SPI2_MASTER_IO_RW

Review Comment:
   It may not depend on "SPI_SLAVE", because users may use SPI2 as SPI master and SPI3 as SPI slave, so we should keep SPI2 or SPI3 master mode when selecting SPI_SLAVE.



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[GitHub] [nuttx] xiaoxiang781216 merged pull request #8047: xtensa/esp32: SPI support to configure as R/W/RW mode

Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 merged PR #8047:
URL: https://github.com/apache/nuttx/pull/8047


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[GitHub] [nuttx] acassis commented on a diff in pull request #8047: xtensa/esp32: SPI support to configure as R/W/RW mode

Posted by GitBox <gi...@apache.org>.
acassis commented on code in PR #8047:
URL: https://github.com/apache/nuttx/pull/8047#discussion_r1063538058


##########
arch/xtensa/src/esp32/Kconfig:
##########
@@ -1158,6 +1158,37 @@ config ESP32_SPI2_MISOPIN
 	default 12
 	range 0 39
 
+choice ESP32_SPI2_MASTER_IO
+	prompt "SPI2 master I/O mode"
+	default ESP32_SPI2_MASTER_IO_RW

Review Comment:
   Should it have a "depends on !SPI_SLAVE" ? Otherwise the user could select the ESP32_SPI2_MASTER_IO even when SPI_SLAVE is enabled



##########
arch/xtensa/src/esp32/Kconfig:
##########
@@ -1182,6 +1213,37 @@ config ESP32_SPI3_MISOPIN
 	default 19
 	range 0 39
 
+choice ESP32_SPI3_MASTER_IO
+	prompt "SPI3 master I/O mode"
+	default ESP32_SPI3_MASTER_IO_RW

Review Comment:
   same here



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[GitHub] [nuttx] donghengqaz commented on a diff in pull request #8047: xtensa/esp32: SPI support to configure as R/W/RW mode

Posted by GitBox <gi...@apache.org>.
donghengqaz commented on code in PR #8047:
URL: https://github.com/apache/nuttx/pull/8047#discussion_r1065274229


##########
arch/xtensa/src/esp32/Kconfig:
##########
@@ -1158,6 +1158,37 @@ config ESP32_SPI2_MISOPIN
 	default 12
 	range 0 39
 
+choice ESP32_SPI2_MASTER_IO
+	prompt "SPI2 master I/O mode"
+	default ESP32_SPI2_MASTER_IO_RW

Review Comment:
   It should have been designed as you said, but because ESP32 has not enough GPIOs and peripherals, so some hardware needs to switch connection from SPI master to slave, like:
   1. ESP32 SPI0 & 1 connect to SPI flash and PSRAM
   2. ESP32 SPI2 connects to some sensors
   1. ESP32 SPI3 works as master mode and configure the camera
   3. ESP32 SPI3 switches to slave mode, then receive data from camera
   So in the case, we have to make the master and slave mode co-exist in specific GPIOs and peripheral.



-- 
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