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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/03/25 09:33:30 UTC
[GitHub] [incubator-nuttx] pkarashchenko commented on a change in pull request #5782: RISC-V: Implement option to run NuttX in supervisor mode (S-mode)
pkarashchenko commented on a change in pull request #5782:
URL: https://github.com/apache/incubator-nuttx/pull/5782#discussion_r835083560
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
Review comment:
```suggestion
#ifndef __ARCH_RISCV_INCLUDE_MODE_H
#define __ARCH_RISCV_INCLUDE_MODE_H
```
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISC_V_INCLUDE_MODE_H
+#define __ARCH_RISC_V_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* CSR definitions */
+
+# define CSR_STATUS sstatus /* Global status register */
+# define CSR_EPC sepc /* Exception program counter */
+# define CSR_IE sie /* Interrupt enable register */
+
+/* In status register */
+
+# define STATUS_IE SSTATUS_SIE /* Global interrupt enable */
+# define STATUS_PIE SSTATUS_SPIE /* Previous interrupt enable */
+# define STATUS_PPP SSTATUS_SPPS /* Previous privilege */
+# define STATUS_SUM SSTATUS_SUM /* Access to user memory */
+
+/* Interrupt bits */
+
+# define IE_EIE SIE_SEIE /* External interrupt enable */
+# define IE_SIE SIE_SSIE /* Software interrupt enable */
+# define IE_TIE SIE_STIE /* Timer interrupt enable */
+
+/* External, timer and software interrupt */
+
+# define RISCV_IRQ_EXT RISCV_IRQ_SEXT /* PLIC IRQ */
+# define RISCV_IRQ_TIMER RISCV_IRQ_STIMER /* Timer IRQ */
+# define RISCV_IRQ_SOFT RISCV_IRQ_SSOFT /* SW IRQ */
+
+#else
+
+/* CSR definitions */
+
+# define CSR_STATUS mstatus /* Global status register */
+# define CSR_EPC mepc /* Exception program counter */
+# define CSR_IE mie /* Interrupt enable register */
+
+/* In status register */
+
+# define STATUS_IE MSTATUS_MIE /* Global interrupt enable */
+# define STATUS_PIE MSTATUS_MPIE /* Previous interrupt enable */
+# define STATUS_PPP MSTATUS_MPPM /* Previous privilege */
+# define STATUS_SUM 0 /* Not needed in M-mode */
+
+/* Interrupt bits */
+
+# define IE_EIE MIE_MEIE /* External interrupt enable */
+# define IE_SIE MIE_MSIE /* Software interrupt enable */
+# define IE_TIE MIE_MTIE /* Timer interrupt enable */
+
+/* External, timer and software interrupt */
+
+# define RISCV_IRQ_EXT RISCV_IRQ_MEXT /* PLIC IRQ */
+# define RISCV_IRQ_TIMER RISCV_IRQ_MTIMER /* Timer IRQ */
+# define RISCV_IRQ_SOFT RISCV_IRQ_MSOFT /* SW IRQ */
+
+#endif
+
+#endif /* __ARCH_RISC_V_INCLUDE_MODE_H */
Review comment:
```suggestion
#endif /* __ARCH_RISCV_INCLUDE_MODE_H */
```
##########
File path: arch/risc-v/src/mpfs/mpfs_plic.c
##########
@@ -39,6 +39,18 @@
* Pre-processor Definitions
****************************************************************************/
+/* Offset to privilege mode, note that hart0 does not have S-mode */
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+#define MPFS_PLIC_IEPRIV_OFFSET (MPFS_HART_SIE_OFFSET)
+#define MPFS_PLIC_CLAIMPRIV_OFFSET (MPFS_PLIC_CLAIM_S_OFFSET)
+#define MPFS_PLIC_THRESHOLDPRIV_OFFSET (MPFS_PLIC_THRESHOLD_S_OFFSET)
Review comment:
```suggestion
# define MPFS_PLIC_IEPRIV_OFFSET (MPFS_HART_SIE_OFFSET)
# define MPFS_PLIC_CLAIMPRIV_OFFSET (MPFS_PLIC_CLAIM_S_OFFSET)
# define MPFS_PLIC_THRESHOLDPRIV_OFFSET (MPFS_PLIC_THRESHOLD_S_OFFSET)
```
##########
File path: arch/risc-v/src/mpfs/mpfs_plic.c
##########
@@ -39,6 +39,18 @@
* Pre-processor Definitions
****************************************************************************/
+/* Offset to privilege mode, note that hart0 does not have S-mode */
+
+#ifdef CONFIG_ARCH_USE_S_MODE
+#define MPFS_PLIC_IEPRIV_OFFSET (MPFS_HART_SIE_OFFSET)
+#define MPFS_PLIC_CLAIMPRIV_OFFSET (MPFS_PLIC_CLAIM_S_OFFSET)
+#define MPFS_PLIC_THRESHOLDPRIV_OFFSET (MPFS_PLIC_THRESHOLD_S_OFFSET)
+#else
+#define MPFS_PLIC_IEPRIV_OFFSET (0)
+#define MPFS_PLIC_CLAIMPRIV_OFFSET (0)
+#define MPFS_PLIC_THRESHOLDPRIV_OFFSET (0)
Review comment:
```suggestion
# define MPFS_PLIC_IEPRIV_OFFSET (0)
# define MPFS_PLIC_CLAIMPRIV_OFFSET (0)
# define MPFS_PLIC_THRESHOLDPRIV_OFFSET (0)
```
##########
File path: arch/risc-v/src/mpfs/mpfs_start.c
##########
@@ -103,6 +114,73 @@ const uint64_t g_entrypoints[5] =
#endif
+#ifdef CONFIG_ARCH_USE_S_MODE
+extern void __irq_vec(void);
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static void nx_start_trampoline(void)
+{
+#ifdef CONFIG_ARCH_USE_S_MODE
+ /* In kernel mode setup system to enter S-mode */
+
+ uint64_t reg;
Review comment:
```suggestion
uintptr_t reg;
```
##########
File path: arch/risc-v/src/common/riscv_internal.h
##########
@@ -279,6 +287,60 @@ int riscv_pause_handler(int irq, void *c, void *arg);
uintptr_t riscv_mhartid(void);
+#ifdef CONFIG_ARCH_USE_S_MODE
+/* If kernel runs in Supervisor mode, declare proper function prototypes,
+ * this is because it is not possible to ecall from S mode to S mode
+ */
+
+int riscv_saveusercontext(uintptr_t *saveregs);
+void riscv_fullcontextrestore(uintptr_t *restoreregs) noreturn_function;
+void riscv_switchcontext(uintptr_t *saveregs, uintptr_t *restoreregs);
+void riscv_syscall_return(void);
+void riscv_syscall_dispatch(void) noreturn_function;
+
+#else
+
+/* Context switching via system calls ***************************************/
+
+/* SYS call 0:
+ *
+ * int riscv_saveusercontext(uint64_t *saveregs);
Review comment:
```suggestion
* int riscv_saveusercontext(uintptr_t *saveregs);
```
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