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Posted to commits@mynewt.apache.org by ma...@apache.org on 2017/03/10 19:51:20 UTC
[15/52] [partial] incubator-mynewt-core git commit: Add support for
STM32F7xx and NUCLEO-F767
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/35529b95/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h
----------------------------------------------------------------------
diff --git a/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h
new file mode 100644
index 0000000..01bb7bf
--- /dev/null
+++ b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h
@@ -0,0 +1,423 @@
+/**
+ ******************************************************************************
+ * @file stm32f7xx_hal_crc.h
+ * @author MCD Application Team
+ * @version V1.2.0
+ * @date 30-December-2016
+ * @brief Header file of CRC HAL module.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7xx_HAL_CRC_H
+#define __STM32F7xx_HAL_CRC_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f7xx_hal_def.h"
+
+/** @addtogroup STM32F7xx_HAL_Driver
+ * @{
+ */
+
+/** @defgroup CRC CRC
+ * @brief CRC HAL module driver
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup CRC_Exported_Types CRC Exported Types
+ * @{
+ */
+
+/** @defgroup CRC_Exported_Types_Group1 CRC State Structure definition
+ * @{
+ */
+typedef enum
+{
+ HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */
+ HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */
+ HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */
+ HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */
+ HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */
+}HAL_CRC_StateTypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Exported_Types_Group2 CRC Init Structure definition
+ * @{
+ */
+typedef struct
+{
+ uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
+ If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
+ X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
+ In that case, there is no need to set GeneratingPolynomial field.
+ If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set */
+
+ uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
+ If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
+ 0xFFFFFFFF value. In that case, there is no need to set InitValue field.
+ If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set */
+
+ uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial. 7, 8, 16 or 32-bit long value for a polynomial degree
+ respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
+ e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65.
+ No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE */
+
+ uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
+ Value can be either one of
+ CRC_POLYLENGTH_32B (32-bit CRC)
+ CRC_POLYLENGTH_16B (16-bit CRC)
+ CRC_POLYLENGTH_8B (8-bit CRC)
+ CRC_POLYLENGTH_7B (7-bit CRC) */
+
+ uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
+ is set to DEFAULT_INIT_VALUE_ENABLE */
+
+ uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
+ Can be either one of the following values
+ CRC_INPUTDATA_INVERSION_NONE no input data inversion
+ CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
+ CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C
+ CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */
+
+ uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
+ Can be either
+ CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion, or
+ CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */
+}CRC_InitTypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Exported_Types_Group3 CRC Handle Structure definition
+ * @{
+ */
+typedef struct
+{
+ CRC_TypeDef *Instance; /*!< Register base address */
+
+ CRC_InitTypeDef Init; /*!< CRC configuration parameters */
+
+ HAL_LockTypeDef Lock; /*!< CRC Locking object */
+
+ __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
+
+ uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
+ Can be either
+ CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data)
+ CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data)
+ CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bits data)
+ Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error
+ must occur if InputBufferFormat is not one of the three values listed above */
+}CRC_HandleTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup CRC_Exported_Constants CRC exported constants
+ * @{
+ */
+
+/** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
+ * @{
+ */
+#define DEFAULT_CRC32_POLY 0x04C11DB7U
+
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Default_InitValue Default CRC computation initialization value
+ * @{
+ */
+#define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU
+
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
+ * @{
+ */
+#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U)
+#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U)
+
+
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
+ * @{
+ */
+#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U)
+#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U)
+
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP
+ * @{
+ */
+#define CRC_POLYLENGTH_32B ((uint32_t)0x00000000U)
+#define CRC_POLYLENGTH_16B ((uint32_t)CRC_CR_POLYSIZE_0)
+#define CRC_POLYLENGTH_8B ((uint32_t)CRC_CR_POLYSIZE_1)
+#define CRC_POLYLENGTH_7B ((uint32_t)CRC_CR_POLYSIZE)
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
+ * @{
+ */
+#define HAL_CRC_LENGTH_32B 32U
+#define HAL_CRC_LENGTH_16B 16U
+#define HAL_CRC_LENGTH_8B 8U
+#define HAL_CRC_LENGTH_7B 7U
+
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Input_Buffer_Format CRC input buffer format
+ * @{
+ */
+/* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
+ * an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
+ * to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
+ * the CRC APIs to provide a correct result */
+#define CRC_INPUTDATA_FORMAT_UNDEFINED ((uint32_t)0x00000000U)
+#define CRC_INPUTDATA_FORMAT_BYTES ((uint32_t)0x00000001U)
+#define CRC_INPUTDATA_FORMAT_HALFWORDS ((uint32_t)0x00000002U)
+#define CRC_INPUTDATA_FORMAT_WORDS ((uint32_t)0x00000003U)
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/* Exported macros -----------------------------------------------------------*/
+
+/** @defgroup CRC_Exported_Macros CRC exported macros
+ * @{
+ */
+
+/** @brief Reset CRC handle state
+ * @param __HANDLE__: CRC handle.
+ * @retval None
+ */
+#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
+
+/**
+ * @brief Reset CRC Data Register.
+ * @param __HANDLE__: CRC handle
+ * @retval None.
+ */
+#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
+
+/**
+ * @brief Set CRC INIT non-default value
+ * @param __HANDLE__ : CRC handle
+ * @param __INIT__ : 32-bit initial value
+ * @retval None.
+ */
+#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
+
+/**
+ * @brief Stores a 8-bit data in the Independent Data(ID) register.
+ * @param __HANDLE__: CRC handle
+ * @param __VALUE__: 8-bit value to be stored in the ID register
+ * @retval None
+ */
+#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, CRC_IDR_IDR, (__VALUE__)))
+
+/**
+ * @brief Returns the 8-bit data stored in the Independent Data(ID) register.
+ * @param __HANDLE__: CRC handle
+ * @retval 8-bit value of the ID register
+ */
+#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
+/**
+ * @}
+ */
+
+
+/* Include CRC HAL Extension module */
+#include "stm32f7xx_hal_crc_ex.h"
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup CRC_Exported_Functions CRC Exported Functions
+ * @{
+ */
+
+/** @defgroup CRC_Exported_Functions_Group1 Initialization/de-initialization functions
+ * @{
+ */
+/* Initialization and de-initialization functions ****************************/
+HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
+HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
+void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
+/**
+ * @}
+ */
+
+/* Aliases for inter STM32 series compatibility */
+#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse
+#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse
+
+/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
+ * @{
+ */
+/* Peripheral Control functions ***********************************************/
+uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
+uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
+/**
+ * @}
+ */
+
+/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
+ * @{
+ */
+/* Peripheral State and Error functions ***************************************/
+HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+/* Private types -------------------------------------------------------------*/
+/** @defgroup CRC_Private_Types CRC Private Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private defines -----------------------------------------------------------*/
+/** @defgroup CRC_Private_Defines CRC Private Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/** @defgroup CRC_Private_Variables CRC Private Variables
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup CRC_Private_Constants CRC Private Constants
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup CRC_Private_Macros CRC Private Macros
+ * @{
+ */
+#define IS_DEFAULT_POLYNOMIAL(__DEFAULT__) (((__DEFAULT__) == DEFAULT_POLYNOMIAL_ENABLE) || \
+ ((__DEFAULT__) == DEFAULT_POLYNOMIAL_DISABLE))
+#define IS_DEFAULT_INIT_VALUE(__VALUE__) (((__VALUE__) == DEFAULT_INIT_VALUE_ENABLE) || \
+ ((__VALUE__) == DEFAULT_INIT_VALUE_DISABLE))
+#define IS_CRC_POL_LENGTH(__LENGTH__) (((__LENGTH__) == CRC_POLYLENGTH_32B) || \
+ ((__LENGTH__) == CRC_POLYLENGTH_16B) || \
+ ((__LENGTH__) == CRC_POLYLENGTH_8B) || \
+ ((__LENGTH__) == CRC_POLYLENGTH_7B))
+#define IS_CRC_INPUTDATA_FORMAT(__FORMAT__) (((__FORMAT__) == CRC_INPUTDATA_FORMAT_BYTES) || \
+ ((__FORMAT__) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
+ ((__FORMAT__) == CRC_INPUTDATA_FORMAT_WORDS))
+
+
+/**
+ * @}
+ */
+
+/* Private functions prototypes ----------------------------------------------*/
+/** @defgroup CRC_Private_Functions_Prototypes CRC Private Functions Prototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private functions ---------------------------------------------------------*/
+/** @defgroup CRC_Private_Functions CRC Private Functions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7xx_HAL_CRC_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/35529b95/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h
----------------------------------------------------------------------
diff --git a/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h
new file mode 100644
index 0000000..62adabc
--- /dev/null
+++ b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h
@@ -0,0 +1,168 @@
+/**
+ ******************************************************************************
+ * @file stm32f7xx_hal_crc_ex.h
+ * @author MCD Application Team
+ * @version V1.2.0
+ * @date 30-December-2016
+ * @brief Header file of CRC HAL extension module.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7xx_HAL_CRC_EX_H
+#define __STM32F7xx_HAL_CRC_EX_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f7xx_hal_def.h"
+
+/** @addtogroup STM32F7xx_HAL_Driver
+ * @{
+ */
+
+/** @defgroup CRCEx CRCEx
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup CRCEx_Exported_Constants CRC Extended exported constants
+ * @{
+ */
+
+/** @defgroup CRCEx_Input_Data_Inversion CRC Extended input data inversion modes
+ * @{
+ */
+#define CRC_INPUTDATA_INVERSION_NONE ((uint32_t)0x00000000U)
+#define CRC_INPUTDATA_INVERSION_BYTE ((uint32_t)CRC_CR_REV_IN_0)
+#define CRC_INPUTDATA_INVERSION_HALFWORD ((uint32_t)CRC_CR_REV_IN_1)
+#define CRC_INPUTDATA_INVERSION_WORD ((uint32_t)CRC_CR_REV_IN)
+
+#define IS_CRC_INPUTDATA_INVERSION_MODE(__MODE__) (((__MODE__) == CRC_INPUTDATA_INVERSION_NONE) || \
+ ((__MODE__) == CRC_INPUTDATA_INVERSION_BYTE) || \
+ ((__MODE__) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
+ ((__MODE__) == CRC_INPUTDATA_INVERSION_WORD))
+/**
+ * @}
+ */
+
+/** @defgroup CRCEx_Output_Data_Inversion CRC Extended output data inversion modes
+ * @{
+ */
+#define CRC_OUTPUTDATA_INVERSION_DISABLE ((uint32_t)0x00000000U)
+#define CRC_OUTPUTDATA_INVERSION_ENABLE ((uint32_t)CRC_CR_REV_OUT)
+
+#define IS_CRC_OUTPUTDATA_INVERSION_MODE(__MODE__) (((__MODE__) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \
+ ((__MODE__) == CRC_OUTPUTDATA_INVERSION_ENABLE))
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+/* Exported macro ------------------------------------------------------------*/
+
+/** @defgroup CRCEx_Exported_Macros CRC Extended exported macros
+ * @{
+ */
+
+/**
+ * @brief Set CRC output reversal
+ * @param __HANDLE__ : CRC handle
+ * @retval None.
+ */
+#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT)
+
+/**
+ * @brief Unset CRC output reversal
+ * @param __HANDLE__ : CRC handle
+ * @retval None.
+ */
+#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT))
+
+/**
+ * @brief Set CRC non-default polynomial
+ * @param __HANDLE__ : CRC handle
+ * @param __POLYNOMIAL__: 7, 8, 16 or 32-bit polynomial
+ * @retval None.
+ */
+#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__))
+
+/**
+ * @}
+ */
+
+
+/** @defgroup CRCEx_Exported_Functions CRC Extended Exported Functions
+ * @{
+ */
+
+/** @defgroup CRCEx_Exported_Functions_Group1 Extended CRC features functions
+ * @{
+ */
+/* Exported functions --------------------------------------------------------*/
+/* Initialization and de-initialization functions ****************************/
+HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength);
+HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
+HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode);
+
+/* Peripheral Control functions ***********************************************/
+/* Peripheral State and Error functions ***************************************/
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7xx_HAL_CRC_EX_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/35529b95/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp.h
----------------------------------------------------------------------
diff --git a/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp.h b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp.h
new file mode 100644
index 0000000..1ec4000
--- /dev/null
+++ b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp.h
@@ -0,0 +1,1168 @@
+/**
+ ******************************************************************************
+ * @file stm32f7xx_hal_cryp.h
+ * @author MCD Application Team
+ * @version V1.2.0
+ * @date 30-December-2016
+ * @brief Header file of CRYP HAL module.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7xx_HAL_CRYP_H
+#define __STM32F7xx_HAL_CRYP_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f7xx_hal_def.h"
+
+#if defined (CRYP)
+/** @addtogroup STM32F7xx_HAL_Driver
+ * @{
+ */
+
+/** @addtogroup CRYP
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup CRYP_Exported_Types CRYP Exported Types
+ * @{
+ */
+
+/** @defgroup CRYP_Exported_Types_Group1 CRYP Configuration Structure definition
+ * @{
+ */
+
+typedef struct
+{
+ uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
+ This parameter can be a value of @ref CRYP_Data_Type */
+
+ uint32_t KeySize; /*!< Used only in AES mode only : 128, 192 or 256 bit key length.
+ This parameter can be a value of @ref CRYP_Key_Size */
+
+ uint8_t* pKey; /*!< The key used for encryption/decryption */
+
+ uint8_t* pInitVect; /*!< The initialization vector used also as initialization
+ counter in CTR mode */
+
+ uint8_t IVSize; /*!< The size of initialization vector.
+ This parameter (called nonce size in CCM) is used only
+ in AES-128/192/256 encryption/decryption CCM mode */
+
+ uint8_t TagSize; /*!< The size of returned authentication TAG.
+ This parameter is used only in AES-128/192/256
+ encryption/decryption CCM mode */
+
+ uint8_t* Header; /*!< The header used in GCM and CCM modes */
+
+ uint32_t HeaderSize; /*!< The size of header buffer in bytes */
+
+ uint8_t* pScratch; /*!< Scratch buffer used to append the header. It's size must be equal to header size + 21 bytes.
+ This parameter is used only in AES-128/192/256 encryption/decryption CCM mode */
+}CRYP_InitTypeDef;
+
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Exported_Types_Group2 CRYP State structures definition
+ * @{
+ */
+
+
+typedef enum
+{
+ HAL_CRYP_STATE_RESET = 0x00U, /*!< CRYP not yet initialized or disabled */
+ HAL_CRYP_STATE_READY = 0x01U, /*!< CRYP initialized and ready for use */
+ HAL_CRYP_STATE_BUSY = 0x02U, /*!< CRYP internal processing is ongoing */
+ HAL_CRYP_STATE_TIMEOUT = 0x03U, /*!< CRYP timeout state */
+ HAL_CRYP_STATE_ERROR = 0x04U /*!< CRYP error state */
+}HAL_CRYP_STATETypeDef;
+
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Exported_Types_Group3 CRYP phase structures definition
+ * @{
+ */
+
+
+typedef enum
+{
+ HAL_CRYP_PHASE_READY = 0x01U, /*!< CRYP peripheral is ready for initialization. */
+ HAL_CRYP_PHASE_PROCESS = 0x02U, /*!< CRYP peripheral is in processing phase */
+ HAL_CRYP_PHASE_FINAL = 0x03U /*!< CRYP peripheral is in final phase
+ This is relevant only with CCM and GCM modes */
+}HAL_PhaseTypeDef;
+
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Exported_Types_Group4 CRYP handle Structure definition
+ * @{
+ */
+
+typedef struct
+{
+ CRYP_TypeDef *Instance; /*!< CRYP registers base address */
+
+ CRYP_InitTypeDef Init; /*!< CRYP required parameters */
+
+ uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */
+
+ uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */
+
+ __IO uint16_t CrypInCount; /*!< Counter of input data */
+
+ __IO uint16_t CrypOutCount; /*!< Counter of output data */
+
+ HAL_StatusTypeDef Status; /*!< CRYP peripheral status */
+
+ HAL_PhaseTypeDef Phase; /*!< CRYP peripheral phase */
+
+ DMA_HandleTypeDef *hdmain; /*!< CRYP In DMA handle parameters */
+
+ DMA_HandleTypeDef *hdmaout; /*!< CRYP Out DMA handle parameters */
+
+ HAL_LockTypeDef Lock; /*!< CRYP locking object */
+
+ __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */
+}CRYP_HandleTypeDef;
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup CRYP_Exported_Constants CRYP Exported Constants
+ * @{
+ */
+
+/** @defgroup CRYP_Key_Size CRYP Key Size
+ * @{
+ */
+#define CRYP_KEYSIZE_128B ((uint32_t)0x00000000U)
+#define CRYP_KEYSIZE_192B CRYP_CR_KEYSIZE_0
+#define CRYP_KEYSIZE_256B CRYP_CR_KEYSIZE_1
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Data_Type CRYP Data Type
+ * @{
+ */
+#define CRYP_DATATYPE_32B ((uint32_t)0x00000000U)
+#define CRYP_DATATYPE_16B CRYP_CR_DATATYPE_0
+#define CRYP_DATATYPE_8B CRYP_CR_DATATYPE_1
+#define CRYP_DATATYPE_1B CRYP_CR_DATATYPE
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Exported_Constants_Group3 CRYP CRYP_AlgoModeDirection
+ * @{
+ */
+#define CRYP_CR_ALGOMODE_DIRECTION ((uint32_t)0x0008003CU)
+#define CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT ((uint32_t)0x00000000U)
+#define CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT ((uint32_t)0x00000004U)
+#define CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT ((uint32_t)0x00000008U)
+#define CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT ((uint32_t)0x0000000CU)
+#define CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT ((uint32_t)0x00000010U)
+#define CRYP_CR_ALGOMODE_DES_ECB_DECRYPT ((uint32_t)0x00000014U)
+#define CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT ((uint32_t)0x00000018U)
+#define CRYP_CR_ALGOMODE_DES_CBC_DECRYPT ((uint32_t)0x0000001CU)
+#define CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT ((uint32_t)0x00000020U)
+#define CRYP_CR_ALGOMODE_AES_ECB_DECRYPT ((uint32_t)0x00000024U)
+#define CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT ((uint32_t)0x00000028U)
+#define CRYP_CR_ALGOMODE_AES_CBC_DECRYPT ((uint32_t)0x0000002CU)
+#define CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT ((uint32_t)0x00000030U)
+#define CRYP_CR_ALGOMODE_AES_CTR_DECRYPT ((uint32_t)0x00000034U)
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Exported_Constants_Group4 CRYP CRYP_Interrupt
+ * @{
+ */
+#define CRYP_IT_INI ((uint32_t)CRYP_IMSCR_INIM) /*!< Input FIFO Interrupt */
+#define CRYP_IT_OUTI ((uint32_t)CRYP_IMSCR_OUTIM) /*!< Output FIFO Interrupt */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Exported_Constants_Group5 CRYP CRYP_Flags
+ * @{
+ */
+#define CRYP_FLAG_BUSY ((uint32_t)0x00000010U) /*!< The CRYP core is currently
+ processing a block of data
+ or a key preparation (for
+ AES decryption). */
+#define CRYP_FLAG_IFEM ((uint32_t)0x00000001U) /*!< Input FIFO is empty */
+#define CRYP_FLAG_IFNF ((uint32_t)0x00000002U) /*!< Input FIFO is not Full */
+#define CRYP_FLAG_OFNE ((uint32_t)0x00000004U) /*!< Output FIFO is not empty */
+#define CRYP_FLAG_OFFU ((uint32_t)0x00000008U) /*!< Output FIFO is Full */
+#define CRYP_FLAG_OUTRIS ((uint32_t)0x01000002U) /*!< Output FIFO service raw
+ interrupt status */
+#define CRYP_FLAG_INRIS ((uint32_t)0x01000001U) /*!< Input FIFO service raw
+ interrupt status */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup CRYP_Exported_Macros CRYP Exported Macros
+ * @{
+ */
+
+/** @brief Reset CRYP handle state
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @retval None
+ */
+#define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET)
+
+/**
+ * @brief Enable/Disable the CRYP peripheral.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @retval None
+ */
+#define __HAL_CRYP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRYP_CR_CRYPEN)
+#define __HAL_CRYP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CRYP_CR_CRYPEN)
+
+/**
+ * @brief Flush the data FIFO.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @retval None
+ */
+#define __HAL_CRYP_FIFO_FLUSH(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRYP_CR_FFLUSH)
+
+/**
+ * @brief Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @param MODE: The algorithm mode.
+ * @retval None
+ */
+#define __HAL_CRYP_SET_MODE(__HANDLE__, MODE) ((__HANDLE__)->Instance->CR |= (uint32_t)(MODE))
+
+/** @brief Check whether the specified CRYP flag is set or not.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @param __FLAG__: specifies the flag to check.
+ * This parameter can be one of the following values:
+ * @arg CRYP_FLAG_BUSY: The CRYP core is currently processing a block of data
+ * or a key preparation (for AES decryption).
+ * @arg CRYP_FLAG_IFEM: Input FIFO is empty
+ * @arg CRYP_FLAG_IFNF: Input FIFO is not full
+ * @arg CRYP_FLAG_INRIS: Input FIFO service raw interrupt is pending
+ * @arg CRYP_FLAG_OFNE: Output FIFO is not empty
+ * @arg CRYP_FLAG_OFFU: Output FIFO is full
+ * @arg CRYP_FLAG_OUTRIS: Input FIFO service raw interrupt is pending
+ * @retval The new state of __FLAG__ (TRUE or FALSE).
+ */
+
+#define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24)) == 0x01U)?((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \
+ ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)))
+
+/** @brief Check whether the specified CRYP interrupt is set or not.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @param __INTERRUPT__: specifies the interrupt to check.
+ * This parameter can be one of the following values:
+ * @arg CRYP_IT_INRIS: Input FIFO service raw interrupt is pending
+ * @arg CRYP_IT_OUTRIS: Output FIFO service raw interrupt is pending
+ * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
+ */
+#define __HAL_CRYP_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->MISR & (__INTERRUPT__)) == (__INTERRUPT__))
+
+/**
+ * @brief Enable the CRYP interrupt.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @param __INTERRUPT__: CRYP Interrupt.
+ * @retval None
+ */
+#define __HAL_CRYP_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IMSCR) |= (__INTERRUPT__))
+
+/**
+ * @brief Disable the CRYP interrupt.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @param __INTERRUPT__: CRYP interrupt.
+ * @retval None
+ */
+#define __HAL_CRYP_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IMSCR) &= ~(__INTERRUPT__))
+
+/**
+ * @}
+ */
+
+/* Include CRYP HAL Extension module */
+#include "stm32f7xx_hal_cryp_ex.h"
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup CRYP_Exported_Functions CRYP Exported Functions
+ * @{
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group1
+ * @{
+ */
+HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp);
+HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp);
+void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp);
+void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp);
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group2
+ * @{
+ */
+/* AES encryption/decryption using polling ***********************************/
+HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+
+/* AES encryption/decryption using interrupt *********************************/
+HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+
+/* AES encryption/decryption using DMA ***************************************/
+HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group3
+ * @{
+ */
+/* DES encryption/decryption using polling ***********************************/
+HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+
+/* DES encryption/decryption using interrupt *********************************/
+HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+
+/* DES encryption/decryption using DMA ***************************************/
+HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group4
+ * @{
+ */
+/* TDES encryption/decryption using polling **********************************/
+HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+
+/* TDES encryption/decryption using interrupt ********************************/
+HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+
+/* TDES encryption/decryption using DMA **************************************/
+HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group5
+ * @{
+ */
+void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp);
+void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp);
+void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp);
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group6
+ * @{
+ */
+void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp);
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group7
+ * @{
+ */
+HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Private types -------------------------------------------------------------*/
+/** @defgroup CRYP_Private_Types CRYP Private Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/** @defgroup CRYP_Private_Variables CRYP Private Variables
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup CRYP_Private_Constants CRYP Private Constants
+ * @{
+ */
+#define CRYP_FLAG_MASK ((uint32_t)0x0000001F)
+/**
+ * @}
+ */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup CRYP_Private_Macros CRYP Private Macros
+ * @{
+ */
+
+#define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \
+ ((__KEYSIZE__) == CRYP_KEYSIZE_192B) || \
+ ((__KEYSIZE__) == CRYP_KEYSIZE_256B))
+
+
+#define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \
+ ((__DATATYPE__) == CRYP_DATATYPE_16B) || \
+ ((__DATATYPE__) == CRYP_DATATYPE_8B) || \
+ ((__DATATYPE__) == CRYP_DATATYPE_1B))
+
+
+ /**
+ * @}
+ */
+
+/* Private functions ---------------------------------------------------------*/
+/** @defgroup CRYP_Private_Functions CRYP Private Functions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* CRYP */
+
+/**
+ * @}
+ */
+
+#if defined (AES)
+
+/** @addtogroup STM32F7xx_HAL_Driver
+ * @{
+ */
+
+/** @addtogroup CRYP
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup CRYP_Exported_Types CRYP Exported Types
+ * @{
+ */
+
+/**
+ * @brief CRYP Configuration Structure definition
+ */
+typedef struct
+{
+ uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
+ This parameter can be a value of @ref CRYP_Data_Type */
+
+ uint32_t KeySize; /*!< 128 or 256-bit key length.
+ This parameter can be a value of @ref CRYP_Key_Size */
+
+ uint32_t OperatingMode; /*!< AES operating mode.
+ This parameter can be a value of @ref CRYP_AES_OperatingMode */
+
+ uint32_t ChainingMode; /*!< AES chaining mode.
+ This parameter can be a value of @ref CRYP_AES_ChainingMode */
+
+ uint32_t KeyWriteFlag; /*!< Allows to bypass or not key write-up before decryption.
+ This parameter can be a value of @ref CRYP_Key_Write */
+
+ uint32_t GCMCMACPhase; /*!< Indicates the processing phase of the Galois Counter Mode (GCM),
+ Galois Message Authentication Code (GMAC) or Cipher Message
+ Authentication Code (CMAC) or Counter with Cipher Mode (CCM) when
+ the latter is applicable.
+ This parameter can be a value of @ref CRYP_GCM_CMAC_Phase */
+
+ uint8_t* pKey; /*!< Encryption/Decryption Key */
+
+ uint8_t* pInitVect; /*!< Initialization Vector used for CTR, CBC, GCM/GMAC, CMAC,
+ (and CCM when applicable) modes */
+
+ uint8_t* Header; /*!< Header used in GCM/GMAC, CMAC (and CCM when applicable) modes */
+
+ uint64_t HeaderSize; /*!< Header size in bytes */
+
+}CRYP_InitTypeDef;
+
+/**
+ * @brief HAL CRYP State structures definition
+ */
+typedef enum
+{
+ HAL_CRYP_STATE_RESET = 0x00, /*!< CRYP not yet initialized or disabled */
+ HAL_CRYP_STATE_READY = 0x01, /*!< CRYP initialized and ready for use */
+ HAL_CRYP_STATE_BUSY = 0x02, /*!< CRYP internal processing is ongoing */
+ HAL_CRYP_STATE_TIMEOUT = 0x03, /*!< CRYP timeout state */
+ HAL_CRYP_STATE_ERROR = 0x04, /*!< CRYP error state */
+ HAL_CRYP_STATE_SUSPENDED = 0x05 /*!< CRYP suspended */
+}HAL_CRYP_STATETypeDef;
+
+/**
+ * @brief HAL CRYP phase structures definition
+ */
+typedef enum
+{
+ HAL_CRYP_PHASE_READY = 0x01, /*!< CRYP peripheral is ready for initialization. */
+ HAL_CRYP_PHASE_PROCESS = 0x02, /*!< CRYP peripheral is in processing phase */
+ HAL_CRYP_PHASE_START = 0x03, /*!< CRYP peripheral has been initialized but
+ GCM/GMAC/CMAC(/CCM) initialization phase has not started */
+ HAL_CRYP_PHASE_INIT_OVER = 0x04, /*!< GCM/GMAC/CMAC(/CCM) init phase has been carried out */
+ HAL_CRYP_PHASE_HEADER_OVER = 0x05, /*!< GCM/GMAC/CMAC(/CCM) header phase has been carried out */
+ HAL_CRYP_PHASE_PAYLOAD_OVER = 0x06, /*!< GCM(/CCM) payload phase has been carried out */
+ HAL_CRYP_PHASE_FINAL_OVER = 0x07, /*!< GCM/GMAC/CMAC(/CCM) final phase has been carried out */
+ HAL_CRYP_PHASE_HEADER_SUSPENDED = 0x08, /*!< GCM/GMAC/CMAC(/CCM) header phase has been suspended */
+ HAL_CRYP_PHASE_PAYLOAD_SUSPENDED = 0x09, /*!< GCM(/CCM) payload phase has been suspended */
+ HAL_CRYP_PHASE_NOT_USED = 0x0a /*!< Phase is irrelevant to the current chaining mode */
+}HAL_PhaseTypeDef;
+
+/**
+ * @brief HAL CRYP mode suspend definitions
+ */
+typedef enum
+{
+ HAL_CRYP_SUSPEND_NONE = 0x00, /*!< CRYP peripheral suspension not requested */
+ HAL_CRYP_SUSPEND = 0x01 /*!< CRYP peripheral suspension requested */
+}HAL_SuspendTypeDef;
+
+
+/**
+ * @brief HAL CRYP Error Codes definition
+ */
+#define HAL_CRYP_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
+#define HAL_CRYP_WRITE_ERROR ((uint32_t)0x00000001) /*!< Write error */
+#define HAL_CRYP_READ_ERROR ((uint32_t)0x00000002) /*!< Read error */
+#define HAL_CRYP_DMA_ERROR ((uint32_t)0x00000004) /*!< DMA error */
+#define HAL_CRYP_BUSY_ERROR ((uint32_t)0x00000008) /*!< Busy flag error */
+
+/**
+ * @brief CRYP handle Structure definition
+ */
+typedef struct
+{
+ AES_TypeDef *Instance; /*!< Register base address */
+
+ CRYP_InitTypeDef Init; /*!< CRYP initialization parameters */
+
+ uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) input buffer */
+
+ uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) output buffer */
+
+ uint32_t CrypInCount; /*!< Input data size in bytes or, after suspension, the remaining
+ number of bytes to process */
+
+ uint32_t CrypOutCount; /*!< Output data size in bytes */
+
+ HAL_PhaseTypeDef Phase; /*!< CRYP peripheral processing phase for GCM, GMAC, CMAC
+ (or CCM when applicable) modes.
+ Indicates the last phase carried out to ease
+ phase transitions */
+
+ DMA_HandleTypeDef *hdmain; /*!< CRYP peripheral Input DMA handle parameters */
+
+ DMA_HandleTypeDef *hdmaout; /*!< CRYP peripheral Output DMA handle parameters */
+
+ HAL_LockTypeDef Lock; /*!< CRYP locking object */
+
+ __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */
+
+ __IO uint32_t ErrorCode; /*!< CRYP peripheral error code */
+
+ HAL_SuspendTypeDef SuspendRequest; /*!< CRYP peripheral suspension request flag */
+}CRYP_HandleTypeDef;
+
+/**
+ * @}
+ */
+
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup CRYP_Exported_Constants CRYP Exported Constants
+ * @{
+ */
+
+/** @defgroup CRYP_Key_Size Key size selection
+ * @{
+ */
+#define CRYP_KEYSIZE_128B ((uint32_t)0x00000000) /*!< 128-bit long key */
+#define CRYP_KEYSIZE_256B AES_CR_KEYSIZE /*!< 256-bit long key */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Data_Type AES Data Type selection
+ * @{
+ */
+#define CRYP_DATATYPE_32B ((uint32_t)0x00000000) /*!< 32-bit data type (no swapping) */
+#define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 /*!< 16-bit data type (half-word swapping) */
+#define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 /*!< 8-bit data type (byte swapping) */
+#define CRYP_DATATYPE_1B AES_CR_DATATYPE /*!< 1-bit data type (bit swapping) */
+/**
+ * @}
+ */
+
+ /** @defgroup CRYP_AES_State AES Enable state
+ * @{
+ */
+#define CRYP_AES_DISABLE ((uint32_t)0x00000000) /*!< Disable AES */
+#define CRYP_AES_ENABLE AES_CR_EN /*!< Enable AES */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_AES_OperatingMode AES operating mode
+ * @{
+ */
+#define CRYP_ALGOMODE_ENCRYPT ((uint32_t)0x00000000) /*!< Encryption mode */
+#define CRYP_ALGOMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode */
+#define CRYP_ALGOMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */
+#define CRYP_ALGOMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption */
+#define CRYP_ALGOMODE_TAG_GENERATION ((uint32_t)0x00000000) /*!< GMAC or CMAC authentication tag generation */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_AES_ChainingMode AES chaining mode
+ * @{
+ */
+#define CRYP_CHAINMODE_AES_ECB ((uint32_t)0x00000000) /*!< Electronic codebook chaining algorithm */
+#define CRYP_CHAINMODE_AES_CBC AES_CR_CHMOD_0 /*!< Cipher block chaining algorithm */
+#define CRYP_CHAINMODE_AES_CTR AES_CR_CHMOD_1 /*!< Counter mode chaining algorithm */
+#define CRYP_CHAINMODE_AES_GCM_GMAC (AES_CR_CHMOD_0 | AES_CR_CHMOD_1) /*!< Galois counter mode - Galois message authentication code */
+#define CRYP_CHAINMODE_AES_CMAC AES_CR_CHMOD_2 /*!< Cipher message authentication code */
+#if defined(AES_CR_NPBLB)
+#define CRYP_CHAINMODE_AES_CCM_CMAC AES_CR_CHMOD_2 /*!< Counter with Cipher Mode - Cipher message authentication code */
+#endif
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Key_Write AES decryption key write-up flag
+ * @{
+ */
+#define CRYP_KEY_WRITE_ENABLE ((uint32_t)0x00000000) /*!< Enable decryption key writing */
+#define CRYP_KEY_WRITE_DISABLE ((uint32_t)0x00000001) /*!< Disable decryption key writing */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_DMAIN DMA Input phase management enable state
+ * @{
+ */
+#define CRYP_DMAIN_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Input phase management */
+#define CRYP_DMAIN_ENABLE AES_CR_DMAINEN /*!< Enable DMA Input phase management */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_DMAOUT DMA Output phase management enable state
+ * @{
+ */
+#define CRYP_DMAOUT_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Output phase management */
+#define CRYP_DMAOUT_ENABLE AES_CR_DMAOUTEN /*!< Enable DMA Output phase management */
+/**
+ * @}
+ */
+
+
+/** @defgroup CRYP_GCM_CMAC_Phase GCM/GMAC and CMAC processing phase selection
+ * @{
+ */
+#define CRYP_GCM_INIT_PHASE ((uint32_t)0x00000000) /*!< GCM/GMAC (or CCM) init phase */
+#define CRYP_GCMCMAC_HEADER_PHASE AES_CR_GCMPH_0 /*!< GCM/GMAC or (CCM/)CMAC header phase */
+#define CRYP_GCM_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< GCM(/CCM) payload phase */
+#define CRYP_GCMCMAC_FINAL_PHASE AES_CR_GCMPH /*!< GCM/GMAC or (CCM/)CMAC final phase */
+/* Definitions duplication for code readibility's sake:
+ supported or not supported chain modes are not specified for each phase */
+#define CRYP_INIT_PHASE ((uint32_t)0x00000000) /*!< Init phase */
+#define CRYP_HEADER_PHASE AES_CR_GCMPH_0 /*!< Header phase */
+#define CRYP_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< Payload phase */
+#define CRYP_FINAL_PHASE AES_CR_GCMPH /*!< Final phase */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Flags AES status flags
+ * @{
+ */
+
+#define CRYP_FLAG_BUSY AES_SR_BUSY /*!< GCM process suspension forbidden */
+#define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error */
+#define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read error */
+#define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation completed */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Clear_Flags AES clearing flags
+ * @{
+ */
+
+#define CRYP_CCF_CLEAR AES_CR_CCFC /*!< Computation Complete Flag Clear */
+#define CRYP_ERR_CLEAR AES_CR_ERRC /*!< Error Flag Clear */
+/**
+ * @}
+ */
+
+/** @defgroup AES_Interrupts_Enable AES Interrupts Enable bits
+ * @{
+ */
+#define CRYP_IT_CCFIE AES_CR_CCFIE /*!< Computation Complete interrupt enable */
+#define CRYP_IT_ERRIE AES_CR_ERRIE /*!< Error interrupt enable */
+/**
+ * @}
+ */
+
+/** @defgroup CRYP_Interrupts_Flags AES Interrupts flags
+ * @{
+ */
+#define CRYP_IT_WRERR AES_SR_WRERR /*!< Write Error */
+#define CRYP_IT_RDERR AES_SR_RDERR /*!< Read Error */
+#define CRYP_IT_CCF AES_SR_CCF /*!< Computation completed */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported macros -----------------------------------------------------------*/
+/** @defgroup CRYP_Exported_Macros CRYP Exported Macros
+ * @{
+ */
+
+/** @brief Reset CRYP handle state.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @retval None
+ */
+#define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET)
+
+/**
+ * @brief Enable the CRYP AES peripheral.
+ * @retval None
+ */
+#define __HAL_CRYP_ENABLE() (AES->CR |= AES_CR_EN)
+
+/**
+ * @brief Disable the CRYP AES peripheral.
+ * @retval None
+ */
+#define __HAL_CRYP_DISABLE() (AES->CR &= ~AES_CR_EN)
+
+/**
+ * @brief Set the algorithm operating mode.
+ * @param __OPERATING_MODE__: specifies the operating mode
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_ALGOMODE_ENCRYPT encryption
+ * @arg @ref CRYP_ALGOMODE_KEYDERIVATION key derivation
+ * @arg @ref CRYP_ALGOMODE_DECRYPT decryption
+ * @arg @ref CRYP_ALGOMODE_KEYDERIVATION_DECRYPT key derivation and decryption
+ * @retval None
+ */
+#define __HAL_CRYP_SET_OPERATINGMODE(__OPERATING_MODE__) MODIFY_REG(AES->CR, AES_CR_MODE, (__OPERATING_MODE__))
+
+
+/**
+ * @brief Set the algorithm chaining mode.
+ * @param __CHAINING_MODE__: specifies the chaining mode
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_CHAINMODE_AES_ECB Electronic CodeBook
+ * @arg @ref CRYP_CHAINMODE_AES_CBC Cipher Block Chaining
+ * @arg @ref CRYP_CHAINMODE_AES_CTR CounTeR mode
+ * @arg @ref CRYP_CHAINMODE_AES_GCM_GMAC Galois Counter Mode or Galois Message Authentication Code
+ * @arg @ref CRYP_CHAINMODE_AES_CMAC Cipher Message Authentication Code (or Counter with Cipher Mode when applicable)
+ * @retval None
+ */
+#define __HAL_CRYP_SET_CHAININGMODE(__CHAINING_MODE__) MODIFY_REG(AES->CR, AES_CR_CHMOD, (__CHAINING_MODE__))
+
+
+
+/** @brief Check whether the specified CRYP status flag is set or not.
+ * @param __FLAG__: specifies the flag to check.
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_FLAG_BUSY GCM process suspension forbidden
+ * @arg @ref CRYP_IT_WRERR Write Error
+ * @arg @ref CRYP_IT_RDERR Read Error
+ * @arg @ref CRYP_IT_CCF Computation Complete
+ * @retval The state of __FLAG__ (TRUE or FALSE).
+ */
+#define __HAL_CRYP_GET_FLAG(__FLAG__) ((AES->SR & (__FLAG__)) == (__FLAG__))
+
+
+/** @brief Clear the CRYP pending status flag.
+ * @param __FLAG__: specifies the flag to clear.
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear
+ * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear
+ * @retval None
+ */
+#define __HAL_CRYP_CLEAR_FLAG(__FLAG__) SET_BIT(AES->CR, (__FLAG__))
+
+
+
+/** @brief Check whether the specified CRYP interrupt source is enabled or not.
+ * @param __INTERRUPT__: CRYP interrupt source to check
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
+ * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
+ * @retval State of interruption (TRUE or FALSE).
+ */
+#define __HAL_CRYP_GET_IT_SOURCE(__INTERRUPT__) ((AES->CR & (__INTERRUPT__)) == (__INTERRUPT__))
+
+
+/** @brief Check whether the specified CRYP interrupt is set or not.
+ * @param __INTERRUPT__: specifies the interrupt to check.
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_IT_WRERR Write Error
+ * @arg @ref CRYP_IT_RDERR Read Error
+ * @arg @ref CRYP_IT_CCF Computation Complete
+ * @retval The state of __INTERRUPT__ (TRUE or FALSE).
+ */
+#define __HAL_CRYP_GET_IT(__INTERRUPT__) ((AES->SR & (__INTERRUPT__)) == (__INTERRUPT__))
+
+
+
+/** @brief Clear the CRYP pending interrupt.
+ * @param __INTERRUPT__: specifies the IT to clear.
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear
+ * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear
+ * @retval None
+ */
+#define __HAL_CRYP_CLEAR_IT(__INTERRUPT__) SET_BIT(AES->CR, (__INTERRUPT__))
+
+
+/**
+ * @brief Enable the CRYP interrupt.
+ * @param __INTERRUPT__: CRYP Interrupt.
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
+ * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
+ * @retval None
+ */
+#define __HAL_CRYP_ENABLE_IT(__INTERRUPT__) ((AES->CR) |= (__INTERRUPT__))
+
+
+/**
+ * @brief Disable the CRYP interrupt.
+ * @param __INTERRUPT__: CRYP Interrupt.
+ * This parameter can be one of the following values:
+ * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
+ * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
+ * @retval None
+ */
+#define __HAL_CRYP_DISABLE_IT(__INTERRUPT__) ((AES->CR) &= ~(__INTERRUPT__))
+
+/**
+ * @}
+ */
+
+/* Private macros --------------------------------------------------------*/
+/** @addtogroup CRYP_Private_Macros CRYP Private Macros
+ * @{
+ */
+
+/**
+ * @brief Verify the key size length.
+ * @param __KEYSIZE__: Ciphering/deciphering algorithm key size.
+ * @retval SET (__KEYSIZE__ is a valid value) or RESET (__KEYSIZE__ is invalid)
+ */
+#define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \
+ ((__KEYSIZE__) == CRYP_KEYSIZE_256B))
+
+/**
+ * @brief Verify the input data type.
+ * @param __DATATYPE__: Ciphering/deciphering algorithm input data type.
+ * @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid)
+ */
+#define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \
+ ((__DATATYPE__) == CRYP_DATATYPE_16B) || \
+ ((__DATATYPE__) == CRYP_DATATYPE_8B) || \
+ ((__DATATYPE__) == CRYP_DATATYPE_1B))
+
+/**
+ * @brief Verify the CRYP AES IP running mode.
+ * @param __MODE__: CRYP AES IP running mode.
+ * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
+ */
+#define IS_CRYP_AES(__MODE__) (((__MODE__) == CRYP_AES_DISABLE) || \
+ ((__MODE__) == CRYP_AES_ENABLE))
+
+/**
+ * @brief Verify the selected CRYP algorithm.
+ * @param __ALGOMODE__: Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter).
+ * @retval SET (__ALGOMODE__ is valid) or RESET (__ALGOMODE__ is invalid)
+ */
+#define IS_CRYP_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == CRYP_ALGOMODE_ENCRYPT) || \
+ ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION) || \
+ ((__ALGOMODE__) == CRYP_ALGOMODE_DECRYPT) || \
+ ((__ALGOMODE__) == CRYP_ALGOMODE_TAG_GENERATION) || \
+ ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT))
+
+/**
+ * @brief Verify the selected CRYP chaining algorithm.
+ * @param __CHAINMODE__: Selected CRYP chaining algorithm.
+ * @retval SET (__CHAINMODE__ is valid) or RESET (__CHAINMODE__ is invalid)
+ */
+#if defined(AES_CR_NPBLB)
+#define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \
+ ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \
+ ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \
+ ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \
+ ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CCM_CMAC))
+#else
+#define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \
+ ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \
+ ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \
+ ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \
+ ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CMAC))
+#endif
+
+/**
+ * @brief Verify the deciphering key write option.
+ * @param __WRITE__: deciphering key write option.
+ * @retval SET (__WRITE__ is valid) or RESET (__WRITE__ is invalid)
+ */
+#define IS_CRYP_WRITE(__WRITE__) (((__WRITE__) == CRYP_KEY_WRITE_ENABLE) || \
+ ((__WRITE__) == CRYP_KEY_WRITE_DISABLE))
+
+/**
+ * @brief Verify the CRYP input data DMA mode.
+ * @param __MODE__: CRYP input data DMA mode.
+ * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
+ */
+#define IS_CRYP_DMAIN(__MODE__) (((__MODE__) == CRYP_DMAIN_DISABLE) || \
+ ((__MODE__) == CRYP_DMAIN_ENABLE))
+
+/**
+ * @brief Verify the CRYP output data DMA mode.
+ * @param __MODE__: CRYP output data DMA mode.
+ * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
+ */
+#define IS_CRYP_DMAOUT(__MODE__) (((__MODE__) == CRYP_DMAOUT_DISABLE) || \
+ ((__MODE__) == CRYP_DMAOUT_ENABLE))
+
+/**
+ * @brief Verify the CRYP AES ciphering/deciphering/authentication algorithm phase.
+ * @param __PHASE__: CRYP AES ciphering/deciphering/authentication algorithm phase.
+ * @retval SET (__PHASE__ is valid) or RESET (__PHASE__ is invalid)
+ */
+#define IS_CRYP_GCMCMAC_PHASE(__PHASE__) (((__PHASE__) == CRYP_GCM_INIT_PHASE) || \
+ ((__PHASE__) == CRYP_GCMCMAC_HEADER_PHASE) || \
+ ((__PHASE__) == CRYP_GCM_PAYLOAD_PHASE) || \
+ ((__PHASE__) == CRYP_GCMCMAC_FINAL_PHASE))
+
+/**
+ * @}
+ */
+
+/* Include CRYP HAL Extended module */
+#include "stm32f7xx_hal_cryp_ex.h"
+
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup CRYP_Exported_Functions CRYP Exported Functions
+ * @{
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group1 Initialization and deinitialization functions
+ * @{
+ */
+
+/* Initialization/de-initialization functions ********************************/
+HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp);
+HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp);
+
+/* MSP initialization/de-initialization functions ****************************/
+void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp);
+void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group2 AES processing functions
+ * @{
+ */
+
+/* AES encryption/decryption processing functions ****************************/
+
+/* AES encryption/decryption using polling ***********************************/
+HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+
+/* AES encryption/decryption using interrupt *********************************/
+HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+
+/* AES encryption/decryption using DMA ***************************************/
+HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group3 Callback functions
+ * @{
+ */
+/* CallBack functions ********************************************************/
+void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp);
+void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp);
+void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
+ * @{
+ */
+
+/* AES interrupt handling function *******************************************/
+void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Exported_Functions_Group5 Peripheral State functions
+ * @{
+ */
+
+/* Peripheral State functions ************************************************/
+HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp);
+uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* AES */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7xx_HAL_CRYP_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/35529b95/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp_ex.h
----------------------------------------------------------------------
diff --git a/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp_ex.h b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp_ex.h
new file mode 100644
index 0000000..21d6fbb
--- /dev/null
+++ b/hw/mcu/stm/stm32f7xx/src/ext/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cryp_ex.h
@@ -0,0 +1,293 @@
+/**
+ ******************************************************************************
+ * @file stm32f7xx_hal_cryp_ex.h
+ * @author MCD Application Team
+ * @version V1.2.0
+ * @date 30-December-2016
+ * @brief Header file of CRYP HAL Extension module.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7xx_HAL_CRYP_EX_H
+#define __STM32F7xx_HAL_CRYP_EX_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f7xx_hal_def.h"
+
+#if defined (CRYP)
+
+/** @addtogroup STM32F7xx_HAL_Driver
+ * @{
+ */
+
+/** @addtogroup CRYPEx
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup CRYPEx_Exported_Constants CRYPEx Exported Constants
+ * @{
+ */
+
+/** @defgroup CRYPEx_Exported_Constants_Group1 CRYP AlgoModeDirection
+ * @{
+ */
+#define CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT ((uint32_t)0x00080000U)
+#define CRYP_CR_ALGOMODE_AES_GCM_DECRYPT ((uint32_t)0x00080004U)
+#define CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT ((uint32_t)0x00080008U)
+#define CRYP_CR_ALGOMODE_AES_CCM_DECRYPT ((uint32_t)0x0008000CU)
+/**
+ * @}
+ */
+
+/** @defgroup CRYPEx_Exported_Constants_Group3 CRYP PhaseConfig
+ * @brief The phases are relevant only to AES-GCM and AES-CCM
+ * @{
+ */
+#define CRYP_PHASE_INIT ((uint32_t)0x00000000U)
+#define CRYP_PHASE_HEADER CRYP_CR_GCM_CCMPH_0
+#define CRYP_PHASE_PAYLOAD CRYP_CR_GCM_CCMPH_1
+#define CRYP_PHASE_FINAL CRYP_CR_GCM_CCMPH
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup CRYPEx_Exported_Macros CRYP Exported Macros
+ * @{
+ */
+
+/**
+ * @brief Set the phase: Init, header, payload, final.
+ * This is relevant only for GCM and CCM modes.
+ * @param __HANDLE__: specifies the CRYP handle.
+ * @param __PHASE__: The phase.
+ * @retval None
+ */
+#define __HAL_CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR_GCM_CCMPH);\
+ (__HANDLE__)->Instance->CR |= (uint32_t)(__PHASE__);\
+ }while(0)
+
+/**
+ * @}
+ */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions
+ * @{
+ */
+
+/** @addtogroup CRYPEx_Exported_Functions_Group1
+ * @{
+ */
+
+/* AES encryption/decryption using polling ***********************************/
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef *hcryp, uint32_t Size, uint8_t *AuthTag, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef *hcryp, uint8_t *AuthTag, uint32_t Timeout);
+
+/* AES encryption/decryption using interrupt *********************************/
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+
+/* AES encryption/decryption using DMA ***************************************/
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CRYPEx_Exported_Functions_Group2
+ * @{
+ */
+
+void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp);
+
+/**
+ * @}
+ */
+
+ /**
+ * @}
+ */
+
+
+ /* Private types -------------------------------------------------------------*/
+/** @defgroup CRYPEx_Private_Types CRYPEx Private Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/** @defgroup CRYPEx_Private_Variables CRYPEx Private Variables
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup CRYPEx_Private_Constants CRYPEx Private Constants
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup CRYPEx_Private_Macros CRYPEx Private Macros
+ * @{
+ */
+
+ /**
+ * @}
+ */
+
+/* Private functions ---------------------------------------------------------*/
+/** @defgroup CRYPEx_Private_Functions CRYPEx Private Functions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* CRYP */
+
+#if defined (AES)
+
+/** @addtogroup CRYPEx_Exported_Functions
+ * @{
+ */
+
+/** @addtogroup CRYPEx_Exported_Functions_Group1
+ * @{
+ */
+
+/* CallBack functions ********************************************************/
+void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CRYPEx_Exported_Functions_Group2
+ * @{
+ */
+
+/* AES encryption/decryption processing functions ****************************/
+HAL_StatusTypeDef HAL_CRYPEx_AES(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AES_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData);
+HAL_StatusTypeDef HAL_CRYPEx_AES_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData);
+
+/* AES encryption/decryption/authentication processing functions *************/
+HAL_StatusTypeDef HAL_CRYPEx_AES_Auth(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData);
+HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData);
+
+/**
+ * @}
+ */
+
+/** @addtogroup CRYPEx_Exported_Functions_Group3
+ * @{
+ */
+
+/* AES suspension/resumption functions ***************************************/
+void HAL_CRYPEx_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output);
+void HAL_CRYPEx_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input);
+void HAL_CRYPEx_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output);
+void HAL_CRYPEx_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input);
+void HAL_CRYPEx_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t KeySize);
+void HAL_CRYPEx_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint32_t KeySize);
+void HAL_CRYPEx_Read_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Output);
+void HAL_CRYPEx_Write_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Input);
+void HAL_CRYPEx_ProcessSuspend(CRYP_HandleTypeDef *hcryp);
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/* Private functions -----------------------------------------------------------*/
+/** @addtogroup CRYPEx_Private_Functions CRYPEx Private Functions
+ * @{
+ */
+HAL_StatusTypeDef CRYP_AES_Auth_IT(CRYP_HandleTypeDef *hcryp);
+
+/**
+ * @}
+ */
+
+#endif /* AES */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7xx_HAL_CRYP_EX_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/