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Posted to commits@harmony.apache.org by hi...@apache.org on 2010/06/07 00:47:41 UTC
svn commit: r952017 [5/5] - in /harmony/enhanced/java/trunk/drlvm: make/vm/
vm/jitrino/config/em64t/ vm/jitrino/config/ia32/
vm/jitrino/src/codegenerator/ vm/jitrino/src/codegenerator/ia32/
vm/jitrino/src/jet/ vm/jitrino/src/optimizer/ vm/jitrino/src/o...
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.cpp?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.cpp Sun Jun 6 22:47:40 2010
@@ -32,6 +32,7 @@
#include "EMInterface.h"
#include "inliner.h"
#include "VMMagic.h"
+#include "SIMD.h"
#include <assert.h>
#include <stdio.h>
@@ -171,6 +172,8 @@ JavaByteCodeTranslator::JavaByteCodeTran
}
if (VMMagicUtils::isVMMagicClass(type->getName())) {
type = convertVMMagicType2HIR(typeManager, type);
+ } else if (SIMDUtils::isSIMDClass(type->getName())) {
+ type = SIMDUtils::convertSIMDType2HIR(typeManager, type);
}
arg = irBuilder.genArgDef(DefArgNoModifier,type);
}
@@ -724,6 +727,8 @@ JavaByteCodeTranslator::getstatic(U_32 c
bool fieldIsMagic = VMMagicUtils::isVMMagicClass(fieldType->getName());
if (fieldIsMagic) {
fieldType = convertVMMagicType2HIR(typeManager, fieldType);
+ } else if (SIMDUtils::isSIMDClass(fieldType->getName())) {
+ fieldType = SIMDUtils::convertSIMDType2HIR(typeManager, fieldType);
}
if (field->isInitOnly() && !field->getParentType()->needsInitialization()) {
//the final static field of the initialized class
@@ -759,15 +764,20 @@ JavaByteCodeTranslator::getstatic(U_32 c
pushOpnd(irBuilder.genLdStatic(fieldType, field));
}
} else {
+ Type* fieldType;
//field is not resolved or not static
if (!typeManager.isLazyResolutionMode()) {
// generate helper call for throwing respective exception
linkingException(constPoolIndex, OPCODE_GETSTATIC);
}
const char* fieldTypeName = CompilationInterface::getFieldSignature(methodToCompile.getParentHandle(), constPoolIndex);
- bool fieldIsMagic = VMMagicUtils::isVMMagicClass(fieldTypeName);
- Type* fieldType = fieldIsMagic ? convertVMMagicType2HIR(typeManager, fieldTypeName)
- : compilationInterface.getFieldType(methodToCompile.getParentHandle(), constPoolIndex);
+ if (VMMagicUtils::isVMMagicClass(fieldTypeName)) {
+ fieldType = convertVMMagicType2HIR(typeManager, fieldTypeName);
+ } else if (SIMDUtils::isSIMDClass(fieldTypeName)) {
+ fieldType = SIMDUtils::convertSIMDType2HIR(typeManager, fieldTypeName);
+ } else {
+ fieldType = compilationInterface.getFieldType(methodToCompile.getParentHandle(), constPoolIndex);
+ }
Opnd* res = irBuilder.genLdStaticWithResolve(fieldType, methodToCompile.getParentType()->asObjectType(), constPoolIndex);
pushOpnd(res);
}
@@ -782,18 +792,25 @@ JavaByteCodeTranslator::putstatic(U_32 c
bool fieldIsMagic = VMMagicUtils::isVMMagicClass(fieldType->getName());
if (fieldIsMagic) {
fieldType = convertVMMagicType2HIR(typeManager, fieldType);
+ } else if (SIMDUtils::isSIMDClass(fieldType->getName())) {
+ fieldType = SIMDUtils::convertSIMDType2HIR(typeManager, fieldType);
}
irBuilder.genStStatic(fieldType,field,popOpnd());
} else {
+ Type* fieldType;
//field is not resolved or not static
if (!typeManager.isLazyResolutionMode()) {
// generate helper call for throwing respective exception
linkingException(constPoolIndex, OPCODE_PUTSTATIC);
}
const char* fieldTypeName = CompilationInterface::getFieldSignature(methodToCompile.getParentHandle(), constPoolIndex);
- bool fieldIsMagic = VMMagicUtils::isVMMagicClass(fieldTypeName);
- Type* fieldType = fieldIsMagic ? convertVMMagicType2HIR(typeManager, fieldTypeName)
- : compilationInterface.getFieldType(methodToCompile.getParentHandle(), constPoolIndex);
+ if (VMMagicUtils::isVMMagicClass(fieldTypeName)) {
+ fieldType = convertVMMagicType2HIR(typeManager, fieldTypeName);
+ } else if (SIMDUtils::isSIMDClass(fieldTypeName)) {
+ fieldType = SIMDUtils::convertSIMDType2HIR(typeManager, fieldTypeName);
+ } else {
+ fieldType = compilationInterface.getFieldType(methodToCompile.getParentHandle(), constPoolIndex);
+ }
Opnd* value = popOpnd();
irBuilder.genStStaticWithResolve(fieldType, methodToCompile.getParentType()->asObjectType(), constPoolIndex, value);
}
@@ -806,6 +823,8 @@ JavaByteCodeTranslator::getfield(U_32 co
Type* fieldType = getFieldType(field, constPoolIndex);
if (VMMagicUtils::isVMMagicClass(fieldType->getName())) {
fieldType = convertVMMagicType2HIR(typeManager, fieldType);
+ } else if (SIMDUtils::isSIMDClass(fieldType->getName())) {
+ fieldType = SIMDUtils::convertSIMDType2HIR(typeManager, fieldType);
}
pushOpnd(irBuilder.genLdField(fieldType,popOpnd(),field));
} else {
@@ -816,6 +835,8 @@ JavaByteCodeTranslator::getfield(U_32 co
Type* fieldType = compilationInterface.getFieldType(methodToCompile.getParentHandle(), constPoolIndex);
if (VMMagicUtils::isVMMagicClass(fieldType->getName())) {
fieldType = convertVMMagicType2HIR(typeManager, fieldType);
+ } else if (SIMDUtils::isSIMDClass(fieldType->getName())) {
+ fieldType = SIMDUtils::convertSIMDType2HIR(typeManager, fieldType);
}
Opnd* base = popOpnd();
Opnd* res = irBuilder.genLdFieldWithResolve(fieldType, base, methodToCompile.getParentType()->asObjectType(), constPoolIndex);
@@ -831,6 +852,8 @@ JavaByteCodeTranslator::putfield(U_32 co
assert(fieldType);
if (VMMagicUtils::isVMMagicClass(fieldType->getName())) {
fieldType = convertVMMagicType2HIR(typeManager, fieldType);
+ } else if (SIMDUtils::isSIMDClass(fieldType->getName())) {
+ fieldType = SIMDUtils::convertSIMDType2HIR(typeManager, fieldType);
}
Opnd* value = popOpnd();
@@ -1514,6 +1537,10 @@ void JavaByteCodeTranslator::genCallWith
if (res) { //method is not a registered vmhelper name
return;
}
+ } else if (SIMDUtils::isSIMDClass(kname)) {
+ UNUSED bool res = genSIMDHelper(mname, numArgs, args, returnType);
+ assert(res);
+ return;
}
}
@@ -1547,6 +1574,10 @@ JavaByteCodeTranslator::invokevirtual(U_
UNUSED bool res = genVMMagic(methodDesc->getName(), numArgs, srcOpnds, returnType);
assert(res);
return;
+ } else if (SIMDUtils::isSIMDClass(className)) {
+ UNUSED bool res = genSIMDHelper(methodDesc->getName(), numArgs, srcOpnds, returnType);
+ assert(res);
+ return;
}
// callvirt can throw a null pointer exception
@@ -1917,6 +1948,8 @@ JavaByteCodeTranslator::genLdVar(U_32 va
Opnd *var = getVarOpndLdVar(javaType,varIndex);
if (VMMagicUtils::isVMMagicClass(var->getType()->getName())) {
var->setType(convertVMMagicType2HIR(typeManager, var->getType()));
+ } else if (SIMDUtils::isSIMDClass(var->getType()->getName())) {
+ var->setType(SIMDUtils::convertSIMDType2HIR(typeManager, var->getType()));
}
Opnd *opnd;
if (var->isVarOpnd()) {
@@ -2332,11 +2365,17 @@ JavaByteCodeTranslator::genInvokeStatic(
if (res) {
return;
}
+ } else if (SIMDUtils::isSIMDClass(kname)) {
+ UNUSED bool res = genSIMDHelper(mname, numArgs, srcOpnds, returnType);
+ assert(res);
+ return;
}
Opnd *tauNullChecked = irBuilder.genTauSafe(); // always safe, is a static method call
Type* resType = returnType;
if (VMMagicUtils::isVMMagicClass(resType->getName())) {
resType = convertVMMagicType2HIR(typeManager, resType);
+ } else if (SIMDUtils::isSIMDClass(resType->getName())) {
+ resType= SIMDUtils::convertSIMDType2HIR(typeManager, resType);
}
dst = irBuilder.genDirectCall(methodDesc,
resType,
@@ -3143,4 +3182,188 @@ bool JavaByteCodeTranslator::genVMHelper
return false;
}
+bool
+JavaByteCodeTranslator::genSIMDHelper (const char* mname,
+ U_32 numArgs,
+ Opnd **args,
+ Type *returnType)
+{
+ Type *resType = (SIMDUtils::isSIMDClass(returnType->getName ())
+ ? SIMDUtils::convertSIMDType2HIR (typeManager, returnType)
+ : returnType);
+ Modifier mod = Modifier(Overflow_None) | Modifier(Exception_Never) | Modifier(Strict_No);
+ Modifier shMod (ShiftMask_Masked);
+
+ if (!strcmp (mname, "make"))
+ {
+ if (numArgs == 1)
+ pushOpnd (irBuilder.genConv (resType, resType->tag, mod, args[0]));
+ else
+ pushOpnd (irBuilder.genVecPackScalars (resType, mod, numArgs, args));
+ }
+ else if (!strcmp (mname, "load"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genLdElem (resType, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "add"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genAdd (resType, mod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "sub"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genSub (resType, mod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "mul"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genMul (resType, mod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "div"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genDiv (resType, Modifier (SignedOp) | Modifier (Strict_No),
+ args[0], args[1]));
+ }
+ else if (!strcmp (mname, "addsub"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genVecAddSub (resType, mod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "hadd"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genVecHadd (resType, mod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "hsub"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genVecHsub (resType, mod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "max"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genMaxVec (resType, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "min"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genMinVec (resType, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "abs"))
+ {
+ assert (numArgs == 1);
+ pushOpnd (irBuilder.genAbsVec (resType, args[0]));
+ }
+ else if (!strcmp (mname, "and"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genAnd (resType, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "or"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genOr (resType, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "xor"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genXor (resType, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "andnot"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genAndNot (resType, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "sll"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genShl (resType, shMod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "srl"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genShr (resType, shMod | UnsignedOp,
+ args[0], args[1]));
+ }
+ else if (!strcmp (mname, "sra"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genShr (resType, shMod | SignedOp,
+ args[0], args[1]));
+ }
+ else if (!strcmp (mname, "cmpeq"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genCmp (resType, args[0]->getType()->tag,
+ Cmp_EQ, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "cmpne"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genCmp (resType, args[0]->getType()->tag,
+ Cmp_NE_Un, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "cmple"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genCmp (resType, args[0]->getType()->tag,
+ Cmp_GTE, args[1], args[0]));
+ }
+ else if (!strcmp (mname, "cmpge"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genCmp (resType, args[0]->getType()->tag,
+ Cmp_GTE, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "cmplt"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genCmp (resType, args[0]->getType()->tag,
+ Cmp_GT, args[1], args[0]));
+ }
+ else if (!strcmp (mname, "cmpgt"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genCmp (resType, args[0]->getType()->tag,
+ Cmp_GT, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "select"))
+ {
+ assert (numArgs == 3);
+ pushOpnd (irBuilder.genSelect (resType, args[0], args[1], args[2]));
+ }
+ else if (!strcmp (mname, "shuffle"))
+ {
+ assert (numArgs == 3);
+ pushOpnd (irBuilder.genVecShuffle (resType, mod, args[0], args[1], args[2]));
+ }
+ else if (!strcmp (mname, "unpack_high"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genVecInterleaveHigh (resType, mod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "unpack_low"))
+ {
+ assert (numArgs == 2);
+ pushOpnd (irBuilder.genVecInterleaveLow (resType, mod, args[0], args[1]));
+ }
+ else if (!strcmp (mname, "store"))
+ {
+ assert (numArgs == 3);
+ irBuilder.genStElem (args[0]->getType (), args[1], args[2], args[0]);
+ }
+ else if (!strcmp (mname, "cmpstri") || !strcmp (mname, "cmpstrm"))
+ {
+ assert (numArgs == 3 || numArgs == 5);
+ pushOpnd (irBuilder.genVecCmpStr (resType, numArgs, args));
+ }
+ else
+ assert (0);
+
+ return true;
+}
+
} //namespace Jitrino
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.h?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.h Sun Jun 6 22:47:40 2010
@@ -271,6 +271,7 @@ private:
void genInvokeStatic(MethodDesc * methodDesc,U_32 numArgs,Opnd ** srcOpnds,Type * returnType);
bool genVMMagic(const char* mname, U_32 numArgs,Opnd ** srcOpnds,Type * returnType);
bool genVMHelper(const char* mname, U_32 numArgs,Opnd ** srcOpnds,Type * returnType);
+ bool genSIMDHelper(const char* mname, U_32 numArgs,Opnd ** srcOpnds,Type * returnType);
bool genMinMax(MethodDesc * methodDesc,U_32 numArgs,Opnd ** srcOpnds, Type * returnType);
void newFallthroughBlock();
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/vm/VMInterface.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/vm/VMInterface.cpp?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/vm/VMInterface.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/vm/VMInterface.cpp Sun Jun 6 22:47:40 2010
@@ -46,6 +46,7 @@
#include "PlatformDependant.h"
#include "VMMagic.h"
+#include "SIMD.h"
namespace Jitrino {
@@ -887,6 +888,7 @@ CompilationInterface::getTypeFromDrlVMTy
const char* kname = type_info_get_type_name(typeHandle);
assert(kname!=NULL);
bool forceResolve = VMMagicUtils::isVMMagicClass(kname);
+ forceResolve = forceResolve || SIMDUtils::isSIMDClass(kname);
if (!forceResolve) {
return typeManager.getUnresolvedObjectType();
}
@@ -1198,6 +1200,7 @@ NamedType* CompilationInterface::getName
if (typeManager.isLazyResolutionMode() && !class_cp_is_entry_resolved(enclClass, cpIndex)) {
const char* className = class_cp_get_class_name(enclClass, cpIndex);
bool forceResolve = VMMagicUtils::isVMMagicClass(className);
+ forceResolve = forceResolve || SIMDUtils::isSIMDClass(className);
if (!forceResolve) {
return getUnresolvedType(typeManager, enclClass, cpIndex);
}
Modified: harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.cpp?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.cpp Sun Jun 6 22:47:40 2010
@@ -44,14 +44,16 @@ ENCODER_NAMESPACE_START
int EncoderBase::dummy = EncoderBase::buildTable();
-const unsigned char EncoderBase::size_hash[OpndSize_64+1] = {
+const unsigned char EncoderBase::size_hash[OpndSize_128+1] = {
//
0xFF, // OpndSize_Null = 0,
- 3, // OpndSize_8 = 0x1,
- 2, // OpndSize_16 = 0x2,
+ 5, // OpndSize_8 = 0x1,
+ 4, // OpndSize_16 = 0x2,
0xFF, // 0x3
- 1, // OpndSize_32 = 0x4,
- 0, // OpndSize_64 = 0x8,
+ 3, // OpndSize_32 = 0x4,
+ 2, // OpndSize_64 = 0x8,
+ 1, // OpndSize_80 = 0x16,
+ 0, // OpndSize_128 = 0x20,
//
};
@@ -66,19 +68,19 @@ const unsigned char EncoderBase::kind_ha
//mmx reg -> 110 = 6
//
0xFF, // 0 OpndKind_Null=0,
- 0<<2, // 1 OpndKind_GPReg =
+ 0<<3, // 1 OpndKind_GPReg =
// OpndKind_MinRegKind=0x1,
- 4<<2, // 2 OpndKind_SReg=0x2,
+ 4<<3, // 2 OpndKind_SReg=0x2,
#ifdef _HAVE_MMX_
- 6<<2, // 3
+ 6<<3, // 3
#else
0xFF, // 3
#endif
- 5<<2, // 4 OpndKind_FPReg=0x4,
+ 5<<3, // 4 OpndKind_FPReg=0x4,
0xFF, 0xFF, 0xFF, // 5, 6, 7
- 3<<2, // OpndKind_XMMReg=0x8,
+ 3<<3, // OpndKind_XMMReg=0x8,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 9, 0xA, 0xB, 0xC, 0xD,
// 0xE, 0xF
0xFF, // OpndKind_MaxRegKind =
@@ -86,12 +88,12 @@ const unsigned char EncoderBase::kind_ha
// OpndKind_OtherReg=0x10,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0x11-0x18
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0x19-0x1F
- 2<<2, // OpndKind_Immediate=0x20,
+ 2<<3, // OpndKind_Immediate=0x20,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0x21-0x28
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0x29-0x30
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0x31-0x38
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0x39-0x3F
- 1<<2, // OpndKind_Memory=0x40
+ 1<<3, // OpndKind_Memory=0x40
};
char* EncoderBase::encode_aux(char* stream, unsigned aux,
@@ -312,12 +314,14 @@ char * EncoderBase::encode(char * stream
++stream;
//
prex = (Rex*)stream;
- prex->dummy = 4;
- prex->w = 0;
- prex->b = 0;
- prex->x = 0;
- prex->r = 0;
- ++stream;
+ if (odesc->opcode[1] != 0x48) {
+ prex->dummy = 4;
+ prex->w = 0;
+ prex->b = 0;
+ prex->x = 0;
+ prex->r = 0;
+ ++stream;
+ }
//
memcpy(stream, &odesc->opcode[1], odesc->opcode_len-1);
stream += odesc->opcode_len-1;
@@ -347,6 +351,10 @@ char * EncoderBase::encode(char * stream
else if (odesc->opcode_len==4) {
*(unsigned*)stream = *(unsigned*)&odesc->opcode;
}
+ else if (odesc->opcode_len==5) {
+ *(unsigned*)stream = *(unsigned*)&odesc->opcode;
+ *(unsigned char*)(stream+4) = odesc->opcode[4];
+ }
stream += odesc->opcode_len;
}
@@ -706,7 +714,9 @@ const EncoderBase::OpcodeDesc *
EncoderBase::lookup(Mnemonic mn, const Operands& opnds)
{
const unsigned hash = opnds.hash();
- unsigned opcodeIndex = opcodesHashMap[mn][hash];
+ unsigned opcodeIndex = (hash < HASH_MAX ?
+ opcodesHashMap[mn][hash]
+ : NOHASH);
#ifdef ENCODER_USE_SUBHASH
if (opcodeIndex == NOHASH) {
opcodeIndex = find(mn, hash);
Modified: harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.h?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.h Sun Jun 6 22:47:40 2010
@@ -228,7 +228,7 @@ public:
* The [3] mostly comes from IDIV/IMUL which both may have up to 3
* operands.
*/
- OpndDesc opnds[3];
+ OpndDesc opnds[6];
unsigned first_opnd;
/**
* @brief Info about operands - total number, number of uses/defs,
@@ -280,7 +280,7 @@ public:
* The value was increased from '5155' to '8192' to make it aligned
* for faster access in EncoderBase::lookup().
*/
- static const unsigned int HASH_MAX = 8192; //5155;
+ static const unsigned int HASH_MAX = 53573; //8192; //5155;
/**
* @brief Empty value, used in hash-to-opcode map to show an empty slot.
*/
@@ -288,7 +288,7 @@ public:
/**
* @brief The name says it all.
*/
- static const unsigned char HASH_BITS_PER_OPERAND = 5;
+ static const unsigned char HASH_BITS_PER_OPERAND = 6;
/**
* @brief Contains info about a single instructions's operand - its
@@ -666,7 +666,7 @@ public:
* A change must be strictly balanced with hash-related functions and data
* in enc_base.h/.cpp.
*/
- static const unsigned char size_hash[OpndSize_64+1];
+ static const unsigned char size_hash[OpndSize_128+1];
/**
* @brief A table used for the fast computation of hash value.
*
Modified: harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_defs.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_defs.h?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_defs.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_defs.h Sun Jun 6 22:47:40 2010
@@ -19,6 +19,9 @@
*/
#ifndef _ENCODER_DEFS_H_
#define _ENCODER_DEFS_H_
+#define _HAVE_SIMD_
+#define _HAVE_SIMD_4_2_
+#define _HAVE_MMX_
// Used to isolate experimental or being tuned encoder into a separate
@@ -308,14 +311,14 @@ enum RegName {
RegName_XMM7=REGNAME(OpndKind_XMMReg,OpndSize_128,7),
#ifdef _EM64T_
- RegName_XMM8 = REGNAME(OpndKind_XMMReg,OpndSize_128,0),
- RegName_XMM9 = REGNAME(OpndKind_XMMReg,OpndSize_128,1),
- RegName_XMM10 = REGNAME(OpndKind_XMMReg,OpndSize_128,2),
- RegName_XMM11 = REGNAME(OpndKind_XMMReg,OpndSize_128,3),
- RegName_XMM12 = REGNAME(OpndKind_XMMReg,OpndSize_128,4),
- RegName_XMM13 = REGNAME(OpndKind_XMMReg,OpndSize_128,5),
- RegName_XMM14 = REGNAME(OpndKind_XMMReg,OpndSize_128,6),
- RegName_XMM15 = REGNAME(OpndKind_XMMReg,OpndSize_128,7),
+ RegName_XMM8 = REGNAME(OpndKind_XMMReg,OpndSize_128,8),
+ RegName_XMM9 = REGNAME(OpndKind_XMMReg,OpndSize_128,9),
+ RegName_XMM10 = REGNAME(OpndKind_XMMReg,OpndSize_128,10),
+ RegName_XMM11 = REGNAME(OpndKind_XMMReg,OpndSize_128,11),
+ RegName_XMM12 = REGNAME(OpndKind_XMMReg,OpndSize_128,12),
+ RegName_XMM13 = REGNAME(OpndKind_XMMReg,OpndSize_128,13),
+ RegName_XMM14 = REGNAME(OpndKind_XMMReg,OpndSize_128,14),
+ RegName_XMM15 = REGNAME(OpndKind_XMMReg,OpndSize_128,15),
#endif //~_EM64T_
#endif // ~TESTING_ENCODER
@@ -438,37 +441,53 @@ Mnemonic_CMPXCHG,
Mnemonic_CMPXCHG8B, // Compare and Exchange 8 Bytes
Mnemonic_CMPSB, // Compare Two Bytes at DS:ESI and ES:EDI
Mnemonic_CMPSW, // Compare Two Words at DS:ESI and ES:EDI
+#ifndef _HAVE_SIMD_
Mnemonic_CMPSD, // Compare Two Doublewords at DS:ESI and ES:EDI
//
// double -> float
Mnemonic_CVTSD2SS, // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+#endif
// double -> I_32
+#ifndef _HAVE_SIMD_
Mnemonic_CVTSD2SI, // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+#endif
// double [truncated] -> I_32
Mnemonic_CVTTSD2SI, // Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Doubleword Integer
//
// float -> double
+#ifndef _HAVE_SIMD_
Mnemonic_CVTSS2SD, // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
// float -> I_32
Mnemonic_CVTSS2SI, // Convert Scalar Single-Precision Floating-Point Value to Doubleword Integer
// float [truncated] -> I_32
Mnemonic_CVTTSS2SI, // Convert with Truncation Scalar Single-Precision Floating-Point Value to Doubleword Integer
+#endif
//
// I_32 -> double
+#ifndef _HAVE_SIMD_
Mnemonic_CVTSI2SD, // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+#endif
// I_32 -> float
+#ifndef _HAVE_SIMD_
Mnemonic_CVTSI2SS, // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
+#endif
+#ifndef _HAVE_SIMD_
Mnemonic_COMISD, // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
Mnemonic_COMISS, // Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS
+#endif
Mnemonic_DEC, // Decrement by 1
//Mnemonic_DIV, // Unsigned Divide
+#ifndef _HAVE_SIMD_
Mnemonic_DIVSD, // Divide Scalar Double-Precision Floating-Point Values
Mnemonic_DIVSS, // Divide Scalar Single-Precision Floating-Point Values
+#endif
#ifdef _HAVE_MMX_
+#ifndef _HAVE_SIMD_
Mnemonic_EMMS, // Empty MMX Technology State
#endif
+#endif
Mnemonic_ENTER, // ENTER-Make Stack Frame for Procedure Parameters
Mnemonic_FLDCW, // Load FPU control word
@@ -550,20 +569,25 @@ Mnemonic_LOOPE,
Mnemonic_LOOPNE, Mnemonic_LOOPNZ = Mnemonic_LOOPNE, // Loop according to ECX
Mnemonic_LAHF, // Load Flags into AH
Mnemonic_MOV, // Move
+
+#ifndef _HAVE_SIMD_
Mnemonic_MOVD, // Move Double word
Mnemonic_MOVQ, // Move Quadword
+#endif
+
/*Mnemonic_MOVS, // Move Data from String to String*/
// MOVS is a special case: see encoding table for more details,
Mnemonic_MOVS8, Mnemonic_MOVS16, Mnemonic_MOVS32, Mnemonic_MOVS64,
//
-Mnemonic_MOVAPD, // Move Scalar Double-Precision Floating-Point Value
Mnemonic_MOVSD, // Move Scalar Double-Precision Floating-Point Value
Mnemonic_MOVSS, // Move Scalar Single-Precision Floating-Point Values
Mnemonic_MOVSX, // Move with Sign-Extension
Mnemonic_MOVZX, // Move with Zero-Extend
//Mnemonic_MUL, // Unsigned Multiply
+#ifndef _HAVE_SIMD_
Mnemonic_MULSD, // Multiply Scalar Double-Precision Floating-Point Values
Mnemonic_MULSS, // Multiply Scalar Single-Precision Floating-Point Values
+#endif
Mnemonic_NEG, // Two's Complement Negation
Mnemonic_NOP, // No Operation
Mnemonic_NOT, // One's Complement Negation
@@ -571,13 +595,234 @@ Mnemonic_OR,
Mnemonic_PREFETCH, // prefetch
#ifdef _HAVE_MMX_
+#ifndef _HAVE_SIMD_
Mnemonic_PADDQ, // Add Packed Quadword Integers
Mnemonic_PAND, // Logical AND
Mnemonic_POR, // Bitwise Logical OR
Mnemonic_PSUBQ, // Subtract Packed Quadword Integers
#endif
+#endif
+
+#ifdef _HAVE_SIMD_
+ Mnemonic_ADDPD,
+ Mnemonic_ADDSUBPD,
+ Mnemonic_ADDSUBPS,
+ Mnemonic_ADDPS,
+ Mnemonic_ANDPD,
+ Mnemonic_ANDNPD,
+ Mnemonic_ANDNPS,
+ Mnemonic_CLFLUSH,
+ Mnemonic_CMPPD,
+ Mnemonic_CMPPS,
+ Mnemonic_CMPSD,
+ Mnemonic_CMPSS,
+ Mnemonic_COMISD,
+ Mnemonic_COMISS,
+ Mnemonic_CVTDQ2PD,
+ Mnemonic_CVTDQ2PS,
+ Mnemonic_CVTPS2DQ,
+ Mnemonic_CVTPD2DQ,
+ Mnemonic_CVTPD2PI,
+ Mnemonic_CVTPD2PS,
+ Mnemonic_CVTPI2PD,
+ Mnemonic_CVTPI2PS,
+ Mnemonic_CVTPS2PQ,
+ Mnemonic_CVTPS2PD,
+ Mnemonic_CVTPS2PI,
+ Mnemonic_CVTSD2SI,
+ Mnemonic_CVTSD2SS,
+ Mnemonic_CVTSI2SD,
+ Mnemonic_CVTSI2SS,
+ Mnemonic_CVTSS2SD,
+ Mnemonic_CVTSS2SI,
+ Mnemonic_CVTTPD2PI,
+ Mnemonic_CVTTPD2DQ,
+ Mnemonic_CVTTPS2DQ,
+ Mnemonic_CVTTPS2PI,
+ Mnemonic_CVTTSS2SI,
+ Mnemonic_DIVPD,
+ Mnemonic_DIVPS,
+ Mnemonic_DIVSD,
+ Mnemonic_DIVSS,
+ Mnemonic_EMMS,
+ Mnemonic_HADDPD,
+ Mnemonic_HADDPS,
+ Mnemonic_HSUBPD,
+ Mnemonic_HSUBPS,
+ Mnemonic_LDDQU,
+ Mnemonic_LDMXCSR,
+ Mnemonic_LFENCE,
+ Mnemonic_MASKMOVDQU,
+ Mnemonic_MASKMOVQ,
+ Mnemonic_MAXPD,
+ Mnemonic_MAXPS,
+ Mnemonic_MAXSD,
+ Mnemonic_MAXSS,
+ Mnemonic_MFENCE,
+ Mnemonic_MINPD,
+ Mnemonic_MINPS,
+ Mnemonic_MINSD,
+ Mnemonic_MINSS,
+ Mnemonic_MONITOR,
+
+ Mnemonic_MOVAPD,
+ Mnemonic_MOVAPS,
+ Mnemonic_MOVD,
+ Mnemonic_MOVDDUP,
+ Mnemonic_MOVDQA,
+ Mnemonic_MOVDQU,
+ Mnemonic_MOVDQ2Q,
+ Mnemonic_MOVHLPS,
+ Mnemonic_MOVHPD,
+ Mnemonic_MOVHPS,
+ Mnemonic_MOVLHPS,
+ Mnemonic_MOVLPD,
+ Mnemonic_MOVLPS,
+ Mnemonic_MOVMSKPD,
+ Mnemonic_MOVMSKPS,
+ Mnemonic_MOVNTDQ,
+ Mnemonic_MOVNTI,
+ Mnemonic_MOVNTPD,
+ Mnemonic_MOVNTPS,
+ Mnemonic_MOVNTQ,
+ Mnemonic_MOVSHDUP,
+ Mnemonic_MOVSLDUP,
+ Mnemonic_MOVQ,
+ Mnemonic_MOVQ2DQ,
+ Mnemonic_MOVUPD,
+ Mnemonic_MOVUPS,
+ Mnemonic_MULPD,
+ Mnemonic_MULPS,
+ Mnemonic_MULSD,
+ Mnemonic_MULSS,
+ Mnemonic_WAIT,
+ Mnemonic_ORPD,
+ Mnemonic_ORPS,
+ Mnemonic_PACKSSWB,
+ Mnemonic_PACKSSDW,
+ Mnemonic_PACKUSWB,
+ Mnemonic_PADDB,
+ Mnemonic_PADDW,
+ Mnemonic_PADDD,
+ Mnemonic_PADDQ,
+ Mnemonic_PADDSB,
+ Mnemonic_PADDSW,
+ Mnemonic_PADDUSB,
+ Mnemonic_PADDUSW,
+ Mnemonic_PAND,
+ Mnemonic_PANDN,
+ Mnemonic_PAVGB,
+ Mnemonic_PAVGW,
+ Mnemonic_PCMPEQB,
+ Mnemonic_PCMPEQW,
+ Mnemonic_PCMPEQD,
+ Mnemonic_PCMPEQQ,
+ Mnemonic_PCMPGTB,
+ Mnemonic_PCMPGTW,
+ Mnemonic_PCMPGTD,
+ Mnemonic_PCMPGTQ,
+ Mnemonic_PEXTRB,
+ Mnemonic_PEXTRD,
+ Mnemonic_PEXTRQ,
+ Mnemonic_PINSRB,
+ Mnemonic_PINSRD,
+ Mnemonic_PINSRQ,
+ Mnemonic_PEXTRW,
+ Mnemonic_PINSRW,
+ Mnemonic_PMOVSXBW,
+ Mnemonic_PMOVZXBW,
+ Mnemonic_PMOVSXBD,
+ Mnemonic_PMOVZXBD,
+ Mnemonic_PMOVSXBQ,
+ Mnemonic_PMOVZXBQ,
+ Mnemonic_PMOVSXWD,
+ Mnemonic_PMOVZXWD,
+ Mnemonic_PMOVSXWQ,
+ Mnemonic_PMOVZXWQ,
+ Mnemonic_PMOVSXDQ,
+ Mnemonic_PMOVZXDQ,
+ Mnemonic_PMADDWD,
+ Mnemonic_PABSB,
+ Mnemonic_PABSW,
+ Mnemonic_PABSD,
+ Mnemonic_PMAXSB,
+ Mnemonic_PMAXSW,
+ Mnemonic_PMAXSD,
+ Mnemonic_PMAXUB,
+ Mnemonic_PMINSB,
+ Mnemonic_PMINSW,
+ Mnemonic_PMINSD,
+ Mnemonic_PMINUB,
+ Mnemonic_PMOVMSKB,
+ Mnemonic_PMULHUW,
+ Mnemonic_PMULHW,
+ Mnemonic_PMULLD,
+ Mnemonic_PMULLW,
+ Mnemonic_PMULDQ,
+ Mnemonic_PMULUDQ,
+ Mnemonic_POR,
+ Mnemonic_PSADBW,
+ Mnemonic_PSHUFB,
+ Mnemonic_PSHUFD,
+ Mnemonic_PSHUFHW,
+ Mnemonic_PSHUFLW,
+ Mnemonic_PSHUFW,
+ Mnemonic_PSLLDQ,
+ Mnemonic_PSLLW,
+ Mnemonic_PSLLD,
+ Mnemonic_PSLLQ,
+ Mnemonic_PSRAW,
+ Mnemonic_PSRAD,
+ Mnemonic_PSRLW,
+ Mnemonic_PSRLD,
+ Mnemonic_PSRLQ,
+ Mnemonic_PSRLDQ,
+ Mnemonic_PSUBB,
+ Mnemonic_PSUBW,
+ Mnemonic_PSUBD,
+ Mnemonic_PSUBQ,
+ Mnemonic_PSUBSB,
+ Mnemonic_PSUBSW,
+ Mnemonic_PSUBUSB,
+ Mnemonic_PSUBUSW,
+ Mnemonic_PUNPCKHBW,
+ Mnemonic_PUNPCKHWD,
+ Mnemonic_PUNPCKHDQ,
+ Mnemonic_PUNPCKHQDQ,
+ Mnemonic_PUNPCKLBW,
+ Mnemonic_PUNPCKLWD,
+ Mnemonic_PUNPCKLDQ,
+ Mnemonic_PUNPCKLQDQ,
+ Mnemonic_PXOR,
+ Mnemonic_RCPPS,
+ Mnemonic_RSQRTPS,
+ Mnemonic_RSQRTSS,
+ Mnemonic_SHUFPD,
+ Mnemonic_SHUFPS,
+ Mnemonic_SQRTPD,
+ Mnemonic_SQRTPS,
+ Mnemonic_SQRTSD,
+ Mnemonic_SQRTSS,
+ Mnemonic_STMXCSR,
+ Mnemonic_SUBPD,
+ Mnemonic_SUBPS,
+ Mnemonic_SUBSD,
+ Mnemonic_SUBSS,
+ Mnemonic_UNPCKHPD,
+ Mnemonic_UNPCKHPS,
+ Mnemonic_UNPCKLPD,
+ Mnemonic_UNPCKLPS,
+ Mnemonic_XORPD,
+ Mnemonic_XORPS,
+ Mnemonic_PCMPESTRI,
+ Mnemonic_PCMPESTRM,
+ Mnemonic_PCMPISTRI,
+ Mnemonic_PCMPISTRM,
+#endif
+#ifndef _HAVE_SIMD_
Mnemonic_PXOR, // Logical Exclusive OR
+#endif
Mnemonic_POP, // Pop a Value from the Stack
Mnemonic_POPFD, // Pop a Value of EFLAGS register from the Stack
Mnemonic_PUSH, // Push Word or Doubleword Onto the Stack
@@ -614,8 +859,10 @@ Mnemonic_SHLD,
Mnemonic_SBB, // Integer Subtraction with Borrow
Mnemonic_SUB, // Subtract
+#ifndef _HAVE_SIMD_
Mnemonic_SUBSD, // Subtract Scalar Double-Precision Floating-Point Values
Mnemonic_SUBSS, // Subtract Scalar Single-Precision Floating-Point Values
+#endif
Mnemonic_TEST, // Logical Compare
@@ -626,14 +873,18 @@ Mnemonic_XOR,
//
// packed things,
//
+#ifndef _HAVE_SIMD_
Mnemonic_XORPD, // Bitwise Logical XOR for Double-Precision Floating-Point Values
Mnemonic_XORPS, // Bitwise Logical XOR for Single-Precision Floating-Point Values
Mnemonic_CVTDQ2PD, // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
Mnemonic_CVTTPD2DQ, // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+#endif
+#ifndef _HAVE_SIMD_
Mnemonic_CVTDQ2PS, // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
Mnemonic_CVTTPS2DQ, // Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+#endif
//
// String operations
//
@@ -643,7 +894,9 @@ Mnemonic_SCAS,
Mnemonic_STOS, // Store string
//
+#ifndef _HAVE_SIMD_
Mnemonic_WAIT, // Check pending pending unmasked floating-point exception
+#endif
//
Mnemonic_Count
};
Modified: harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_prvt.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_prvt.h?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_prvt.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_prvt.h Sun Jun 6 22:47:40 2010
@@ -102,6 +102,9 @@ enum OpcodeByteKind {
#define DU_DU_U {3, 2, 3, (((OpndRole_Def|OpndRole_Use)<<4) | ((OpndRole_Def|OpndRole_Use)<<2) | OpndRole_Use) }
#define D_DU_U {3, 2, 2, (((OpndRole_Def)<<4) | ((OpndRole_Def|OpndRole_Use)<<2) | OpndRole_Use) }
#define D_U_U {3, 1, 2, (((OpndRole_Def)<<4) | ((OpndRole_Use)<<2) | OpndRole_Use) }
+#define DU_U_U {3, 1, 3, (((OpndRole_Def|OpndRole_Use)<<4) | ((OpndRole_Use)<<2) | OpndRole_Use) }
+#define D_U_U_U_U_U {6, 1, 5, (((OpndRole_Def)<<10)| ((OpndRole_Use)<<8) | ((OpndRole_Use)<<6) | ((OpndRole_Use)<<4) | ((OpndRole_Use)<<2) | OpndRole_Use) }
+#define D_U_U_U {4, 1, 3, (((OpndRole_Def)<<6) | ((OpndRole_Use)<<4) | ((OpndRole_Use)<<2) | OpndRole_Use) }
// Special encoding of 0x00 opcode byte. Note: it's all O-s, not zeros.
#define OxOO OpcodeByteKind_ZeroOpcodeByte
@@ -139,6 +142,7 @@ enum OpcodeByteKind {
#define AH {OpndKind_GPReg, OpndSize_8, RegName_AH}
#define AX {OpndKind_GPReg, OpndSize_16, RegName_AX}
#define EAX {OpndKind_GPReg, OpndSize_32, RegName_EAX}
+#define DS {OpndKind_SReg, OpndSize_16, RegName_EAX}
#ifdef _EM64T_
#define RAX {OpndKind_GPReg, OpndSize_64, RegName_RAX }
#endif
@@ -165,6 +169,8 @@ enum OpcodeByteKind {
#define RDI { OpndKind_GPReg, OpndSize_64, RegName_RDI }
#endif
+#define XMM0 {OpndKind_XMMReg, OpndSize_128, RegName_XMM0}
+
#define r8 {OpndKind_GPReg, OpndSize_8, RegName_Null}
#define r16 {OpndKind_GPReg, OpndSize_16, RegName_Null}
#define r32 {OpndKind_GPReg, OpndSize_32, RegName_Null}
@@ -183,6 +189,7 @@ enum OpcodeByteKind {
#define m16 {OpndKind_Mem, OpndSize_16, RegName_Null}
#define m32 {OpndKind_Mem, OpndSize_32, RegName_Null}
#define m64 {OpndKind_Mem, OpndSize_64, RegName_Null}
+#define m128 {OpndKind_Mem, OpndSize_128, RegName_Null}
#ifdef _EM64T_
#define r_m64 { (OpndKind)(OpndKind_GPReg|OpndKind_Mem), OpndSize_64, RegName_Null }
#endif
@@ -210,6 +217,8 @@ enum OpcodeByteKind {
#define mm64 {OpndKind_MMXReg, OpndSize_64, RegName_Null}
#define mm_m64 {(OpndKind)(OpndKind_MMXReg|OpndKind_Mem), OpndSize_64, RegName_Null}
+#define xmm128 {OpndKind_XMMReg, OpndSize_128, RegName_Null}
+#define xmm_m128 {(OpndKind)(OpndKind_XMMReg|OpndKind_Mem), OpndSize_128, RegName_Null}
#define xmm64 {OpndKind_XMMReg, OpndSize_64, RegName_Null}
#define xmm_m64 {(OpndKind)(OpndKind_XMMReg|OpndKind_Mem), OpndSize_64, RegName_Null}
@@ -286,8 +295,8 @@ struct OpcodeInfo {
decoder64,
};
platform platf;
- unsigned opcode[4+1+1];
- EncoderBase::OpndDesc opnds[3];
+ unsigned opcode[5+1+1];
+ EncoderBase::OpndDesc opnds[6];
EncoderBase::OpndRolesDesc roles;
};
Modified: harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp Sun Jun 6 22:47:40 2010
@@ -531,7 +531,7 @@ END_MNEMONIC()
BEGIN_MNEMONIC(CVTSD2SI, MF_NONE, D_U )
BEGIN_OPCODES()
{OpcodeInfo::all, {0xF2, 0x0F, 0x2D, _r}, {r32, xmm_m64}, D_U },
- {OpcodeInfo::em64t, {REX_W, 0xF2, 0x0F, 0x2D, _r}, {r64, xmm_m64}, D_U },
+ {OpcodeInfo::em64t, {0xF2, REX_W, 0x0F, 0x2D, _r}, {r64, xmm_m64}, D_U },
END_OPCODES()
END_MNEMONIC()
@@ -539,7 +539,7 @@ END_MNEMONIC()
BEGIN_MNEMONIC(CVTTSD2SI, MF_NONE, D_U )
BEGIN_OPCODES()
{OpcodeInfo::all, {0xF2, 0x0F, 0x2C, _r}, {r32, xmm_m64}, D_U },
- {OpcodeInfo::em64t, {REX_W, 0xF2, 0x0F, 0x2C, _r}, {r64, xmm_m64}, D_U },
+ {OpcodeInfo::em64t, {0xF2, REX_W, 0x0F, 0x2C, _r}, {r64, xmm_m64}, D_U },
END_OPCODES()
END_MNEMONIC()
@@ -554,7 +554,7 @@ END_MNEMONIC()
BEGIN_MNEMONIC(CVTSS2SI, MF_NONE, D_U )
BEGIN_OPCODES()
{OpcodeInfo::all, {0xF3, 0x0F, 0x2D, _r}, {r32, xmm_m32}, D_U},
- {OpcodeInfo::em64t, {REX_W, 0xF3, 0x0F, 0x2D, _r}, {r64, xmm_m32}, D_U},
+ {OpcodeInfo::em64t, {0xF3, REX_W, 0x0F, 0x2D, _r}, {r64, xmm_m32}, D_U},
END_OPCODES()
END_MNEMONIC()
@@ -562,7 +562,7 @@ END_MNEMONIC()
BEGIN_MNEMONIC(CVTTSS2SI, MF_NONE, D_U )
BEGIN_OPCODES()
{OpcodeInfo::all, {0xF3, 0x0F, 0x2C, _r}, {r32, xmm_m32}, D_U},
- {OpcodeInfo::em64t, {REX_W, 0xF3, 0x0F, 0x2C, _r}, {r64, xmm_m32}, D_U},
+ {OpcodeInfo::em64t, {0xF3, REX_W, 0x0F, 0x2C, _r}, {r64, xmm_m32}, D_U},
END_OPCODES()
END_MNEMONIC()
@@ -570,7 +570,7 @@ END_MNEMONIC()
BEGIN_MNEMONIC(CVTSI2SD, MF_NONE, D_U )
BEGIN_OPCODES()
{OpcodeInfo::all, {0xF2, 0x0F, 0x2A, _r}, {xmm64, r_m32}, D_U},
- {OpcodeInfo::em64t, {REX_W, 0xF2, 0x0F, 0x2A, _r}, {xmm64, r_m64}, D_U},
+ {OpcodeInfo::em64t, {0xF2, REX_W, 0x0F, 0x2A, _r}, {xmm64, r_m64}, D_U},
END_OPCODES()
END_MNEMONIC()
@@ -578,7 +578,7 @@ END_MNEMONIC()
BEGIN_MNEMONIC(CVTSI2SS, MF_NONE, D_U )
BEGIN_OPCODES()
{OpcodeInfo::all, {0xF3, 0x0F, 0x2A, _r}, {xmm32, r_m32}, D_U},
- {OpcodeInfo::em64t, {REX_W, 0xF3, 0x0F, 0x2A, _r}, {xmm32, r_m64}, D_U},
+ {OpcodeInfo::em64t, {0xF3, REX_W, 0x0F, 0x2A, _r}, {xmm32, r_m64}, D_U},
END_OPCODES()
END_MNEMONIC()
@@ -1136,78 +1136,1245 @@ END_MNEMONIC()
BEGIN_MNEMONIC(MOVQ, MF_NONE, D_U )
BEGIN_OPCODES()
-#ifdef _HAVE_MMX_
{OpcodeInfo::all, {0x0F, 0x6F, _r}, {mm64, mm_m64}, D_U },
{OpcodeInfo::all, {0x0F, 0x7F, _r}, {mm_m64, mm64}, D_U },
-#endif
{OpcodeInfo::all, {0xF3, 0x0F, 0x7E }, {xmm64, xmm_m64}, D_U },
{OpcodeInfo::all, {0x66, 0x0F, 0xD6 }, {xmm_m64, xmm64}, D_U },
-// {OpcodeInfo::em64t, {REX_W, 0x66, 0x0F, 0x6E, _r}, {xmm64, r_m64}, D_U },
-// {OpcodeInfo::em64t, {REX_W, 0x66, 0x0F, 0x7E, _r}, {r_m64, xmm64}, D_U },
- {OpcodeInfo::em64t, {REX_W, 0x66, 0x0F, 0x6E, _r}, {xmm64, r64}, D_U },
- {OpcodeInfo::em64t, {REX_W, 0x66, 0x0F, 0x7E, _r}, {r64, xmm64}, D_U },
+ {OpcodeInfo::em64t, {0x66, REX_W, 0x0F, 0x6E, _r}, {xmm128, r64}, D_U },
+ {OpcodeInfo::em64t, {0x66, REX_W, 0x0F, 0x7E, _r}, {r64, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+
+BEGIN_MNEMONIC(MOVD, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x6E, _r}, {xmm32, r_m32}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x6E, _r}, {xmm128, r_m32}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x7E, _r}, {r_m32, xmm32}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+
+#ifdef _HAVE_SIMD_
+
+BEGIN_MNEMONIC(ADDPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x58, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(ADDSUBPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD0, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(ADDSUBPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0xD0, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(ADDPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x58, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(ANDPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x54, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(ANDNPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x55, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(ANDNPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x55, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CLFLUSH, MF_NONE, U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xAE, _7}, {m8}, U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CMPPD, MF_AFFECTS_FLAGS, DU_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0xC2, _r, ib}, {xmm128, xmm_m128, imm8}, DU_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CMPPS, MF_AFFECTS_FLAGS, DU_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xC2, _r, ib}, {xmm128, xmm_m128, imm8}, DU_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CMPSS, MF_AFFECTS_FLAGS, DU_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0xC2, _r, ib}, {xmm32, xmm_m32, imm8}, DU_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPD2DQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0xE6}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPD2PI, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x2D, _r}, {mm64, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPD2PS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x5A, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPI2PD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x2A, _r}, {xmm128, mm_m64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPI2PS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x2A, _r}, {xmm64, mm_m64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPS2PQ, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x5B, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPS2PD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x5A, _r}, {xmm128, xmm_m64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPS2PI, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x2D, _r}, {mm64, xmm_m64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTTPD2PI, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x2C, _r}, {mm64, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTTPS2PI, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x2C, _r}, {mm64, xmm_m64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(DIVPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x5E, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(DIVPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x5E, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(EMMS, MF_NONE, N)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x77}, {}, N},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(HADDPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x7C, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(HADDPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0x7C, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(HSUBPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x7D, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(HSUBPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0x7D, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(LDDQU, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0xF0, _r}, {xmm128, m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(LDMXCSR, MF_NONE, U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xAE, _2}, {m32}, U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(LFENCE, MF_NONE, N)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xAE, _5}, {}, N },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MASKMOVDQU, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF7, _r}, {EDI, xmm128, xmm128}, D_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MASKMOVQ, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF7, _r}, {EDI, mm64, mm64}, D_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MAXPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x5F, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MAXPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x5F, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MAXSD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0x5F, _r}, {xmm64, xmm_m64}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MAXSS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x5F, _r}, {xmm64, xmm_m32}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MFENCE, MF_NONE, N)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xAE, _6}, {}, N},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MINPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x5D, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MINPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x5D, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MINSD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0x5D, _r}, {xmm64, xmm_m64}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MINSS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x5D, _r}, {xmm64, xmm_m32}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MONITOR, MF_NONE, U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x01, 0xC8}, {DS, EAX}, U_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVAPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x28, _r}, {xmm128, xmm_m128}, D_U },
+ {OpcodeInfo::all, {0x0F, 0x29, _r}, {xmm_m128, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVDDUP, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0x12, _r}, {xmm128, xmm_m64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVDQA, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x6F, _r}, {xmm128, xmm_m128}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x7F, _r}, {xmm_m128, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVDQU, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x6F, _r}, {xmm128, xmm_m128}, D_U },
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x7F, _r}, {xmm_m128, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVDQ2Q, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0xD6}, {mm64, xmm64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVHLPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x12, _r}, {xmm128, xmm128}, D_U},
+ {OpcodeInfo::all, {0x0F, 0x12, _r}, {xmm64, xmm128}, D_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVHPD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x16, _r}, {xmm128, mm64}, D_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x17, _r}, {mm64, xmm128}, D_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVHPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x16, _r}, {xmm128, mm64}, D_U},
+ {OpcodeInfo::all, {0x0F, 0x17, _r}, {mm64, xmm128}, D_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVLHPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x16, _r}, {xmm128, xmm128}, DU_U},
+ {OpcodeInfo::all, {0x0F, 0x16, _r}, {xmm128, xmm64}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVLPD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x12, _r}, {xmm128, m64}, D_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x13, _r}, {m64, xmm128}, D_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVLPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x12, _r}, {xmm128, mm64}, D_U},
+ {OpcodeInfo::all, {0x0F, 0x13, _r}, {mm64, xmm128}, D_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVMSKPD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x50, _r}, {r32, xmm128}, D_U },
+ {OpcodeInfo::em64t, {0x66, 0x0F, 0x50, _r}, {r64, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVMSKPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x50, _r}, {r32, xmm128}, D_U },
+ {OpcodeInfo::em64t, {0x0F, 0x50, _r}, {r64, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVNTDQ, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE7, _r}, {m128, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVNTI, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xC3, _r}, {m32, r32}, D_U },
+ {OpcodeInfo::em64t, {REX_W, 0x0F, 0xC3, _r}, {m64, r64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVNTPD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x2B, _r}, {m128, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVNTPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x2B, _r}, {m128, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVNTQ, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE7, _r}, {m64, mm64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVSHDUP, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x16, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVSLDUP, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x12, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVQ2DQ, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0xD6, _r}, {xmm128, mm64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVUPD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x10, _r}, {xmm128, xmm_m128}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x11, _r}, {xmm_m128, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MOVUPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x10, _r}, {xmm128, xmm_m128}, D_U },
+ {OpcodeInfo::all, {0x0F, 0x11, _r}, {xmm_m128, xmm128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MULPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x59, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(MULPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x59, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(ORPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x56, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(ORPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x56, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PACKSSWB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x63, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x63, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PACKSSDW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x6B, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x6B, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PACKUSWB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x67, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x67, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PADDB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xFC, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xFC, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PADDW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xFD, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xFD, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PADDD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xFE, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xFE, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PADDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xD4, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD4, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PADDSB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xEC, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xEC, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PADDSW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xED, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xED, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PADDUSB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xDC, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xDC, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PADDUSW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xDD, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xDD, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PAND, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xDB, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xDB, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PANDN, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xDF, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xDF, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PAVGB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE0, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE0, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PAVGW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE3, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE3, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPEQB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x74, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x74, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPEQW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x75, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x75, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPEQD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x76, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x76, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPEQQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x29, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPGTB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x64, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x64, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPGTW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x65, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x65, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPGTD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x66, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x66, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPGTQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x37, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PEXTRB, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x3A, 0x14, _r, ib}, {r_m32, xmm128, imm8}, D_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PEXTRD, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x3A, 0x16, _r, ib}, {r_m32, xmm128, imm8}, D_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PEXTRQ, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::em64t, {0x66, REX_W, 0x0F, 0x3A, 0x16, _r, ib}, {r_m64, xmm128, imm8}, D_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PINSRB, MF_NONE, DU_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x3A, 0x20, _r, ib}, {xmm128, r_m32, imm8}, DU_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PINSRD, MF_NONE, DU_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x3A, 0x22, _r, ib}, {xmm128, r_m32, imm8}, DU_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PINSRQ, MF_NONE, DU_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::em64t, {0x66, REX_W, 0x0F, 0x3A, 0x22, _r, ib}, {xmm128, r_m64, imm8}, DU_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PEXTRW, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xC5, _r, ib}, {r32, mm64, imm8}, D_U_U },
+ {OpcodeInfo::em64t, {REX_W, 0x0F, 0xC5, _r, ib}, {r64, mm64, imm8}, D_U_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xC5, _r, ib}, {r32, xmm128, imm8}, D_U_U },
+ {OpcodeInfo::em64t, {0x66, REX_W, 0x0F, 0xC5, _r, ib}, {r64, xmm128, imm8}, D_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PINSRW, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xC4, _r, ib}, {mm64, r32, imm8}, D_U_U },
+ {OpcodeInfo::all, {0x0F, 0xC4, _r, ib}, {mm64, m16, imm8}, D_U_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xC4, _r, ib}, {xmm128, r32, imm8}, D_U_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xC4, _r, ib}, {xmm128, m16, imm8}, D_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVSXBW, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x20, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVZXBW, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x30, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVSXBD, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x21, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVZXBD, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x31, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVSXBQ, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x22, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVZXBQ, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x32, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVSXWD, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x23, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVZXWD, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x33, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVSXWQ, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x24, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVZXWQ, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x34, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVSXDQ, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x25, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMOVZXDQ, MF_NONE, D_U )
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x35, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMADDWD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF5, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF5, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PABSB, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x1C, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PABSW, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x1D, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PABSD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x1E, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMAXSB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x3C, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMAXSW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xEE, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xEE, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMAXSD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x3D, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMAXUB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xDE, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xDE, _r}, {xmm128, xmm_m128}, DU_U },
END_OPCODES()
END_MNEMONIC()
+BEGIN_MNEMONIC(PMINSB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x38, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
-BEGIN_MNEMONIC(MOVD, MF_NONE, D_U )
-BEGIN_OPCODES()
- {OpcodeInfo::all, {0x66, 0x0F, 0x6E, _r}, {xmm32, r_m32}, D_U },
- {OpcodeInfo::all, {0x66, 0x0F, 0x7E, _r}, {r_m32, xmm32}, D_U },
+BEGIN_MNEMONIC(PMINSW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xEA, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xEA, _r}, {xmm128, xmm_m128}, DU_U },
END_OPCODES()
END_MNEMONIC()
-//
-// A bunch of MMX instructions
-//
-#ifdef _HAVE_MMX_
+BEGIN_MNEMONIC(PMINSD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x39, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
-BEGIN_MNEMONIC(EMMS, MF_NONE, N)
-BEGIN_OPCODES()
- {OpcodeInfo::all, {0x0F, 0x77}, {}, N },
+BEGIN_MNEMONIC(PMINUB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xDA, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xDA, _r}, {xmm128, xmm_m128}, DU_U },
END_OPCODES()
END_MNEMONIC()
-BEGIN_MNEMONIC(PADDQ, MF_NONE, DU_U)
+BEGIN_MNEMONIC(PMOVMSKB, MF_NONE, DU_U)
BEGIN_OPCODES()
- {OpcodeInfo::all, {0x0F, 0xD4, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x0F, 0xD7, _r}, {r32, mm64}, DU_U },
+ {OpcodeInfo::em64t, {REX_W, 0x0F, 0xD7, _r}, {r64, mm64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD7, _r}, {r32, xmm128}, DU_U },
+ {OpcodeInfo::em64t, {0x66, REX_W, 0x0F, 0xD7, _r}, {r64, xmm128}, DU_U },
END_OPCODES()
END_MNEMONIC()
-BEGIN_MNEMONIC(PAND, MF_NONE, DU_U)
-BEGIN_OPCODES()
- {OpcodeInfo::all, {0x0F, 0xDB, _r}, {mm64, mm_m64}, DU_U },
+BEGIN_MNEMONIC(PMULHUW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE4, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE4, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMULHW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE5, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE5, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMULLD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x40, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMULLW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xD5, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD5, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMULDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, 0x28, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PMULUDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF4, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF4, _r}, {xmm128, xmm_m128}, DU_U },
END_OPCODES()
END_MNEMONIC()
BEGIN_MNEMONIC(POR, MF_NONE, DU_U)
BEGIN_OPCODES()
{OpcodeInfo::all, {0x0F, 0xEB, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xEB, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSADBW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF6, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF6, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSHUFB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x38, OxOO, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSHUFD, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x70, _r}, {xmm128, xmm_m128, imm8}, D_U_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x70, _r}, {xmm128, xmm32, imm8}, D_U_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x70, _r}, {xmm32, xmm128, imm8}, D_U_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSHUFHW, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x70, _r}, {xmm128, xmm_m128, imm8}, D_U_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSHUFLW, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0x70, _r}, {xmm128, xmm_m128, imm8}, D_U_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSHUFW, MF_NONE, D_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x70, _r, ib}, {mm64, mm_m64, imm8}, D_U_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSLLDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x73, _7, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSLLW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF1, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF1, _r}, {xmm128, xmm_m128}, DU_U},
+ {OpcodeInfo::all, {0x0F, 0x71, _6, ib}, {mm64, imm8}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x71, _6, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSLLD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF2, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF2, _r}, {xmm128, xmm_m128}, DU_U},
+ {OpcodeInfo::all, {0x0F, 0x72, _6, ib}, {mm64, imm8}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x72, _6, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSLLQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF3, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF3, _r}, {xmm128, xmm_m128}, DU_U},
+ {OpcodeInfo::all, {0x0F, 0x73, _6, ib}, {mm64, imm8}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x73, _6, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSRAW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE1, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE1, _r}, {xmm128, xmm_m128}, DU_U},
+ {OpcodeInfo::all, {0x0F, 0x71, _4, ib}, {mm64, imm8}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x71, _4, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSRAD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE2, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE2, _r}, {xmm128, xmm_m128}, DU_U},
+ {OpcodeInfo::all, {0x0F, 0x72, _4, ib}, {mm64, imm8}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x72, _4, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSRLW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD1, _r}, {xmm128, xmm_m128}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x71, _2, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSRLD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD2, _r}, {xmm128, xmm_m128}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x72, _2, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSRLQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD3, _r}, {xmm128, xmm_m128}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x73, _2, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSRLDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x73, _3, ib}, {xmm128, imm8}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSUBB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF8, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF8, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSUBW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xF9, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xF9, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSUBD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xFA, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xFA, _r}, {xmm128, xmm_m128}, DU_U},
END_OPCODES()
END_MNEMONIC()
BEGIN_MNEMONIC(PSUBQ, MF_NONE, DU_U)
BEGIN_OPCODES()
- {OpcodeInfo::all, {0x0F, 0xFB, _r}, {mm64, mm_m64}, DU_U },
+ {OpcodeInfo::all, {0x0F, 0xFB, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xFB, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSUBSB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE8, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE8, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSUBSW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xE9, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xE9, _r}, {xmm128, xmm_m128}, DU_U},
END_OPCODES()
END_MNEMONIC()
-#endif // ~_HAVE_MMX_
+BEGIN_MNEMONIC(PSUBUSB, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xD8, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD8, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PSUBUSW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xD9, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0xD9, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+
+BEGIN_MNEMONIC(PUNPCKHBW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x68, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x68, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PUNPCKHWD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x69, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x69, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PUNPCKHDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x6A, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x6A, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PUNPCKHQDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x6D, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PUNPCKLBW, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x60, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x60, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PUNPCKLWD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x61, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x61, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PUNPCKLDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x62, _r}, {mm64, mm_m64}, DU_U},
+ {OpcodeInfo::all, {0x66, 0x0F, 0x62, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PUNPCKLQDQ, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x6C, _r}, {xmm128, xmm_m128}, DU_U},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(RCPPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x53, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(RSQRTPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x52, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(RSQRTSS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x52, _r}, {xmm32, xmm_m32}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(SHUFPD, MF_NONE, DU_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0xC6, _r, ib}, {xmm128, xmm_m128, imm8}, DU_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(SHUFPS, MF_NONE, DU_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xC6, _r, ib}, {xmm128, xmm_m128, imm8}, DU_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(SQRTPD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x51, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(SQRTPS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x51, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(SQRTSD, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF2, 0x0F, 0x51, _r}, {xmm64, xmm_m64}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(SQRTSS, MF_NONE, D_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0xF3, 0x0F, 0x51, _r}, {xmm32, xmm_m32}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(STMXCSR, MF_NONE, D)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0xAE, _3}, {m32}, D},
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(SUBPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x5C, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(SUBPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x5C, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(UNPCKHPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x15, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(UNPCKHPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x15, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(UNPCKLPD, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x14, _r}, {xmm128, xmm_m128}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(UNPCKLPS, MF_NONE, DU_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x0F, 0x14, _r}, {xmm128, xmm_m128}, DU_U },
+ {OpcodeInfo::all, {0x0F, 0x14, _r}, {xmm128, xmm32}, DU_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPESTRI, MF_NONE, D_U_U_U_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x3A, 0x61, _r, ib}, {ECX, EAX, EDX, xmm128, xmm128, imm8}, D_U_U_U_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPESTRM, MF_NONE, D_U_U_U_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x3A, 0x60, _r, ib}, {XMM0, EAX, EDX, xmm128, xmm128, imm8}, D_U_U_U_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPISTRI, MF_NONE, D_U_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x3A, 0x63, _r, ib}, {ECX, xmm128, xmm_m128, imm8}, D_U_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(PCMPISTRM, MF_NONE, D_U_U_U)
+BEGIN_OPCODES()
+ {OpcodeInfo::all, {0x66, 0x0F, 0x3A, 0x62, _r, ib}, {XMM0, xmm128, xmm_m128, imm8}, D_U_U_U },
+END_OPCODES()
+END_MNEMONIC()
+
+#endif //_HAVE_SIMD_
BEGIN_MNEMONIC(PXOR, MF_NONE, DU_U)
BEGIN_OPCODES()
-#ifdef _HAVE_MMX_
{OpcodeInfo::all, {0x0F, 0xEF, _r}, {mm64, mm_m64}, DU_U },
-#endif
- {OpcodeInfo::all, {0x66, 0x0F, 0xEF, _r}, {xmm64, xmm_m64}, DU_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0xEF, _r}, {xmm128, xmm_m128}, DU_U },
END_OPCODES()
END_MNEMONIC()
BEGIN_MNEMONIC(MOVAPD, MF_NONE, D_U )
BEGIN_OPCODES()
- {OpcodeInfo::all, {0x66, 0x0F, 0x28, _r}, {xmm64, xmm_m64}, D_U },
- {OpcodeInfo::all, {0x66, 0x0F, 0x29, _r}, {xmm_m64, xmm64}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x28, _r}, {xmm128, xmm_m128}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x29, _r}, {xmm_m128, xmm128}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x28, _r}, {xmm64, xmm128}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x28, _r}, {xmm128, xmm64}, D_U },
+ {OpcodeInfo::all, {0x66, 0x0F, 0x28, _r}, {xmm128, xmm32}, D_U },
END_OPCODES()
END_MNEMONIC()
@@ -1311,6 +2478,9 @@ END_MNEMONIC()
BEGIN_MNEMONIC(PREFETCH, MF_NONE, U)
BEGIN_OPCODES()
{OpcodeInfo::all, {0x0F, 0x18, _0}, {m8}, U },
+{OpcodeInfo::all, {0x0F, 0x18, _1}, {m8}, U },
+{OpcodeInfo::all, {0x0F, 0x18, _2}, {m8}, U },
+{OpcodeInfo::all, {0x0F, 0x18, _3}, {m8}, U },
END_OPCODES()
END_MNEMONIC()
@@ -1506,7 +2676,14 @@ END_MNEMONIC()
BEGIN_MNEMONIC(CVTDQ2PS, MF_NONE, D_U )
BEGIN_OPCODES()
//Note: they're actually 128 bits
- {OpcodeInfo::all, {0x0F, 0x5B, _r}, {xmm32, xmm_m32}, D_U },
+ {OpcodeInfo::all, {0x0F, 0x5B, _r}, {xmm128, xmm_m128}, D_U },
+END_OPCODES()
+END_MNEMONIC()
+
+BEGIN_MNEMONIC(CVTPS2DQ, MF_NONE, D_U )
+BEGIN_OPCODES()
+ //Note: they're actually 128 bits
+ {OpcodeInfo::all, {0x66, 0x0F, 0x5B, _r}, {xmm128, xmm_m128}, D_U },
END_OPCODES()
END_MNEMONIC()
@@ -1610,6 +2787,7 @@ BEGIN_MNEMONIC(CMPSD, MF_AFFECTS_FLAGS,
BEGIN_OPCODES()
{OpcodeInfo::ia32, {0xA7}, {ESI,EDI,ECX}, DU_DU_DU },
{OpcodeInfo::em64t, {0xA7}, {RSI,RDI,RCX}, DU_DU_DU },
+ {OpcodeInfo::all, {0xF2, 0x0F, 0xC2, _r, ib}, {xmm64, xmm_m64, imm8}, DU_U_U },
END_OPCODES()
END_MNEMONIC()
@@ -1730,7 +2908,7 @@ void EncoderBase::buildMnemonicDesc(cons
unsigned lowByte = (opcod & OpcodeByteKind_OpcodeMask);
odesc.opcode[odesc.opcode_len++] = (unsigned char)lowByte;
}
- assert(odesc.opcode_len<5);
+ assert(odesc.opcode_len<6);
odesc.aux0 = odesc.aux1 = 0;
if (oinfo.opcode[j] != 0) {
odesc.aux0 = oinfo.opcode[j];
@@ -1802,6 +2980,9 @@ void EncoderBase::buildMnemonicDesc(cons
++odesc.first_opnd;
if (odesc.opnds[1].reg != RegName_Null) {
++odesc.first_opnd;
+ if (odesc.opnds[2].reg != RegName_Null) {
+ ++odesc.first_opnd;
+ }
}
}
Modified: harmony/enhanced/java/trunk/drlvm/vm/vmcore/include/compile.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/vmcore/include/compile.h?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/vmcore/include/compile.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/vmcore/include/compile.h Sun Jun 6 22:47:40 2010
@@ -104,9 +104,9 @@ typedef void (Override_Generator)(Emitte
typedef unsigned (Override_Size)(Method *);
typedef struct Stub_Override_Entry {
- char *class_name;
- char *method_name;
- char *descriptor;
+ const char *class_name;
+ const char *method_name;
+ const char *descriptor;
Override_Generator *override_generator;
Override_Size *override_size;
} Stub_Override_Entry;
Modified: harmony/enhanced/java/trunk/drlvm/vm/vmcore/src/util/ia32/base/jit_runtime_support_ia32.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/vmcore/src/util/ia32/base/jit_runtime_support_ia32.cpp?rev=952017&r1=952016&r2=952017&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/vmcore/src/util/ia32/base/jit_runtime_support_ia32.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/vmcore/src/util/ia32/base/jit_runtime_support_ia32.cpp Sun Jun 6 22:47:40 2010
@@ -299,9 +299,9 @@ static void *getaddress__vm_initialize_c
// Object allocation
//////////////////////////////////////////////////////////////////////
-static void *generate_object_allocation_stub_with_thread_pointer(char *fast_obj_alloc_proc,
- char *slow_obj_alloc_proc,
- char *stub_name)
+static void *generate_object_allocation_stub_with_thread_pointer(const char *fast_obj_alloc_proc,
+ const char *slow_obj_alloc_proc,
+ const char *stub_name)
{
const int stub_size = 52+26;
char *stub = (char *)malloc_fixed_code_for_jit(stub_size, DEFAULT_CODE_ALIGNMENT, CODE_BLOCK_HEAT_MAX/2, CAA_Allocate);