You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@mynewt.apache.org by je...@apache.org on 2021/11/05 20:41:22 UTC
[mynewt-core] branch master updated: mcu/nrf5340: Add GPIO pin core
selection
This is an automated email from the ASF dual-hosted git repository.
jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new 5af1e00 mcu/nrf5340: Add GPIO pin core selection
5af1e00 is described below
commit 5af1e00495c23cd7c7af1726364748d9a6f1cbec
Author: Jerzy Kasenberg <je...@codecoup.pl>
AuthorDate: Wed Nov 3 11:15:29 2021 +0100
mcu/nrf5340: Add GPIO pin core selection
So far ipc driver could mark pins for NET core usage.
If application was running in non-secure mode this
ipc driver could not change pin assigment, it is possible
only in secure mode.
This adds two pin lists that could setup pins to be used
for network core and for dedicated peripherals.
This change is needed if bootloader code does not use (and
not starts external low power oscillator) but application
will use it. If application was running in non-secure
mode default pin 0 and 1 assignment to app core could not
be changed to peripheral as required for LFXO to work.
---
hw/mcu/nordic/nrf5340/src/hal_system.c | 6 ++++--
hw/mcu/nordic/nrf5340/src/hal_system_start.c | 25 +++++++++++++++++++++++++
hw/mcu/nordic/nrf5340/syscfg.yml | 15 +++++++++++++++
3 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/hw/mcu/nordic/nrf5340/src/hal_system.c b/hw/mcu/nordic/nrf5340/src/hal_system.c
index 668718a..ea01400 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_system.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_system.c
@@ -86,8 +86,10 @@ hal_system_clock_start(void)
regval = CLOCK_LFCLKSTAT_STATE_Running << CLOCK_LFCLKSTAT_STATE_Pos;
#if MYNEWT_VAL_CHOICE(MCU_LFCLK_SOURCE, LFXO)
- NRF_P0->PIN_CNF[0] |= GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
- NRF_P0->PIN_CNF[1] |= GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
+#if !defined(NRF_TRUSTZONE_NONSECURE)
+ NRF_P0->PIN_CNF[0] = GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
+ NRF_P0->PIN_CNF[1] = GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
+#endif
regval |= CLOCK_LFCLKSTAT_SRC_LFXO << CLOCK_LFCLKSTAT_SRC_Pos;
clksrc = CLOCK_LFCLKSTAT_SRC_LFXO;
#elif MYNEWT_VAL_CHOICE(MCU_LFCLK_SOURCE, LFSYNTH)
diff --git a/hw/mcu/nordic/nrf5340/src/hal_system_start.c b/hw/mcu/nordic/nrf5340/src/hal_system_start.c
index 4ab854e..89f3f51 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_system_start.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_system_start.c
@@ -22,6 +22,7 @@
#include <mcu/cortex_m33.h>
#include <mcu/nrf5340_hal.h>
#include <bsp/bsp.h>
+#include <nrf_gpio.h>
#if MCUBOOT_MYNEWT
#include <bootutil/bootutil.h>
@@ -55,6 +56,18 @@ static const struct periph_id_range ns_peripheral_ids[] = {
{ 128, 129 },
};
+/* Below is to unmangle comma separated GPIO pins from MYNEWT_VAL */
+#define _Args(...) __VA_ARGS__
+#define STRIP_PARENS(X) X
+#define UNMANGLE_MYNEWT_VAL(X) STRIP_PARENS(_Args X)
+
+#if MYNEWT_VAL(MCU_GPIO_NET)
+static const unsigned int net_gpios[] = { UNMANGLE_MYNEWT_VAL(MYNEWT_VAL(MCU_GPIO_NET)) };
+#endif
+#if MYNEWT_VAL(MCU_GPIO_PERIPH)
+static const unsigned int periph_gpios[] = { UNMANGLE_MYNEWT_VAL(MYNEWT_VAL(MCU_GPIO_PERIPH)) };
+#endif
+
void
hal_system_start(void *img_start)
{
@@ -106,6 +119,18 @@ hal_system_start(void *img_start)
NRF_SPU->GPIOPORT[0].PERM = 0;
NRF_SPU->GPIOPORT[1].PERM = 0;
+#if MYNEWT_VAL(MCU_GPIO_NET)
+ for (i = 0; i < ARRAY_SIZE(net_gpios); ++i) {
+ nrf_gpio_pin_mcu_select(net_gpios[i], GPIO_PIN_CNF_MCUSEL_NetworkMCU);
+ }
+#endif
+
+#if MYNEWT_VAL(MCU_GPIO_PERIPH)
+ for (i = 0; i < ARRAY_SIZE(periph_gpios); ++i) {
+ nrf_gpio_pin_mcu_select(periph_gpios[i], GPIO_PIN_CNF_MCUSEL_Peripheral);
+ }
+#endif
+
/*
* For now whole RAM is marked as non-secure. To prevent data leak from secure to
* non-secure, whole RAM is cleared before starting application code.
diff --git a/hw/mcu/nordic/nrf5340/syscfg.yml b/hw/mcu/nordic/nrf5340/syscfg.yml
index 7480df9..806f52d 100644
--- a/hw/mcu/nordic/nrf5340/syscfg.yml
+++ b/hw/mcu/nordic/nrf5340/syscfg.yml
@@ -64,6 +64,21 @@ syscfg.defs:
Refer to nRF5340 Product Specification document for more details.
value: 0
+ MCU_GPIO_NET:
+ description: >
+ List of comma separated GPIO that should be configured for Network
+ Core usage. Can be define numeric or with constants from bsp.h
+ eg "LED_1, LED_2" or "1, 2". Further GPIO configuration should be
+ done by Network Core.
+ value: ""
+
+ MCU_GPIO_PERIPH:
+ description: >
+ List of comma separated GPIO that should be configured for peripherals
+ dedicated pins (eg oscillator).
+ Can be define numeric or with constants from bsp.h eg "LED_1, LED_2" or "1, 2".
+ value: ""
+
MCU_DEBUG_IGNORE_BKPT:
description: >
When enabled, asm(bkpt) will be ignored. If not set, it will hit