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Posted to commits@mynewt.apache.org by an...@apache.org on 2023/06/22 08:38:43 UTC

[mynewt-core] branch master updated (487008433 -> d6b211cf5)

This is an automated email from the ASF dual-hosted git repository.

andk pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git


    from 487008433 lvgl: Add support for 16 bit 8080 MIPI DSI
     new 462c3910c hw/mcu/cmac: Fix os_tick handling
     new cbc12d27e hw/drivers/ipc_cmac: Calculate assert file in-place
     new d6b211cf5 hw/drivers/ipc_cmac: Capture more registers in coredump

The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "add" were already present in the repository and have only
been added to this reference.


Summary of changes:
 hw/drivers/ipc_cmac/include/ipc_cmac/shm.h         |  5 ++++
 hw/drivers/ipc_cmac/src/shm_hs.c                   |  8 +++---
 hw/mcu/dialog/cmac/include/mcu/cmac_timer.h        | 30 +++++-----------------
 .../dialog/cmac/src/arch/cortex_m0_cmac/os_fault.c |  5 ++++
 hw/mcu/dialog/cmac/src/cmac_sleep.c                |  5 ++--
 hw/mcu/dialog/cmac/src/cmac_timer.c                | 29 +++++++--------------
 6 files changed, 31 insertions(+), 51 deletions(-)


[mynewt-core] 01/03: hw/mcu/cmac: Fix os_tick handling

Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.

andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git

commit 462c3910c07a67c33707bf47a4a6020a89ce61db
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Mon Jun 19 23:15:12 2023 +0200

    hw/mcu/cmac: Fix os_tick handling
    
    The os_tick is handled by 36_10_EQ_Y and 9_0_EQ_Y comparators which
    requires extra handling to match full value on 2 separate comparators.
    This could also trigger an assert on wakeup in cmac_timer_slp_disable
    which expects that no interrupt is fired during that process. This is to
    guarantee that we complete wake up before timer expires. However, since
    we initially match on 36_10_EQ_Y only which has resolution of 1024us
    it's possible that it will trigger an interrupt even though we woke up
    before complete EQ_Y value matches.
    
    To fix this and simplify the process we can use single EQ_Y comparator
    to match on complete value, just as we do for EQ_X.
---
 hw/mcu/dialog/cmac/include/mcu/cmac_timer.h | 30 ++++++-----------------------
 hw/mcu/dialog/cmac/src/cmac_sleep.c         |  5 +++--
 hw/mcu/dialog/cmac/src/cmac_timer.c         | 29 +++++++++-------------------
 3 files changed, 18 insertions(+), 46 deletions(-)

diff --git a/hw/mcu/dialog/cmac/include/mcu/cmac_timer.h b/hw/mcu/dialog/cmac/include/mcu/cmac_timer.h
index 4d5f5d0b0..0c1264733 100644
--- a/hw/mcu/dialog/cmac/include/mcu/cmac_timer.h
+++ b/hw/mcu/dialog/cmac/include/mcu/cmac_timer.h
@@ -149,38 +149,20 @@ cmac_timer_disable_eq_hal_timer(void)
 static inline uint32_t
 cmac_timer_read_eq_hal_os_tick(void)
 {
-    return (CMAC->CM_LL_TIMER1_36_10_EQ_Y_REG << 5) |
-           (CMAC->CM_LL_TIMER1_9_0_EQ_Y_REG >> 5);
+    return (CMAC->CM_LL_TIMER1_EQ_Y_HI_REG << 5) |
+           (CMAC->CM_LL_TIMER1_EQ_Y_LO_REG >> 5);
 }
 
 /* Write comparator value for hal_os_tick callback */
 static inline void
 cmac_timer_write_eq_hal_os_tick(uint32_t val)
 {
-    uint32_t val_36_10;
-
-    val_36_10 = val >> 5;
-    CMAC->CM_LL_TIMER1_36_10_EQ_Y_REG = val_36_10;
-    CMAC->CM_LL_TIMER1_9_0_EQ_Y_REG = val << 5;
-
-    /* If msb comparator is set at least 2 "ticks" ahead, we can enable it here
-     * and then enable lsb comparator on match. Otherwise, we need to enable lsb
-     * comparator here to make sure we do not miss a match in case lsb matches
-     * just after msb (we would not be able to switch from msb to lsb comparator
-     * on time).
-     */
-    if ((int32_t)(val_36_10 - CMAC->CM_LL_TIMER1_36_10_REG) >= 2) {
-        CMAC->CM_LL_INT_MSK_SET_REG = CMAC_CM_LL_INT_MSK_SET_REG_LL_TIMER1_36_10_EQ_Y_SEL_Msk;
-        CMAC->CM_LL_INT_MSK_CLR_REG = CMAC_CM_LL_INT_MSK_CLR_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk;
-    } else {
-        CMAC->CM_LL_INT_MSK_CLR_REG = CMAC_CM_LL_INT_MSK_CLR_REG_LL_TIMER1_36_10_EQ_Y_SEL_Msk;
-        CMAC->CM_LL_INT_MSK_SET_REG = CMAC_CM_LL_INT_MSK_SET_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk;
-    }
+    CMAC->CM_LL_TIMER1_EQ_Y_HI_REG = val >> 5;
+    CMAC->CM_LL_TIMER1_EQ_Y_LO_REG = val << 5;
+    CMAC->CM_LL_INT_MSK_SET_REG = CMAC_CM_LL_INT_MSK_SET_REG_LL_TIMER1_EQ_Y_SEL_Msk;
 
     if ((int32_t)(val - cmac_timer_read32_msb()) <= 0) {
-        CMAC->CM_LL_INT_MSK_CLR_REG = CMAC_CM_LL_INT_MSK_CLR_REG_LL_TIMER1_36_10_EQ_Y_SEL_Msk;
-        CMAC->CM_LL_INT_MSK_CLR_REG = CMAC_CM_LL_INT_MSK_CLR_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk;
-        cm_ll_int_stat_reg = CMAC_CM_LL_INT_STAT_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk;
+        cm_ll_int_stat_reg = CMAC_CM_LL_INT_STAT_REG_LL_TIMER1_EQ_Y_SEL_Msk;
         NVIC_SetPendingIRQ(LL_TIMER2LLC_IRQn);
     }
 }
diff --git a/hw/mcu/dialog/cmac/src/cmac_sleep.c b/hw/mcu/dialog/cmac/src/cmac_sleep.c
index bcf6c12d4..cc78f7047 100644
--- a/hw/mcu/dialog/cmac/src/cmac_sleep.c
+++ b/hw/mcu/dialog/cmac/src/cmac_sleep.c
@@ -42,8 +42,9 @@ static __IOM uint32_t * const retained_regs[] = {
     &CMAC->CM_LL_INT_SEL_REG,
     &CMAC->CM_LL_TIMER1_EQ_X_HI_REG,
     &CMAC->CM_LL_TIMER1_EQ_X_LO_REG,
-    &CMAC->CM_LL_TIMER1_36_10_EQ_Y_REG,
-    &CMAC->CM_LL_TIMER1_9_0_EQ_Y_REG,
+    &CMAC->CM_LL_TIMER1_EQ_Y_HI_REG,
+    &CMAC->CM_LL_TIMER1_EQ_Y_LO_REG,
+    &CMAC->CM_LL_TIMER1_EQ_Y_CTRL_REG,
     &CMAC->CM_ERROR_DIS_REG,
 #if MYNEWT_VAL(CMAC_DEBUG_DIAG_ENABLE)
     &CMAC->CM_DIAG_PORT0_REG,
diff --git a/hw/mcu/dialog/cmac/src/cmac_timer.c b/hw/mcu/dialog/cmac/src/cmac_timer.c
index 569c3f6d4..1820362ee 100644
--- a/hw/mcu/dialog/cmac/src/cmac_timer.c
+++ b/hw/mcu/dialog/cmac/src/cmac_timer.c
@@ -50,7 +50,6 @@ void
 LL_TIMER2LLC_IRQHandler(void)
 {
     uint32_t int_stat;
-    uint32_t val;
 
     /* Clear interrupt now since callback may set comparators again */
     int_stat = CMAC->CM_LL_INT_STAT_REG | cm_ll_int_stat_reg;
@@ -62,16 +61,8 @@ LL_TIMER2LLC_IRQHandler(void)
         cmac_timer_int_hal_timer();
     }
 
-    if (int_stat & CMAC_CM_LL_INT_STAT_REG_LL_TIMER1_36_10_EQ_Y_SEL_Msk) {
-        CMAC->CM_LL_INT_MSK_CLR_REG = CMAC_CM_LL_INT_MSK_CLR_REG_LL_TIMER1_36_10_EQ_Y_SEL_Msk;
-        CMAC->CM_LL_INT_MSK_SET_REG = CMAC_CM_LL_INT_MSK_SET_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk;
-    }
-
-    if (int_stat & CMAC_CM_LL_INT_STAT_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk) {
-        val = cmac_timer_read_eq_hal_os_tick();
-        if ((int32_t)(val - cmac_timer_read32_msb()) <= 0) {
-            cmac_timer_int_hal_os_tick();
-        }
+    if (int_stat & CMAC_CM_LL_INT_STAT_REG_LL_TIMER1_EQ_Y_SEL_Msk) {
+        cmac_timer_int_hal_os_tick();
     }
 }
 
@@ -285,15 +276,14 @@ cmac_timer_init(void)
     /* Make sure LL Timer does not use limited range */
     assert(CMAC->CM_CTRL2_REG & CMAC_CM_CTRL2_REG_LL_TIMER1_9_0_LIMITED_N_Msk);
 
-    CMAC->CM_LL_TIMER1_EQ_Y_CTRL_REG = 7;
-
     /*
      * Set EQ_X and EQ_Y comparators to trigger LL_TIMER2LLC interrupt.
      * They are used for hal_timer and os_tick respectively.
+     * Set EQ_Y to match on all 37 bits.
      */
     CMAC->CM_LL_INT_SEL_REG |= CMAC_CM_LL_INT_SEL_REG_LL_TIMER1_EQ_X_SEL_Msk |
-                               CMAC_CM_LL_INT_SEL_REG_LL_TIMER1_36_10_EQ_Y_SEL_Msk |
-                               CMAC_CM_LL_INT_SEL_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk;
+                               CMAC_CM_LL_INT_SEL_REG_LL_TIMER1_EQ_Y_SEL_Msk;
+    CMAC->CM_LL_TIMER1_EQ_Y_CTRL_REG = 0x7f;
 
     switch_to_llt();
 
@@ -403,7 +393,7 @@ cmac_timer_int_os_tick_register(cmac_timer_int_func_t func)
 void
 cmac_timer_int_os_tick_clear(void)
 {
-    CMAC->CM_LL_INT_STAT_REG = CMAC_CM_LL_INT_STAT_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk;
+    CMAC->CM_LL_INT_STAT_REG = CMAC_CM_LL_INT_STAT_REG_LL_TIMER1_EQ_Y_SEL_Msk;
 }
 
 uint32_t
@@ -431,10 +421,9 @@ cmac_timer_next_at(void)
         to_next = min(to_next, reg32 - val32);
     }
 
-    if (mask & (CMAC_CM_LL_INT_MSK_SET_REG_LL_TIMER1_36_10_EQ_Y_SEL_Msk |
-                CMAC_CM_LL_INT_MSK_SET_REG_LL_TIMER1_9_0_EQ_Y_SEL_Msk)) {
-        reg32 = (CMAC->CM_LL_TIMER1_36_10_EQ_Y_REG << 10) |
-                CMAC->CM_LL_TIMER1_9_0_EQ_Y_REG;
+    if (mask & CMAC_CM_LL_INT_MSK_SET_REG_LL_TIMER1_EQ_Y_SEL_Msk) {
+        reg32 = (CMAC->CM_LL_TIMER1_EQ_Y_HI_REG << 10) |
+                CMAC->CM_LL_TIMER1_EQ_Y_LO_REG;
         to_next = min(to_next, reg32 - val32);
     }
 


[mynewt-core] 02/03: hw/drivers/ipc_cmac: Calculate assert file in-place

Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.

andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git

commit cbc12d27eadafe2661ac10883e3e300c4500b239
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Mon Jun 19 23:12:52 2023 +0200

    hw/drivers/ipc_cmac: Calculate assert file in-place
    
    This updates assert_file in coredump struct in-place instead of storing
    it in local variable. It allows to easily restore this value in debugger
    since it will not be optimized-out by compiler.
---
 hw/drivers/ipc_cmac/src/shm_hs.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/hw/drivers/ipc_cmac/src/shm_hs.c b/hw/drivers/ipc_cmac/src/shm_hs.c
index f93915bac..444de258a 100644
--- a/hw/drivers/ipc_cmac/src/shm_hs.c
+++ b/hw/drivers/ipc_cmac/src/shm_hs.c
@@ -109,7 +109,6 @@ static void
 cmac2sys_isr(void)
 {
     volatile struct cmac_shm_crashinfo *ci = g_cmac_shm_crashinfo;
-    const char *assert_file;
 
     os_trace_isr_enter();
 
@@ -128,11 +127,10 @@ cmac2sys_isr(void)
                 console_printf("  assert:0x%08lx\n", ci->assert);
                 if (ci->assert_file) {
                     /* Need to translate pointer from M0 code segment to M33 data */
-                    assert_file =
-                        ci->assert_file + MCU_MEM_SYSRAM_START_ADDRESS +
-                        MEMCTRL->CMI_CODE_BASE_REG;
+                    ci->assert_file += MCU_MEM_SYSRAM_START_ADDRESS +
+                                       MEMCTRL->CMI_CODE_BASE_REG;
                     console_printf("         %s:%d\n",
-                                   assert_file, (unsigned)ci->assert_line);
+                                   ci->assert_file, (unsigned)ci->assert_line);
                 }
             }
             console_printf("  0x%08lx CM_ERROR_REG\n", ci->CM_ERROR_REG);


[mynewt-core] 03/03: hw/drivers/ipc_cmac: Capture more registers in coredump

Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.

andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git

commit d6b211cf5149a25439a873ac3f7e0d064f2ebe04
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Mon Jun 19 23:35:57 2023 +0200

    hw/drivers/ipc_cmac: Capture more registers in coredump
    
    Add interrupt status and comparators values to coredump struct.
---
 hw/drivers/ipc_cmac/include/ipc_cmac/shm.h            | 5 +++++
 hw/mcu/dialog/cmac/src/arch/cortex_m0_cmac/os_fault.c | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/hw/drivers/ipc_cmac/include/ipc_cmac/shm.h b/hw/drivers/ipc_cmac/include/ipc_cmac/shm.h
index c28f32798..376095366 100644
--- a/hw/drivers/ipc_cmac/include/ipc_cmac/shm.h
+++ b/hw/drivers/ipc_cmac/include/ipc_cmac/shm.h
@@ -104,6 +104,11 @@ struct cmac_shm_crashinfo {
     uint32_t CM_LL_TIMER1_9_0_REG;
     uint32_t CM_ERROR_REG;
     uint32_t CM_EXC_STAT_REG;
+    uint32_t CM_LL_INT_STAT_REG;
+    uint32_t CM_LL_TIMER1_EQ_X_HI_REG;
+    uint32_t CM_LL_TIMER1_EQ_X_LO_REG;
+    uint32_t CM_LL_TIMER1_EQ_Y_HI_REG;
+    uint32_t CM_LL_TIMER1_EQ_Y_LO_REG;
 };
 
 struct cmac_shm_debugdata {
diff --git a/hw/mcu/dialog/cmac/src/arch/cortex_m0_cmac/os_fault.c b/hw/mcu/dialog/cmac/src/arch/cortex_m0_cmac/os_fault.c
index 1c1be9212..c55f7a97a 100644
--- a/hw/mcu/dialog/cmac/src/arch/cortex_m0_cmac/os_fault.c
+++ b/hw/mcu/dialog/cmac/src/arch/cortex_m0_cmac/os_fault.c
@@ -203,6 +203,11 @@ os_default_irq(struct trap_frame *tf)
     ci->CM_LL_TIMER1_9_0_REG = CMAC->CM_LL_TIMER1_9_0_REG;
     ci->CM_ERROR_REG = CMAC->CM_ERROR_REG;
     ci->CM_EXC_STAT_REG = CMAC->CM_EXC_STAT_REG;
+    ci->CM_LL_INT_STAT_REG = CMAC->CM_LL_INT_STAT_REG;
+    ci->CM_LL_TIMER1_EQ_X_HI_REG = CMAC->CM_LL_TIMER1_EQ_X_HI_REG;
+    ci->CM_LL_TIMER1_EQ_X_LO_REG = CMAC->CM_LL_TIMER1_EQ_X_LO_REG;
+    ci->CM_LL_TIMER1_EQ_Y_HI_REG = CMAC->CM_LL_TIMER1_EQ_Y_HI_REG;
+    ci->CM_LL_TIMER1_EQ_Y_LO_REG = CMAC->CM_LL_TIMER1_EQ_Y_LO_REG;
 #endif
 
 #if MYNEWT_VAL(MCU_DEBUG_HCI_EVENT_ON_FAULT)