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Posted to commits@kudu.apache.org by al...@apache.org on 2023/01/16 06:17:23 UTC
[kudu] branch master updated (76ac5b89a -> 04fac3207)
This is an automated email from the ASF dual-hosted git repository.
alexey pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/kudu.git
from 76ac5b89a [KUDU-3430] Implement getting flags filter logic in tool side
new ffc5ffc2f Adds ppc64le to architectures which do not support avx2
new 04fac3207 [codegen] update CodegenTest.TestDumpMC for ppc64le
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Summary of changes:
src/kudu/cfile/bitshuffle_arch_wrapper.cc | 2 +-
src/kudu/codegen/codegen-test.cc | 10 ++++++----
2 files changed, 7 insertions(+), 5 deletions(-)
[kudu] 01/02: Adds ppc64le to architectures which do not support avx2
Posted by al...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
alexey pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/kudu.git
commit ffc5ffc2fb1c9358e0e2a5bfcc32d92ac8bca761
Author: harinreddy <hn...@us.ibm.com>
AuthorDate: Sun Sep 18 22:28:03 2022 -0500
Adds ppc64le to architectures which do not support avx2
__powerpc64__ preprocessor flag is added to the list of architectures
in the #if statement which skips avx2 based code generation for
architectures which do not this feature.
Changes to be committed:
modified: src/kudu/cfile/bitshuffle_arch_wrapper.cc#
Change-Id: I3477193cb966402099a8ce9a7f98702c3107d1e6
Reviewed-on: http://gerrit.cloudera.org:8080/19014
Tested-by: Kudu Jenkins
Reviewed-by: Alexey Serbin <al...@apache.org>
---
src/kudu/cfile/bitshuffle_arch_wrapper.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/kudu/cfile/bitshuffle_arch_wrapper.cc b/src/kudu/cfile/bitshuffle_arch_wrapper.cc
index 1889a4cb9..478d79b43 100644
--- a/src/kudu/cfile/bitshuffle_arch_wrapper.cc
+++ b/src/kudu/cfile/bitshuffle_arch_wrapper.cc
@@ -58,7 +58,7 @@ decltype(&bshuf_decompress_lz4) g_bshuf_decompress_lz4;
// the cost of a 'std::once' call.
__attribute__((constructor))
void SelectBitshuffleFunctions() {
-#if !defined(__APPLE__) && !defined(__aarch64__)
+#if !defined(__APPLE__) && !defined(__aarch64__) && !defined(__powerpc64__)
if (CPU().has_avx2()) {
g_bshuf_compress_lz4_bound = bshuf_compress_lz4_bound_avx2;
g_bshuf_compress_lz4 = bshuf_compress_lz4_avx2;
[kudu] 02/02: [codegen] update CodegenTest.TestDumpMC for ppc64le
Posted by al...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
alexey pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/kudu.git
commit 04fac32072a5bc760485e7a3048f8e8e6ae44239
Author: harinreddy <hn...@us.ibm.com>
AuthorDate: Sun Sep 18 22:31:12 2022 -0500
[codegen] update CodegenTest.TestDumpMC for ppc64le
The equivalent of x86_64's "retq" assembler instruction on ppc64le
is "blr".
Change-Id: I81933185665a131200ea8ac4e0cc323e6226a355
Reviewed-on: http://gerrit.cloudera.org:8080/19015
Tested-by: Kudu Jenkins
Reviewed-by: Alexey Serbin <al...@apache.org>
---
src/kudu/codegen/codegen-test.cc | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/kudu/codegen/codegen-test.cc b/src/kudu/codegen/codegen-test.cc
index 8d5bc9d31..dfde2297f 100644
--- a/src/kudu/codegen/codegen-test.cc
+++ b/src/kudu/codegen/codegen-test.cc
@@ -382,11 +382,13 @@ TEST_F(CodegenTest, TestDumpMC) {
const vector<string>& msgs = sink.logged_msgs();
ASSERT_EQ(msgs.size(), 1);
- #ifndef __aarch64__
- EXPECT_THAT(msgs[0], testing::ContainsRegex("retq"));
- #else
+#if defined(__powerpc__)
+ EXPECT_THAT(msgs[0], testing::ContainsRegex("blr"));
+#elif defined(__aarch64__)
EXPECT_THAT(msgs[0], testing::ContainsRegex("ret"));
- #endif //__aarch64__
+#else
+ EXPECT_THAT(msgs[0], testing::ContainsRegex("retq"));
+#endif // #if defined(__powerpc__) ... #elif defined(__aarch64__) ... #else ...
}
// Basic test for the CompilationManager code cache.