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Posted to commits@mynewt.apache.org by an...@apache.org on 2022/02/25 14:52:00 UTC
[mynewt-core] 01/03: hw/mcu/nrf51: Add common startup code
This is an automated email from the ASF dual-hosted git repository.
andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 290193add8faa17b7717c7840e203071b7804595
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Thu Feb 24 21:57:07 2022 +0100
hw/mcu/nrf51: Add common startup code
This adds common startup code to nRF51 package so it can be reused by
BSP. This avoids multiple duplicates of the same file in all BSPs.
Also proper configuration is added so standard and split startup code
is not included in build at the same time. This fixes issue when link
option -whole-archive is used.
---
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 --------------
hw/bsp/bbc_microbit/syscfg.yml | 4 +
.../ble400/src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 --------------
hw/bsp/ble400/syscfg.yml | 4 +
hw/bsp/bmd200/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 280 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 182 -------------
hw/bsp/calliope_mini/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 184 -------------
hw/bsp/nordic_pca10028-16k/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 --------------
hw/bsp/nordic_pca10028/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 284 ---------------------
hw/bsp/nrf51-arduino_101/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 --------------
hw/bsp/nrf51-blenano/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 182 -------------
hw/bsp/vbluno51/syscfg.yml | 4 +
hw/mcu/nordic/nrf51xxx/pkg.yml | 5 +
.../nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s} | 6 +
.../src/arch/cortex_m0/gcc_startup_cm0_split.s} | 6 +
hw/mcu/nordic/nrf51xxx/syscfg.yml | 38 ++-
28 files changed, 79 insertions(+), 3562 deletions(-)
diff --git a/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 7b53105..0000000
--- a/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index 171f66f..0000000
--- a/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/bbc_microbit/syscfg.yml b/hw/bsp/bbc_microbit/syscfg.yml
index c753515..d5f242a 100644
--- a/hw/bsp/bbc_microbit/syscfg.yml
+++ b/hw/bsp/bbc_microbit/syscfg.yml
@@ -105,6 +105,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 33463cd..0000000
--- a/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index ddcf4a4..0000000
--- a/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/ble400/syscfg.yml b/hw/bsp/ble400/syscfg.yml
index a398a86..30af892 100644
--- a/hw/bsp/ble400/syscfg.yml
+++ b/hw/bsp/ble400/syscfg.yml
@@ -101,6 +101,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/bmd200/syscfg.yml b/hw/bsp/bmd200/syscfg.yml
index e331b8c..9b57361 100644
--- a/hw/bsp/bmd200/syscfg.yml
+++ b/hw/bsp/bmd200/syscfg.yml
@@ -101,6 +101,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index e58e8bc..0000000
--- a/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index c347187..0000000
--- a/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/calliope_mini/syscfg.yml b/hw/bsp/calliope_mini/syscfg.yml
index 00e6d8a..0dcdb68 100644
--- a/hw/bsp/calliope_mini/syscfg.yml
+++ b/hw/bsp/calliope_mini/syscfg.yml
@@ -93,6 +93,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_FCB_CONF
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_FCB_LOG
diff --git a/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index a6c2611..0000000
--- a/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 384
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index e7cebd0..0000000
--- a/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 384
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/nordic_pca10028-16k/syscfg.yml b/hw/bsp/nordic_pca10028-16k/syscfg.yml
index 1da2668..cc00ded 100644
--- a/hw/bsp/nordic_pca10028-16k/syscfg.yml
+++ b/hw/bsp/nordic_pca10028-16k/syscfg.yml
@@ -113,6 +113,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822-16K MCU and common startup code
+ MCU_TARGET: nRF51822_16K
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 42dbc9c..0000000
--- a/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index f9a6fd0..0000000
--- a/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/nordic_pca10028/syscfg.yml b/hw/bsp/nordic_pca10028/syscfg.yml
index 1da2668..d8f49d4 100644
--- a/hw/bsp/nordic_pca10028/syscfg.yml
+++ b/hw/bsp/nordic_pca10028/syscfg.yml
@@ -113,6 +113,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nrf51-arduino_101/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nrf51-arduino_101/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 1bcd1bc..0000000
--- a/hw/bsp/nrf51-arduino_101/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 384
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/nrf51-arduino_101/syscfg.yml b/hw/bsp/nrf51-arduino_101/syscfg.yml
index f4ddda3..2c18a6f 100644
--- a/hw/bsp/nrf51-arduino_101/syscfg.yml
+++ b/hw/bsp/nrf51-arduino_101/syscfg.yml
@@ -101,6 +101,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 7b53105..0000000
--- a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index 171f66f..0000000
--- a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/nrf51-blenano/syscfg.yml b/hw/bsp/nrf51-blenano/syscfg.yml
index c5b3e0d..ce68059 100644
--- a/hw/bsp/nrf51-blenano/syscfg.yml
+++ b/hw/bsp/nrf51-blenano/syscfg.yml
@@ -103,6 +103,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 42dbc9c..0000000
--- a/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index ec41c56..0000000
--- a/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/vbluno51/syscfg.yml b/hw/bsp/vbluno51/syscfg.yml
index b8f2736..7645f63 100644
--- a/hw/bsp/vbluno51/syscfg.yml
+++ b/hw/bsp/vbluno51/syscfg.yml
@@ -101,6 +101,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/mcu/nordic/nrf51xxx/pkg.yml b/hw/mcu/nordic/nrf51xxx/pkg.yml
index cc2fac8..9c77756 100644
--- a/hw/mcu/nordic/nrf51xxx/pkg.yml
+++ b/hw/mcu/nordic/nrf51xxx/pkg.yml
@@ -30,5 +30,10 @@ pkg.deps:
- "@apache-mynewt-core/hw/cmsis-core"
- "@apache-mynewt-core/hw/hal"
+pkg.ign_files.'!MCU_COMMON_STARTUP || SPLIT_LOADER':
+ - gcc_startup_cm0.s
+pkg.ign_files.'!MCU_COMMON_STARTUP || !SPLIT_LOADER':
+ - gcc_startup_cm0_split.s
+
pkg.deps.BLE_CONTROLLER:
- "@apache-mynewt-nimble/nimble/drivers/nrf51"
diff --git a/hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s
similarity index 98%
rename from hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51.s
rename to hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s
index 33463cd..c8fd8f6 100644
--- a/hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ b/hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s
@@ -33,12 +33,18 @@ NOTE: Template files (including this one) are application specific and therefore
expected to be copied into the application project folder prior to its use!
*/
+#include <syscfg/syscfg.h>
+
.syntax unified
.arch armv6-m
.section .stack
.align 3
+#if MYNEWT_VAL_CHOICE(MCU_TARGET, nRF51822_16K)
+ .equ Stack_Size, 384
+#else
.equ Stack_Size, 432
+#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
diff --git a/hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0_split.s
similarity index 97%
rename from hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51_split.s
rename to hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0_split.s
index ddcf4a4..35e2e47 100644
--- a/hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ b/hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0_split.s
@@ -33,12 +33,18 @@ NOTE: Template files (including this one) are application specific and therefore
expected to be copied into the application project folder prior to its use!
*/
+#include <syscfg/syscfg.h>
+
.syntax unified
.arch armv6-m
.section .stack
.align 3
+#if MYNEWT_VAL_CHOICE(MCU_TARGET, nRF51822_16K)
+ .equ Stack_Size, 384
+#else
.equ Stack_Size, 432
+#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
diff --git a/hw/mcu/nordic/nrf51xxx/syscfg.yml b/hw/mcu/nordic/nrf51xxx/syscfg.yml
index ebac618..4f277f9 100644
--- a/hw/mcu/nordic/nrf51xxx/syscfg.yml
+++ b/hw/mcu/nordic/nrf51xxx/syscfg.yml
@@ -17,18 +17,13 @@
#
syscfg.defs:
- I2C_0:
- description: 'I2C (TWI) interface 0'
- value: 0
- restrictions:
- - "!SPI_0_MASTER"
- - "!SPI_0_SLAVE"
- I2C_1:
- description: 'I2C (TWI) interface 1'
- value: 0
- restrictions:
- - "!SPI_1_MASTER"
- - "!SPI_1_SLAVE"
+ MCU_TARGET:
+ description: >
+ Specifies target MCU, shall be set by BSP.
+ value: nRF51822
+ choices:
+ - nRF51822
+ - nRF51822_16K
MCU_FLASH_MIN_WRITE_SIZE:
description: >
@@ -43,6 +38,25 @@ syscfg.defs:
expected to be overridden by the BSP.
value: 0
+ MCU_COMMON_STARTUP:
+ description: >
+ Enables generic startup code. This allows BSP to not include own
+ startup code.
+ value: 0
+
+ I2C_0:
+ description: 'I2C (TWI) interface 0'
+ value: 0
+ restrictions:
+ - "!SPI_0_MASTER"
+ - "!SPI_0_SLAVE"
+ I2C_1:
+ description: 'I2C (TWI) interface 1'
+ value: 0
+ restrictions:
+ - "!SPI_1_MASTER"
+ - "!SPI_1_SLAVE"
+
SPI_0_MASTER:
description: 'SPI 0 master'
value: 0