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Posted to commits@nuttx.apache.org by "davids5 (via GitHub)" <gi...@apache.org> on 2024/04/30 12:51:33 UTC
[PR] imxrt:Add DMA preflight Support [nuttx]
davids5 opened a new pull request, #12268:
URL: https://github.com/apache/nuttx/pull/12268
## Summary
With CONFIG_MMCSD_MULTIBLOCK_LIMIT not set. (No limit)
The DMA driver would overwrite the internal buffer.
By adding CONFIG_ARCH_HAVE_SDIO_PREFLIGHT and
CONFIG_FAT_DMAMEMORY we can insure alignment and
maximize performance using no CONFIG_MMCSD_MULTIBLOCK_LIMIT
## Impact
Fixes hardfault if CONFIG_MMCSD_MULTIBLOCK_LIMIT !=1 and improves performance.
## Testing
px4_fmu-v6xrt
```
nsh> sd_bench
INFO [sd_bench] Using block size = 4096 bytes, sync=0
INFO [sd_bench]
INFO [sd_bench] Testing Sequential Write Speed...
INFO [sd_bench] Run 0: 1332.81 KB/s, max write time: 115 ms (= 34.78 KB/s), fsync: 7 ms
INFO [sd_bench] Run 1: 1273.16 KB/s, max write time: 117 ms (= 34.19 KB/s), fsync: 9 ms
INFO [sd_bench] Run 2: 1462.41 KB/s, max write time: 10 ms (= 400.00 KB/s), fsync: 9 ms
INFO [sd_bench] Run 3: 1437.76 KB/s, max write time: 12 ms (= 333.33 KB/s), fsync: 7 ms
INFO [sd_bench] Run 4: 1463.13 KB/s, max write time: 10 ms (= 400.00 KB/s), fsync: 7 ms
INFO [sd_bench] Avg : 1393.83 KB/s
INFO [sd_bench] Overall max write time: 117 ms
nsh> sd_bench -u
Block ptr 0x2029b681
INFO [sd_bench] Using block size = 4096 bytes, sync=0
INFO [sd_bench]
INFO [sd_bench] Testing Sequential Write Speed...
INFO [sd_bench] Run 0: 326.11 KB/s, max write time: 20 ms (= 200.00 KB/s), fsync: 7 ms
INFO [sd_bench] Run 1: 324.69 KB/s, max write time: 20 ms (= 200.00 KB/s), fsync: 7 ms
INFO [sd_bench] Run 2: 326.63 KB/s, max write time: 20 ms (= 200.00 KB/s), fsync: 7 ms
INFO [sd_bench] Run 3: 325.95 KB/s, max write time: 20 ms (= 200.00 KB/s), fsync: 8 ms
INFO [sd_bench] Run 4: 324.71 KB/s, max write time: 21 ms (= 190.48 KB/s), fsync: 7 ms
INFO [sd_bench] Avg : 325.62 KB/s
INFO [sd_bench] Overall max write time: 21 ms
```
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Re: [PR] imxrt:Add DMA preflight Support [nuttx]
Posted by "acassis (via GitHub)" <gi...@apache.org>.
acassis merged PR #12268:
URL: https://github.com/apache/nuttx/pull/12268
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Re: [PR] imxrt:Add DMA preflight Support [nuttx]
Posted by "acassis (via GitHub)" <gi...@apache.org>.
acassis commented on code in PR #12268:
URL: https://github.com/apache/nuttx/pull/12268#discussion_r1584915796
##########
arch/arm/src/imxrt/imxrt_usdhc.c:
##########
@@ -2911,6 +2921,61 @@ static int imxrt_registercallback(struct sdio_dev_s *dev,
return OK;
}
+/****************************************************************************
+ * Name: imxrt_dmapreflight
+ *
+ * Description:
+ * Preflight an SDIO DMA operation. If the buffer is not well-formed for
+ * SDIO DMA transfer (alignment, size, etc.) returns an error.
+ *
+ * Input Parameters:
+ * dev - An instance of the SDIO device interface
+ * buffer - The memory to DMA to/from
+ * buflen - The size of the DMA transfer in bytes
+ *
+ * Returned Value:
+ * OK on success; a negated errno on failure
+ ****************************************************************************/
+
+#if defined(CONFIG_IMXRT_USDHC_DMA) && defined(CONFIG_ARCH_HAVE_SDIO_PREFLIGHT)
+static int imxrt_dmapreflight(struct sdio_dev_s *dev,
+ const uint8_t *buffer, size_t buflen)
+{
+ struct imxrt_dev_s *priv = (struct imxrt_dev_s *)dev;
+ DEBUGASSERT(priv != NULL && buflen > 0);
+
+ /* DMA must be possible to the buffer and it must be word (4 bytes) aligned
+ */
+
+ if (buffer != priv->rxbuffer && ((uintptr_t)buffer & 3) != 0)
+ {
+ mcerr("non word aligned buffer:%p\n", buffer);
+ return -EFAULT;
+ }
+
+#if defined(CONFIG_ARMV7M_DCACHE)
+ /* buffer alignment is required for DMA transfers with dcache in buffered
+ * mode (not write-through) because a) arch_invalidate_dcache could lose
+ * buffered writes and b) arch_flush_dcache could corrupt adjacent memory
+ * if the maddr and the mend+1, the next next address are not on
+ * ARMV7M_DCACHE_LINESIZE boundaries.
+ */
+
+ if (buffer != priv->rxbuffer &&
+ (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE - 1)) != 0 ||
+ ((uintptr_t)(buffer + buflen) & (ARMV7M_DCACHE_LINESIZE - 1)) != 0))
+ {
+ mcerr("dcache unaligned "
+ "buffer:%p end:%p\n",
Review Comment:
Please keep it in a single line, it will fit under 78 columns limit
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