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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/10/26 13:56:25 UTC
[incubator-nuttx] branch master updated (b60b48411c -> dfcfce24f6)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
from b60b48411c net/ipforward: correct application data offset
new bc432118b0 New files for pysimCoder
new dfcfce24f6 New configuration for CAN bus
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
.../nucleo-144/configs/f746-pysim/defconfig | 77 ++++++++++++----------
boards/arm/stm32f7/nucleo-144/include/board.h | 27 +++++---
boards/arm/stm32f7/nucleo-144/src/nucleo-144.h | 30 +++++----
boards/arm/stm32f7/nucleo-144/src/stm32_adc.c | 9 ++-
.../stm32f7/nucleo-144/src/stm32_appinitialize.c | 1 +
boards/arm/stm32f7/nucleo-144/src/stm32_bringup.c | 29 +++++++-
boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c | 4 ++
7 files changed, 115 insertions(+), 62 deletions(-)
[incubator-nuttx] 01/02: New files for pysimCoder
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit bc432118b01bc2587c77e11e70aae86ee1d31bb4
Author: Roberto Bucher <ro...@supsi.ch>
AuthorDate: Wed Oct 26 07:08:41 2022 +0200
New files for pysimCoder
---
.../nucleo-144/configs/f746-pysim/defconfig | 76 ++++++++++++----------
boards/arm/stm32f7/nucleo-144/include/board.h | 27 +++++---
boards/arm/stm32f7/nucleo-144/src/nucleo-144.h | 30 +++++----
boards/arm/stm32f7/nucleo-144/src/stm32_adc.c | 9 ++-
.../stm32f7/nucleo-144/src/stm32_appinitialize.c | 1 +
boards/arm/stm32f7/nucleo-144/src/stm32_bringup.c | 29 ++++++++-
boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c | 4 ++
7 files changed, 114 insertions(+), 62 deletions(-)
diff --git a/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig b/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig
index f6651dd934..caa6478b23 100644
--- a/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig
+++ b/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig
@@ -5,10 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
-# CONFIG_ARCH_LEDS is not set
-# CONFIG_DISABLE_OS_API is not set
-# CONFIG_NSH_DISABLE_IFCONFIG is not set
-# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NDEBUG is not set
# CONFIG_STM32F7_DTCMEXCLUDE is not set
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=16
@@ -20,6 +17,7 @@ CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f7"
CONFIG_ARCH_CHIP_STM32F746ZG=y
CONFIG_ARCH_CHIP_STM32F7=y
+CONFIG_ARCH_RAMVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
@@ -29,27 +27,28 @@ CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_CAN_USE_RTR=y
+CONFIG_DEBUG_NOOPT=y
+CONFIG_DEFAULT_TASK_STACKSIZE=4096
CONFIG_DEV_GPIO=y
-CONFIG_DRVR_READAHEAD=y
CONFIG_ETH0_PHY_LAN8742A=y
-CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_TMPFS=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_MAX_TASKS=16
+CONFIG_FS_PROCFS_REGISTER=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
-CONFIG_IOEXPANDER=y
-CONFIG_IOEXPANDER_MULTIPIN=y
+CONFIG_LIBC_EXECFUNCS=y
+CONFIG_LIBC_STRERROR=y
CONFIG_LIBM=y
CONFIG_MM_REGIONS=2
CONFIG_MODULE=y
-CONFIG_MQ_MAXMSGSIZE=256
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETINIT_DHCPC=y
CONFIG_NETINIT_DRIPADDR=0xc0a8b201
-CONFIG_NETINIT_IPADDR=0xc0a8b2b2
CONFIG_NETUTILS_DISCOVER=y
CONFIG_NETUTILS_TELNETD=y
-CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
@@ -65,42 +64,50 @@ CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
+CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
+CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
CONFIG_NUCLEO_CONSOLE_VIRTUAL=y
-CONFIG_PIPES=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PRIORITY_INHERITANCE=y
+CONFIG_PSEUDOTERM=y
+CONFIG_PTHREAD_CLEANUP=y
CONFIG_PTHREAD_MUTEX_DEFAULT_PRIO_INHERIT=y
+CONFIG_PTHREAD_MUTEX_TYPES=y
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+CONFIG_PTHREAD_STACK_MIN=1024
CONFIG_PWM=y
CONFIG_PWM_MULTICHAN=y
-CONFIG_PWM_NCHANNELS=4
+CONFIG_PWM_NCHANNELS=2
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y
-CONFIG_RR_INTERVAL=200
+CONFIG_RR_INTERVAL=10
CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
CONFIG_SCHED_WAITPID=y
CONFIG_SENSORS=y
CONFIG_SENSORS_QENCODER=y
+CONFIG_SERIAL_TERMIOS=y
+CONFIG_SPI=y
CONFIG_START_DAY=30
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2015
CONFIG_STM32F7_ADC1=y
CONFIG_STM32F7_ADC1_DMA=y
CONFIG_STM32F7_ADC1_SAMPLE_FREQUENCY=5000
-CONFIG_STM32F7_ADC_NO_STARTUP_CONV=y
+CONFIG_STM32F7_ADC1_TIMTRIG=1
CONFIG_STM32F7_CAN1=y
CONFIG_STM32F7_CAN1_BAUD=500000
CONFIG_STM32F7_CAN_TSEG1=5
CONFIG_STM32F7_CAN_TSEG2=6
CONFIG_STM32F7_DMA1=y
CONFIG_STM32F7_DMA2=y
-CONFIG_STM32F7_DMACAPABLE=y
CONFIG_STM32F7_ETHMAC=y
CONFIG_STM32F7_PHYADDR=0
CONFIG_STM32F7_PHYSR=31
@@ -111,26 +118,29 @@ CONFIG_STM32F7_PHYSR_10HD=0x0004
CONFIG_STM32F7_PHYSR_ALTCONFIG=y
CONFIG_STM32F7_PHYSR_ALTMODE=0x001c
CONFIG_STM32F7_PWM_MULTICHAN=y
-CONFIG_STM32F7_SYSCFG_IOCOMPENSATION=y
+CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y
+CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y
CONFIG_STM32F7_TIM1=y
-CONFIG_STM32F7_TIM1_ADC=y
+CONFIG_STM32F7_TIM1_CH1NOUT=y
+CONFIG_STM32F7_TIM1_CH1OUT=y
+CONFIG_STM32F7_TIM1_CH2NOUT=y
+CONFIG_STM32F7_TIM1_CH2OUT=y
+CONFIG_STM32F7_TIM1_CHANNEL1=y
+CONFIG_STM32F7_TIM1_CHANNEL2=y
+CONFIG_STM32F7_TIM1_PWM=y
CONFIG_STM32F7_TIM2=y
-CONFIG_STM32F7_TIM2_QE=y
+CONFIG_STM32F7_TIM2_ADC=y
CONFIG_STM32F7_TIM3=y
-CONFIG_STM32F7_TIM3_CH1OUT=y
-CONFIG_STM32F7_TIM3_CH2OUT=y
-CONFIG_STM32F7_TIM3_CH3OUT=y
-CONFIG_STM32F7_TIM3_CH4OUT=y
-CONFIG_STM32F7_TIM3_CHANNEL1=y
-CONFIG_STM32F7_TIM3_CHANNEL2=y
-CONFIG_STM32F7_TIM3_CHANNEL3=y
-CONFIG_STM32F7_TIM3_CHANNEL4=y
-CONFIG_STM32F7_TIM3_PWM=y
+CONFIG_STM32F7_TIM3_QE=y
+CONFIG_STM32F7_TIM4=y
+CONFIG_STM32F7_TIM4_QE=y
+CONFIG_STM32F7_USART_BREAKS=y
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
-CONFIG_SYSTEM_TIME64=y
+CONFIG_SYSTEM_PING_STACKSIZE=2048
CONFIG_TASK_NAME_SIZE=0
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=4098
CONFIG_USART3_SERIAL_CONSOLE=y
-CONFIG_USERLED=y
-CONFIG_USERLED_LOWER=y
+CONFIG_USEC_PER_TICK=1000
+CONFIG_WQUEUE_NOTIFIER=y
diff --git a/boards/arm/stm32f7/nucleo-144/include/board.h b/boards/arm/stm32f7/nucleo-144/include/board.h
index e7cd488f17..a1f95dacc7 100644
--- a/boards/arm/stm32f7/nucleo-144/include/board.h
+++ b/boards/arm/stm32f7/nucleo-144/include/board.h
@@ -334,22 +334,31 @@
* Default is to use timer 8 (16-bit) and encoder on PC6/PC7
* We use here TIM2 with a 32-bit counter on PA15/PB3
*/
+#define GPIO_TIM1_CH1IN GPIO_TIM1_CH1IN_2
+#define GPIO_TIM1_CH2IN GPIO_TIM1_CH2IN_2
+
#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2
#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_2
+#define GPIO_TIM3_CH1IN GPIO_TIM3_CH1IN_2
+#define GPIO_TIM3_CH2IN GPIO_TIM3_CH2IN_2
+
+#define GPIO_TIM4_CH1IN GPIO_TIM4_CH1IN_2
+#define GPIO_TIM4_CH2IN GPIO_TIM4_CH2IN_2
+
/* PWM
- * Use Timer 3
+ * Use Timer 1 or 3
*/
-#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1
-#define GPIO_TIM3_CH2OUT GPIO_TIM3_CH2OUT_1
-#define GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_1
-#define GPIO_TIM3_CH4OUT GPIO_TIM3_CH4OUT_1
+#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2
+#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1NOUT_3
+#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_2
+#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2NOUT_3
-#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1
-#define GPIO_TIM2_CH1OUT GPIO_TIM2_CH1OUT_1
-#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1
-#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_1
+#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_2
+#define GPIO_TIM3_CH2OUT GPIO_TIM3_CH2OUT_2
+#define GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_2
+#define GPIO_TIM3_CH4OUT GPIO_TIM3_CH4OUT_1
#if defined(CONFIG_NUCLEO_CONSOLE_ARDUINO)
diff --git a/boards/arm/stm32f7/nucleo-144/src/nucleo-144.h b/boards/arm/stm32f7/nucleo-144/src/nucleo-144.h
index 012e329b11..7167c784a2 100644
--- a/boards/arm/stm32f7/nucleo-144/src/nucleo-144.h
+++ b/boards/arm/stm32f7/nucleo-144/src/nucleo-144.h
@@ -151,24 +151,26 @@
/* GPIO pins used by the GPIO Subsystem */
#define BOARD_NGPIOIN 4 /* Amount of GPIO Input pins */
-#define BOARD_NGPIOOUT 4 /* Amount of GPIO Output pins */
+#define BOARD_NGPIOOUT 8 /* Amount of GPIO Output pins */
#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
#define GPIO_INT1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN2)
-#define GPIO_IN1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN8)
-#define GPIO_IN2 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN7)
-#define GPIO_IN3 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN10)
-#define GPIO_IN4 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN12)
-
-#define GPIO_OUT1 (GPIO_OUTPUT | GPIO_OUTPUT | GPIO_SPEED_50MHz | \
- GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN13)
-#define GPIO_OUT2 (GPIO_OUTPUT | GPIO_OUTPUT | GPIO_SPEED_50MHz | \
- GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN9)
-#define GPIO_OUT3 (GPIO_OUTPUT | GPIO_OUTPUT | GPIO_SPEED_50MHz | \
- GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN11)
-#define GPIO_OUT4 (GPIO_OUTPUT | GPIO_OUTPUT | GPIO_SPEED_50MHz | \
- GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN14)
+#define GPIO_IN1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN7)
+#define GPIO_IN2 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN12)
+#define GPIO_IN3 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN14)
+#define GPIO_IN4 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTE | GPIO_PIN15)
+
+#define GPIO_OUT1 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
+ GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN4)
+#define GPIO_OUT2 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
+ GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN5)
+#define GPIO_OUT3 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
+ GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN6)
+#define GPIO_OUT4 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
+ GPIO_OUTPUT_SET | GPIO_PORTA |GPIO_PIN5)
+#define GPIO_OUT5 (GPIO_OUTPUT | GPIO_SPEED_50MHz | \
+ GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN12)
/****************************************************************************
* Public Data
diff --git a/boards/arm/stm32f7/nucleo-144/src/stm32_adc.c b/boards/arm/stm32f7/nucleo-144/src/stm32_adc.c
index e765a73365..b85f251538 100644
--- a/boards/arm/stm32f7/nucleo-144/src/stm32_adc.c
+++ b/boards/arm/stm32f7/nucleo-144/src/stm32_adc.c
@@ -65,7 +65,8 @@
/* The number of ADC channels in the conversion list */
-#define ADC1_NCHANNELS 3
+/* #define ADC1_NCHANNELS 14 */
+#define ADC1_NCHANNELS 4
/****************************************************************************
* Private Data
@@ -79,7 +80,7 @@
#ifdef CONFIG_STM32F7_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
- 3, 10, 13
+ 3, 4, 10, 13
};
/* Configurations of pins used byte each ADC channels
@@ -93,9 +94,7 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
- GPIO_ADC1_IN3,
- GPIO_ADC1_IN10,
- GPIO_ADC1_IN13
+ GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN10, GPIO_ADC1_IN13
};
#endif
diff --git a/boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c b/boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c
index 133b027395..13f43ffc48 100644
--- a/boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c
+++ b/boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c
@@ -70,3 +70,4 @@ int board_app_initialize(uintptr_t arg)
}
#endif
+
diff --git a/boards/arm/stm32f7/nucleo-144/src/stm32_bringup.c b/boards/arm/stm32f7/nucleo-144/src/stm32_bringup.c
index 88c44382f2..e78f90a8db 100644
--- a/boards/arm/stm32f7/nucleo-144/src/stm32_bringup.c
+++ b/boards/arm/stm32f7/nucleo-144/src/stm32_bringup.c
@@ -173,8 +173,9 @@ int stm32_bringup(void)
#ifdef CONFIG_SENSORS_QENCODER
char buf[9];
+#ifdef CONFIG_STM32F7_TIM1_QE
sprintf(buf, "/dev/qe0");
- ret = stm32_qencoder_initialize(buf, 2);
+ ret = stm32_qencoder_initialize(buf, 1);
if (ret < 0)
{
syslog(LOG_ERR,
@@ -184,6 +185,32 @@ int stm32_bringup(void)
}
#endif
+#ifdef CONFIG_STM32F7_TIM3_QE
+ sprintf(buf, "/dev/qe2");
+ ret = stm32_qencoder_initialize(buf, 3);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR,
+ "ERROR: Failed to register the qencoder: %d\n",
+ ret);
+ return ret;
+ }
+#endif
+
+#ifdef CONFIG_STM32F7_TIM4_QE
+ sprintf(buf, "/dev/qe3");
+ ret = stm32_qencoder_initialize(buf, 4);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR,
+ "ERROR: Failed to register the qencoder: %d\n",
+ ret);
+ return ret;
+ }
+#endif
+
+#endif
+
#ifdef CONFIG_STM32F7_CAN_CHARDRIVER
ret = stm32_can_setup();
if (ret < 0)
diff --git a/boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c b/boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c
index 32847ea858..01ef7908f4 100644
--- a/boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c
+++ b/boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c
@@ -115,10 +115,14 @@ static struct stm32gpio_dev_s g_gpin[BOARD_NGPIOIN];
static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
{
+ GPIO_LD1,
+ GPIO_LD2,
+ GPIO_LD3,
GPIO_OUT1,
GPIO_OUT2,
GPIO_OUT3,
GPIO_OUT4,
+ GPIO_OUT5,
};
static struct stm32gpio_dev_s g_gpout[BOARD_NGPIOOUT];
[incubator-nuttx] 02/02: New configuration for CAN bus
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit dfcfce24f6d113eb928d0fb87e286defd6f72521
Author: Roberto Bucher <ro...@supsi.ch>
AuthorDate: Wed Oct 26 08:11:03 2022 +0200
New configuration for CAN bus
---
boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig b/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig
index caa6478b23..c89ebe6876 100644
--- a/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig
+++ b/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig
@@ -32,6 +32,7 @@ CONFIG_DEFAULT_TASK_STACKSIZE=4096
CONFIG_DEV_GPIO=y
CONFIG_ETH0_PHY_LAN8742A=y
CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y
CONFIG_FS_PROCFS_MAX_TASKS=16
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_HAVE_CXX=y