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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/03/19 02:59:50 UTC
[incubator-nuttx] 03/03: stm32l5_lse: Drive reduction after start-up
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit a1d0360e5e8c29d9d572f59a69f4b17caa9d2d18
Author: Michael Jung <mi...@gmx.net>
AuthorDate: Thu Mar 18 19:06:25 2021 +0100
stm32l5_lse: Drive reduction after start-up
The LSE crystal oscillator driving strength can only be decreased to the
lower drive capability (LSEDRV = 00b) once the LSE is running, but not
to any other drive capability. Instead of letting the user select a
value between 0 and 3 and then failing the build if the selected value
was not 0, make it a boolean option.
Signed-off-by: Michael Jung <mi...@gmx.net>
---
arch/arm/src/stm32l5/Kconfig | 14 ++++++--------
arch/arm/src/stm32l5/stm32l5_lse.c | 18 ++----------------
2 files changed, 8 insertions(+), 24 deletions(-)
diff --git a/arch/arm/src/stm32l5/Kconfig b/arch/arm/src/stm32l5/Kconfig
index 741eb97..0ec9e6c 100644
--- a/arch/arm/src/stm32l5/Kconfig
+++ b/arch/arm/src/stm32l5/Kconfig
@@ -417,16 +417,14 @@ config STM32L5_RTC_LSECLOCK_START_DRV_CAPABILITY
2 = Medium high drive capability
3 = High drive capability
-config STM32L5_RTC_LSECLOCK_RUN_DRV_CAPABILITY
- int "LSE oscillator drive capability level after LSE start-up"
- default 0
- range 0 3
+config STM32L5_RTC_LSECLOCK_LOWER_RUN_DRV_CAPABILITY
+ bool "Decrease LSE oscillator drive capability after LSE start-up"
+ default n
depends on !STM32L5_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY
---help---
- 0 = Low drive capability (default)
- 1 = Medium low drive capability
- 2 = Medium high drive capability
- 3 = High drive capability
+ The LSE oscillator drive capability can remain at the level used
+ during LSE start-up at run-time, or it can be reduced to the
+ 'Low drive capability' once the LSE started up successfully.
endif # STM32L5_RTC_LSECLOCK
diff --git a/arch/arm/src/stm32l5/stm32l5_lse.c b/arch/arm/src/stm32l5/stm32l5_lse.c
index 852fb30..50f8fd4 100644
--- a/arch/arm/src/stm32l5/stm32l5_lse.c
+++ b/arch/arm/src/stm32l5/stm32l5_lse.c
@@ -63,13 +63,6 @@
#endif
#endif
-#ifdef CONFIG_STM32L5_RTC_LSECLOCK_RUN_DRV_CAPABILITY
-# if CONFIG_STM32L5_RTC_LSECLOCK_RUN_DRV_CAPABILITY < 0 || \
- CONFIG_STM32L5_RTC_LSECLOCK_RUN_DRV_CAPABILITY > 3
-# error "Invalid LSE drive capability setting"
-#endif
-#endif
-
/****************************************************************************
* Private Data
****************************************************************************/
@@ -198,19 +191,12 @@ void stm32l5_rcc_enablelse(void)
}
}
-#if defined(CONFIG_STM32L5_RTC_LSECLOCK_RUN_DRV_CAPABILITY) && \
- CONFIG_STM32L5_RTC_LSECLOCK_START_DRV_CAPABILITY != \
- CONFIG_STM32L5_RTC_LSECLOCK_RUN_DRV_CAPABILITY
-
-# if CONFIG_STM32L5_RTC_LSECLOCK_RUN_DRV_CAPABILITY != 0
-# error "STM32L5 only allows lowering LSE drive capability to zero"
-# endif
+#ifdef CONFIG_STM32L5_RTC_LSECLOCK_LOWER_RUN_DRV_CAPABILITY
/* Set running drive capability for LSE oscillator. */
regval &= ~RCC_BDCR_LSEDRV_MASK;
- regval |= CONFIG_STM32L5_RTC_LSECLOCK_RUN_DRV_CAPABILITY <<
- RCC_BDCR_LSEDRV_SHIFT;
+ regval |= RCC_BDCR_LSEDRV_LOW << RCC_BDCR_LSEDRV_SHIFT;
putreg32(regval, STM32L5_RCC_BDCR);
#endif