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Posted to commits@mynewt.apache.org by na...@apache.org on 2020/09/02 16:33:47 UTC

[mynewt-core] branch ProfileEncFlashWrites created (now 30e4624)

This is an automated email from the ASF dual-hosted git repository.

naveenkaje pushed a change to branch ProfileEncFlashWrites
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git.


      at 30e4624  Profile Enc Flash Writes

This branch includes the following new commits:

     new 30e4624  Profile Enc Flash Writes

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repository and will be described in separate emails.  The revisions
listed as "add" were already present in the repository and have only
been added to this reference.



[mynewt-core] 01/01: Profile Enc Flash Writes

Posted by na...@apache.org.
This is an automated email from the ASF dual-hosted git repository.

naveenkaje pushed a commit to branch ProfileEncFlashWrites
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git

commit 30e4624ff5c36231b0864ee14066bc57cb7f8be1
Author: Naveen Kaje <na...@juul.com>
AuthorDate: Wed Sep 2 06:48:48 2020 -0500

    Profile Enc Flash Writes
---
 .../crypto/crypto_da1469x/src/crypto_da1469x.c     |  8 +++++++
 hw/drivers/crypto/include/crypto/crypto.h          | 17 ++++++++++++++
 .../flash/enc_flash/ef_da1469x/src/hw_enc_flash.c  | 26 ++++++++++++++++++++++
 hw/mcu/dialog/da1469x/src/hal_flash.c              |  4 ++++
 4 files changed, 55 insertions(+)

diff --git a/hw/drivers/crypto/crypto_da1469x/src/crypto_da1469x.c b/hw/drivers/crypto/crypto_da1469x/src/crypto_da1469x.c
index f8d55b6..88371ec 100644
--- a/hw/drivers/crypto/crypto_da1469x/src/crypto_da1469x.c
+++ b/hw/drivers/crypto/crypto_da1469x/src/crypto_da1469x.c
@@ -26,6 +26,7 @@
 #include <mcu/da1469x_otp.h>
 #include <mcu/da1469x_dma.h>
 
+extern struct time_tracker g_tt;
 static struct os_mutex gmtx;
 
 #define VALID_AES_KEYLEN(x) (((x) == 128) || ((x) == 192) || ((x) == 256))
@@ -113,7 +114,9 @@ da1469x_crypto_op(struct crypto_dev *crypto, uint8_t op, uint16_t algo,
         memcpy(iv_save, &inbuf[len-AES_BLOCK_LEN], AES_BLOCK_LEN);
     }
 
+    g_tt.crypto_op_start = os_cputime_get32();
     os_mutex_pend(&gmtx, OS_TIMEOUT_NEVER);
+    g_tt.crypto_mutex_pend = os_cputime_get32();
     da1469x_clock_amba_enable(CRG_TOP_CLK_AMBA_REG_AES_CLK_ENABLE_Msk);
 
     /* enable AES / disable HASH */
@@ -185,7 +188,9 @@ da1469x_crypto_op(struct crypto_dev *crypto, uint8_t op, uint16_t algo,
     }
 
     if (OTP_ADDRESS_RANGE_USER_DATA_KEYS(key)) {
+        g_tt.crypto_dma_tx_begin = os_cputime_get32();
         do_dma_key_tx(key, keylen);
+        g_tt.crypto_dma_tx_end = os_cputime_get32();
     } else {
         keyreg = (uint32_t *)&AES_HASH->CRYPTO_KEYS_START;
         keyp32 = (uint32_t *)key;
@@ -226,6 +231,7 @@ da1469x_crypto_op(struct crypto_dev *crypto, uint8_t op, uint16_t algo,
     /* start encryption/decryption */
     AES_HASH->CRYPTO_START_REG |= AES_HASH_CRYPTO_START_REG_CRYPTO_START_Msk;
 
+    g_tt.crypto_wtf = os_cputime_get32();
     /*
      * Wait to finish.
      *
@@ -234,8 +240,10 @@ da1469x_crypto_op(struct crypto_dev *crypto, uint8_t op, uint16_t algo,
     while (!(AES_HASH->CRYPTO_STATUS_REG &
              AES_HASH_CRYPTO_STATUS_REG_CRYPTO_INACTIVE_Msk));
 
+    g_tt.crypto_tx_done = os_cputime_get32();
     da1469x_clock_amba_disable(CRG_TOP_CLK_AMBA_REG_AES_CLK_ENABLE_Msk);
     os_mutex_release(&gmtx);
+    g_tt.crypto_mutex_rel = os_cputime_get32();
 
     /*
      * Update crypto framework internals
diff --git a/hw/drivers/crypto/include/crypto/crypto.h b/hw/drivers/crypto/include/crypto/crypto.h
index ad93a00..d548ff5 100644
--- a/hw/drivers/crypto/include/crypto/crypto.h
+++ b/hw/drivers/crypto/include/crypto/crypto.h
@@ -99,6 +99,23 @@ struct crypto_iovec {
     size_t iov_len;
 };
 
+struct time_tracker {
+    uint32_t start;
+    uint32_t ef_sem_pend;
+    uint32_t co_done;
+    uint32_t end;
+
+    uint32_t crypto_op_start;
+    uint32_t crypto_mutex_pend;
+    uint32_t crypto_dma_tx_begin;
+    uint32_t crypto_dma_tx_end;
+    uint32_t crypto_wtf;
+    uint32_t crypto_tx_done;
+    uint32_t crypto_mutex_rel;
+
+    bool hff_write;
+};
+
 /**
  * Encrypt a buffer using custom parameters
  *
diff --git a/hw/drivers/flash/enc_flash/ef_da1469x/src/hw_enc_flash.c b/hw/drivers/flash/enc_flash/ef_da1469x/src/hw_enc_flash.c
index 44a0c15..4a0bd76 100644
--- a/hw/drivers/flash/enc_flash/ef_da1469x/src/hw_enc_flash.c
+++ b/hw/drivers/flash/enc_flash/ef_da1469x/src/hw_enc_flash.c
@@ -29,10 +29,13 @@
 #include <mcu/da1469x_dma.h>
 #include <mcu/da1469x_otp.h>
 #include <crypto/crypto.h>
+#include "console/console.h"
 
 #define EDEV_TO_DA1469X(dev)   (struct eflash_da1469x_dev *)dev
 #define DA1469X_AES_KEYSIZE 256
 
+struct time_tracker g_tt;
+
 void
 enc_flash_crypt_arch(struct enc_flash_dev *edev, uint32_t blk_addr,
                      const uint8_t *src, uint8_t *tgt, int off, int cnt)
@@ -43,15 +46,38 @@ enc_flash_crypt_arch(struct enc_flash_dev *edev, uint32_t blk_addr,
     uint8_t blk[ENC_FLASH_BLK] = {0};
     const void *key = (void *)MCU_OTPM_BASE + OTP_SEGMENT_USER_DATA_KEYS +
                       (AES_MAX_KEY_LEN * (MYNEWT_VAL(USER_AES_SLOT)));
+    uint32_t diff;
+
+    g_tt.start = os_cputime_get32();
 
     ctr[0] = (uint32_t) ((blk_addr - h_dev->hf_base_addr) / ENC_FLASH_BLK);
 
     memcpy(blk + off, src, cnt);
     os_sem_pend(&dev->ef_sem, OS_TIMEOUT_NEVER);
+    g_tt.ef_sem_pend = os_cputime_get32();
     crypto_encrypt_aes_ctr(dev->ecd_crypto, key, DA1469X_AES_KEYSIZE, ctr,
                             blk, blk, AES_BLOCK_LEN);
+    g_tt.co_done = os_cputime_get32();
     os_sem_release(&dev->ef_sem);
+    g_tt.end = os_cputime_get32();
     memcpy(tgt, blk + off, cnt);
+    diff = g_tt.end - g_tt.start;
+    if (diff > 1000) {
+        console_printf("#enc: hff_write %d, cnt %d total %ld, efsp_s %ld, cod_efsp %ld, end_cod %ld\n\
+            cmp_cos %ld, cdtb_cmp %ld, cdte_cdtb %ld, cwtf_cdte %ld, ctd_cwtf %ld, cmr_ctd %ld\n",
+            g_tt.hff_write,
+            cnt,
+            diff,
+            g_tt.ef_sem_pend - g_tt.start,
+            g_tt.co_done - g_tt.ef_sem_pend,
+            g_tt.end - g_tt.co_done,
+            g_tt.crypto_mutex_pend - g_tt.crypto_op_start,
+            g_tt.crypto_dma_tx_begin - g_tt.crypto_mutex_pend,
+            g_tt.crypto_dma_tx_end - g_tt.crypto_dma_tx_begin,
+            g_tt.crypto_wtf - g_tt.crypto_dma_tx_end,
+            g_tt.crypto_tx_done - g_tt.crypto_wtf,
+            g_tt.crypto_mutex_rel - g_tt.crypto_tx_done);
+    }
 }
 
 /* Key is securely DMA transferred from OTP user data key slot */
diff --git a/hw/mcu/dialog/da1469x/src/hal_flash.c b/hw/mcu/dialog/da1469x/src/hal_flash.c
index 5d19908..b3c5fd9 100644
--- a/hw/mcu/dialog/da1469x/src/hal_flash.c
+++ b/hw/mcu/dialog/da1469x/src/hal_flash.c
@@ -25,7 +25,9 @@
 #include "hal/hal_flash_int.h"
 #include "mcu/mcu.h"
 #include <stdbool.h>
+#include "crypto/crypto.h"
 
+extern struct time_tracker g_tt;
 #define CODE_QSPI_INLINE    __attribute__((always_inline)) inline
 
 union da1469x_qspi_data_reg {
@@ -347,6 +349,7 @@ da1469x_hff_write(const struct hal_flash *dev, uint32_t address,
     uint8_t buf[ MYNEWT_VAL(QSPI_FLASH_READ_BUFFER_SIZE) ];
     uint32_t chunk_len;
 
+    g_tt.hff_write = true;
     /* We can write directly if 'src' is outside flash memory, otherwise we
      * need to read data to RAM first and then write to flash.
      */
@@ -373,6 +376,7 @@ da1469x_hff_write(const struct hal_flash *dev, uint32_t address,
         num_bytes -= chunk_len;
     }
 
+    g_tt.hff_write = false;
     return 0;
 }