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Posted to commits@nuttx.apache.org by gn...@apache.org on 2020/04/03 21:29:20 UTC
[incubator-nuttx] branch master updated (4fa26d3 -> 8876bd8)
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 4fa26d3 stm32f7/h7 spi add missing ret declaration
new 8988251 arch/arm/src/stm32/stm32_adc.h: fix nxstyle issues
new ae31b1f arch/arm/src/stm32/stm32_pwm.h: fix nxstyle issues
new 8876bd8 arch/arm/src/stm32/stm32_pwm.c: fix nxstyle issues
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/stm32/stm32_adc.h | 14 ++++++------
arch/arm/src/stm32/stm32_pwm.c | 49 +++++++++++++++++++++---------------------
arch/arm/src/stm32/stm32_pwm.h | 27 ++++++++++++++++-------
3 files changed, 51 insertions(+), 39 deletions(-)
[incubator-nuttx] 03/03: arch/arm/src/stm32/stm32_pwm.c: fix
nxstyle issues
Posted by gn...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 8876bd8ebc4049232ea6475fdf9c44d02a75cd80
Author: raiden00pl <ra...@gmail.com>
AuthorDate: Fri Apr 3 22:53:41 2020 +0200
arch/arm/src/stm32/stm32_pwm.c: fix nxstyle issues
---
arch/arm/src/stm32/stm32_pwm.c | 49 +++++++++++++++++++++---------------------
1 file changed, 24 insertions(+), 25 deletions(-)
diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c
index 2306118..5ec00dd 100644
--- a/arch/arm/src/stm32/stm32_pwm.c
+++ b/arch/arm/src/stm32/stm32_pwm.c
@@ -412,8 +412,8 @@ struct stm32_pwmtimer_s
uint32_t frequency; /* Current frequency setting */
#endif
uint32_t base; /* The base address of the timer */
- uint32_t pclk; /* The frequency of the peripheral clock
- * that drives the timer module.
+ uint32_t pclk; /* The frequency of the peripheral
+ * clock that drives the timer module
*/
#ifdef CONFIG_PWM_PULSECOUNT
FAR void *handle; /* Handle used for upper-half callback */
@@ -1975,7 +1975,6 @@ static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset,
static void pwm_modifyreg(struct stm32_pwmtimer_s *priv, uint32_t offset,
uint32_t clearbits, uint32_t setbits)
{
-
if (pwm_reg_is_32bit(priv->timtype, offset) == true)
{
/* 32-bit register */
@@ -2032,7 +2031,7 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
pwm_getreg(priv, STM32_GTIM_EGR_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET));
}
- else
+ else
{
pwminfo(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
pwm_getreg(priv, STM32_GTIM_SR_OFFSET),
@@ -2101,7 +2100,6 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
static int pwm_ccr_update(FAR struct pwm_lowerhalf_s *dev, uint8_t index,
uint32_t ccr)
-
{
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
uint32_t offset = 0;
@@ -2358,8 +2356,8 @@ static int pwm_frequency_update(FAR struct pwm_lowerhalf_s *dev,
uint32_t timclk = 0;
uint32_t prescaler = 0;
- /* Calculate optimal values for the timer prescaler and for the timer reload
- * register. If 'frequency' is the desired frequency, then
+ /* Calculate optimal values for the timer prescaler and for the timer
+ * reload register. If 'frequency' is the desired frequency, then
*
* reload = timclk / frequency
* timclk = pclk / presc
@@ -2417,7 +2415,8 @@ static int pwm_frequency_update(FAR struct pwm_lowerhalf_s *dev,
reload--;
}
- pwminfo("TIM%u PCLK: %u frequency: %u TIMCLK: %u prescaler: %u reload: %u\n",
+ pwminfo("TIM%u PCLK: %u frequency: %u TIMCLK: %u "
+ "prescaler: %u reload: %u\n",
priv->timid, priv->pclk, frequency, timclk, prescaler, reload);
/* Set the reload and prescaler values */
@@ -2813,13 +2812,13 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
/* Configure output polarity (all PWM timers) */
- if (priv->channels[channel-1].out1.pol == STM32_POL_NEG)
+ if (priv->channels[channel - 1].out1.pol == STM32_POL_NEG)
{
- ccer |= (GTIM_CCER_CC1P << ((channel-1)*4));
+ ccer |= (GTIM_CCER_CC1P << ((channel - 1) * 4));
}
else
{
- ccer &= ~(GTIM_CCER_CC1P << ((channel-1)*4));
+ ccer &= ~(GTIM_CCER_CC1P << ((channel - 1) * 4));
}
#ifdef HAVE_ADVTIM
@@ -2828,36 +2827,36 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
{
/* Configure output IDLE State */
- if (priv->channels[channel-1].out1.idle == STM32_IDLE_ACTIVE)
+ if (priv->channels[channel - 1].out1.idle == STM32_IDLE_ACTIVE)
{
- cr2 |= (ATIM_CR2_OIS1 << ((channel-1)*2));
+ cr2 |= (ATIM_CR2_OIS1 << ((channel - 1) * 2));
}
else
{
- cr2 &= ~(ATIM_CR2_OIS1 << ((channel-1)*2));
+ cr2 &= ~(ATIM_CR2_OIS1 << ((channel - 1) * 2));
}
#ifdef HAVE_PWM_COMPLEMENTARY
/* Configure complementary output IDLE state */
- if (priv->channels[channel-1].out2.idle == STM32_IDLE_ACTIVE)
+ if (priv->channels[channel - 1].out2.idle == STM32_IDLE_ACTIVE)
{
- cr2 |= (ATIM_CR2_OIS1N << ((channel-1)*2));
+ cr2 |= (ATIM_CR2_OIS1N << ((channel - 1) * 2));
}
else
{
- cr2 &= ~(ATIM_CR2_OIS1N << ((channel-1)*2));
+ cr2 &= ~(ATIM_CR2_OIS1N << ((channel - 1) * 2));
}
/* Configure complementary output polarity */
- if (priv->channels[channel-1].out2.pol == STM32_POL_NEG)
+ if (priv->channels[channel - 1].out2.pol == STM32_POL_NEG)
{
- ccer |= (ATIM_CCER_CC1NP << ((channel-1)*4));
+ ccer |= (ATIM_CCER_CC1NP << ((channel - 1) * 4));
}
else
{
- ccer &= ~(ATIM_CCER_CC1NP << ((channel-1)*4));
+ ccer &= ~(ATIM_CCER_CC1NP << ((channel - 1) * 4));
}
#endif /* HAVE_PWM_COMPLEMENTARY */
@@ -2883,7 +2882,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
* which causes an ugly condition above
*/
- ccer &= ~(GTIM_CCER_CC1NP << ((channel-1)*4));
+ ccer &= ~(GTIM_CCER_CC1NP << ((channel - 1) * 4));
}
#endif /* HAVE_GTIM_CCXNP */
@@ -3008,7 +3007,8 @@ errout:
*
****************************************************************************/
-static int pwm_sync_configure(FAR struct stm32_pwmtimer_s *priv, uint8_t trgo)
+static int pwm_sync_configure(FAR struct stm32_pwmtimer_s *priv,
+ uint8_t trgo)
{
uint32_t cr2 = 0;
@@ -3109,7 +3109,7 @@ static uint16_t pwm_outputs_from_channels(FAR struct stm32_pwmtimer_s *priv)
if (priv->channels[i].out1.in_use == 1)
{
- outputs |= (STM32_PWM_OUT1 << ((channel-1)*2));
+ outputs |= (STM32_PWM_OUT1 << ((channel - 1) * 2));
}
#ifdef HAVE_PWM_COMPLEMENTARY
@@ -3117,7 +3117,7 @@ static uint16_t pwm_outputs_from_channels(FAR struct stm32_pwmtimer_s *priv)
if (priv->channels[i].out2.in_use == 1)
{
- outputs |= (STM32_PWM_OUT1N << ((channel-1)*2));
+ outputs |= (STM32_PWM_OUT1N << ((channel - 1) * 2));
}
#endif
}
@@ -3186,7 +3186,6 @@ static int pwm_break_dt_configure(FAR struct stm32_pwmtimer_s *priv)
/* Configure BRK2 filter */
bdtr |= (priv->brk.flt2 << ATIM_BDTR_BK2F_SHIFT);
-
}
#endif /* HAVE_IP_TIMERS_V2 */
#endif /* HAVE_BREAK */
[incubator-nuttx] 01/03: arch/arm/src/stm32/stm32_adc.h: fix
nxstyle issues
Posted by gn...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 89882518144eef9a8314215826af9a899a187863
Author: raiden00pl <ra...@gmail.com>
AuthorDate: Fri Apr 3 22:48:06 2020 +0200
arch/arm/src/stm32/stm32_adc.h: fix nxstyle issues
---
arch/arm/src/stm32/stm32_adc.h | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/arm/src/stm32/stm32_adc.h b/arch/arm/src/stm32/stm32_adc.h
index 6bfb423..a807823 100644
--- a/arch/arm/src/stm32/stm32_adc.h
+++ b/arch/arm/src/stm32/stm32_adc.h
@@ -53,7 +53,9 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
+
/* Configuration ********************************************************************/
+
/* Timer devices may be used for different purposes. One special purpose is to
* control periodic ADC sampling. If CONFIG_STM32_TIMn is defined then
* CONFIG_STM32_TIMn_ADC must also be defined to indicate that timer "n" is intended
@@ -1303,7 +1305,7 @@
# define ADC2_JEXTSEL_HRTTRG4 ADC12_JSQR_JEXTSEL_HRT1TRG4
#endif
-/* EXTSEL configuration *****************************************************/
+/* EXTSEL configuration *************************************************************/
#if defined(CONFIG_STM32_TIM1_ADC1)
# if CONFIG_STM32_ADC1_TIMTRIG == 0
@@ -1839,7 +1841,7 @@
# endif
#endif
-/* JEXTSEL configuration ****************************************************/
+/* JEXTSEL configuration ************************************************************/
/* TODO: ADC1 JEXTSEL trigger */
@@ -1869,7 +1871,7 @@
#undef ADC4_JEXTSEL_VALUE
-/* ADC interrupts ***********************************************************/
+/* ADC interrupts *******************************************************************/
#if defined(HAVE_IP_ADC_V1)
# define ADC_ISR_EOC ADC_SR_EOC
@@ -1905,7 +1907,7 @@
#define ADC_IER_ALLINTS (ADC_IER_EOC | ADC_IER_AWD | ADC_IER_JEOC | \
ADC_IER_JEOS | ADC_IER_OVR)
-/* Low-level ops helpers ****************************************************/
+/* Low-level ops helpers ************************************************************/
#define ADC_INT_ACK(adc, source) \
(adc)->llops->int_ack(adc, source)
@@ -2099,7 +2101,7 @@ extern "C"
#define EXTERN extern
#endif
-/****************************************************************************
+/************************************************************************************
* Name: stm32_adcinitialize
*
* Description:
@@ -2113,7 +2115,7 @@ extern "C"
* Returned Value:
* Valid ADC device structure reference on success; a NULL on failure
*
- ****************************************************************************/
+ ************************************************************************************/
struct adc_dev_s;
struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
[incubator-nuttx] 02/03: arch/arm/src/stm32/stm32_pwm.h: fix
nxstyle issues
Posted by gn...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit ae31b1f92684451e759f6fac0db5e4174bbf17ce
Author: raiden00pl <ra...@gmail.com>
AuthorDate: Fri Apr 3 22:50:07 2020 +0200
arch/arm/src/stm32/stm32_pwm.h: fix nxstyle issues
---
arch/arm/src/stm32/stm32_pwm.h | 27 +++++++++++++++++++--------
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/arch/arm/src/stm32/stm32_pwm.h b/arch/arm/src/stm32/stm32_pwm.h
index a5549f0..1ea5977 100644
--- a/arch/arm/src/stm32/stm32_pwm.h
+++ b/arch/arm/src/stm32/stm32_pwm.h
@@ -55,14 +55,22 @@
#include "chip.h"
+#ifdef CONFIG_STM32_PWM
+# include <arch/board/board.h>
+# include "hardware/stm32_tim.h"
+#endif
+
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
+
/* Configuration ********************************************************************/
+
/* Timer devices may be used for different purposes. One special purpose is
- * to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
- * is defined then the CONFIG_STM32_TIMn_PWM must also be defined to indicate that
- * timer "n" is intended to be used for pulsed output signal generation.
+ * to generate modulated outputs for such things as motor control.
+ * If CONFIG_STM32_TIMn is defined then the CONFIG_STM32_TIMn_PWM must also be
+ * defined to indicate that timer "n" is intended to be used for pulsed output
+ * signal generation.
*/
#ifndef CONFIG_STM32_TIM1
@@ -120,9 +128,6 @@
#ifdef CONFIG_STM32_PWM
-#include <arch/board/board.h>
-#include "hardware/stm32_tim.h"
-
/* PWM driver channels configuration */
#ifdef CONFIG_STM32_PWM_MULTICHAN
@@ -1013,13 +1018,18 @@ enum stm32_pwm_output_e
STM32_PWM_OUT3 = (1 << 4),
STM32_PWM_OUT3N = (1 << 5),
STM32_PWM_OUT4 = (1 << 6),
+
/* 1 << 7 reserved - no complementary output for CH4 */
+
#ifdef HAVE_IP_TIMERS_V2
/* Only available inside micro */
STM32_PWM_OUT5 = (1 << 8),
+
/* 1 << 9 reserved - no complementary output for CH5 */
+
STM32_PWM_OUT6 = (1 << 10),
+
/* 1 << 11 reserved - no complementary output for CH6 */
#endif
};
@@ -1072,7 +1082,8 @@ struct stm32_pwm_ops_s
/* Enable outputs */
- int (*outputs_enable)(FAR struct pwm_lowerhalf_s *dev, uint16_t outputs, bool state);
+ int (*outputs_enable)(FAR struct pwm_lowerhalf_s *dev, uint16_t outputs,
+ bool state);
/* Software update */
@@ -1125,7 +1136,7 @@ extern "C"
#endif
/************************************************************************************
- * Public Functions
+ * Public Function Prototypes
************************************************************************************/
/************************************************************************************