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Posted to commits@trafficserver.apache.org by we...@apache.org on 2012/06/29 05:02:35 UTC
git commit: blame me,
fix the problem that my previous commit can not pass the regression
test.
Updated Branches:
refs/heads/master f3ee4a86c -> 7a46479e7
blame me, fix the problem that my previous commit can not pass
the regression test.
Project: http://git-wip-us.apache.org/repos/asf/trafficserver/repo
Commit: http://git-wip-us.apache.org/repos/asf/trafficserver/commit/7a46479e
Tree: http://git-wip-us.apache.org/repos/asf/trafficserver/tree/7a46479e
Diff: http://git-wip-us.apache.org/repos/asf/trafficserver/diff/7a46479e
Branch: refs/heads/master
Commit: 7a46479e74977713a65abdd11d6824aa3a529bc2
Parents: f3ee4a8
Author: weijin <we...@apache.org>
Authored: Fri Jun 29 10:58:10 2012 +0800
Committer: weijin <we...@apache.org>
Committed: Fri Jun 29 10:58:10 2012 +0800
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iocore/cache/Cache.cc | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
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http://git-wip-us.apache.org/repos/asf/trafficserver/blob/7a46479e/iocore/cache/Cache.cc
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diff --git a/iocore/cache/Cache.cc b/iocore/cache/Cache.cc
index 5083b48..94d26f7 100644
--- a/iocore/cache/Cache.cc
+++ b/iocore/cache/Cache.cc
@@ -1972,7 +1972,7 @@ CacheVC::handleRead(int event, Event *e)
// check ram cache
ink_debug_assert(vol->mutex->thread_holding == this_ethread());
int64_t o = dir_offset(&dir);
- if (vol->ram_cache->get(read_key, &buf, (uint32_t)(o >> 32), (uint32_t)o));
+ if (vol->ram_cache->get(read_key, &buf, (uint32_t)(o >> 32), (uint32_t)o))
goto LramHit;
// check if it was read in the last open_read call