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Posted to commits@mynewt.apache.org by ma...@apache.org on 2016/05/19 16:51:26 UTC
[14/18] incubator-mynewt-core git commit: os/cortex_m4;
support coredumps for Cortex-M4.
os/cortex_m4; support coredumps for Cortex-M4.
Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo
Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/e4aeaecb
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/e4aeaecb
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/e4aeaecb
Branch: refs/heads/develop
Commit: e4aeaecb0babbf0cdbacd667767a46a3b4fdbc33
Parents: 9add53b
Author: Marko Kiiskila <ma...@runtime.io>
Authored: Thu May 19 09:29:36 2016 -0700
Committer: Marko Kiiskila <ma...@runtime.io>
Committed: Thu May 19 09:35:45 2016 -0700
----------------------------------------------------------------------
libs/os/src/arch/cortex_m4/os_fault.c | 104 +++++++++++++++++++++++------
1 file changed, 85 insertions(+), 19 deletions(-)
----------------------------------------------------------------------
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e4aeaecb/libs/os/src/arch/cortex_m4/os_fault.c
----------------------------------------------------------------------
diff --git a/libs/os/src/arch/cortex_m4/os_fault.c b/libs/os/src/arch/cortex_m4/os_fault.c
index 25ed5ca..d248e59 100644
--- a/libs/os/src/arch/cortex_m4/os_fault.c
+++ b/libs/os/src/arch/cortex_m4/os_fault.c
@@ -21,28 +21,13 @@
#include <hal/hal_system.h>
#include "os/os.h"
+#ifdef COREDUMP_PRESENT
+#include <coredump/coredump.h>
+#endif
+
#include <stdint.h>
#include <unistd.h>
-int os_die_line;
-const char *os_die_module;
-
-void __assert_func(const char *file, int line, const char *func, const char *e);
-
-void
-__assert_func(const char *file, int line, const char *func, const char *e)
-{
- int sr;
-
- OS_ENTER_CRITICAL(sr);
- (void)sr;
- os_die_line = line;
- os_die_module = file;
- console_blocking_mode();
- console_printf("Assert %s; failed in %s:%d\n", e ? e : "", file, line);
- system_reset();
-}
-
struct exception_frame {
uint32_t r0;
uint32_t r1;
@@ -67,9 +52,84 @@ struct trap_frame {
uint32_t lr; /* this LR holds EXC_RETURN */
};
+struct coredump_regs {
+ uint32_t r0;
+ uint32_t r1;
+ uint32_t r2;
+ uint32_t r3;
+ uint32_t r4;
+ uint32_t r5;
+ uint32_t r6;
+ uint32_t r7;
+ uint32_t r8;
+ uint32_t r9;
+ uint32_t r10;
+ uint32_t r11;
+ uint32_t r12;
+ uint32_t sp;
+ uint32_t lr;
+ uint32_t pc;
+ uint32_t psr;
+};
+
+void __assert_func(const char *file, int line, const char *func, const char *e);
+
+#ifdef COREDUMP_PRESENT
+static void
+trap_to_coredump(struct trap_frame *tf, struct coredump_regs *regs)
+{
+ regs->r0 = tf->ef->r0;
+ regs->r1 = tf->ef->r1;
+ regs->r2 = tf->ef->r2;
+ regs->r3 = tf->ef->r3;
+ regs->r4 = tf->r4;
+ regs->r5 = tf->r5;
+ regs->r6 = tf->r6;
+ regs->r7 = tf->r7;
+ regs->r8 = tf->r8;
+ regs->r9 = tf->r9;
+ regs->r10 = tf->r10;
+ regs->r11 = tf->r11;
+ regs->r12 = tf->ef->r12;
+ /*
+ * SP just before exception for the coredump.
+ * See ARMv7-M Architecture Ref Manual, sections B1.5.6 - B1.5.8
+ * SP is adjusted by 0x20.
+ * If SCB->CCR.STKALIGN is set, SP is aligned to 8-byte boundary on
+ * exception entry.
+ * If this alignment adjustment happened, xPSR will have bit 9 set.
+ */
+ regs->sp = ((uint32_t)tf->ef) + 0x20;
+ if ((SCB->CCR & SCB_CCR_STKALIGN_Msk) & tf->ef->psr & (1 << 9)) {
+ regs->sp += 4;
+ }
+ regs->lr = tf->ef->lr;
+ regs->pc = tf->ef->pc;
+ regs->psr = tf->ef->psr;
+}
+#endif
+
+void
+__assert_func(const char *file, int line, const char *func, const char *e)
+{
+ int sr;
+
+ OS_ENTER_CRITICAL(sr);
+ (void)sr;
+ console_blocking_mode();
+ console_printf("Assert %s; failed in %s:%d\n", e ? e : "", file, line);
+ SCB->ICSR = SCB_ICSR_NMIPENDSET_Msk;
+ asm("isb");
+ system_reset();
+}
+
void
os_default_irq(struct trap_frame *tf)
{
+#ifdef COREDUMP_PRESENT
+ struct coredump_regs regs;
+#endif
+
console_blocking_mode();
console_printf("Unhandled interrupt (%ld), exception sp 0x%08lx\n",
SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk, (uint32_t)tf->ef);
@@ -84,5 +144,11 @@ os_default_irq(struct trap_frame *tf)
console_printf("ICSR:0x%08lx HFSR:0x%08lx CFSR:0x%08lx\n",
SCB->ICSR, SCB->HFSR, SCB->CFSR);
console_printf("BFAR:0x%08lx MMFAR:0x%08lx\n", SCB->BFAR, SCB->MMFAR);
+
+#ifdef COREDUMP_PRESENT
+ trap_to_coredump(tf, ®s);
+ dump_core(®s, sizeof(regs));
+#endif
+
system_reset();
}