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Posted to commits@nuttx.apache.org by "ASM3 (via GitHub)" <gi...@apache.org> on 2023/02/07 20:29:23 UTC
[GitHub] [nuttx] ASM3 opened a new pull request, #8460: Fix/can2 stm32l (WIP)
ASM3 opened a new pull request, #8460:
URL: https://github.com/apache/nuttx/pull/8460
## Summary
This PR fixes the CAN2 interface on the STM32L496
## Impact
At the moment CAN2 does not work on the STM32L496. This fix should enable the CAN2 functionality.
## Testing
Testing CAN2 on the STM32L496
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[GitHub] [nuttx] acassis commented on pull request #8460: Fix/can2 stm32l (WIP)
Posted by "acassis (via GitHub)" <gi...@apache.org>.
acassis commented on PR #8460:
URL: https://github.com/apache/nuttx/pull/8460#issuecomment-1426307149
@ASM3 I think you can remove the Draft, just use git rebase interactive to squash this empty commit: https://github.com/apache/nuttx/pull/8460/commits/70c9f6c392f296cf2510a7603ce85f497124602e You can get more info here: https://nuttx.apache.org/docs/latest/contributing/making-changes.html#how-to-include-the-suggestions-on-your-pull-request
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[GitHub] [nuttx] acassis commented on a diff in pull request #8460: Fix/can2 stm32l (WIP)
Posted by "acassis (via GitHub)" <gi...@apache.org>.
acassis commented on code in PR #8460:
URL: https://github.com/apache/nuttx/pull/8460#discussion_r1110163603
##########
arch/arm/src/stm32l4/hardware/stm32l4_can.h:
##########
@@ -176,6 +179,60 @@
# define STM32L4_CAN1_FIR(b,i) (STM32L4_CAN1_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
#endif
+#if defined(CONFIG_STM32L4_CAN2)
+# define STM32L4_CAN2_MCR (STM32L4_CAN2_BASE+STM32L4_CAN_MCR_OFFSET)
+# define STM32L4_CAN2_MSR (STM32L4_CAN2_BASE+STM32L4_CAN_MSR_OFFSET)
+# define STM32L4_CAN2_TSR (STM32L4_CAN2_BASE+STM32L4_CAN_TSR_OFFSET)
+# define STM32L4_CAN2_RF0R (STM32L4_CAN2_BASE+STM32L4_CAN_RF0R_OFFSET)
+# define STM32L4_CAN2_RF1R (STM32L4_CAN2_BASE+STM32L4_CAN_RF1R_OFFSET)
+# define STM32L4_CAN2_IER (STM32L4_CAN2_BASE+STM32L4_CAN_IER_OFFSET)
+# define STM32L4_CAN2_ESR (STM32L4_CAN2_BASE+STM32L4_CAN_ESR_OFFSET)
+# define STM32L4_CAN2_BTR (STM32L4_CAN2_BASE+STM32L4_CAN_BTR_OFFSET)
+
+# define STM32L4_CAN2_TIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TIR_OFFSET(m))
+# define STM32L4_CAN2_TI0R (STM32L4_CAN2_BASE+STM32L4_CAN_TI0R_OFFSET)
+# define STM32L4_CAN2_TI1R (STM32L4_CAN2_BASE+STM32L4_CAN_TI1R_OFFSET)
+# define STM32L4_CAN2_TI2R (STM32L4_CAN2_BASE+STM32L4_CAN_TI2R_OFFSET)
+
+# define STM32L4_CAN2_TDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDTR_OFFSET(m))
+# define STM32L4_CAN2_TDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT0R_OFFSET)
+# define STM32L4_CAN2_TDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT1R_OFFSET)
+# define STM32L4_CAN2_TDT2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT2R_OFFSET)
+
+# define STM32L4_CAN2_TDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDLR_OFFSET(m))
+# define STM32L4_CAN2_TDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL0R_OFFSET)
+# define STM32L4_CAN2_TDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL1R_OFFSET)
+# define STM32L4_CAN2_TDL2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL2R_OFFSET)
+
+# define STM32L4_CAN2_TDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDHR_OFFSET(m))
+# define STM32L4_CAN2_TDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH0R_OFFSET)
+# define STM32L4_CAN2_TDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH1R_OFFSET)
+# define STM32L4_CAN2_TDH2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH2R_OFFSET)
+
+# define STM32L4_CAN2_RIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RIR_OFFSET(m))
+# define STM32L4_CAN2_RI0R (STM32L4_CAN2_BASE+STM32L4_CAN_RI0R_OFFSET)
+# define STM32L4_CAN2_RI1R (STM32L4_CAN2_BASE+STM32L4_CAN_RI1R_OFFSET)
+
+# define STM32L4_CAN2_RDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDTR_OFFSET(m))
+# define STM32L4_CAN2_RDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT0R_OFFSET)
+# define STM32L4_CAN2_RDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT1R_OFFSET)
+
+# define STM32L4_CAN2_RDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDLR_OFFSET(m))
+# define STM32L4_CAN2_RDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL0R_OFFSET)
+# define STM32L4_CAN2_RDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL1R_OFFSET)
+
+# define STM32L4_CAN2_RDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDHR_OFFSET(m))
+# define STM32L4_CAN2_RDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH0R_OFFSET)
+# define STM32L4_CAN2_RDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH1R_OFFSET)
+
+# define STM32L4_CAN2_FMR (STM32L4_CAN2_BASE+STM32L4_CAN_FMR_OFFSET)
+# define STM32L4_CAN2_FM1R (STM32L4_CAN2_BASE+STM32L4_CAN_FM1R_OFFSET)
+# define STM32L4_CAN2_FS1R (STM32L4_CAN2_BASE+STM32L4_CAN_FS1R_OFFSET)
+# define STM32L4_CAN2_FFA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FFA1R_OFFSET)
+# define STM32L4_CAN2_FA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FA1R_OFFSET)
+# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32_CAN_FIR_OFFSET(b,i))
Review Comment:
@ASM3 please change STM32_CAN_FIR_OFFSET to STM32L4_CAN_FIR_OFFSET as Gustavo pointed and remove it from Draft
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[GitHub] [nuttx] acassis commented on pull request #8460: Fix/can2 stm32l (WIP)
Posted by "acassis (via GitHub)" <gi...@apache.org>.
acassis commented on PR #8460:
URL: https://github.com/apache/nuttx/pull/8460#issuecomment-1482092406
Hi @ASM3 did you have the change to test it?
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[GitHub] [nuttx] ASM3 commented on pull request #8460: Fix/can2 stm32l (WIP)
Posted by "ASM3 (via GitHub)" <gi...@apache.org>.
ASM3 commented on PR #8460:
URL: https://github.com/apache/nuttx/pull/8460#issuecomment-1437054270
Removing draft status according to the request. The code is not fully tested.
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[GitHub] [nuttx] davids5 commented on a diff in pull request #8460: Fix/can2 stm32l (WIP)
Posted by "davids5 (via GitHub)" <gi...@apache.org>.
davids5 commented on code in PR #8460:
URL: https://github.com/apache/nuttx/pull/8460#discussion_r1107623234
##########
arch/arm/src/stm32l4/hardware/stm32l4_can.h:
##########
@@ -176,6 +179,60 @@
# define STM32L4_CAN1_FIR(b,i) (STM32L4_CAN1_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
#endif
+#if defined(CONFIG_STM32L4_CAN2)
+# define STM32L4_CAN2_MCR (STM32L4_CAN2_BASE+STM32L4_CAN_MCR_OFFSET)
+# define STM32L4_CAN2_MSR (STM32L4_CAN2_BASE+STM32L4_CAN_MSR_OFFSET)
+# define STM32L4_CAN2_TSR (STM32L4_CAN2_BASE+STM32L4_CAN_TSR_OFFSET)
+# define STM32L4_CAN2_RF0R (STM32L4_CAN2_BASE+STM32L4_CAN_RF0R_OFFSET)
+# define STM32L4_CAN2_RF1R (STM32L4_CAN2_BASE+STM32L4_CAN_RF1R_OFFSET)
+# define STM32L4_CAN2_IER (STM32L4_CAN2_BASE+STM32L4_CAN_IER_OFFSET)
+# define STM32L4_CAN2_ESR (STM32L4_CAN2_BASE+STM32L4_CAN_ESR_OFFSET)
+# define STM32L4_CAN2_BTR (STM32L4_CAN2_BASE+STM32L4_CAN_BTR_OFFSET)
+
+# define STM32L4_CAN2_TIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TIR_OFFSET(m))
+# define STM32L4_CAN2_TI0R (STM32L4_CAN2_BASE+STM32L4_CAN_TI0R_OFFSET)
+# define STM32L4_CAN2_TI1R (STM32L4_CAN2_BASE+STM32L4_CAN_TI1R_OFFSET)
+# define STM32L4_CAN2_TI2R (STM32L4_CAN2_BASE+STM32L4_CAN_TI2R_OFFSET)
+
+# define STM32L4_CAN2_TDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDTR_OFFSET(m))
+# define STM32L4_CAN2_TDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT0R_OFFSET)
+# define STM32L4_CAN2_TDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT1R_OFFSET)
+# define STM32L4_CAN2_TDT2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT2R_OFFSET)
+
+# define STM32L4_CAN2_TDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDLR_OFFSET(m))
+# define STM32L4_CAN2_TDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL0R_OFFSET)
+# define STM32L4_CAN2_TDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL1R_OFFSET)
+# define STM32L4_CAN2_TDL2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL2R_OFFSET)
+
+# define STM32L4_CAN2_TDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDHR_OFFSET(m))
+# define STM32L4_CAN2_TDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH0R_OFFSET)
+# define STM32L4_CAN2_TDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH1R_OFFSET)
+# define STM32L4_CAN2_TDH2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH2R_OFFSET)
+
+# define STM32L4_CAN2_RIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RIR_OFFSET(m))
+# define STM32L4_CAN2_RI0R (STM32L4_CAN2_BASE+STM32L4_CAN_RI0R_OFFSET)
+# define STM32L4_CAN2_RI1R (STM32L4_CAN2_BASE+STM32L4_CAN_RI1R_OFFSET)
+
+# define STM32L4_CAN2_RDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDTR_OFFSET(m))
+# define STM32L4_CAN2_RDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT0R_OFFSET)
+# define STM32L4_CAN2_RDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT1R_OFFSET)
+
+# define STM32L4_CAN2_RDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDLR_OFFSET(m))
+# define STM32L4_CAN2_RDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL0R_OFFSET)
+# define STM32L4_CAN2_RDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL1R_OFFSET)
+
+# define STM32L4_CAN2_RDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDHR_OFFSET(m))
+# define STM32L4_CAN2_RDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH0R_OFFSET)
+# define STM32L4_CAN2_RDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH1R_OFFSET)
+
+# define STM32L4_CAN2_FMR (STM32L4_CAN2_BASE+STM32L4_CAN_FMR_OFFSET)
+# define STM32L4_CAN2_FM1R (STM32L4_CAN2_BASE+STM32L4_CAN_FM1R_OFFSET)
+# define STM32L4_CAN2_FS1R (STM32L4_CAN2_BASE+STM32L4_CAN_FS1R_OFFSET)
+# define STM32L4_CAN2_FFA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FFA1R_OFFSET)
+# define STM32L4_CAN2_FA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FA1R_OFFSET)
+# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32_CAN_FIR_OFFSET(b,i))
Review Comment:
for matting is off too should be X + Y to X+Y
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[GitHub] [nuttx] gustavonihei commented on a diff in pull request #8460: Fix/can2 stm32l (WIP)
Posted by "gustavonihei (via GitHub)" <gi...@apache.org>.
gustavonihei commented on code in PR #8460:
URL: https://github.com/apache/nuttx/pull/8460#discussion_r1107543366
##########
arch/arm/src/stm32l4/hardware/stm32l4_can.h:
##########
@@ -176,6 +179,60 @@
# define STM32L4_CAN1_FIR(b,i) (STM32L4_CAN1_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
#endif
+#if defined(CONFIG_STM32L4_CAN2)
+# define STM32L4_CAN2_MCR (STM32L4_CAN2_BASE+STM32L4_CAN_MCR_OFFSET)
+# define STM32L4_CAN2_MSR (STM32L4_CAN2_BASE+STM32L4_CAN_MSR_OFFSET)
+# define STM32L4_CAN2_TSR (STM32L4_CAN2_BASE+STM32L4_CAN_TSR_OFFSET)
+# define STM32L4_CAN2_RF0R (STM32L4_CAN2_BASE+STM32L4_CAN_RF0R_OFFSET)
+# define STM32L4_CAN2_RF1R (STM32L4_CAN2_BASE+STM32L4_CAN_RF1R_OFFSET)
+# define STM32L4_CAN2_IER (STM32L4_CAN2_BASE+STM32L4_CAN_IER_OFFSET)
+# define STM32L4_CAN2_ESR (STM32L4_CAN2_BASE+STM32L4_CAN_ESR_OFFSET)
+# define STM32L4_CAN2_BTR (STM32L4_CAN2_BASE+STM32L4_CAN_BTR_OFFSET)
+
+# define STM32L4_CAN2_TIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TIR_OFFSET(m))
+# define STM32L4_CAN2_TI0R (STM32L4_CAN2_BASE+STM32L4_CAN_TI0R_OFFSET)
+# define STM32L4_CAN2_TI1R (STM32L4_CAN2_BASE+STM32L4_CAN_TI1R_OFFSET)
+# define STM32L4_CAN2_TI2R (STM32L4_CAN2_BASE+STM32L4_CAN_TI2R_OFFSET)
+
+# define STM32L4_CAN2_TDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDTR_OFFSET(m))
+# define STM32L4_CAN2_TDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT0R_OFFSET)
+# define STM32L4_CAN2_TDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT1R_OFFSET)
+# define STM32L4_CAN2_TDT2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT2R_OFFSET)
+
+# define STM32L4_CAN2_TDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDLR_OFFSET(m))
+# define STM32L4_CAN2_TDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL0R_OFFSET)
+# define STM32L4_CAN2_TDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL1R_OFFSET)
+# define STM32L4_CAN2_TDL2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL2R_OFFSET)
+
+# define STM32L4_CAN2_TDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDHR_OFFSET(m))
+# define STM32L4_CAN2_TDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH0R_OFFSET)
+# define STM32L4_CAN2_TDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH1R_OFFSET)
+# define STM32L4_CAN2_TDH2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH2R_OFFSET)
+
+# define STM32L4_CAN2_RIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RIR_OFFSET(m))
+# define STM32L4_CAN2_RI0R (STM32L4_CAN2_BASE+STM32L4_CAN_RI0R_OFFSET)
+# define STM32L4_CAN2_RI1R (STM32L4_CAN2_BASE+STM32L4_CAN_RI1R_OFFSET)
+
+# define STM32L4_CAN2_RDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDTR_OFFSET(m))
+# define STM32L4_CAN2_RDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT0R_OFFSET)
+# define STM32L4_CAN2_RDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT1R_OFFSET)
+
+# define STM32L4_CAN2_RDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDLR_OFFSET(m))
+# define STM32L4_CAN2_RDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL0R_OFFSET)
+# define STM32L4_CAN2_RDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL1R_OFFSET)
+
+# define STM32L4_CAN2_RDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDHR_OFFSET(m))
+# define STM32L4_CAN2_RDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH0R_OFFSET)
+# define STM32L4_CAN2_RDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH1R_OFFSET)
+
+# define STM32L4_CAN2_FMR (STM32L4_CAN2_BASE+STM32L4_CAN_FMR_OFFSET)
+# define STM32L4_CAN2_FM1R (STM32L4_CAN2_BASE+STM32L4_CAN_FM1R_OFFSET)
+# define STM32L4_CAN2_FS1R (STM32L4_CAN2_BASE+STM32L4_CAN_FS1R_OFFSET)
+# define STM32L4_CAN2_FFA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FFA1R_OFFSET)
+# define STM32L4_CAN2_FA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FA1R_OFFSET)
+# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32_CAN_FIR_OFFSET(b,i))
Review Comment:
```suggestion
# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32L4_CAN_FIR_OFFSET(b,i)
```
I believe the macro identifier might be wrong.
##########
arch/arm/src/stm32l4/hardware/stm32l4_can.h:
##########
@@ -176,6 +179,60 @@
# define STM32L4_CAN1_FIR(b,i) (STM32L4_CAN1_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
#endif
+#if defined(CONFIG_STM32L4_CAN2)
+# define STM32L4_CAN2_MCR (STM32L4_CAN2_BASE+STM32L4_CAN_MCR_OFFSET)
+# define STM32L4_CAN2_MSR (STM32L4_CAN2_BASE+STM32L4_CAN_MSR_OFFSET)
+# define STM32L4_CAN2_TSR (STM32L4_CAN2_BASE+STM32L4_CAN_TSR_OFFSET)
+# define STM32L4_CAN2_RF0R (STM32L4_CAN2_BASE+STM32L4_CAN_RF0R_OFFSET)
+# define STM32L4_CAN2_RF1R (STM32L4_CAN2_BASE+STM32L4_CAN_RF1R_OFFSET)
+# define STM32L4_CAN2_IER (STM32L4_CAN2_BASE+STM32L4_CAN_IER_OFFSET)
+# define STM32L4_CAN2_ESR (STM32L4_CAN2_BASE+STM32L4_CAN_ESR_OFFSET)
+# define STM32L4_CAN2_BTR (STM32L4_CAN2_BASE+STM32L4_CAN_BTR_OFFSET)
+
+# define STM32L4_CAN2_TIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TIR_OFFSET(m))
+# define STM32L4_CAN2_TI0R (STM32L4_CAN2_BASE+STM32L4_CAN_TI0R_OFFSET)
+# define STM32L4_CAN2_TI1R (STM32L4_CAN2_BASE+STM32L4_CAN_TI1R_OFFSET)
+# define STM32L4_CAN2_TI2R (STM32L4_CAN2_BASE+STM32L4_CAN_TI2R_OFFSET)
+
+# define STM32L4_CAN2_TDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDTR_OFFSET(m))
+# define STM32L4_CAN2_TDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT0R_OFFSET)
+# define STM32L4_CAN2_TDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT1R_OFFSET)
+# define STM32L4_CAN2_TDT2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT2R_OFFSET)
+
+# define STM32L4_CAN2_TDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDLR_OFFSET(m))
+# define STM32L4_CAN2_TDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL0R_OFFSET)
+# define STM32L4_CAN2_TDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL1R_OFFSET)
+# define STM32L4_CAN2_TDL2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL2R_OFFSET)
+
+# define STM32L4_CAN2_TDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDHR_OFFSET(m))
+# define STM32L4_CAN2_TDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH0R_OFFSET)
+# define STM32L4_CAN2_TDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH1R_OFFSET)
+# define STM32L4_CAN2_TDH2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH2R_OFFSET)
+
+# define STM32L4_CAN2_RIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RIR_OFFSET(m))
+# define STM32L4_CAN2_RI0R (STM32L4_CAN2_BASE+STM32L4_CAN_RI0R_OFFSET)
+# define STM32L4_CAN2_RI1R (STM32L4_CAN2_BASE+STM32L4_CAN_RI1R_OFFSET)
+
+# define STM32L4_CAN2_RDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDTR_OFFSET(m))
+# define STM32L4_CAN2_RDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT0R_OFFSET)
+# define STM32L4_CAN2_RDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT1R_OFFSET)
+
+# define STM32L4_CAN2_RDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDLR_OFFSET(m))
+# define STM32L4_CAN2_RDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL0R_OFFSET)
+# define STM32L4_CAN2_RDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL1R_OFFSET)
+
+# define STM32L4_CAN2_RDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDHR_OFFSET(m))
+# define STM32L4_CAN2_RDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH0R_OFFSET)
+# define STM32L4_CAN2_RDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH1R_OFFSET)
+
+# define STM32L4_CAN2_FMR (STM32L4_CAN2_BASE+STM32L4_CAN_FMR_OFFSET)
+# define STM32L4_CAN2_FM1R (STM32L4_CAN2_BASE+STM32L4_CAN_FM1R_OFFSET)
+# define STM32L4_CAN2_FS1R (STM32L4_CAN2_BASE+STM32L4_CAN_FS1R_OFFSET)
+# define STM32L4_CAN2_FFA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FFA1R_OFFSET)
+# define STM32L4_CAN2_FA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FA1R_OFFSET)
+# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32_CAN_FIR_OFFSET(b,i))
Review Comment:
```suggestion
# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
```
I believe the macro identifier might be wrong.
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[GitHub] [nuttx] gustavonihei commented on a diff in pull request #8460: Fix/can2 stm32l (WIP)
Posted by "gustavonihei (via GitHub)" <gi...@apache.org>.
gustavonihei commented on code in PR #8460:
URL: https://github.com/apache/nuttx/pull/8460#discussion_r1107543366
##########
arch/arm/src/stm32l4/hardware/stm32l4_can.h:
##########
@@ -176,6 +179,60 @@
# define STM32L4_CAN1_FIR(b,i) (STM32L4_CAN1_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
#endif
+#if defined(CONFIG_STM32L4_CAN2)
+# define STM32L4_CAN2_MCR (STM32L4_CAN2_BASE+STM32L4_CAN_MCR_OFFSET)
+# define STM32L4_CAN2_MSR (STM32L4_CAN2_BASE+STM32L4_CAN_MSR_OFFSET)
+# define STM32L4_CAN2_TSR (STM32L4_CAN2_BASE+STM32L4_CAN_TSR_OFFSET)
+# define STM32L4_CAN2_RF0R (STM32L4_CAN2_BASE+STM32L4_CAN_RF0R_OFFSET)
+# define STM32L4_CAN2_RF1R (STM32L4_CAN2_BASE+STM32L4_CAN_RF1R_OFFSET)
+# define STM32L4_CAN2_IER (STM32L4_CAN2_BASE+STM32L4_CAN_IER_OFFSET)
+# define STM32L4_CAN2_ESR (STM32L4_CAN2_BASE+STM32L4_CAN_ESR_OFFSET)
+# define STM32L4_CAN2_BTR (STM32L4_CAN2_BASE+STM32L4_CAN_BTR_OFFSET)
+
+# define STM32L4_CAN2_TIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TIR_OFFSET(m))
+# define STM32L4_CAN2_TI0R (STM32L4_CAN2_BASE+STM32L4_CAN_TI0R_OFFSET)
+# define STM32L4_CAN2_TI1R (STM32L4_CAN2_BASE+STM32L4_CAN_TI1R_OFFSET)
+# define STM32L4_CAN2_TI2R (STM32L4_CAN2_BASE+STM32L4_CAN_TI2R_OFFSET)
+
+# define STM32L4_CAN2_TDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDTR_OFFSET(m))
+# define STM32L4_CAN2_TDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT0R_OFFSET)
+# define STM32L4_CAN2_TDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT1R_OFFSET)
+# define STM32L4_CAN2_TDT2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT2R_OFFSET)
+
+# define STM32L4_CAN2_TDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDLR_OFFSET(m))
+# define STM32L4_CAN2_TDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL0R_OFFSET)
+# define STM32L4_CAN2_TDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL1R_OFFSET)
+# define STM32L4_CAN2_TDL2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL2R_OFFSET)
+
+# define STM32L4_CAN2_TDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDHR_OFFSET(m))
+# define STM32L4_CAN2_TDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH0R_OFFSET)
+# define STM32L4_CAN2_TDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH1R_OFFSET)
+# define STM32L4_CAN2_TDH2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH2R_OFFSET)
+
+# define STM32L4_CAN2_RIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RIR_OFFSET(m))
+# define STM32L4_CAN2_RI0R (STM32L4_CAN2_BASE+STM32L4_CAN_RI0R_OFFSET)
+# define STM32L4_CAN2_RI1R (STM32L4_CAN2_BASE+STM32L4_CAN_RI1R_OFFSET)
+
+# define STM32L4_CAN2_RDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDTR_OFFSET(m))
+# define STM32L4_CAN2_RDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT0R_OFFSET)
+# define STM32L4_CAN2_RDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT1R_OFFSET)
+
+# define STM32L4_CAN2_RDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDLR_OFFSET(m))
+# define STM32L4_CAN2_RDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL0R_OFFSET)
+# define STM32L4_CAN2_RDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL1R_OFFSET)
+
+# define STM32L4_CAN2_RDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDHR_OFFSET(m))
+# define STM32L4_CAN2_RDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH0R_OFFSET)
+# define STM32L4_CAN2_RDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH1R_OFFSET)
+
+# define STM32L4_CAN2_FMR (STM32L4_CAN2_BASE+STM32L4_CAN_FMR_OFFSET)
+# define STM32L4_CAN2_FM1R (STM32L4_CAN2_BASE+STM32L4_CAN_FM1R_OFFSET)
+# define STM32L4_CAN2_FS1R (STM32L4_CAN2_BASE+STM32L4_CAN_FS1R_OFFSET)
+# define STM32L4_CAN2_FFA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FFA1R_OFFSET)
+# define STM32L4_CAN2_FA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FA1R_OFFSET)
+# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32_CAN_FIR_OFFSET(b,i))
Review Comment:
```suggestion
# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32L4_CAN_FIR_OFFSET((b),(i)))
```
I believe the macro identifier might be wrong. And macro arguments should be wrapped around parentheses to avoid operator precedence issues.
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[GitHub] [nuttx] gustavonihei commented on a diff in pull request #8460: Fix/can2 stm32l (WIP)
Posted by "gustavonihei (via GitHub)" <gi...@apache.org>.
gustavonihei commented on code in PR #8460:
URL: https://github.com/apache/nuttx/pull/8460#discussion_r1107543366
##########
arch/arm/src/stm32l4/hardware/stm32l4_can.h:
##########
@@ -176,6 +179,60 @@
# define STM32L4_CAN1_FIR(b,i) (STM32L4_CAN1_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
#endif
+#if defined(CONFIG_STM32L4_CAN2)
+# define STM32L4_CAN2_MCR (STM32L4_CAN2_BASE+STM32L4_CAN_MCR_OFFSET)
+# define STM32L4_CAN2_MSR (STM32L4_CAN2_BASE+STM32L4_CAN_MSR_OFFSET)
+# define STM32L4_CAN2_TSR (STM32L4_CAN2_BASE+STM32L4_CAN_TSR_OFFSET)
+# define STM32L4_CAN2_RF0R (STM32L4_CAN2_BASE+STM32L4_CAN_RF0R_OFFSET)
+# define STM32L4_CAN2_RF1R (STM32L4_CAN2_BASE+STM32L4_CAN_RF1R_OFFSET)
+# define STM32L4_CAN2_IER (STM32L4_CAN2_BASE+STM32L4_CAN_IER_OFFSET)
+# define STM32L4_CAN2_ESR (STM32L4_CAN2_BASE+STM32L4_CAN_ESR_OFFSET)
+# define STM32L4_CAN2_BTR (STM32L4_CAN2_BASE+STM32L4_CAN_BTR_OFFSET)
+
+# define STM32L4_CAN2_TIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TIR_OFFSET(m))
+# define STM32L4_CAN2_TI0R (STM32L4_CAN2_BASE+STM32L4_CAN_TI0R_OFFSET)
+# define STM32L4_CAN2_TI1R (STM32L4_CAN2_BASE+STM32L4_CAN_TI1R_OFFSET)
+# define STM32L4_CAN2_TI2R (STM32L4_CAN2_BASE+STM32L4_CAN_TI2R_OFFSET)
+
+# define STM32L4_CAN2_TDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDTR_OFFSET(m))
+# define STM32L4_CAN2_TDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT0R_OFFSET)
+# define STM32L4_CAN2_TDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT1R_OFFSET)
+# define STM32L4_CAN2_TDT2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDT2R_OFFSET)
+
+# define STM32L4_CAN2_TDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDLR_OFFSET(m))
+# define STM32L4_CAN2_TDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL0R_OFFSET)
+# define STM32L4_CAN2_TDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL1R_OFFSET)
+# define STM32L4_CAN2_TDL2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDL2R_OFFSET)
+
+# define STM32L4_CAN2_TDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_TDHR_OFFSET(m))
+# define STM32L4_CAN2_TDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH0R_OFFSET)
+# define STM32L4_CAN2_TDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH1R_OFFSET)
+# define STM32L4_CAN2_TDH2R (STM32L4_CAN2_BASE+STM32L4_CAN_TDH2R_OFFSET)
+
+# define STM32L4_CAN2_RIR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RIR_OFFSET(m))
+# define STM32L4_CAN2_RI0R (STM32L4_CAN2_BASE+STM32L4_CAN_RI0R_OFFSET)
+# define STM32L4_CAN2_RI1R (STM32L4_CAN2_BASE+STM32L4_CAN_RI1R_OFFSET)
+
+# define STM32L4_CAN2_RDTR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDTR_OFFSET(m))
+# define STM32L4_CAN2_RDT0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT0R_OFFSET)
+# define STM32L4_CAN2_RDT1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDT1R_OFFSET)
+
+# define STM32L4_CAN2_RDLR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDLR_OFFSET(m))
+# define STM32L4_CAN2_RDL0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL0R_OFFSET)
+# define STM32L4_CAN2_RDL1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDL1R_OFFSET)
+
+# define STM32L4_CAN2_RDHR(m) (STM32L4_CAN2_BASE+STM32L4_CAN_RDHR_OFFSET(m))
+# define STM32L4_CAN2_RDH0R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH0R_OFFSET)
+# define STM32L4_CAN2_RDH1R (STM32L4_CAN2_BASE+STM32L4_CAN_RDH1R_OFFSET)
+
+# define STM32L4_CAN2_FMR (STM32L4_CAN2_BASE+STM32L4_CAN_FMR_OFFSET)
+# define STM32L4_CAN2_FM1R (STM32L4_CAN2_BASE+STM32L4_CAN_FM1R_OFFSET)
+# define STM32L4_CAN2_FS1R (STM32L4_CAN2_BASE+STM32L4_CAN_FS1R_OFFSET)
+# define STM32L4_CAN2_FFA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FFA1R_OFFSET)
+# define STM32L4_CAN2_FA1R (STM32L4_CAN2_BASE+STM32L4_CAN_FA1R_OFFSET)
+# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32_CAN_FIR_OFFSET(b,i))
Review Comment:
```suggestion
# define STM32L4_CAN2_FIR(b,i) (STM32L4_CAN2_BASE+STM32L4_CAN_FIR_OFFSET(b,i))
```
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