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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/01/01 17:22:00 UTC
[incubator-nuttx] branch master updated: arch/risc-v: Refine riscv_initialstate.c
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new b11e90f arch/risc-v: Refine riscv_initialstate.c
b11e90f is described below
commit b11e90f3846e5d679fdcb75e711ba4a02ad7a530
Author: Huang Qi <hu...@xiaomi.com>
AuthorDate: Sat Jan 1 23:28:35 2022 +0800
arch/risc-v: Refine riscv_initialstate.c
Signed-off-by: Huang Qi <hu...@xiaomi.com>
---
.../src/{rv64gc => common}/riscv_initialstate.c | 11 +-
arch/risc-v/src/rv32im/riscv_initialstate.c | 132 ---------------------
2 files changed, 9 insertions(+), 134 deletions(-)
diff --git a/arch/risc-v/src/rv64gc/riscv_initialstate.c b/arch/risc-v/src/common/riscv_initialstate.c
similarity index 92%
rename from arch/risc-v/src/rv64gc/riscv_initialstate.c
rename to arch/risc-v/src/common/riscv_initialstate.c
index 6841300..25addf5 100644
--- a/arch/risc-v/src/rv64gc/riscv_initialstate.c
+++ b/arch/risc-v/src/common/riscv_initialstate.c
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/risc-v/src/rv64gc/riscv_initialstate.c
+ * arch/risc-v/src/common/riscv_initialstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -55,7 +55,7 @@
void up_initial_state(struct tcb_s *tcb)
{
struct xcptcontext *xcp = &tcb->xcp;
- uint64_t regval;
+ uintptr_t regval;
/* Initialize the idle thread stack */
@@ -93,6 +93,13 @@ void up_initial_state(struct tcb_s *tcb)
xcp->regs[REG_EPC] = (uintptr_t)tcb->start;
+ /* Setup thread local storage pointer */
+
+#ifdef CONFIG_SCHED_THREAD_LOCAL
+ xcp->regs[REG_TP] = (uintptr_t)tcb->stack_alloc_ptr +
+ sizeof(struct tls_info_s);
+#endif
+
/* Set the initial value of the interrupt context register.
*
* Since various RISC-V platforms use different interrupt
diff --git a/arch/risc-v/src/rv32im/riscv_initialstate.c b/arch/risc-v/src/rv32im/riscv_initialstate.c
deleted file mode 100644
index 05d0e0c..0000000
--- a/arch/risc-v/src/rv32im/riscv_initialstate.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/****************************************************************************
- * arch/risc-v/src/rv32im/riscv_initialstate.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <sys/types.h>
-#include <stdint.h>
-#include <string.h>
-
-#include <nuttx/arch.h>
-#include <arch/irq.h>
-
-#include "riscv_internal.h"
-#include "riscv_arch.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_initial_state
- *
- * Description:
- * A new thread is being started and a new TCB
- * has been created. This function is called to initialize
- * the processor specific portions of the new TCB.
- *
- * This function must setup the initial architecture registers
- * and/or stack so that execution will begin at tcb->start
- * on the next context switch.
- *
- ****************************************************************************/
-
-void up_initial_state(struct tcb_s *tcb)
-{
- struct xcptcontext *xcp = &tcb->xcp;
- uint32_t regval;
-
- /* Initialize the idle thread stack */
-
- if (tcb->pid == 0)
- {
- tcb->stack_alloc_ptr = (void *)(g_idle_topstack -
- CONFIG_IDLETHREAD_STACKSIZE);
- tcb->stack_base_ptr = tcb->stack_alloc_ptr;
- tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE;
-
-#ifdef CONFIG_STACK_COLORATION
- /* If stack debug is enabled, then fill the stack with a
- * recognizable value that we can use later to test for high
- * water marks.
- */
-
- riscv_stack_color(tcb->stack_alloc_ptr, 0);
-#endif /* CONFIG_STACK_COLORATION */
- }
-
- /* Initialize the initial exception register context structure */
-
- memset(xcp, 0, sizeof(struct xcptcontext));
-
- /* Save the initial stack pointer. Hmmm.. the stack is set to the very
- * beginning of the stack region. Some functions may want to store data on
- * the caller's stack and it might be good to reserve some space. However,
- * only the start function would do that and we have control over that one
- */
-
- xcp->regs[REG_SP] = (uint32_t)tcb->stack_base_ptr +
- tcb->adj_stack_size;
-
- /* Save the task entry point */
-
- xcp->regs[REG_EPC] = (uint32_t)tcb->start;
-
- /* Setup thread local storage pointer */
-
-#ifdef CONFIG_SCHED_THREAD_LOCAL
- xcp->regs[REG_TP] = (uint32_t)tcb->stack_alloc_ptr +
- sizeof(struct tls_info_s);
-#endif
-
- /* If this task is running PIC, then set the PIC base register to the
- * address of the allocated D-Space region.
- */
-
-#ifdef CONFIG_PIC
-# warning "Missing logic"
-#endif
-
- /* Set privileged- or unprivileged-mode, depending on how NuttX is
- * configured and what kind of thread is being started.
- *
- * If the kernel build is not selected, then all threads run in
- * privileged thread mode.
- */
-
-#ifdef CONFIG_BUILD_KERNEL
-# warning "Missing logic"
-#endif
-
- /* Set the initial value of the interrupt context register.
- *
- * Since various RISC-V platforms use different interrupt
- * methodologies, the value of the interrupt context is
- * part specific.
- *
- */
-
- regval = riscv_get_newintctx();
- xcp->regs[REG_INT_CTX] = regval;
-}