You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by xi...@apache.org on 2020/12/01 04:27:46 UTC

[incubator-nuttx] branch master updated: stm32/stm32h7: fix the configuration of PWM outputs when subsequent channels are not enabled (eg. CH1 and CH2 disabled, CH3 enabled)

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 756cb41  stm32/stm32h7: fix the configuration of PWM outputs when subsequent channels are not enabled (eg. CH1 and CH2 disabled, CH3 enabled)
756cb41 is described below

commit 756cb41a6c6ae4d7a7e681cdf27e562c251f50e7
Author: raiden00pl <ra...@railab.me>
AuthorDate: Mon Nov 30 15:53:56 2020 +0100

    stm32/stm32h7: fix the configuration of PWM outputs when subsequent channels are not enabled (eg. CH1 and CH2 disabled, CH3 enabled)
    
    Resolves issue #2446
---
 arch/arm/src/stm32/stm32_pwm.c   | 21 +++++++++++++--------
 arch/arm/src/stm32h7/stm32_pwm.c | 21 +++++++++++++--------
 2 files changed, 26 insertions(+), 16 deletions(-)

diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c
index 7dc9f3e..34602ea 100644
--- a/arch/arm/src/stm32/stm32_pwm.c
+++ b/arch/arm/src/stm32/stm32_pwm.c
@@ -448,7 +448,7 @@ static int pwm_mode_configure(FAR struct pwm_lowerhalf_s *dev,
                               uint8_t channel, uint32_t mode);
 static int pwm_timer_configure(FAR struct stm32_pwmtimer_s *priv);
 static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
-                                uint8_t channel);
+                                FAR struct stm32_pwmchan_s *chan);
 static int pwm_outputs_enable(FAR struct pwm_lowerhalf_s *dev,
                               uint16_t outputs, bool state);
 static int pwm_soft_update(FAR struct pwm_lowerhalf_s *dev);
@@ -2801,10 +2801,15 @@ errout:
  ****************************************************************************/
 
 static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
-                                uint8_t channel)
+                                FAR struct stm32_pwmchan_s *chan)
 {
   uint32_t cr2  = 0;
   uint32_t ccer = 0;
+  uint8_t  channel = 0;
+
+  /* Get channel */
+
+  channel = chan->channel;
 
   /* Get current registers state */
 
@@ -2817,7 +2822,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
 
   /* Configure output polarity (all PWM timers) */
 
-  if (priv->channels[channel - 1].out1.pol == STM32_POL_NEG)
+  if (chan->out1.pol == STM32_POL_NEG)
     {
       ccer |= (GTIM_CCER_CC1P << ((channel - 1) * 4));
     }
@@ -2832,7 +2837,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
     {
       /* Configure output IDLE State */
 
-      if (priv->channels[channel - 1].out1.idle == STM32_IDLE_ACTIVE)
+      if (chan->out1.idle == STM32_IDLE_ACTIVE)
         {
           cr2 |= (ATIM_CR2_OIS1 << ((channel - 1) * 2));
         }
@@ -2844,7 +2849,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
 #ifdef HAVE_PWM_COMPLEMENTARY
       /* Configure complementary output IDLE state */
 
-      if (priv->channels[channel - 1].out2.idle == STM32_IDLE_ACTIVE)
+      if (chan->out2.idle == STM32_IDLE_ACTIVE)
         {
           cr2 |= (ATIM_CR2_OIS1N << ((channel - 1) * 2));
         }
@@ -2855,7 +2860,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
 
       /* Configure complementary output polarity */
 
-      if (priv->channels[channel - 1].out2.pol == STM32_POL_NEG)
+      if (chan->out2.pol == STM32_POL_NEG)
         {
           ccer |= (ATIM_CCER_CC1NP << ((channel - 1) * 4));
         }
@@ -3298,7 +3303,7 @@ static int pwm_pulsecount_configure(FAR struct pwm_lowerhalf_s *dev)
 
           /* PWM outputs configuration */
 
-          pwm_output_configure(priv, priv->channels[j].channel);
+          pwm_output_configure(priv, &priv->channels[j]);
         }
     }
 
@@ -3545,7 +3550,7 @@ static int pwm_configure(FAR struct pwm_lowerhalf_s *dev)
 
           /* PWM outputs configuration */
 
-          ret = pwm_output_configure(priv, priv->channels[j].channel);
+          ret = pwm_output_configure(priv, &priv->channels[j]);
           if (ret < 0)
             {
               goto errout;
diff --git a/arch/arm/src/stm32h7/stm32_pwm.c b/arch/arm/src/stm32h7/stm32_pwm.c
index 6a2b932..cddb733 100644
--- a/arch/arm/src/stm32h7/stm32_pwm.c
+++ b/arch/arm/src/stm32h7/stm32_pwm.c
@@ -335,7 +335,7 @@ static int pwm_mode_configure(FAR struct pwm_lowerhalf_s *dev,
                               uint8_t channel, uint32_t mode);
 static int pwm_timer_configure(FAR struct stm32_pwmtimer_s *priv);
 static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
-                                uint8_t channel);
+                                FAR struct stm32_pwmchan_s *chan);
 static int pwm_outputs_enable(FAR struct pwm_lowerhalf_s *dev,
                               uint16_t outputs, bool state);
 static int pwm_soft_update(FAR struct pwm_lowerhalf_s *dev);
@@ -2519,10 +2519,15 @@ errout:
  ****************************************************************************/
 
 static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
-                                uint8_t channel)
+                                FAR struct stm32_pwmchan_s *chan)
 {
   uint32_t cr2  = 0;
   uint32_t ccer = 0;
+  uint8_t  channel = 0;
+
+  /* Get channel */
+
+  channel = chan->channel;
 
   /* Get current registers state */
 
@@ -2535,7 +2540,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
 
   /* Configure output polarity (all PWM timers) */
 
-  if (priv->channels[channel - 1].out1.pol == STM32_POL_NEG)
+  if (chan->out1.pol == STM32_POL_NEG)
     {
       ccer |= (GTIM_CCER_CC1P << ((channel - 1) * 4));
     }
@@ -2550,7 +2555,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
     {
       /* Configure output IDLE State */
 
-      if (priv->channels[channel - 1].out1.idle == STM32_IDLE_ACTIVE)
+      if (chan->out1.idle == STM32_IDLE_ACTIVE)
         {
           cr2 |= (ATIM_CR2_OIS1 << ((channel - 1) * 2));
         }
@@ -2562,7 +2567,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
 #ifdef HAVE_PWM_COMPLEMENTARY
       /* Configure complementary output IDLE state */
 
-      if (priv->channels[channel - 1].out2.idle == STM32_IDLE_ACTIVE)
+      if (chan->out2.idle == STM32_IDLE_ACTIVE)
         {
           cr2 |= (ATIM_CR2_OIS1N << ((channel - 1) * 2));
         }
@@ -2573,7 +2578,7 @@ static int pwm_output_configure(FAR struct stm32_pwmtimer_s *priv,
 
       /* Configure complementary output polarity */
 
-      if (priv->channels[channel - 1].out2.pol == STM32_POL_NEG)
+      if (chan->out2.pol == STM32_POL_NEG)
         {
           ccer |= (ATIM_CCER_CC1NP << ((channel - 1) * 4));
         }
@@ -3018,7 +3023,7 @@ static int pwm_pulsecount_configure(FAR struct pwm_lowerhalf_s *dev)
 
           /* PWM outputs configuration */
 
-          pwm_output_configure(priv, priv->channels[j].channel);
+          pwm_output_configure(priv, &priv->channels[j]);
         }
     }
 
@@ -3265,7 +3270,7 @@ static int pwm_configure(FAR struct pwm_lowerhalf_s *dev)
 
           /* PWM outputs configuration */
 
-          ret = pwm_output_configure(priv, priv->channels[j].channel);
+          ret = pwm_output_configure(priv, &priv->channels[j]);
           if (ret < 0)
             {
               goto errout;