You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by ma...@apache.org on 2022/03/22 22:24:04 UTC
[incubator-nuttx] branch master updated (68902d8 -> 23cfded)
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 68902d8 pid_t: unify usage of special task IDs
new 0e67dc8 xtensa/esp32s3: Add support for GPIO read/write operations
new 024364eb xtensa/esp32s3: Add support for GPIO pin interrupts
new 23cfded esp32s3-devkit: Add support for BOOT button as user button
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/xtensa/include/esp32s3/irq.h | 27 +-
arch/xtensa/src/esp32s3/Kconfig | 6 +
arch/xtensa/src/esp32s3/esp32s3_gpio.c | 313 ++++++++++++++++++++-
arch/xtensa/src/esp32s3/esp32s3_gpio.h | 119 +++++++-
arch/xtensa/src/esp32s3/esp32s3_irq.c | 5 +
boards/Kconfig | 2 +
.../configs/{nsh => buttons}/defconfig | 11 +-
boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs | 4 +
.../esp32s3/esp32s3-devkit/src/esp32s3-devkit.h | 6 +
.../esp32s3/esp32s3-devkit/src/esp32s3_bringup.c | 14 +
.../esp32s3-devkit/src/esp32s3_buttons.c} | 28 +-
11 files changed, 491 insertions(+), 44 deletions(-)
copy boards/xtensa/esp32s3/esp32s3-devkit/configs/{nsh => buttons}/defconfig (82%)
copy boards/xtensa/{esp32/esp32-devkitc/src/esp32_buttons.c => esp32s3/esp32s3-devkit/src/esp32s3_buttons.c} (88%)
[incubator-nuttx] 02/03: xtensa/esp32s3: Add support for GPIO pin interrupts
Posted by ma...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 024364ebbd0b0cac0cd467a7ad232616f8c22c45
Author: Gustavo Henrique Nihei <gu...@espressif.com>
AuthorDate: Fri Mar 18 17:35:05 2022 -0300
xtensa/esp32s3: Add support for GPIO pin interrupts
Signed-off-by: Gustavo Henrique Nihei <gu...@espressif.com>
---
arch/xtensa/include/esp32s3/irq.h | 27 ++--
arch/xtensa/src/esp32s3/Kconfig | 6 +
arch/xtensa/src/esp32s3/esp32s3_gpio.c | 223 +++++++++++++++++++++++++++++++++
arch/xtensa/src/esp32s3/esp32s3_gpio.h | 82 ++++++++++--
arch/xtensa/src/esp32s3/esp32s3_irq.c | 5 +
5 files changed, 323 insertions(+), 20 deletions(-)
diff --git a/arch/xtensa/include/esp32s3/irq.h b/arch/xtensa/include/esp32s3/irq.h
index fecdb3c..b379a22 100644
--- a/arch/xtensa/include/esp32s3/irq.h
+++ b/arch/xtensa/include/esp32s3/irq.h
@@ -26,6 +26,12 @@
#define __ARCH_XTENSA_INCLUDE_ESP32S3_IRQ_H
/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@@ -309,19 +315,20 @@
#define ESP32S3_NIRQ_PERIPH ESP32S3_NPERIPHERALS
-/* Second level GPIO interrupts. GPIO interrupts are decoded and dispatched
- * as a second level of decoding: The first level dispatches to the GPIO
- * interrupt handler. The second to the decoded GPIO interrupt handler.
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+
+/* Second level GPIO interrupts. GPIO interrupts are decoded and dispatched
+ * as a second level of decoding: The first level dispatches to the GPIO
+ * interrupt handler. The second to the decoded GPIO interrupt handler.
*/
-#ifdef CONFIG_ESP32S3_GPIO_IRQ
-# define ESP32S3_NIRQ_GPIO 40
-# define ESP32S3_FIRST_GPIOIRQ (XTENSA_NIRQ_INTERNAL + ESP32S3_NIRQ_PERIPH)
-# define ESP32S3_LAST_GPIOIRQ (ESP32S3_FIRST_GPIOIRQ + ESP32S3_NIRQ_GPIO - 1)
-# define ESP32S3_PIN2IRQ(p) ((p) + ESP32S3_FIRST_GPIOIRQ)
-# define ESP32S3_IRQ2PIN(i) ((i) - ESP32S3_FIRST_GPIOIRQ)
+# define ESP32S3_NIRQ_GPIO 49
+# define ESP32S3_FIRST_GPIOIRQ (XTENSA_NIRQ_INTERNAL + ESP32S3_NIRQ_PERIPH)
+# define ESP32S3_LAST_GPIOIRQ (ESP32S3_FIRST_GPIOIRQ + ESP32S3_NIRQ_GPIO - 1)
+# define ESP32S3_PIN2IRQ(p) ((p) + ESP32S3_FIRST_GPIOIRQ)
+# define ESP32S3_IRQ2PIN(i) ((i) - ESP32S3_FIRST_GPIOIRQ)
#else
-# define ESP32S3_NIRQ_GPIO 0
+# define ESP32S3_NIRQ_GPIO 0
#endif
/* Total number of interrupts */
diff --git a/arch/xtensa/src/esp32s3/Kconfig b/arch/xtensa/src/esp32s3/Kconfig
index ab7a142..d9896ab 100644
--- a/arch/xtensa/src/esp32s3/Kconfig
+++ b/arch/xtensa/src/esp32s3/Kconfig
@@ -511,6 +511,12 @@ config ESP32S3_SPIRAM_IGNORE_NOTFOUND
endmenu # SPI RAM Configuration
+config ESP32S3_GPIO_IRQ
+ bool "GPIO pin interrupts"
+ default n
+ ---help---
+ Enable support for interrupting GPIO pins.
+
menu "UART Configuration"
depends on ESP32S3_UART
diff --git a/arch/xtensa/src/esp32s3/esp32s3_gpio.c b/arch/xtensa/src/esp32s3/esp32s3_gpio.c
index c8f499d..c10948a 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_gpio.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_gpio.c
@@ -49,6 +49,10 @@
* Private Data
****************************************************************************/
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+static int g_gpio_cpuint;
+#endif
+
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -75,6 +79,94 @@ static inline bool is_valid_gpio(uint32_t pin)
}
/****************************************************************************
+ * Name: gpio_dispatch
+ *
+ * Description:
+ * Second level dispatch for GPIO interrupt handling.
+ *
+ * Input Parameters:
+ * irq - GPIO IRQ number.
+ * status - Value from the GPIO interrupt status clear register.
+ * regs - Saved CPU context.
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+static void gpio_dispatch(int irq, uint32_t status, uint32_t *regs)
+{
+ uint32_t mask;
+ int i;
+
+ /* Check each bit in the status register */
+
+ for (i = 0; i < 32 && status != 0; i++)
+ {
+ /* Check if there is an interrupt pending for this pin */
+
+ mask = UINT32_C(1) << i;
+ if ((status & mask) != 0)
+ {
+ /* Yes... perform the second level dispatch */
+
+ irq_dispatch(irq + i, regs);
+
+ /* Clear the bit in the status so that we might execute this loop
+ * sooner.
+ */
+
+ status &= ~mask;
+ }
+ }
+}
+#endif
+
+/****************************************************************************
+ * Name: gpio_interrupt
+ *
+ * Description:
+ * GPIO interrupt handler.
+ *
+ * Input Parameters:
+ * irq - Identifier of the interrupt request.
+ * context - Context data from the ISR.
+ * arg - Opaque pointer to the internal driver state structure.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned
+ * on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+static int gpio_interrupt(int irq, void *context, void *arg)
+{
+ uint32_t status;
+
+ /* Read and clear the lower GPIO interrupt status */
+
+ status = getreg32(GPIO_STATUS_REG);
+ putreg32(status, GPIO_STATUS_W1TC_REG);
+
+ /* Dispatch pending interrupts in the lower GPIO status register */
+
+ gpio_dispatch(ESP32S3_FIRST_GPIOIRQ, status, (uint32_t *)context);
+
+ /* Read and clear the upper GPIO interrupt status */
+
+ status = getreg32(GPIO_STATUS1_REG);
+ putreg32(status, GPIO_STATUS1_W1TC_REG);
+
+ /* Dispatch pending interrupts in the lower GPIO status register */
+
+ gpio_dispatch(ESP32S3_FIRST_GPIOIRQ + 32, status, (uint32_t *)context);
+ return OK;
+}
+#endif
+
+/****************************************************************************
* Public Functions
****************************************************************************/
@@ -275,6 +367,137 @@ bool esp32s3_gpioread(int pin)
}
/****************************************************************************
+ * Name: esp32s3_gpioirqinitialize
+ *
+ * Description:
+ * Initialize logic to support a second level of interrupt decoding for
+ * GPIO pins.
+ *
+ * Input Parameters:
+ * None.
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+void esp32s3_gpioirqinitialize(void)
+{
+ int cpu;
+
+ /* Setup the GPIO interrupt. */
+
+ cpu = up_cpu_index();
+
+ g_gpio_cpuint = esp32s3_setup_irq(cpu, ESP32S3_PERIPH_GPIO_INT_CPU, 1,
+ ESP32S3_CPUINT_LEVEL);
+ DEBUGASSERT(g_gpio_cpuint >= 0);
+
+ /* Attach and enable the interrupt handler */
+
+ DEBUGVERIFY(irq_attach(ESP32S3_IRQ_GPIO_INT_CPU, gpio_interrupt, NULL));
+ up_enable_irq(ESP32S3_IRQ_GPIO_INT_CPU);
+}
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_gpioirqenable
+ *
+ * Description:
+ * Enable the interrupt for the specified GPIO IRQ.
+ *
+ * Input Parameters:
+ * irq - Identifier of the interrupt request.
+ * intrtype - Interrupt type, select from gpio_intrtype_t.
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+void esp32s3_gpioirqenable(int irq, gpio_intrtype_t intrtype)
+{
+ uintptr_t regaddr;
+ uint32_t regval;
+ int pin;
+
+ DEBUGASSERT(irq >= ESP32S3_FIRST_GPIOIRQ && irq <= ESP32S3_LAST_GPIOIRQ);
+
+ /* Convert the IRQ number to a pin number */
+
+ pin = ESP32S3_IRQ2PIN(irq);
+
+ /* Disable the GPIO interrupt during the configuration. */
+
+ up_disable_irq(ESP32S3_IRQ_GPIO_INT_CPU);
+
+ /* Get the address of the GPIO PIN register for this pin */
+
+ regaddr = GPIO_REG(pin);
+ regval = getreg32(regaddr);
+ regval &= ~(GPIO_PIN0_INT_ENA_M | GPIO_PIN0_INT_TYPE_M);
+
+ /* Set the pin ENA field.
+ * On ESP32-S3, CPU0 and CPU1 share the same interrupt enable bit.
+ */
+
+ regval |= GPIO_PIN0_INT_ENA_M;
+ regval |= (uint32_t)intrtype << GPIO_PIN0_INT_TYPE_S;
+ putreg32(regval, regaddr);
+
+ /* Configuration done. Re-enable the GPIO interrupt. */
+
+ up_enable_irq(ESP32S3_IRQ_GPIO_INT_CPU);
+}
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_gpioirqdisable
+ *
+ * Description:
+ * Disable the interrupt for the specified GPIO IRQ.
+ *
+ * Input Parameters:
+ * irq - Identifier of the interrupt request.
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+void esp32s3_gpioirqdisable(int irq)
+{
+ uintptr_t regaddr;
+ uint32_t regval;
+ int pin;
+
+ DEBUGASSERT(irq >= ESP32S3_FIRST_GPIOIRQ && irq <= ESP32S3_LAST_GPIOIRQ);
+
+ /* Convert the IRQ number to a pin number */
+
+ pin = ESP32S3_IRQ2PIN(irq);
+
+ /* Disable the GPIO interrupt during the configuration. */
+
+ up_disable_irq(ESP32S3_IRQ_GPIO_INT_CPU);
+
+ /* Reset the pin ENA and TYPE fields */
+
+ regaddr = GPIO_REG(pin);
+ regval = getreg32(regaddr);
+ regval &= ~(GPIO_PIN0_INT_ENA_M | GPIO_PIN0_INT_TYPE_M);
+ putreg32(regval, regaddr);
+
+ /* Configuration done. Re-enable the GPIO interrupt. */
+
+ up_enable_irq(ESP32S3_IRQ_GPIO_INT_CPU);
+}
+#endif
+
+/****************************************************************************
* Name: esp32s3_gpio_matrix_in
*
* Description:
diff --git a/arch/xtensa/src/esp32s3/esp32s3_gpio.h b/arch/xtensa/src/esp32s3/esp32s3_gpio.h
index 35367d2..7d2c203 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_gpio.h
+++ b/arch/xtensa/src/esp32s3/esp32s3_gpio.h
@@ -93,15 +93,6 @@
# define OUTPUT_FUNCTION_5 (OUTPUT_FUNCTION | FUNCTION_5)
# define OUTPUT_FUNCTION_6 (OUTPUT_FUNCTION | FUNCTION_6)
-/* Interrupt type used with esp32s3_gpioirqenable() */
-
-#define DISABLED 0x00
-#define RISING 0x01
-#define FALLING 0x02
-#define CHANGE 0x03
-#define ONLOW 0x04
-#define ONHIGH 0x05
-
/****************************************************************************
* Public Types
****************************************************************************/
@@ -111,7 +102,16 @@
/* Must be big enough to hold the above encodings */
typedef uint16_t gpio_pinattr_t;
-typedef uint8_t gpio_intrtype_t;
+
+typedef enum gpio_intrtype_e
+{
+ GPIO_INTR_DISABLE = 0, /* Disable GPIO interrupt */
+ GPIO_INTR_POSEDGE = 1, /* Rising edge */
+ GPIO_INTR_NEGEDGE = 2, /* Falling edge */
+ GPIO_INTR_ANYEDGE = 3, /* Both rising and falling edge */
+ GPIO_INTR_LOW_LEVEL = 4, /* Input low level trigger */
+ GPIO_INTR_HIGH_LEVEL = 5 /* Input high level trigger */
+} gpio_intrtype_t;
/****************************************************************************
* Public Data
@@ -131,6 +131,27 @@ extern "C"
****************************************************************************/
/****************************************************************************
+ * Name: esp32s3_gpioirqinitialize
+ *
+ * Description:
+ * Initialize logic to support a second level of interrupt decoding for
+ * GPIO pins.
+ *
+ * Input Parameters:
+ * None.
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+void esp32s3_gpioirqinitialize(void);
+#else
+# define esp32s3_gpioirqinitialize()
+#endif
+
+/****************************************************************************
* Name: esp32s3_configgpio
*
* Description:
@@ -190,6 +211,47 @@ void esp32s3_gpiowrite(int pin, bool value);
bool esp32s3_gpioread(int pin);
/****************************************************************************
+ * Name: esp32s3_gpioirqenable
+ *
+ * Description:
+ * Enable the interrupt for the specified GPIO IRQ.
+ *
+ * Input Parameters:
+ * irq - Identifier of the interrupt request.
+ * intrtype - Interrupt type, select from gpio_intrtype_t.
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+void esp32s3_gpioirqenable(int irq, gpio_intrtype_t intrtype);
+#else
+# define esp32s3_gpioirqenable(irq,intrtype)
+#endif
+
+/****************************************************************************
+ * Name: esp32s3_gpioirqdisable
+ *
+ * Description:
+ * Disable the interrupt for the specified GPIO IRQ.
+ *
+ * Input Parameters:
+ * irq - Identifier of the interrupt request.
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESP32S3_GPIO_IRQ
+void esp32s3_gpioirqdisable(int irq);
+#else
+# define esp32s3_gpioirqdisable(irq)
+#endif
+
+/****************************************************************************
* Name: esp32s3_gpio_matrix_in
*
* Description:
diff --git a/arch/xtensa/src/esp32s3/esp32s3_irq.c b/arch/xtensa/src/esp32s3/esp32s3_irq.c
index 5e98d4b..c9f1d8e 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_irq.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_irq.c
@@ -38,6 +38,7 @@
#include "xtensa.h"
+#include "esp32s3_gpio.h"
#include "esp32s3_irq.h"
#ifdef CONFIG_SMP
#include "esp32s3_smp.h"
@@ -446,6 +447,10 @@ void up_irqinitialize(void)
xtensa_attach_fromcpu1_interrupt();
#endif
+ /* Initialize GPIO interrupt support */
+
+ esp32s3_gpioirqinitialize();
+
#ifndef CONFIG_SUPPRESS_INTERRUPTS
/* And finally, enable interrupts. Also clears PS.EXCM */
[incubator-nuttx] 03/03: esp32s3-devkit: Add support for BOOT button as user button
Posted by ma...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 23cfded18fb7f53c3de5fc545b7f032a1b9e9275
Author: Gustavo Henrique Nihei <gu...@espressif.com>
AuthorDate: Mon Mar 21 16:32:55 2022 -0300
esp32s3-devkit: Add support for BOOT button as user button
Signed-off-by: Gustavo Henrique Nihei <gu...@espressif.com>
---
boards/Kconfig | 2 +
.../esp32s3-devkit/configs/buttons/defconfig | 57 +++++++
boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs | 4 +
.../esp32s3/esp32s3-devkit/src/esp32s3-devkit.h | 6 +
.../esp32s3/esp32s3-devkit/src/esp32s3_bringup.c | 14 ++
.../esp32s3/esp32s3-devkit/src/esp32s3_buttons.c | 164 +++++++++++++++++++++
6 files changed, 247 insertions(+)
diff --git a/boards/Kconfig b/boards/Kconfig
index 4d8c449..a571070 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -283,6 +283,8 @@ config ARCH_BOARD_ESP32S3_DEVKIT
bool "Espressif ESP32-S3 DevKit"
depends on ARCH_CHIP_ESP32S3WROOM1 || ARCH_CHIP_ESP32S3MINI1
select ARCH_HAVE_LEDS
+ select ARCH_HAVE_BUTTONS
+ select ARCH_HAVE_IRQBUTTONS if ESP32S3_GPIO_IRQ
---help---
The ESP32-S3 DevKit features the ESP32-S3 CPU with dual Xtensa LX7 cores.
It comes in two flavors, the ESP32-S3-DevKitM-1 and the ESP32-S3-DevKitC-1.
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/configs/buttons/defconfig b/boards/xtensa/esp32s3/esp32s3-devkit/configs/buttons/defconfig
new file mode 100644
index 0000000..3ecc366
--- /dev/null
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/configs/buttons/defconfig
@@ -0,0 +1,57 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_LEDS is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_ARCH="xtensa"
+CONFIG_ARCH_BOARD="esp32s3-devkit"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32S3_DEVKIT=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="esp32s3"
+CONFIG_ARCH_CHIP_ESP32S3=y
+CONFIG_ARCH_CHIP_ESP32S3WROOM1=y
+CONFIG_ARCH_IRQBUTTONS=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_XTENSA=y
+CONFIG_BOARD_LOOPSPERMSEC=16717
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ESP32S3_GPIO_IRQ=y
+CONFIG_ESP32S3_UART0=y
+CONFIG_EXAMPLES_BUTTONS=y
+CONFIG_EXAMPLES_BUTTONS_NAME0="BOOT"
+CONFIG_EXAMPLES_BUTTONS_NAMES=y
+CONFIG_EXAMPLES_BUTTONS_QTD=1
+CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=3072
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INPUT=y
+CONFIG_INPUT_BUTTONS=y
+CONFIG_INPUT_BUTTONS_LOWER=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=114688
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=6
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2011
+CONFIG_SYSTEM_NSH=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs b/boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs
index 25297e8..6599361 100644
--- a/boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs
@@ -33,6 +33,10 @@ CSRCS += esp32s3_reset.c
endif
endif
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += esp32s3_buttons.c
+endif
+
SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32s3.template.ld
SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32s3_out.ld
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3-devkit.h b/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3-devkit.h
index 5588ecc..be39476 100644
--- a/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3-devkit.h
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3-devkit.h
@@ -33,6 +33,12 @@
* Pre-processor Definitions
****************************************************************************/
+/* ESP32-S3-DEVKIT GPIOs ****************************************************/
+
+/* BOOT Button */
+
+#define BUTTON_BOOT 0
+
/****************************************************************************
* Public Types
****************************************************************************/
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c b/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c
index 8813a64d..555c010 100644
--- a/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c
@@ -50,6 +50,10 @@
# include "esp32s3_board_wdt.h"
#endif
+#ifdef CONFIG_INPUT_BUTTONS
+# include <nuttx/input/buttons.h>
+#endif
+
#include "esp32s3-devkit.h"
/****************************************************************************
@@ -123,6 +127,16 @@ int esp32s3_bringup(void)
}
#endif
+#ifdef CONFIG_INPUT_BUTTONS
+ /* Register the BUTTON driver */
+
+ ret = btn_lower_initialize("/dev/buttons");
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize button driver: %d\n", ret);
+ }
+#endif
+
#ifdef CONFIG_ESP32S3_SPIFLASH
ret = board_spiflash_init();
if (ret)
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_buttons.c b/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_buttons.c
new file mode 100644
index 0000000..b8be81c
--- /dev/null
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_buttons.c
@@ -0,0 +1,164 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_buttons.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <assert.h>
+#include <debug.h>
+#include <stdbool.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+#include <nuttx/irq.h>
+
+#include "esp32s3_gpio.h"
+#include "hardware/esp32s3_gpio_sigmap.h"
+
+#include "esp32s3-devkit.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ * board_button_initialize() must be called to initialize button resources.
+ * After that, board_buttons() may be called to collect the current state
+ * of all buttons or board_button_irq() may be called to register button
+ * interrupt handlers.
+ *
+ ****************************************************************************/
+
+uint32_t board_button_initialize(void)
+{
+ esp32s3_configgpio(BUTTON_BOOT, INPUT_FUNCTION_2 | PULLUP);
+ return 1;
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ *
+ * Description:
+ * After board_button_initialize() has been called, board_buttons() may be
+ * called to collect the state of all buttons. board_buttons() returns an
+ * 8-bit bit set with each bit associated with a button. See the
+ * BUTTON_*_BIT definitions in board.h for the meaning of each bit.
+ *
+ ****************************************************************************/
+
+uint32_t board_buttons(void)
+{
+ uint8_t ret = 0;
+ int i = 0;
+ int n = 0;
+
+ bool b0 = esp32s3_gpioread(BUTTON_BOOT);
+
+ for (i = 0; i < 10; i++)
+ {
+ up_mdelay(1);
+
+ bool b1 = esp32s3_gpioread(BUTTON_BOOT);
+
+ if (b0 == b1)
+ {
+ n++;
+ }
+ else
+ {
+ n = 0;
+ }
+
+ if (3 == n)
+ {
+ break;
+ }
+
+ b0 = b1;
+ }
+
+ iinfo("b=%d n=%d\n", b0, n);
+
+ /* Low value means that the button is pressed */
+
+ if (!b0)
+ {
+ ret = 0x1;
+ }
+
+ return ret;
+}
+
+/****************************************************************************
+ * Name: board_button_irq
+ *
+ * Description:
+ * board_button_irq() may be called to register an interrupt handler that
+ * will be called when a button is depressed or released. The ID value is
+ * a button enumeration value that uniquely identifies a button resource.
+ * See the BUTTON_* definitions in board.h for the meaning of enumeration
+ * value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+ int ret;
+ DEBUGASSERT(id == BUTTON_BOOT);
+
+ int irq = ESP32S3_PIN2IRQ(BUTTON_BOOT);
+
+ if (irqhandler != NULL)
+ {
+ /* Make sure the interrupt is disabled */
+
+ esp32s3_gpioirqdisable(irq);
+
+ ret = irq_attach(irq, irqhandler, arg);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: irq_attach() failed: %d\n", ret);
+ return ret;
+ }
+
+ gpioinfo("Attach %p\n", irqhandler);
+
+ gpioinfo("Enabling the interrupt\n");
+
+ /* Configure the interrupt for rising and falling edges */
+
+ esp32s3_gpioirqenable(irq, GPIO_INTR_ANYEDGE);
+ }
+ else
+ {
+ gpioinfo("Disable the interrupt\n");
+ esp32s3_gpioirqdisable(irq);
+ }
+
+ return OK;
+}
+#endif
[incubator-nuttx] 01/03: xtensa/esp32s3: Add support for GPIO read/write operations
Posted by ma...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 0e67dc8637638908303a5cb08dc9f939f704fc87
Author: Gustavo Henrique Nihei <gu...@espressif.com>
AuthorDate: Fri Mar 18 17:34:02 2022 -0300
xtensa/esp32s3: Add support for GPIO read/write operations
Signed-off-by: Gustavo Henrique Nihei <gu...@espressif.com>
---
arch/xtensa/src/esp32s3/esp32s3_gpio.c | 90 +++++++++++++++++++++++++++++++---
arch/xtensa/src/esp32s3/esp32s3_gpio.h | 37 +++++++++++++-
2 files changed, 119 insertions(+), 8 deletions(-)
diff --git a/arch/xtensa/src/esp32s3/esp32s3_gpio.c b/arch/xtensa/src/esp32s3/esp32s3_gpio.c
index a562dc0..c8f499d 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_gpio.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_gpio.c
@@ -24,21 +24,20 @@
#include <nuttx/config.h>
-#include <sys/types.h>
-#include <stdint.h>
#include <assert.h>
#include <debug.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include <sys/types.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
-#include <arch/irq.h>
#include "xtensa.h"
+#include "esp32s3_gpio.h"
#include "esp32s3_irq.h"
-#include "hardware/esp32s3_iomux.h"
#include "hardware/esp32s3_gpio.h"
-
-#include "esp32s3_gpio.h"
+#include "hardware/esp32s3_iomux.h"
/****************************************************************************
* Pre-processor Definitions
@@ -199,11 +198,88 @@ int esp32s3_configgpio(uint32_t pin, gpio_pinattr_t attr)
}
/****************************************************************************
+ * Name: esp32s3_gpiowrite
+ *
+ * Description:
+ * Write one or zero to the selected GPIO pin.
+ *
+ * Input Parameters:
+ * pin - GPIO pin to be written.
+ * value - Value to be written to the GPIO pin. True will output
+ * 1 (one) to the GPIO, while false will output 0 (zero).
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+void esp32s3_gpiowrite(int pin, bool value)
+{
+ DEBUGASSERT(is_valid_gpio(pin));
+
+ if (value)
+ {
+ if (pin < 32)
+ {
+ putreg32(UINT32_C(1) << pin, GPIO_OUT_W1TS_REG);
+ }
+ else
+ {
+ putreg32(UINT32_C(1) << (pin - 32), GPIO_OUT1_W1TS_REG);
+ }
+ }
+ else
+ {
+ if (pin < 32)
+ {
+ putreg32(UINT32_C(1) << pin, GPIO_OUT_W1TC_REG);
+ }
+ else
+ {
+ putreg32(UINT32_C(1) << (pin - 32), GPIO_OUT1_W1TC_REG);
+ }
+ }
+}
+
+/****************************************************************************
+ * Name: esp32s3_gpioread
+ *
+ * Description:
+ * Read one or zero from the selected GPIO pin.
+ *
+ * Input Parameters:
+ * pin - GPIO pin to be read.
+ *
+ * Returned Value:
+ * True in case the read value is 1 (one). If 0 (zero), then false will be
+ * returned.
+ *
+ ****************************************************************************/
+
+bool esp32s3_gpioread(int pin)
+{
+ uint32_t regval;
+
+ DEBUGASSERT(is_valid_gpio(pin));
+
+ if (pin < 32)
+ {
+ regval = getreg32(GPIO_IN_REG);
+ return ((regval >> pin) & 1) != 0;
+ }
+ else
+ {
+ regval = getreg32(GPIO_IN1_REG);
+ return ((regval >> (pin - 32)) & 1) != 0;
+ }
+}
+
+/****************************************************************************
* Name: esp32s3_gpio_matrix_in
*
* Description:
* Set GPIO input to a signal.
- * NOTE: one GPIO can input to several signals.
+ * NOTE: one GPIO can receive inputs from several signals.
*
* Input Parameters:
* pin - GPIO pin to be configured.
diff --git a/arch/xtensa/src/esp32s3/esp32s3_gpio.h b/arch/xtensa/src/esp32s3/esp32s3_gpio.h
index b173e04..35367d2 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_gpio.h
+++ b/arch/xtensa/src/esp32s3/esp32s3_gpio.h
@@ -155,11 +155,46 @@ extern "C"
int esp32s3_configgpio(uint32_t pin, gpio_pinattr_t attr);
/****************************************************************************
+ * Name: esp32s3_gpiowrite
+ *
+ * Description:
+ * Write one or zero to the selected GPIO pin.
+ *
+ * Input Parameters:
+ * pin - GPIO pin to be written.
+ * value - Value to be written to the GPIO pin. True will output
+ * 1 (one) to the GPIO, while false will output 0 (zero).
+ *
+ * Returned Value:
+ * None.
+ *
+ ****************************************************************************/
+
+void esp32s3_gpiowrite(int pin, bool value);
+
+/****************************************************************************
+ * Name: esp32s3_gpioread
+ *
+ * Description:
+ * Read one or zero from the selected GPIO pin.
+ *
+ * Input Parameters:
+ * pin - GPIO pin to be read.
+ *
+ * Returned Value:
+ * True in case the read value is 1 (one). If 0 (zero), then false will be
+ * returned.
+ *
+ ****************************************************************************/
+
+bool esp32s3_gpioread(int pin);
+
+/****************************************************************************
* Name: esp32s3_gpio_matrix_in
*
* Description:
* Set GPIO input to a signal.
- * NOTE: one GPIO can input to several signals.
+ * NOTE: one GPIO can receive inputs from several signals.
*
* Input Parameters:
* pin - GPIO pin to be configured.