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Posted to dev@harmony.apache.org by Estelle Liu <ly...@gmail.com> on 2008/03/03 11:37:51 UTC

[jitrino]assertion error

Hi,all.
  We tried to insert an instruction in HIR, and when the instrumented code
run into Ia32RegAlloc2, the assertion  "assert(pspans[i].beg != 0);" in
method RegAlloc2::Opand::update() failed. I wonder the possible reasons to
result in this occasion, could anyone give some suggestion?
Thanks very much!
-- 
Estelle

Re: [jitrino]assertion error

Posted by George Timoshenko <ge...@gmail.com>.
I do not understand what kind of checks you are writing about here:
 > must we do some check works for the src operand in
 > resolution, or else if the same problem will occur?

It is a common rule: each operand must be defined at the usage point.
I use opndX, so it must contain some value - i.e. opndX must be a 
destination operand of some instruction (in HIR).
The same is in LIR, but there can be immediate operands. They just 
contain a constant value.

Do you find the point, where your undefined operand appears for the 
first time?






Estelle Liu wrote:
> Thanks, George.
> But when a new instruction was inserted into HIR, we just use the defined
> operand as the source operand which act as the dst operand of a former
> instruction , and then create a new operand as the dst operand.
> And we also define the resolution of that new instruction in
> Ia32codeselector, must we do some check works for the src operand in
> resolution, or else if the same problem will occur?
> 
> Thanks a lot!
> 
> 
> 2008/3/4, George Timoshenko <ge...@gmail.com>:
>> That assertion in RegAlloc is not related to the register allocation
>> itself.
>>
>> Such assertion means, that there is a use of operand that may be
>> undefined at the point.
>> You need to identify the problem operand and then track the CFG state up
>> to the stage where the operand appears for the first time.
>> (create a log with irDumps for all stages)
>>
>>
>>
>> Estelle Liu wrote:
>>> Hi,all.
>>>   We tried to insert an instruction in HIR, and when the instrumented
>> code
>>> run into Ia32RegAlloc2, the assertion  "assert(pspans[i].beg != 0);" in
>>> method RegAlloc2::Opand::update() failed. I wonder the possible reasons
>> to
>>> result in this occasion, could anyone give some suggestion?
>>> Thanks very much!
>>
> 
> 


Re: [jitrino]assertion error

Posted by Estelle Liu <ly...@gmail.com>.
Thanks, George.
But when a new instruction was inserted into HIR, we just use the defined
operand as the source operand which act as the dst operand of a former
instruction , and then create a new operand as the dst operand.
And we also define the resolution of that new instruction in
Ia32codeselector, must we do some check works for the src operand in
resolution, or else if the same problem will occur?

Thanks a lot!


2008/3/4, George Timoshenko <ge...@gmail.com>:
>
> That assertion in RegAlloc is not related to the register allocation
> itself.
>
> Such assertion means, that there is a use of operand that may be
> undefined at the point.
> You need to identify the problem operand and then track the CFG state up
> to the stage where the operand appears for the first time.
> (create a log with irDumps for all stages)
>
>
>
> Estelle Liu wrote:
> > Hi,all.
> >   We tried to insert an instruction in HIR, and when the instrumented
> code
> > run into Ia32RegAlloc2, the assertion  "assert(pspans[i].beg != 0);" in
> > method RegAlloc2::Opand::update() failed. I wonder the possible reasons
> to
> > result in this occasion, could anyone give some suggestion?
> > Thanks very much!
>
>


-- 
Estelle

Re: [jitrino]assertion error

Posted by George Timoshenko <ge...@gmail.com>.
That assertion in RegAlloc is not related to the register allocation itself.

Such assertion means, that there is a use of operand that may be 
undefined at the point.
You need to identify the problem operand and then track the CFG state up 
to the stage where the operand appears for the first time.
(create a log with irDumps for all stages)


Estelle Liu wrote:
> Hi,all.
>   We tried to insert an instruction in HIR, and when the instrumented code
> run into Ia32RegAlloc2, the assertion  "assert(pspans[i].beg != 0);" in
> method RegAlloc2::Opand::update() failed. I wonder the possible reasons to
> result in this occasion, could anyone give some suggestion?
> Thanks very much!