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Posted to commits@mynewt.apache.org by vi...@apache.org on 2018/07/12 04:20:21 UTC
[mynewt-core] branch master updated: Add lock to charge control and
adp5061 and fix (#1262)
This is an automated email from the ASF dual-hosted git repository.
vipulrahane pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new cc405f4 Add lock to charge control and adp5061 and fix (#1262)
cc405f4 is described below
commit cc405f40f3f70d47d025bae43e1f41731e2634f5
Author: Vipul Rahane <vr...@gmail.com>
AuthorDate: Wed Jul 11 21:20:18 2018 -0700
Add lock to charge control and adp5061 and fix (#1262)
- Fix bq27z561 and add lock for adp5061
---
.../include/charge-control/charge_control.h | 3 +
hw/drivers/bq27z561/include/bq27z561/bq27z561.h | 2 +
hw/drivers/chg_ctrl/adp5061/src/adp5061.c | 71 ++++++++++++++++++++++
3 files changed, 76 insertions(+)
diff --git a/hw/charge-control/include/charge-control/charge_control.h b/hw/charge-control/include/charge-control/charge_control.h
index fb9ec26..c3b1b72 100644
--- a/hw/charge-control/include/charge-control/charge_control.h
+++ b/hw/charge-control/include/charge-control/charge_control.h
@@ -178,6 +178,9 @@ struct charge_control_itf {
/* Charge control interface address (for I2C interface type) */
uint16_t cci_addr;
+
+ /* OS lock for shared access */
+ struct os_mutex *cci_lock;
};
// ---------------------- LISTENER ---------------------------------
diff --git a/hw/drivers/bq27z561/include/bq27z561/bq27z561.h b/hw/drivers/bq27z561/include/bq27z561/bq27z561.h
index b92e0ce..82a4072 100644
--- a/hw/drivers/bq27z561/include/bq27z561/bq27z561.h
+++ b/hw/drivers/bq27z561/include/bq27z561/bq27z561.h
@@ -545,6 +545,8 @@ bq27z561_err_t bq27x561_rd_flash(struct bq27z561 *dev, uint16_t addr,
bq27z561_err_t bq27x561_rd_alt_mfg_cmd(struct bq27z561 *dev, uint16_t cmd,
uint8_t *val, int val_len);
+bq27z561_err_t bq27x561_wr_alt_mfg_cmd(struct bq27z561 *dev, uint16_t cmd,
+ uint8_t *buf, int len);
/**
* bq27z561 rd std reg word
*
diff --git a/hw/drivers/chg_ctrl/adp5061/src/adp5061.c b/hw/drivers/chg_ctrl/adp5061/src/adp5061.c
index de52fae..03b2d7c 100644
--- a/hw/drivers/chg_ctrl/adp5061/src/adp5061.c
+++ b/hw/drivers/chg_ctrl/adp5061/src/adp5061.c
@@ -139,6 +139,54 @@ adp5061_set_config(struct adp5061_dev *dev,
return rc;
}
+/**
+ * Lock access to the charge_control_itf specified by cci. Blocks until lock acquired.
+ *
+ * @param The charge_ctrl_itf to lock
+ * @param The timeout
+ *
+ * @return 0 on success, non-zero on failure.
+ */
+static int
+ad5061_itf_lock(struct charge_control_itf *cci, uint32_t timeout)
+{
+ int rc;
+ os_time_t ticks;
+
+ if (!cci->cci_lock) {
+ return 0;
+ }
+
+ rc = os_time_ms_to_ticks(timeout, &ticks);
+ if (rc) {
+ return rc;
+ }
+
+ rc = os_mutex_pend(cci->cci_lock, ticks);
+ if (rc == 0 || rc == OS_NOT_STARTED) {
+ return (0);
+ }
+
+ return (rc);
+}
+
+/**
+ * Unlock access to the charge_control_itf specified by bi.
+ *
+ * @param The charge_control_itf to unlock access to
+ *
+ * @return 0 on success, non-zero on failure.
+ */
+static void
+adp5061_itf_unlock(struct charge_control_itf *cci)
+{
+ if (!cci->cci_lock) {
+ return;
+ }
+
+ os_mutex_release(cci->cci_lock);
+}
+
int
adp5061_get_reg(struct adp5061_dev *dev, uint8_t addr, uint8_t *value)
{
@@ -149,6 +197,12 @@ adp5061_get_reg(struct adp5061_dev *dev, uint8_t addr, uint8_t *value)
.len = 1,
.buffer = &payload
};
+
+ rc = ad5061_itf_lock(&dev->a_chg_ctrl.cc_itf, OS_TIMEOUT_NEVER);
+ if (rc) {
+ return rc;
+ }
+
/* Register write */
payload = addr;
rc = hal_i2c_master_write(dev->a_chg_ctrl.cc_itf.cci_num, &data_struct,
@@ -156,12 +210,15 @@ adp5061_get_reg(struct adp5061_dev *dev, uint8_t addr, uint8_t *value)
if (rc) {
goto err;
}
+
/* Read one byte back */
payload = addr;
rc = hal_i2c_master_read(dev->a_chg_ctrl.cc_itf.cci_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
*value = payload;
+ adp5061_itf_unlock(&dev->a_chg_ctrl.cc_itf);
+
err:
return rc;
}
@@ -177,9 +234,16 @@ adp5061_set_reg(struct adp5061_dev *dev, uint8_t addr, uint8_t value)
.buffer = payload
};
+ rc = ad5061_itf_lock(&dev->a_chg_ctrl.cc_itf, OS_TIMEOUT_NEVER);
+ if (rc) {
+ return rc;
+ }
+
rc = hal_i2c_master_write(dev->a_chg_ctrl.cc_itf.cci_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
+ adp5061_itf_unlock(&dev->a_chg_ctrl.cc_itf);
+
return rc;
}
@@ -201,9 +265,16 @@ adp5061_set_regs(struct adp5061_dev *dev, uint8_t addr,
payload[i + 1] = values[i];
}
+ rc = ad5061_itf_lock(&dev->a_chg_ctrl.cc_itf, OS_TIMEOUT_NEVER);
+ if (rc) {
+ return rc;
+ }
+
rc = hal_i2c_master_write(dev->a_chg_ctrl.cc_itf.cci_num, &data_struct,
OS_TICKS_PER_SEC / 10, 1);
+ adp5061_itf_unlock(&dev->a_chg_ctrl.cc_itf);
+
return rc;
}