[GitHub] [nuttx] g2gps commented on a diff in pull request #8368: litex: Add GPIO driver.

["g2gps (via GitHub)" <gi...@apache.org>]

g2gps commented on code in PR #8368:
URL: https://github.com/apache/nuttx/pull/8368#discussion_r1092534840


##########
arch/risc-v/src/litex/litex_gpio.c:
##########
@@ -0,0 +1,357 @@
+/****************************************************************************
+ * arch/risc-v/src/litex/litex_gpio.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/irq.h>
+#include <arch/irq.h>
+
+#include "riscv_internal.h"
+#include "litex_gpio.h"
+#include "litex_memorymap.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define GPIO_REG_OE_OFFSET          0x00
+#define GPIO_REG_IN_OFFSET          0x04
+#define GPIO_REG_OUT_OFFSET         0x08
+#define GPIO_REG_MODE_OFFSET        0x0C
+#define GPIO_REG_EDGE_OFFSET        0x10
+#define GPIO_REG_EV_STATUS_OFFSET   0x14
+#define GPIO_REG_EV_PEND_OFFSET     0x18
+#define GPIO_REG_EV_ENABLE_OFFSET   0x1C
+
+#ifdef CONFIG_LITEX_GPIO_IRQ
+/* Helper to calculate the GPIO port index from an IRQ number. */
+#define irq_to_gpio_index(_irqno) (( _irqno - LITEX_IRQ_GPIO) % 32)
+
+/* Helper to calculate the extended IRQ number from GPIO  port index. */
+#define gpio_index_to_irq(_i, _p) ((_i * 32) + _p + LITEX_FIRST_GPIOIRQ)
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions Prototypes
+ ****************************************************************************/
+
+static uint32_t gpiobase_at(uint32_t index);
+
+#ifdef CONFIG_LITEX_GPIO_IRQ
+static void gpio_dispatch(int irq, uint32_t gpiobase, uint32_t * regs);
+static int litex_gpio_interrupt(int irq, void *context, void * arg);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* A lookup table to keep track of all the base addresses for all gateware
+ * defined GPIO peripherals. This saves calculating the actual base address
+ * in the ISR routines, as there is only an IRQ number available at that
+ * point.
+ *
+ * The actual memory addresses are populated the first time it is used.
+ */
+
+static uint32_t gpio_base_s[LITEX_GPIO_MAX] =
+{
+  0
+};
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static uint32_t gpiobase_at(uint32_t index)
+{
+  DEBUGASSERT(index < LITEX_GPIO_MAX);
+  if (gpio_base_s[0] == 0)
+    {
+      for (int i = 0; i < LITEX_GPIO_MAX; i++)
+        {
+          gpio_base_s[i] = LITEX_GPIO_BASE +
+                          (LITEX_GPIO_OFFSET * i);
+        }
+    }
+
+  return gpio_base_s[index];
+}
+
+#ifdef CONFIG_LITEX_GPIO_IRQ
+static void gpio_dispatch(int irq, uint32_t gpiobase, uint32_t * regs)
+{
+  int i;
+  int ndx = 0;
+  uint32_t bitmask;
+
+  /* Query which pin interrupts are enabled */
+
+  uint32_t enabled = getreg32(gpiobase + GPIO_REG_EV_ENABLE_OFFSET);
+
+  /* Query which interrupts are pending */
+
+  uint32_t pending = getreg32(gpiobase + GPIO_REG_EV_PEND_OFFSET);
+
+  while ((i = __builtin_ffs(pending)))

Review Comment:
   I modified this to use Nuttx's version, as I guess it is possible that a compiler is used which doesn't support this.  `CONFIG_HAVE_BUILTIN_FFS` can always be enabled in order to use the builtin version.



-- 
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.

To unsubscribe, e-mail: commits-unsubscribe@nuttx.apache.org

For queries about this service, please contact Infrastructure at:
users@infra.apache.org