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Posted to commits@mynewt.apache.org by st...@apache.org on 2016/07/28 00:18:54 UTC
[15/28] incubator-mynewt-core git commit: enable nrf51dk to use new
Nordic SDK
enable nrf51dk to use new Nordic SDK
Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo
Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/e6d4acd3
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/e6d4acd3
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/e6d4acd3
Branch: refs/heads/sterly_refactor
Commit: e6d4acd3d0ff95e5fb81e2dea747ca96df47600c
Parents: 76ae250
Author: Sterling Hughes <st...@apache.org>
Authored: Wed Jul 27 17:09:03 2016 -0700
Committer: Sterling Hughes <st...@apache.org>
Committed: Wed Jul 27 17:18:28 2016 -0700
----------------------------------------------------------------------
apps/blinky/src/main.c | 12 +-
hw/bsp/nrf51dk/include/bsp/boards.h | 0
hw/bsp/nrf51dk/include/bsp/cmsis_nvic.h | 2 +-
hw/bsp/nrf51dk/include/bsp/nrf_drv_config.h | 464 ++
hw/bsp/nrf51dk/src/system_nrf51.c | 20 +-
.../nrf51xxx/include/mcu/compiler_abstraction.h | 126 -
hw/mcu/nordic/nrf51xxx/include/mcu/cortex_m0.h | 2 +-
hw/mcu/nordic/nrf51xxx/include/mcu/nrf.h | 60 -
hw/mcu/nordic/nrf51xxx/include/mcu/nrf51.h | 1283 ----
.../nrf51xxx/include/mcu/nrf51422_peripherals.h | 116 -
.../nrf51xxx/include/mcu/nrf51822_peripherals.h | 116 -
.../nrf51xxx/include/mcu/nrf51_bitfields.h | 6883 ------------------
.../nrf51xxx/include/mcu/nrf51_deprecated.h | 438 --
.../nordic/nrf51xxx/include/mcu/system_nrf51.h | 69 -
hw/mcu/nordic/nrf51xxx/pkg.yml | 4 +
hw/mcu/nordic/nrf51xxx/src/hal_cputime.c | 4 +-
hw/mcu/nordic/nrf51xxx/src/hal_flash.c | 4 +-
hw/mcu/nordic/nrf51xxx/src/hal_gpio.c | 4 +-
hw/mcu/nordic/nrf51xxx/src/hal_os_tick.c | 8 +-
hw/mcu/nordic/nrf51xxx/src/hal_uart.c | 4 +-
hw/mcu/nordic/nrf51xxx/src/nrf51_hw_id.c | 2 +-
hw/mcu/nordic/pkg.yml | 13 +
22 files changed, 515 insertions(+), 9119 deletions(-)
----------------------------------------------------------------------
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e6d4acd3/apps/blinky/src/main.c
----------------------------------------------------------------------
diff --git a/apps/blinky/src/main.c b/apps/blinky/src/main.c
index f170d8a..fb9bb27 100755
--- a/apps/blinky/src/main.c
+++ b/apps/blinky/src/main.c
@@ -29,10 +29,11 @@
#ifdef ARCH_sim
#include <mcu/mcu_sim.h>
#endif
-
+#if 0
#include "nrf.h"
#include "nrf_drv_saadc.h"
#include "app_error.h"
+#endif
/* Init all tasks */
volatile int tasks_initialized;
@@ -75,7 +76,7 @@ uint8_t default_mbuf_mpool_data[DEFAULT_MBUF_MPOOL_BUF_LEN *
struct os_mbuf_pool default_mbuf_pool;
struct os_mempool default_mbuf_mpool;
-
+#if 0
#define SAADC_SAMPLES_IN_BUFFER (4)
static nrf_saadc_value_t m_buffer_pool[2][SAADC_SAMPLES_IN_BUFFER];
@@ -109,7 +110,7 @@ saadc_test(void)
rc = nrf_drv_saadc_buffer_convert(m_buffer_pool[1], SAADC_SAMPLES_IN_BUFFER);
APP_ERROR_CHECK(rc);
}
-
+#endif
void
task1_handler(void *arg)
@@ -135,7 +136,9 @@ task1_handler(void *arg)
/* Release semaphore to task 2 */
os_sem_release(&g_test_sem);
+#if 0
nrf_drv_saadc_sample();
+#endif
}
}
@@ -223,8 +226,9 @@ main(int argc, char **argv)
stats_module_init();
+#if 0
saadc_test();
-
+#endif
rc = init_tasks();
os_start();
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e6d4acd3/hw/bsp/nrf51dk/include/bsp/boards.h
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk/include/bsp/boards.h b/hw/bsp/nrf51dk/include/bsp/boards.h
new file mode 100644
index 0000000..e69de29
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e6d4acd3/hw/bsp/nrf51dk/include/bsp/cmsis_nvic.h
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk/include/bsp/cmsis_nvic.h b/hw/bsp/nrf51dk/include/bsp/cmsis_nvic.h
index fe7fc9a..5d2ae83 100644
--- a/hw/bsp/nrf51dk/include/bsp/cmsis_nvic.h
+++ b/hw/bsp/nrf51dk/include/bsp/cmsis_nvic.h
@@ -13,7 +13,7 @@
#define NVIC_USER_IRQ_OFFSET 16
#define NVIC_NUM_VECTORS (NVIC_USER_IRQ_OFFSET + 26)
-#include "mcu/nrf51.h"
+#include "nrf51.h"
#ifdef __cplusplus
extern "C" {
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e6d4acd3/hw/bsp/nrf51dk/include/bsp/nrf_drv_config.h
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk/include/bsp/nrf_drv_config.h b/hw/bsp/nrf51dk/include/bsp/nrf_drv_config.h
new file mode 100644
index 0000000..d178ec0
--- /dev/null
+++ b/hw/bsp/nrf51dk/include/bsp/nrf_drv_config.h
@@ -0,0 +1,464 @@
+/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+#ifndef NRF_DRV_CONFIG_H
+#define NRF_DRV_CONFIG_H
+
+/**
+ * Provide a non-zero value here in applications that need to use several
+ * peripherals with the same ID that are sharing certain resources
+ * (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
+ * simultaneously. Therefore, this definition allows to initialize the driver
+ * for another peripheral from a given group only after the previously used one
+ * is uninitialized. Normally, this is not possible, because interrupt handlers
+ * are implemented in individual drivers.
+ * This functionality requires a more complicated interrupt handling and driver
+ * initialization, hence it is not always desirable to use it.
+ */
+#define PERIPHERAL_RESOURCE_SHARING_ENABLED 1
+
+/* CLOCK */
+#define CLOCK_ENABLED 1
+
+#if (CLOCK_ENABLED == 1)
+#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default
+#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LFCLK_Xtal
+#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#endif
+
+/* GPIOTE */
+#define GPIOTE_ENABLED 1
+
+#if (GPIOTE_ENABLED == 1)
+#define GPIOTE_CONFIG_USE_SWI_EGU false
+#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
+#endif
+
+/* TIMER */
+#define TIMER0_ENABLED 1
+
+#if (TIMER0_ENABLED == 1)
+#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
+#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
+#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
+#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define TIMER0_INSTANCE_INDEX 0
+#endif
+
+#define TIMER1_ENABLED 0
+
+#if (TIMER1_ENABLED == 1)
+#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
+#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
+#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
+#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
+#endif
+
+#define TIMER2_ENABLED 0
+
+#if (TIMER2_ENABLED == 1)
+#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
+#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
+#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
+#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
+#endif
+
+#define TIMER3_ENABLED 0
+
+#if (TIMER3_ENABLED == 1)
+#define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
+#define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer
+#define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
+#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
+#endif
+
+#define TIMER4_ENABLED 0
+
+#if (TIMER4_ENABLED == 1)
+#define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
+#define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer
+#define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
+#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
+#endif
+
+
+#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
+
+/* RTC */
+#define RTC0_ENABLED 0
+
+#if (RTC0_ENABLED == 1)
+#define RTC0_CONFIG_FREQUENCY 32678
+#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define RTC0_CONFIG_RELIABLE false
+
+#define RTC0_INSTANCE_INDEX 0
+#endif
+
+#define RTC1_ENABLED 0
+
+#if (RTC1_ENABLED == 1)
+#define RTC1_CONFIG_FREQUENCY 32768
+#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define RTC1_CONFIG_RELIABLE false
+
+#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
+#endif
+
+#define RTC2_ENABLED 0
+
+#if (RTC2_ENABLED == 1)
+#define RTC2_CONFIG_FREQUENCY 32768
+#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define RTC2_CONFIG_RELIABLE false
+
+#define RTC2_INSTANCE_INDEX (RTC0_ENABLED+RTC1_ENABLED)
+#endif
+
+
+#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED)
+
+#define NRF_MAXIMUM_LATENCY_US 2000
+
+/* RNG */
+#define RNG_ENABLED 1
+
+#if (RNG_ENABLED == 1)
+#define RNG_CONFIG_ERROR_CORRECTION true
+#define RNG_CONFIG_POOL_SIZE 8
+#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#endif
+
+/* PWM */
+
+#define PWM0_ENABLED 1
+
+#if (PWM0_ENABLED == 1)
+#define PWM0_CONFIG_OUT0_PIN 2
+#define PWM0_CONFIG_OUT1_PIN 3
+#define PWM0_CONFIG_OUT2_PIN 4
+#define PWM0_CONFIG_OUT3_PIN 5
+#define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
+#define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
+#define PWM0_CONFIG_TOP_VALUE 1000
+#define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
+#define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
+
+#define PWM0_INSTANCE_INDEX 0
+#endif
+
+#define PWM1_ENABLED 0
+
+#if (PWM1_ENABLED == 1)
+#define PWM1_CONFIG_OUT0_PIN 2
+#define PWM1_CONFIG_OUT1_PIN 3
+#define PWM1_CONFIG_OUT2_PIN 4
+#define PWM1_CONFIG_OUT3_PIN 5
+#define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
+#define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
+#define PWM1_CONFIG_TOP_VALUE 1000
+#define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
+#define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
+
+#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
+#endif
+
+#define PWM2_ENABLED 0
+
+#if (PWM2_ENABLED == 1)
+#define PWM2_CONFIG_OUT0_PIN 2
+#define PWM2_CONFIG_OUT1_PIN 3
+#define PWM2_CONFIG_OUT2_PIN 4
+#define PWM2_CONFIG_OUT3_PIN 5
+#define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
+#define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
+#define PWM2_CONFIG_TOP_VALUE 1000
+#define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
+#define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
+
+#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
+#endif
+
+#define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
+
+/* SPI */
+#define SPI0_ENABLED 1
+
+#if (SPI0_ENABLED == 1)
+#define SPI0_USE_EASY_DMA 0
+
+#define SPI0_CONFIG_SCK_PIN 2
+#define SPI0_CONFIG_MOSI_PIN 3
+#define SPI0_CONFIG_MISO_PIN 4
+#define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define SPI0_INSTANCE_INDEX 0
+#endif
+
+#define SPI1_ENABLED 0
+
+#if (SPI1_ENABLED == 1)
+#define SPI1_USE_EASY_DMA 0
+
+#define SPI1_CONFIG_SCK_PIN 2
+#define SPI1_CONFIG_MOSI_PIN 3
+#define SPI1_CONFIG_MISO_PIN 4
+#define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
+#endif
+
+#define SPI2_ENABLED 0
+
+#if (SPI2_ENABLED == 1)
+#define SPI2_USE_EASY_DMA 0
+
+#define SPI2_CONFIG_SCK_PIN 2
+#define SPI2_CONFIG_MOSI_PIN 3
+#define SPI2_CONFIG_MISO_PIN 4
+#define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
+#endif
+
+#define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
+
+/* SPIS */
+#define SPIS0_ENABLED 0
+
+#if (SPIS0_ENABLED == 1)
+#define SPIS0_CONFIG_SCK_PIN 2
+#define SPIS0_CONFIG_MOSI_PIN 3
+#define SPIS0_CONFIG_MISO_PIN 4
+#define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define SPIS0_INSTANCE_INDEX 0
+#endif
+
+#define SPIS1_ENABLED 0
+
+#if (SPIS1_ENABLED == 1)
+#define SPIS1_CONFIG_SCK_PIN 2
+#define SPIS1_CONFIG_MOSI_PIN 3
+#define SPIS1_CONFIG_MISO_PIN 4
+#define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
+#endif
+
+#define SPIS2_ENABLED 0
+
+#if (SPIS2_ENABLED == 1)
+#define SPIS2_CONFIG_SCK_PIN 2
+#define SPIS2_CONFIG_MOSI_PIN 3
+#define SPIS2_CONFIG_MISO_PIN 4
+#define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
+#endif
+
+#define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
+
+/* UART */
+#define UART0_ENABLED 1
+
+#if (UART0_ENABLED == 1)
+#define UART0_CONFIG_HWFC NRF_UART_HWFC_DISABLED
+#define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED
+#define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_115200
+#define UART0_CONFIG_PSEL_TXD 0
+#define UART0_CONFIG_PSEL_RXD 0
+#define UART0_CONFIG_PSEL_CTS 0
+#define UART0_CONFIG_PSEL_RTS 0
+#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#ifdef NRF52
+#define UART0_CONFIG_USE_EASY_DMA false
+//Compile time flag
+#define UART_EASY_DMA_SUPPORT 1
+#define UART_LEGACY_SUPPORT 1
+#endif //NRF52
+#endif
+
+#define TWI0_ENABLED 1
+
+#if (TWI0_ENABLED == 1)
+#define TWI0_USE_EASY_DMA 0
+
+#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
+#define TWI0_CONFIG_SCL 0
+#define TWI0_CONFIG_SDA 1
+#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define TWI0_INSTANCE_INDEX 0
+#endif
+
+#define TWI1_ENABLED 0
+
+#if (TWI1_ENABLED == 1)
+#define TWI1_USE_EASY_DMA 0
+
+#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
+#define TWI1_CONFIG_SCL 0
+#define TWI1_CONFIG_SDA 1
+#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
+#endif
+
+#define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED)
+
+/* TWIS */
+#define TWIS0_ENABLED 0
+
+#if (TWIS0_ENABLED == 1)
+ #define TWIS0_CONFIG_ADDR0 0
+ #define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */
+ #define TWIS0_CONFIG_SCL 0
+ #define TWIS0_CONFIG_SDA 1
+ #define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+ #define TWIS0_INSTANCE_INDEX 0
+#endif
+
+#define TWIS1_ENABLED 0
+
+#if (TWIS1_ENABLED == 1)
+ #define TWIS1_CONFIG_ADDR0 0
+ #define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */
+ #define TWIS1_CONFIG_SCL 0
+ #define TWIS1_CONFIG_SDA 1
+ #define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+
+ #define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED)
+#endif
+
+#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
+/* For more documentation see nrf_drv_twis.h file */
+#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
+/* For more documentation see nrf_drv_twis.h file */
+#define TWIS_NO_SYNC_MODE 0
+
+/* QDEC */
+#define QDEC_ENABLED 1
+
+#if (QDEC_ENABLED == 1)
+#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
+#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
+#define QDEC_CONFIG_PIO_A 1
+#define QDEC_CONFIG_PIO_B 2
+#define QDEC_CONFIG_PIO_LED 3
+#define QDEC_CONFIG_LEDPRE 511
+#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
+#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define QDEC_CONFIG_DBFEN false
+#define QDEC_CONFIG_SAMPLE_INTEN false
+#endif
+
+/* ADC */
+#define ADC_ENABLED 1
+
+#if (ADC_ENABLED == 1)
+#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#endif
+
+
+/* SAADC */
+#define SAADC_ENABLED 0
+
+#if (SAADC_ENABLED == 1)
+#define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT
+#define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED
+#define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#endif
+
+/* PDM */
+#define PDM_ENABLED 0
+
+#if (PDM_ENABLED == 1)
+#define PDM_CONFIG_MODE NRF_PDM_MODE_MONO
+#define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING
+#define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K
+#define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#endif
+
+/* COMP */
+#define COMP_ENABLED 0
+
+#if (COMP_ENABLED == 1)
+#define COMP_CONFIG_REF NRF_COMP_REF_Int1V8
+#define COMP_CONFIG_MAIN_MODE NRF_COMP_MAIN_MODE_SE
+#define COMP_CONFIG_SPEED_MODE NRF_COMP_SP_MODE_High
+#define COMP_CONFIG_HYST NRF_COMP_HYST_NoHyst
+#define COMP_CONFIG_ISOURCE NRF_COMP_ISOURCE_Off
+#define COMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define COMP_CONFIG_INPUT NRF_COMP_INPUT_0
+#endif
+
+/* LPCOMP */
+#define LPCOMP_ENABLED 1
+
+#if (LPCOMP_ENABLED == 1)
+#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8
+#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
+#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
+#endif
+
+/* WDT */
+#define WDT_ENABLED 1
+
+#if (WDT_ENABLED == 1)
+#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
+#define WDT_CONFIG_RELOAD_VALUE 2000
+#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
+#endif
+
+/* SWI EGU */
+#ifdef NRF52
+ #define EGU_ENABLED 0
+#endif
+
+/* I2S */
+#define I2S_ENABLED 0
+
+#if (I2S_ENABLED == 1)
+#define I2S_CONFIG_SCK_PIN 22
+#define I2S_CONFIG_LRCK_PIN 23
+#define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED
+#define I2S_CONFIG_SDOUT_PIN 24
+#define I2S_CONFIG_SDIN_PIN 25
+#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
+#define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER
+#define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S
+#define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT
+#define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT
+#define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO
+#define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8
+#define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X
+#endif
+
+#include "nrf_drv_config_validation.h"
+
+#endif // NRF_DRV_CONFIG_H
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e6d4acd3/hw/bsp/nrf51dk/src/system_nrf51.c
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk/src/system_nrf51.c b/hw/bsp/nrf51dk/src/system_nrf51.c
index 2ca31d1..63f775c 100755
--- a/hw/bsp/nrf51dk/src/system_nrf51.c
+++ b/hw/bsp/nrf51dk/src/system_nrf51.c
@@ -31,8 +31,8 @@
#include <stdint.h>
#include <stdbool.h>
#include "bsp/cmsis_nvic.h"
-#include "mcu/nrf.h"
-#include "mcu/system_nrf51.h"
+#include "nrf.h"
+#include "system_nrf51.h"
/*lint ++flb "Enter library region" */
@@ -44,7 +44,7 @@ static bool is_disabled_in_debug_needed(void);
#if defined ( __CC_ARM )
- uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
+ uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
#elif defined ( __GNUC__ )
@@ -63,7 +63,7 @@ void SystemInit(void)
/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
to enable the use of peripherals" found at Product Anomaly document for your device found at
- https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
+ https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
that do not need it is that the new peripherals in the second generation devices (LPCOMP for
example) will not be available. */
if (is_manual_peripheral_setup_needed())
@@ -71,9 +71,9 @@ void SystemInit(void)
*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
*(uint32_t volatile *)0x40006C18 = 0x00008000;
}
-
+
/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
- register is incorrect" found at Product Anomaly document four your device found at
+ register is incorrect" found at Product Anomaly document four your device found at
https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
if (is_disabled_in_debug_needed())
{
@@ -84,7 +84,7 @@ void SystemInit(void)
}
-static bool is_manual_peripheral_setup_needed(void)
+static bool is_manual_peripheral_setup_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
@@ -101,11 +101,11 @@ static bool is_manual_peripheral_setup_needed(void)
return true;
}
}
-
+
return false;
}
-static bool is_disabled_in_debug_needed(void)
+static bool is_disabled_in_debug_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
@@ -114,7 +114,7 @@ static bool is_disabled_in_debug_needed(void)
return true;
}
}
-
+
return false;
}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e6d4acd3/hw/mcu/nordic/nrf51xxx/include/mcu/compiler_abstraction.h
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/nrf51xxx/include/mcu/compiler_abstraction.h b/hw/mcu/nordic/nrf51xxx/include/mcu/compiler_abstraction.h
deleted file mode 100755
index 545ae99..0000000
--- a/hw/mcu/nordic/nrf51xxx/include/mcu/compiler_abstraction.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/* Copyright (c) 2015, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * * Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef _COMPILER_ABSTRACTION_H
-#define _COMPILER_ABSTRACTION_H
-
-/*lint ++flb "Enter library region" */
-
-#if defined ( __CC_ARM )
-
- #ifndef __ASM
- #define __ASM __asm
- #endif
-
- #ifndef __INLINE
- #define __INLINE __inline
- #endif
-
- #ifndef __WEAK
- #define __WEAK __weak
- #endif
-
- #ifndef __ALIGN
- #define __ALIGN(n) __align(n)
- #endif
-
- #define GET_SP() __current_sp()
-
-#elif defined ( __ICCARM__ )
-
- #ifndef __ASM
- #define __ASM __asm
- #endif
-
- #ifndef __INLINE
- #define __INLINE inline
- #endif
-
- #ifndef __WEAK
- #define __WEAK __weak
- #endif
-
- /* Not defined for IAR since it requires a new line to work, and C preprocessor does not allow that. */
- #ifndef __ALIGN
- #define __ALIGN(n)
- #endif
-
- #define GET_SP() __get_SP()
-
-#elif defined ( __GNUC__ )
-
- #ifndef __ASM
- #define __ASM __asm
- #endif
-
- #ifndef __INLINE
- #define __INLINE inline
- #endif
-
- #ifndef __WEAK
- #define __WEAK __attribute__((weak))
- #endif
-
- #ifndef __ALIGN
- #define __ALIGN(n) __attribute__((aligned(n)))
- #endif
-
- #define GET_SP() gcc_current_sp()
-
- static inline unsigned int gcc_current_sp(void)
- {
- register unsigned sp __ASM("sp");
- return sp;
- }
-
-#elif defined ( __TASKING__ )
-
- #ifndef __ASM
- #define __ASM __asm
- #endif
-
- #ifndef __INLINE
- #define __INLINE inline
- #endif
-
- #ifndef __WEAK
- #define __WEAK __attribute__((weak))
- #endif
-
- #ifndef __ALIGN
- #define __ALIGN(n) __align(n)
- #endif
-
- #define GET_SP() __get_MSP()
-
-#endif
-
-/*lint --flb "Leave library region" */
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e6d4acd3/hw/mcu/nordic/nrf51xxx/include/mcu/cortex_m0.h
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/nrf51xxx/include/mcu/cortex_m0.h b/hw/mcu/nordic/nrf51xxx/include/mcu/cortex_m0.h
index 3ae4253..ff85dc2 100644
--- a/hw/mcu/nordic/nrf51xxx/include/mcu/cortex_m0.h
+++ b/hw/mcu/nordic/nrf51xxx/include/mcu/cortex_m0.h
@@ -20,7 +20,7 @@
#ifndef __MCU_CORTEX_M0_H__
#define __MCU_CORTEX_M0_H__
-#include "mcu/nrf51.h"
+#include "nrf51.h"
/*
* The nRF51 microcontroller uses RTC0 for periodic interrupts and it is
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e6d4acd3/hw/mcu/nordic/nrf51xxx/include/mcu/nrf.h
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/nrf51xxx/include/mcu/nrf.h b/hw/mcu/nordic/nrf51xxx/include/mcu/nrf.h
deleted file mode 100755
index e795b3f..0000000
--- a/hw/mcu/nordic/nrf51xxx/include/mcu/nrf.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Copyright (c) 2015, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * * Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef NRF_H
-#define NRF_H
-
-#if defined(_WIN32)
- /* Do not include nrf51 specific files when building for PC host */
-#elif defined(__unix)
- /* Do not include nrf51 specific files when building for PC host */
-#elif defined(__APPLE__)
- /* Do not include nrf51 specific files when building for PC host */
-#else
-
- /* Family selection for family includes. */
- #if defined (NRF51)
- #include "nrf51.h"
- #include "nrf51_bitfields.h"
- #include "nrf51_deprecated.h"
- #elif defined (NRF52)
- #include "nrf52.h"
- #include "nrf52_bitfields.h"
- #include "nrf51_to_nrf52.h"
- #else
- #error "Device family must be defined. See nrf.h."
- #endif /* NRF51, NRF52 */
-
- #include "compiler_abstraction.h"
-
-#endif /* _WIN32 || __unix || __APPLE__ */
-
-#endif /* NRF_H */
-