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Posted to commits@mynewt.apache.org by mg...@apache.org on 2025/02/13 14:55:52 UTC
(mynewt-core) branch master updated (4868635c4 -> 1d75f297b)
This is an automated email from the ASF dual-hosted git repository.
mgorecki pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
from 4868635c4 tinyusb/msc_fat_view: Handle multi file write
new 9f835281d hw/bsp: Add initial support for Nucleo-H753ZI
new 1d75f297b hw/bsp: Remove leftover variable from stm32 based BSPs
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
apps/pwm_test/src/main.c | 5 ++
hw/bsp/nucleo-g0b1re/src/hal_bsp.c | 3 --
hw/bsp/nucleo-g491re/src/hal_bsp.c | 3 --
hw/bsp/nucleo-h723zg/src/hal_bsp.c | 3 --
hw/bsp/nucleo-h723zg/syscfg.yml | 2 +
hw/bsp/{nucleo-f767zi => nucleo-h753zi}/bsp.yml | 22 ++++----
.../include/bsp/bsp.h | 17 +++---
.../include/bsp/stm32h7xx_hal_conf.h | 1 -
.../nucleo-h753zi.cfg} | 0
.../nucleo-h753zi_debug.sh} | 0
hw/bsp/{nucleo-h723zg => nucleo-h753zi}/pkg.yml | 6 +--
.../{nucleo-h723zg => nucleo-h753zi}/src/hal_bsp.c | 62 +++-------------------
hw/bsp/{nucleo-h723zg => nucleo-h753zi}/syscfg.yml | 26 ++++-----
hw/bsp/nucleo-l073rz/src/hal_bsp.c | 9 ----
hw/bsp/nucleo-u575zi-q/src/hal_bsp.c | 3 --
hw/bsp/weact_g431cb/src/hal_bsp.c | 3 --
hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c | 1 -
17 files changed, 50 insertions(+), 116 deletions(-)
copy hw/bsp/{nucleo-f767zi => nucleo-h753zi}/bsp.yml (80%)
copy hw/bsp/{nucleo-h723zg => nucleo-h753zi}/include/bsp/bsp.h (90%)
copy hw/bsp/{nucleo-h723zg => nucleo-h753zi}/include/bsp/stm32h7xx_hal_conf.h (99%)
copy hw/bsp/{nucleo-f746zg/nucleo-f746zg.cfg => nucleo-h753zi/nucleo-h753zi.cfg} (100%)
copy hw/bsp/{b-l072z-lrwan1/b-l072z-lrwan1_debug.sh => nucleo-h753zi/nucleo-h753zi_debug.sh} (100%)
mode change 100755 => 100644
copy hw/bsp/{nucleo-h723zg => nucleo-h753zi}/pkg.yml (89%)
copy hw/bsp/{nucleo-h723zg => nucleo-h753zi}/src/hal_bsp.c (82%)
copy hw/bsp/{nucleo-h723zg => nucleo-h753zi}/syscfg.yml (84%)
(mynewt-core) 01/02: hw/bsp: Add initial support for Nucleo-H753ZI
Posted by mg...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
mgorecki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 9f835281d8309bc015ad1c46044a7a863dba00aa
Author: Michal Gorecki <mi...@codecoup.pl>
AuthorDate: Tue Feb 4 15:43:03 2025 +0100
hw/bsp: Add initial support for Nucleo-H753ZI
---
apps/pwm_test/src/main.c | 5 +
hw/bsp/nucleo-h723zg/syscfg.yml | 2 +
hw/bsp/nucleo-h753zi/bsp.yml | 59 +++
hw/bsp/nucleo-h753zi/include/bsp/bsp.h | 98 +++++
.../nucleo-h753zi/include/bsp/stm32h7xx_hal_conf.h | 423 +++++++++++++++++++++
hw/bsp/nucleo-h753zi/nucleo-h753zi.cfg | 22 ++
hw/bsp/nucleo-h753zi/nucleo-h753zi_debug.sh | 34 ++
hw/bsp/nucleo-h753zi/pkg.yml | 40 ++
hw/bsp/nucleo-h753zi/src/hal_bsp.c | 230 +++++++++++
hw/bsp/{nucleo-h723zg => nucleo-h753zi}/syscfg.yml | 26 +-
hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c | 1 -
11 files changed, 927 insertions(+), 13 deletions(-)
diff --git a/apps/pwm_test/src/main.c b/apps/pwm_test/src/main.c
index 278c775d7..dd3de4939 100644
--- a/apps/pwm_test/src/main.c
+++ b/apps/pwm_test/src/main.c
@@ -39,6 +39,11 @@
# define PWM_TEST_CH_CFG_INV false
# define PWM_TEST_CH_NUM 1
# define PWM_TEST_IRQ_PRIO 0
+#elif MYNEWT_VAL(BSP_nucleo_h753zi)
+# define PWM_TEST_CH_CFG_PIN MCU_AFIO_GPIO(LED_BLINK_PIN, 2)
+# define PWM_TEST_CH_CFG_INV false
+# define PWM_TEST_CH_NUM 2
+# define PWM_TEST_IRQ_PRIO 0
#else
# define PWM_TEST_CH_CFG_PIN LED_BLINK_PIN
# define PWM_TEST_CH_CFG_INV true
diff --git a/hw/bsp/nucleo-h723zg/syscfg.yml b/hw/bsp/nucleo-h723zg/syscfg.yml
index 39f6cf767..35d4802ec 100644
--- a/hw/bsp/nucleo-h723zg/syscfg.yml
+++ b/hw/bsp/nucleo-h723zg/syscfg.yml
@@ -27,6 +27,8 @@ syscfg.defs:
value: 8
syscfg.vals:
+ MCU_RAM_START: 0x24000000
+ MCU_RAM_SIZE: 0x50000
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nucleo-h753zi/bsp.yml b/hw/bsp/nucleo-h753zi/bsp.yml
new file mode 100644
index 000000000..22c932ce8
--- /dev/null
+++ b/hw/bsp/nucleo-h753zi/bsp.yml
@@ -0,0 +1,59 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+bsp.name: "NUCLEO-H753ZI"
+bsp.url: https://www.st.com/en/evaluation-tools/nucleo-h753zi.html
+bsp.maker: "STMicroelectronics"
+bsp.arch: cortex_m7
+bsp.compiler: compiler/arm-none-eabi-m7
+bsp.linkerscript: autogenerated
+bsp.downloadscript: "hw/scripts/download.sh"
+bsp.debugscript: "hw/bsp/nucleo-h753zi/nucleo-h753zi_debug.sh"
+
+bsp.flash_map:
+ areas:
+ # System areas.
+ FLASH_AREA_BOOTLOADER:
+ device: 0
+ offset: 0x08000000
+ size: 128kB
+ FLASH_AREA_IMAGE_0:
+ device: 0
+ offset: 0x08020000
+ size: 768kB
+ FLASH_AREA_IMAGE_1:
+ device: 0
+ offset: 0x08100000
+ size: 768kB
+ FLASH_AREA_IMAGE_SCRATCH:
+ device: 0
+ offset: 0x080E0000
+ size: 128kB
+
+ # User areas.
+ FLASH_AREA_REBOOT_LOG:
+ user_id: 0
+ device: 0
+ offset: 0x081C0000
+ size: 128kB
+ FLASH_AREA_NFFS:
+ user_id: 1
+ device: 0
+ offset: 0x081E0000
+ size: 128kB
diff --git a/hw/bsp/nucleo-h753zi/include/bsp/bsp.h b/hw/bsp/nucleo-h753zi/include/bsp/bsp.h
new file mode 100644
index 000000000..d72ea005a
--- /dev/null
+++ b/hw/bsp/nucleo-h753zi/include/bsp/bsp.h
@@ -0,0 +1,98 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+#ifndef H_BSP_H
+#define H_BSP_H
+
+#include <inttypes.h>
+#include <mcu/mcu.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Define special stackos sections */
+#define sec_data_core __attribute__((section(".data.core")))
+#define sec_bss_core __attribute__((section(".bss.core")))
+#define sec_bss_nz_core __attribute__((section(".bss.core.nz")))
+
+/* More convenient section placement macros. */
+#define bssnz_t sec_bss_nz_core
+
+extern uint8_t _ram_start[];
+extern uint8_t _dtcm_start[];
+extern uint8_t _itcm_start[];
+
+#define RAM_SIZE (512 * 1024)
+#define DTCM_SIZE (128 * 1024)
+#define ITCM_SIZE (64 * 1024)
+
+/* LED pins */
+#define LED_1 MCU_GPIO_PORTB(0)
+#define LED_2 MCU_GPIO_PORTE(1)
+#define LED_3 MCU_GPIO_PORTB(14)
+
+#define LED_green LED_1
+#define LED_blue LED_2
+#define LED_red LED_3
+
+#define LED_BLINK_PIN LED_1
+
+/* BUTTON pins */
+#define BTN_USER_1 MCU_GPIO_PORTC(13)
+
+/* Button pin */
+#define BUTTON_1 BTN_USER_1
+
+/* Arduino pins */
+#define ARDUINO_PIN_D0 MCU_GPIO_PORTB(7)
+#define ARDUINO_PIN_D1 MCU_GPIO_PORTB(6)
+#define ARDUINO_PIN_D2 MCU_GPIO_PORTG(14)
+#define ARDUINO_PIN_D3 MCU_GPIO_PORTE(13)
+#define ARDUINO_PIN_D4 MCU_GPIO_PORTE(14)
+#define ARDUINO_PIN_D5 MCU_GPIO_PORTE(11)
+#define ARDUINO_PIN_D6 MCU_GPIO_PORTE(9)
+#define ARDUINO_PIN_D7 MCU_GPIO_PORTG(12)
+#define ARDUINO_PIN_D8 MCU_GPIO_PORTF(3)
+#define ARDUINO_PIN_D9 MCU_GPIO_PORTD(15)
+#define ARDUINO_PIN_D10 MCU_GPIO_PORTD(14)
+#define ARDUINO_PIN_D11 MCU_GPIO_PORTB(5)
+#define ARDUINO_PIN_D12 MCU_GPIO_PORTA(6)
+#define ARDUINO_PIN_D13 MCU_GPIO_PORTA(5)
+#define ARDUINO_PIN_A0 MCU_GPIO_PORTA(3)
+#define ARDUINO_PIN_A1 MCU_GPIO_PORTC(0)
+#define ARDUINO_PIN_A2 MCU_GPIO_PORTC(3)
+#define ARDUINO_PIN_A3 MCU_GPIO_PORTB(1)
+#define ARDUINO_PIN_A4 MCU_GPIO_PORTC(2)
+#define ARDUINO_PIN_A5 MCU_GPIO_PORTF(10)
+
+#define ARDUINO_PIN_RX ARDUINO_PIN_D0
+#define ARDUINO_PIN_TX ARDUINO_PIN_D1
+
+#define ARDUINO_PIN_SCL MCU_GPIO_PORTB(8)
+#define ARDUINO_PIN_SDA MCU_GPIO_PORTB(9)
+
+#define ARDUINO_PIN_SCK ARDUINO_PIN_D13
+#define ARDUINO_PIN_MOSI ARDUINO_PIN_D11
+#define ARDUINO_PIN_MISO ARDUINO_PIN_D12
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* H_BSP_H */
diff --git a/hw/bsp/nucleo-h753zi/include/bsp/stm32h7xx_hal_conf.h b/hw/bsp/nucleo-h753zi/include/bsp/stm32h7xx_hal_conf.h
new file mode 100644
index 000000000..89e63d299
--- /dev/null
+++ b/hw/bsp/nucleo-h753zi/include/bsp/stm32h7xx_hal_conf.h
@@ -0,0 +1,423 @@
+/**
+ ******************************************************************************
+ * @file stm32h7xx_hal_conf_template.h
+ * @author MCD Application Team
+ * @brief HAL configuration template file.
+ * This file should be copied to the application folder and renamed
+ * to stm32h7xx_hal_conf.h.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32H7xx_HAL_CONF_H
+#define __STM32H7xx_HAL_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_CEC_MODULE_ENABLED
+#define HAL_COMP_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_CRC_MODULE_ENABLED
+#define HAL_CRYP_MODULE_ENABLED
+#define HAL_DAC_MODULE_ENABLED
+#define HAL_DCMI_MODULE_ENABLED
+#define HAL_DFSDM_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_DMA2D_MODULE_ENABLED
+#define HAL_ETH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_FDCAN_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_HASH_MODULE_ENABLED
+#define HAL_HCD_MODULE_ENABLED
+#define HAL_HRTIM_MODULE_ENABLED
+#define HAL_HSEM_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_I2S_MODULE_ENABLED
+#define HAL_IRDA_MODULE_ENABLED
+#define HAL_IWDG_MODULE_ENABLED
+#define HAL_JPEG_MODULE_ENABLED
+#define HAL_LPTIM_MODULE_ENABLED
+#define HAL_LTDC_MODULE_ENABLED
+#define HAL_MDIOS_MODULE_ENABLED
+#define HAL_MDMA_MODULE_ENABLED
+#define HAL_MMC_MODULE_ENABLED
+#define HAL_NAND_MODULE_ENABLED
+#define HAL_NOR_MODULE_ENABLED
+#define HAL_OPAMP_MODULE_ENABLED
+#define HAL_PCD_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_QSPI_MODULE_ENABLED
+#define HAL_RAMECC_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_SAI_MODULE_ENABLED
+#define HAL_SD_MODULE_ENABLED
+#define HAL_SDRAM_MODULE_ENABLED
+#define HAL_SMARTCARD_MODULE_ENABLED
+#define HAL_SMBUS_MODULE_ENABLED
+#define HAL_SPDIFRX_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+#define HAL_SWPMI_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+#define HAL_USART_MODULE_ENABLED
+#define HAL_WWDG_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if defined (MYNEWT_VAL_STM32_CLOCK_HSE_VALUE)
+#define HSE_VALUE MYNEWT_VAL(STM32_CLOCK_HSE_VALUE)
+#elif !defined (HSE_VALUE)
+#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal oscillator (CSI) default value.
+ * This value is the default CSI value after Reset.
+ */
+#if !defined (CSI_VALUE)
+#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* CSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+#if !defined (LSI_VALUE)
+#define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+
+/**
+ * @brief External clock source for I2S peripheral
+ * This value is used by the I2S HAL module to compute the I2S clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+#define VDD_VALUE 3300UL /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */
+#define USE_RTOS 0
+#define USE_SD_TRANSCEIVER 1U /*!< use uSD Transceiver */
+#define USE_SPI_CRC 1U /*!< use CRC in SPI */
+
+/* ########################### Ethernet Configuration ######################### */
+#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */
+#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */
+
+#define ETH_MAC_ADDR0 ((uint8_t)0x02)
+#define ETH_MAC_ADDR1 ((uint8_t)0x00)
+#define ETH_MAC_ADDR2 ((uint8_t)0x00)
+#define ETH_MAC_ADDR3 ((uint8_t)0x00)
+#define ETH_MAC_ADDR4 ((uint8_t)0x00)
+#define ETH_MAC_ADDR5 ((uint8_t)0x00)
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1 */
+
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32h7xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32h7xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32h7xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_MDMA_MODULE_ENABLED
+#include "stm32h7xx_hal_mdma.h"
+#endif /* HAL_MDMA_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+#include "stm32h7xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+#include "stm32h7xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+#include "stm32h7xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+#include "stm32h7xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+#include "stm32h7xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32h7xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32h7xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32h7xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32h7xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+#include "stm32h7xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32h7xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32h7xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32h7xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32h7xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32h7xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32h7xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+#include "stm32h7xx_hal_hsem.h"
+#endif /* HAL_HSEM_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32h7xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32h7xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32h7xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32h7xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32h7xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32h7xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+#include "stm32h7xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+#include "stm32h7xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+
+
+#ifdef HAL_MMC_MODULE_ENABLED
+#include "stm32h7xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32h7xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+#include "stm32h7xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32h7xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32h7xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32h7xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+#include "stm32h7xx_hal_ramecc.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32h7xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32h7xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32h7xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+#include "stm32h7xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+#include "stm32h7xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32h7xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+#include "stm32h7xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SWPMI_MODULE_ENABLED
+#include "stm32h7xx_hal_swpmi.h"
+#endif /* HAL_SWPMI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32h7xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32h7xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32h7xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32h7xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32h7xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32h7xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32h7xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32h7xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+#include "stm32h7xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t * file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32H7xx_HAL_CONF_H */
diff --git a/hw/bsp/nucleo-h753zi/nucleo-h753zi.cfg b/hw/bsp/nucleo-h753zi/nucleo-h753zi.cfg
new file mode 100644
index 000000000..4ce46f023
--- /dev/null
+++ b/hw/bsp/nucleo-h753zi/nucleo-h753zi.cfg
@@ -0,0 +1,22 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+
+# New version of St-link
+source [find interface/stlink-v2-1.cfg]
+transport select hla_swd
+source [find target/stm32f7x.cfg]
diff --git a/hw/bsp/nucleo-h753zi/nucleo-h753zi_debug.sh b/hw/bsp/nucleo-h753zi/nucleo-h753zi_debug.sh
new file mode 100644
index 000000000..8445f238e
--- /dev/null
+++ b/hw/bsp/nucleo-h753zi/nucleo-h753zi_debug.sh
@@ -0,0 +1,34 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+# Called with following variables set:
+# - CORE_PATH is absolute path to @apache-mynewt-core
+# - BSP_PATH is absolute path to hw/bsp/bsp_name
+# - BIN_BASENAME is the path to prefix to target binary,
+# .elf appended to name is the ELF file
+# - FEATURES holds the target features string
+# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
+# - RESET set if target should be reset when attaching
+# - NO_GDB set if we should not start gdb to debug
+#
+. $CORE_PATH/hw/scripts/stlink.sh
+
+FILE_NAME=$BIN_BASENAME.elf
+
+stlink_debug
diff --git a/hw/bsp/nucleo-h753zi/pkg.yml b/hw/bsp/nucleo-h753zi/pkg.yml
new file mode 100644
index 000000000..a8ba3d220
--- /dev/null
+++ b/hw/bsp/nucleo-h753zi/pkg.yml
@@ -0,0 +1,40 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+pkg.name: hw/bsp/nucleo-h753zi
+pkg.type: bsp
+pkg.description: BSP definition for the stm32h753zi-nucleo board.
+pkg.author: "Apache Mynewt <de...@mynewt.apache.org>"
+pkg.homepage: "http://mynewt.apache.org/"
+pkg.keywords:
+ - stm32
+ - stm32h7
+ - nucleo
+
+pkg.cflags: -DSTM32H753xx -DUSE_FULL_LL_DRIVER
+
+pkg.cflags.HARDFLOAT:
+ - -mfloat-abi=hard -mfpu=fpv5-d16
+
+pkg.deps:
+ - "@apache-mynewt-core/hw/mcu/stm/stm32h7xx"
+ - "@apache-mynewt-core/libc"
+ - "@apache-mynewt-core/hw/drivers/flash/spiflash"
+ - "@apache-mynewt-core/hw/bus/drivers/spi_hal"
+ - "@apache-mynewt-core/hw/scripts"
diff --git a/hw/bsp/nucleo-h753zi/src/hal_bsp.c b/hw/bsp/nucleo-h753zi/src/hal_bsp.c
new file mode 100644
index 000000000..b873e8067
--- /dev/null
+++ b/hw/bsp/nucleo-h753zi/src/hal_bsp.c
@@ -0,0 +1,230 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+#include <assert.h>
+
+#include "bsp/bsp.h"
+#include "os/mynewt.h"
+#include "mynewt_cm.h"
+#include "spiflash/spiflash.h"
+
+#include <hal/hal_bsp.h>
+#include <hal/hal_flash_int.h>
+#include <hal/hal_system.h>
+
+#include <stm32h753xx.h>
+#include <stm32_common/stm32_hal.h>
+#include <bus/drivers/spi_common.h>
+
+#if MYNEWT_VAL(ETH_0)
+#include <stm32_eth/stm32_eth.h>
+#include <stm32_eth/stm32_eth_cfg.h>
+#endif
+
+#if MYNEWT_VAL(PWM_0) || MYNEWT_VAL(PWM_1) || MYNEWT_VAL(PWM_2)
+#include <pwm_stm32/pwm_stm32.h>
+#endif
+
+#if MYNEWT_VAL(PWM_0)
+struct stm32_pwm_conf os_bsp_pwm0_cfg = {
+ .tim = TIM3,
+ .irq = TIM3_IRQn,
+};
+#endif
+#if MYNEWT_VAL(PWM_1)
+struct stm32_pwm_conf os_bsp_pwm1_cfg = {
+ .tim = TIM4,
+ .irq = TIM4_IRQn,
+};
+#endif
+#if MYNEWT_VAL(PWM_2)
+struct stm32_pwm_conf os_bsp_pwm2_cfg = {
+ .tim = TIM12,
+ .irq = TIM8_BRK_TIM12_IRQn,
+};
+#endif
+
+#if MYNEWT_VAL(UART_0)
+const struct stm32_uart_cfg os_bsp_uart0_cfg = {
+ .suc_uart = USART3,
+ .suc_rcc_reg = &RCC->APB1LENR,
+ .suc_rcc_dev = RCC_APB1LENR_USART3EN,
+ .suc_pin_tx = MYNEWT_VAL(UART_0_PIN_TX),
+ .suc_pin_rx = MYNEWT_VAL(UART_0_PIN_RX),
+ .suc_pin_rts = MYNEWT_VAL(UART_0_PIN_RTS),
+ .suc_pin_cts = MYNEWT_VAL(UART_0_PIN_CTS),
+ .suc_pin_af = GPIO_AF7_USART3,
+ .suc_irqn = USART3_IRQn,
+};
+#endif
+
+#if MYNEWT_VAL(I2C_0)
+/*
+ * The PB8 and PB9 pins are connected through jumpers in the board to
+ * both ADC_IN and I2C pins. To enable I2C functionality SB147/SB157 need
+ * to be removed (they are the default connections) and SB138/SB143 need
+ * to be shorted.
+ */
+const struct stm32_hal_i2c_cfg os_bsp_i2c0_cfg = {
+ .hic_i2c = I2C1,
+ .hic_rcc_reg = &RCC->APB1LENR,
+ .hic_rcc_dev = RCC_APB1LENR_I2C1EN,
+ .hic_pin_sda = MYNEWT_VAL(I2C_0_PIN_SDA),
+ .hic_pin_scl = MYNEWT_VAL(I2C_0_PIN_SCL),
+ .hic_pin_af = GPIO_AF4_I2C1,
+ .hic_10bit = 0,
+ .hic_timingr = 0xA0303048, /* 100kHz at 544 MHz system clock */
+};
+#endif
+
+#if MYNEWT_VAL(I2C_1)
+const struct stm32_hal_i2c_cfg os_bsp_i2c1_cfg = {
+ .hic_i2c = I2C2,
+ .hic_rcc_reg = &RCC->APB1LENR,
+ .hic_rcc_dev = RCC_APB1LENR_I2C2EN,
+ .hic_pin_sda = MYNEWT_VAL(I2C_1_PIN_SDA),
+ .hic_pin_scl = MYNEWT_VAL(I2C_1_PIN_SCL),
+ .hic_pin_af = GPIO_AF4_I2C2,
+ .hic_10bit = 0,
+ .hic_timingr = 0xA0303048, /* 100kHz at 544 MHz system clock */
+};
+#endif
+
+#if MYNEWT_VAL(I2C_2)
+const struct stm32_hal_i2c_cfg os_bsp_i2c2_cfg = {
+ .hic_i2c = I2C3,
+ .hic_rcc_reg = &RCC->APB1LENR,
+ .hic_rcc_dev = RCC_APB1LENR_I2C3EN,
+ .hic_pin_sda = MYNEWT_VAL(I2C_2_PIN_SDA),
+ .hic_pin_scl = MYNEWT_VAL(I2C_2_PIN_SCL),
+ .hic_pin_af = GPIO_AF4_I2C3,
+ .hic_10bit = 0,
+ .hic_timingr = 0xA0303048, /* 100kHz at 544 MHz system clock */
+};
+#endif
+
+#if MYNEWT_VAL(I2C_3)
+const struct stm32_hal_i2c_cfg os_bsp_i2c3_cfg = {
+ .hic_i2c = I2C4,
+ .hic_rcc_reg = &RCC->APB4ENR,
+ .hic_rcc_dev = RCC_APB4ENR_I2C4EN,
+ .hic_pin_sda = MYNEWT_VAL(I2C_3_PIN_SDA),
+ .hic_pin_scl = MYNEWT_VAL(I2C_3_PIN_SCL),
+ .hic_pin_af = GPIO_AF4_I2C4,
+ .hic_10bit = 0,
+ .hic_timingr = 0xA0303048, /* 100kHz at 544 MHz system clock */
+};
+#endif
+
+static const struct hal_bsp_mem_dump dump_cfg[] = {
+ [0] = {
+ .hbmd_start = _ram_start,
+ .hbmd_size = RAM_SIZE,
+ },
+ [1] = {
+ .hbmd_start = _dtcm_start,
+ .hbmd_size = DTCM_SIZE,
+ },
+ [2] = {
+ .hbmd_start = _itcm_start,
+ .hbmd_size = ITCM_SIZE,
+ },
+};
+
+extern const struct hal_flash stm32_flash_dev;
+
+const struct hal_flash *
+hal_bsp_flash_dev(uint8_t id)
+{
+ if (id != 0) {
+ return NULL;
+ }
+
+ return &stm32_flash_dev;
+}
+
+const struct hal_bsp_mem_dump *
+hal_bsp_core_dump(int *area_cnt)
+{
+ *area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]);
+ return dump_cfg;
+}
+
+void
+hal_bsp_init(void)
+{
+ int rc;
+ (void)rc;
+
+ stm32_periph_create();
+}
+
+void
+hal_bsp_deinit(void)
+{
+ Cortex_DisableAll();
+
+ RCC->AHB1ENR = 0;
+ RCC->AHB2ENR = 0;
+ RCC->AHB3ENR = 0;
+ RCC->AHB4ENR = 0;
+
+ RCC->APB1LENR = 0;
+ RCC->APB1HENR = 0;
+ RCC->APB2ENR = 0;
+ RCC->APB3ENR = 0;
+ RCC->APB4ENR = 0x0001000;
+
+ RCC->AHB1RSTR = 0x06038203;
+ RCC->AHB2RSTR = 0x60030271;
+ RCC->AHB3RSTR = 0x00E95011;
+ RCC->AHB4RSTR = 0x132806FF;
+
+ RCC->APB1LRSTR = 0xEAFFC3FF;
+ RCC->APB1LRSTR = 0x03000136;
+ RCC->APB2RSTR = 0x40A730F3;
+ RCC->APB3RSTR = 0x00000008;
+ RCC->APB4RSTR = 0x0420DEAA;
+
+ RCC->AHB1RSTR = 0;
+ RCC->AHB2RSTR = 0;
+ RCC->AHB3RSTR = 0;
+ RCC->AHB4RSTR = 0;
+
+ RCC->APB1LRSTR = 0;
+ RCC->APB1LRSTR = 0;
+ RCC->APB2RSTR = 0;
+ RCC->APB3RSTR = 0;
+ RCC->APB4RSTR = 0;
+}
+
+/**
+ * Returns the configured priority for the given interrupt. If no priority
+ * configured, return the priority passed in
+ *
+ * @param irq_num
+ * @param pri
+ *
+ * @return uint32_t
+ */
+uint32_t
+hal_bsp_get_nvic_priority(int irq_num, uint32_t pri)
+{
+ /* Add any interrupt priorities configured by the bsp here */
+ return pri;
+}
diff --git a/hw/bsp/nucleo-h723zg/syscfg.yml b/hw/bsp/nucleo-h753zi/syscfg.yml
similarity index 84%
copy from hw/bsp/nucleo-h723zg/syscfg.yml
copy to hw/bsp/nucleo-h753zi/syscfg.yml
index 39f6cf767..debab509d 100644
--- a/hw/bsp/nucleo-h723zg/syscfg.yml
+++ b/hw/bsp/nucleo-h753zi/syscfg.yml
@@ -20,34 +20,36 @@
syscfg.defs:
STM32_FLASH_SIZE_KB:
description: 'Total flash size in KB.'
- value: 1024
+ value: 2048
STM32_FLASH_NUM_AREAS:
description: 'Number of flash sectors for a non-linear STM32 MCU.'
- value: 8
+ value: 16
syscfg.vals:
+ MCU_RAM_START: 0x24000000
+ MCU_RAM_SIZE: 0x80000
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
NFFS_FLASH_AREA: FLASH_AREA_NFFS
COREDUMP_FLASH_AREA: FLASH_AREA_IMAGE_1
STM32_CLOCK_VOLTAGESCALING_CONFIG: 'PWR_REGULATOR_VOLTAGE_SCALE0'
STM32_CLOCK_HSI: 1
- STM32_CLOCK_HSE: 0
- STM32_CLOCK_HSE_BYPASS: 0
- STM32_CLOCK_PLL_PLLM: 4
- STM32_CLOCK_PLL_PLLN: 34
- STM32_CLOCK_PLL_PLLP: 1
- STM32_CLOCK_PLL_PLLQ: 4
+ STM32_CLOCK_HSE: 1
+ STM32_CLOCK_HSE_BYPASS: 1
+ STM32_CLOCK_PLL_PLLM: 1
+ STM32_CLOCK_PLL_PLLN: 120
+ STM32_CLOCK_PLL_PLLP: 2
+ STM32_CLOCK_PLL_PLLQ: 20
STM32_CLOCK_PLL_PLLR: 2
STM32_CLOCK_ENABLE_OVERDRIVE: 0
STM32_CLOCK_AHB_DIVIDER: 'RCC_HCLK_DIV2'
- STM32_CLOCK_APB1_DIVIDER: 'RCC_APB1_DIV4'
+ STM32_CLOCK_APB1_DIVIDER: 'RCC_APB1_DIV2'
STM32_CLOCK_APB2_DIVIDER: 'RCC_APB2_DIV2'
STM32_CLOCK_APB3_DIVIDER: 'RCC_APB3_DIV2'
STM32_CLOCK_APB4_DIVIDER: 'RCC_APB4_DIV2'
STM32_CLOCK_PLLRGE: 'RCC_PLL1VCIRANGE_3'
- STM32_FLASH_LATENCY: 'FLASH_LATENCY_3'
+ STM32_FLASH_LATENCY: 'FLASH_LATENCY_4'
STM32_ENABLE_ICACHE: 0
WATCHDOG_INTERVAL: 28000
UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
@@ -69,6 +71,6 @@ syscfg.vals:
TIMER_2_TIM: 'TIM14'
# Flasher parameters
- MYNEWT_DOWNLOADER: stflash
+ MYNEWT_DOWNLOADER: stm32_programmer_cli
MYNEWT_DOWNLOADER_MFG_IMAGE_FLASH_OFFSET: 0x08000000
- JLINK_TARGET: STM32H723ZG
+ JLINK_TARGET: STM32H753ZI
diff --git a/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c b/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c
index 9fc69eadb..5ee05d64f 100644
--- a/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c
+++ b/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c
@@ -49,7 +49,6 @@ SystemClock_Config(void)
RCC_ClkInitTypeDef clk_init = {0};
HAL_StatusTypeDef status;
-
/* Enable the MCU instruction cache */
#if MYNEWT_VAL(STM32_ENABLE_ICACHE)
SCB_EnableICache();
(mynewt-core) 02/02: hw/bsp: Remove leftover variable from stm32 based BSPs
Posted by mg...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
mgorecki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 1d75f297ba454a2ff879ab05fd5dc4d7e53130a0
Author: Michal Gorecki <mi...@codecoup.pl>
AuthorDate: Wed Feb 12 11:56:36 2025 +0100
hw/bsp: Remove leftover variable from stm32 based BSPs
This removes rc variable, which is no longer used,
as peripherals initializations are moved to
a separate function in stm32_common package.
This also deletes initialization of spiflash
from hal_bsp_init function from nucleo-l073rz BSP.
Now spiflash initialization is also carried in
function from stm32_common package so it shouldn't
be called here.
---
hw/bsp/nucleo-g0b1re/src/hal_bsp.c | 3 ---
hw/bsp/nucleo-g491re/src/hal_bsp.c | 3 ---
hw/bsp/nucleo-h723zg/src/hal_bsp.c | 3 ---
hw/bsp/nucleo-h753zi/src/hal_bsp.c | 3 ---
hw/bsp/nucleo-l073rz/src/hal_bsp.c | 9 ---------
hw/bsp/nucleo-u575zi-q/src/hal_bsp.c | 3 ---
hw/bsp/weact_g431cb/src/hal_bsp.c | 3 ---
7 files changed, 27 deletions(-)
diff --git a/hw/bsp/nucleo-g0b1re/src/hal_bsp.c b/hw/bsp/nucleo-g0b1re/src/hal_bsp.c
index 3b6017cb4..3ed1b5bdb 100644
--- a/hw/bsp/nucleo-g0b1re/src/hal_bsp.c
+++ b/hw/bsp/nucleo-g0b1re/src/hal_bsp.c
@@ -228,9 +228,6 @@ hal_bsp_core_dump(int *area_cnt)
void
hal_bsp_init(void)
{
- int rc;
- (void)rc;
-
stm32_periph_create();
}
diff --git a/hw/bsp/nucleo-g491re/src/hal_bsp.c b/hw/bsp/nucleo-g491re/src/hal_bsp.c
index 96434bf91..98b20f437 100644
--- a/hw/bsp/nucleo-g491re/src/hal_bsp.c
+++ b/hw/bsp/nucleo-g491re/src/hal_bsp.c
@@ -185,9 +185,6 @@ hal_bsp_core_dump(int *area_cnt)
void
hal_bsp_init(void)
{
- int rc;
- (void)rc;
-
stm32_periph_create();
}
diff --git a/hw/bsp/nucleo-h723zg/src/hal_bsp.c b/hw/bsp/nucleo-h723zg/src/hal_bsp.c
index ef2663613..0eb40c698 100644
--- a/hw/bsp/nucleo-h723zg/src/hal_bsp.c
+++ b/hw/bsp/nucleo-h723zg/src/hal_bsp.c
@@ -211,9 +211,6 @@ hal_bsp_core_dump(int *area_cnt)
void
hal_bsp_init(void)
{
- int rc;
- (void)rc;
-
stm32_periph_create();
}
diff --git a/hw/bsp/nucleo-h753zi/src/hal_bsp.c b/hw/bsp/nucleo-h753zi/src/hal_bsp.c
index b873e8067..3b6698f27 100644
--- a/hw/bsp/nucleo-h753zi/src/hal_bsp.c
+++ b/hw/bsp/nucleo-h753zi/src/hal_bsp.c
@@ -168,9 +168,6 @@ hal_bsp_core_dump(int *area_cnt)
void
hal_bsp_init(void)
{
- int rc;
- (void)rc;
-
stm32_periph_create();
}
diff --git a/hw/bsp/nucleo-l073rz/src/hal_bsp.c b/hw/bsp/nucleo-l073rz/src/hal_bsp.c
index 9880d7947..80c4dbd90 100644
--- a/hw/bsp/nucleo-l073rz/src/hal_bsp.c
+++ b/hw/bsp/nucleo-l073rz/src/hal_bsp.c
@@ -150,16 +150,7 @@ hal_bsp_core_dump(int *area_cnt)
void
hal_bsp_init(void)
{
- int rc;
- (void)rc;
-
stm32_periph_create();
-
-#if MYNEWT_VAL(SPIFLASH) && MYNEWT_VAL(BUS_DRIVER_PRESENT)
- rc = spiflash_create_spi_dev(&spiflash_dev.dev,
- MYNEWT_VAL(BSP_FLASH_SPI_NAME), &flash_spi_cfg);
- assert(rc == 0);
-#endif
}
void
diff --git a/hw/bsp/nucleo-u575zi-q/src/hal_bsp.c b/hw/bsp/nucleo-u575zi-q/src/hal_bsp.c
index 3e93b909b..06153b595 100644
--- a/hw/bsp/nucleo-u575zi-q/src/hal_bsp.c
+++ b/hw/bsp/nucleo-u575zi-q/src/hal_bsp.c
@@ -177,9 +177,6 @@ hal_bsp_core_dump(int *area_cnt)
void
hal_bsp_init(void)
{
- int rc;
- (void)rc;
-
stm32_periph_create();
}
diff --git a/hw/bsp/weact_g431cb/src/hal_bsp.c b/hw/bsp/weact_g431cb/src/hal_bsp.c
index 1dc95719b..e3329514a 100644
--- a/hw/bsp/weact_g431cb/src/hal_bsp.c
+++ b/hw/bsp/weact_g431cb/src/hal_bsp.c
@@ -161,9 +161,6 @@ hal_bsp_core_dump(int *area_cnt)
void
hal_bsp_init(void)
{
- int rc;
- (void)rc;
-
stm32_periph_create();
}