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Posted to commits@nuttx.apache.org by pk...@apache.org on 2022/04/02 11:08:51 UTC

[incubator-nuttx] 05/06: arch/riscv: Access [m|s]scratch through CSR_SCRATCH macro

This is an automated email from the ASF dual-hosted git repository.

pkarashchenko pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit e959775397a1b53b2f2a7d436b634a4d5c2a1597
Author: Xiang Xiao <xi...@xiaomi.com>
AuthorDate: Sat Apr 2 05:37:00 2022 +0800

    arch/riscv: Access [m|s]scratch through CSR_SCRATCH macro
    
    Signed-off-by: Xiang Xiao <xi...@xiaomi.com>
---
 arch/risc-v/include/mode.h            | 2 ++
 arch/risc-v/src/common/riscv_percpu.c | 5 +++--
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/risc-v/include/mode.h b/arch/risc-v/include/mode.h
index 144fd73..e4b3c40 100644
--- a/arch/risc-v/include/mode.h
+++ b/arch/risc-v/include/mode.h
@@ -37,6 +37,7 @@
 /* CSR definitions */
 
 #  define CSR_STATUS        sstatus          /* Global status register */
+#  define CSR_SCRATCH       sscratch         /* Scratch register */
 #  define CSR_EPC           sepc             /* Exception program counter */
 #  define CSR_IE            sie              /* Interrupt enable register */
 #  define CSR_CAUSE         scause           /* Interrupt cause register */
@@ -69,6 +70,7 @@
 /* CSR definitions */
 
 #  define CSR_STATUS        mstatus          /* Global status register */
+#  define CSR_SCRATCH       mscratch         /* Scratch register */
 #  define CSR_EPC           mepc             /* Exception program counter */
 #  define CSR_IE            mie              /* Interrupt enable register */
 #  define CSR_CAUSE         mcause           /* Interrupt cause register */
diff --git a/arch/risc-v/src/common/riscv_percpu.c b/arch/risc-v/src/common/riscv_percpu.c
index 25e4ef9..5e45c89 100644
--- a/arch/risc-v/src/common/riscv_percpu.c
+++ b/arch/risc-v/src/common/riscv_percpu.c
@@ -26,6 +26,7 @@
 #include <nuttx/irq.h>
 
 #include <arch/barriers.h>
+#include <arch/mode.h>
 
 #include <assert.h>
 #include <stdint.h>
@@ -87,7 +88,7 @@ void riscv_percpu_add_hart(uintptr_t hartid)
 
   /* Set the scratch register value to point to the scratch area */
 
-  WRITE_CSR(sscratch, &g_scratch[hartid]);
+  WRITE_CSR(CSR_SCRATCH, &g_scratch[hartid]);
 
   /* Make sure it sticks */
 
@@ -108,7 +109,7 @@ void riscv_percpu_add_hart(uintptr_t hartid)
 
 uintptr_t riscv_percpu_get_hartid(void)
 {
-  uintptr_t scratch = READ_CSR(sscratch);
+  uintptr_t scratch = READ_CSR(CSR_SCRATCH);
 
   DEBUGASSERT(scratch >= (uintptr_t) &g_scratch &&
               scratch <= (uintptr_t) &g_scratch + sizeof(g_scratch));