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Posted to commits@nuttx.apache.org by gu...@apache.org on 2021/10/19 21:42:04 UTC
[incubator-nuttx] branch master updated (b998528 -> 9235d66)
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from b998528 Documentation: Update "Using QEMU" section for ESP32
new 8288a04 arch/xtensa/esp32: Remove the AES test from the driver.
new 5d1c01a arch/risc-v/esp32c3: Remove the AES test from the driver.
new 652d77e arch/risc-v/esp32c3: Remove the SHA test from the driver.
new 91cb9da arch/risc-v/esp32c3: Remove the RSA test from the driver.
new e424241 arch/risc-v/esp32c3: Remove the bignum test from the driver.
new c83c107 esp32c3_bignum.c & esp32c3_sha.c: Fix some trivial nxstyle complaints.
new 55e8b17 boards/risc-v/esp32c3: Remove the flash encryption test.
new 9235d66 boards/esp32&esp32c3: Remove crypto accelerators' defconfigs.
The 8 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/risc-v/src/esp32c3/Kconfig | 35 --
arch/risc-v/src/esp32c3/esp32c3_aes.c | 475 -----------------
arch/risc-v/src/esp32c3/esp32c3_bignum.c | 250 +--------
arch/risc-v/src/esp32c3/esp32c3_bignum.h | 20 -
arch/risc-v/src/esp32c3/esp32c3_rsa.c | 199 -------
arch/risc-v/src/esp32c3/esp32c3_sha.c | 585 +--------------------
arch/xtensa/src/esp32/Kconfig | 9 -
arch/xtensa/src/esp32/esp32_aes.c | 493 -----------------
boards/risc-v/esp32c3/esp32c3-devkit/Kconfig | 16 -
.../esp32c3/esp32c3-devkit/configs/aes/defconfig | 45 --
.../esp32c3/esp32c3-devkit/configs/rsa/defconfig | 50 --
.../esp32c3/esp32c3-devkit/configs/sha/defconfig | 47 --
.../esp32c3/esp32c3-devkit/src/esp32c3_bringup.c | 5 -
.../esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c | 161 ------
.../esp32/esp32-devkitc/configs/aes/defconfig | 56 --
15 files changed, 3 insertions(+), 2443 deletions(-)
delete mode 100644 boards/risc-v/esp32c3/esp32c3-devkit/configs/aes/defconfig
delete mode 100644 boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
delete mode 100644 boards/risc-v/esp32c3/esp32c3-devkit/configs/sha/defconfig
delete mode 100644 boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig
[incubator-nuttx] 07/08: boards/risc-v/esp32c3: Remove the flash
encryption test.
Posted by gu...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 55e8b17974fd6608a14a091599a9f64db5baa10e
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 15 18:43:10 2021 +0200
boards/risc-v/esp32c3: Remove the flash encryption test.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
boards/risc-v/esp32c3/esp32c3-devkit/Kconfig | 16 --
.../esp32c3/esp32c3-devkit/src/esp32c3_bringup.c | 5 -
.../esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c | 161 ---------------------
3 files changed, 182 deletions(-)
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig b/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig
index 4fb1a55..218697c 100644
--- a/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig
@@ -78,22 +78,6 @@ config ESP32C3_SPIFLASH_FS_MOUNT_PT
depends on ESP32C3_SPIFLASH_LITTLEFS
default "/data"
-config ESP32C3_SPIFLASH_ENCRYPTION_TEST
- bool "SPI Flash encryption test"
- default n
- depends on ESP32C3_SPIFLASH
- select DEBUG_ASSERTIONS
- ---help---
- Enable SPI Flash encryption test. This option will also select
- DEBUG_ASSERTIONS to enable kernel assert macro.
-
-config ESP32C3_SPIFLASH_TEST_ADDRESS
- hex "SPI Flash test address"
- default 0x180000
- depends on ESP32C3_SPIFLASH_ENCRYPTION_TEST
- ---help---
- SPI Flash encryption test read/write address.
-
if LCD_ST7735 || LCD_ST7789 || LCD_GC9A01
config ESP32C3_LCD_RSTPIN
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c
index 692a44d..fc0de5a 100644
--- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c
@@ -148,11 +148,6 @@ int esp32c3_bringup(void)
#endif
#ifdef CONFIG_ESP32C3_SPIFLASH
-
-# ifdef CONFIG_ESP32C3_SPIFLASH_ENCRYPTION_TEST
- esp32c3_spiflash_encrypt_test();
-# endif
-
ret = esp32c3_spiflash_init();
if (ret)
{
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c
index cef2237..bc00a5c 100644
--- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c
@@ -532,164 +532,3 @@ int esp32c3_spiflash_init(void)
return ret;
}
-/****************************************************************************
- * Name: esp32c3_spiflash_encrypt_test
- *
- * Description:
- * Test ESP32-C3 SPI Flash driver read/write with encryption.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * None.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_ESP32C3_SPIFLASH_ENCRYPTION_TEST
-
-void esp32c3_spiflash_encrypt_test(void)
-{
- int i;
- int ret;
- uint8_t *wbuf;
- uint8_t *rbuf;
- struct mtd_geometry_s geo;
- uint32_t erase_block;
- uint32_t erase_nblocks;
- uint32_t rw_block;
- uint32_t rw_nblocks;
- struct mtd_dev_s *mtd = esp32c3_spiflash_mtd();
- struct mtd_dev_s *enc_mtd = esp32c3_spiflash_encrypt_mtd();
- const uint32_t address = CONFIG_ESP32C3_SPIFLASH_TEST_ADDRESS;
- const uint32_t size = 4096;
-
- ret = MTD_IOCTL(enc_mtd, MTDIOC_GEOMETRY,
- (unsigned long)(uintptr_t)&geo);
- if (ret < 0)
- {
- ferr("ERROR: Failed to get GEO errno =%d\n", ret);
- DEBUGASSERT(0);
- }
-
- wbuf = kmm_malloc(size);
- if (!wbuf)
- {
- ferr("ERROR: Failed to alloc %" PRIu32 " heap\n", size);
- DEBUGASSERT(0);
- }
-
- rbuf = kmm_malloc(size);
- if (!rbuf)
- {
- ferr("ERROR: Failed to alloc %" PRIu32 " heap\n", size);
- DEBUGASSERT(0);
- }
-
- for (i = 0; i < size; i++)
- {
- wbuf[i] = (uint8_t)random();
- }
-
- erase_block = address / geo.erasesize;
- erase_nblocks = size / geo.erasesize;
-
- rw_block = address / geo.blocksize;
- rw_nblocks = size / geo.blocksize;
-
- ret = MTD_ERASE(enc_mtd, erase_block, erase_nblocks);
- if (ret != erase_nblocks)
- {
- ferr("ERROR: Failed to erase block errno=%d\n", ret);
- DEBUGASSERT(0);
- }
-
- ret = MTD_BWRITE(enc_mtd, rw_block, rw_nblocks, wbuf);
- if (ret != rw_nblocks)
- {
- ferr("ERROR: Failed to encrypt write errno=%d\n", ret);
- DEBUGASSERT(0);
- }
-
- memset(rbuf, 0, size);
- ret = MTD_BREAD(enc_mtd, rw_block, rw_nblocks, rbuf);
- if (ret != rw_nblocks)
- {
- ferr("ERROR: Failed to decrypt read errno=%d\n", ret);
- DEBUGASSERT(0);
- }
-
- if (memcmp(wbuf, rbuf, size))
- {
- ferr("ASSERT: Encrypted and decrypted data is not same\n");
- DEBUGASSERT(0);
- }
-
- memset(rbuf, 0, size);
- ret = MTD_BREAD(mtd, rw_block, rw_nblocks, rbuf);
- if (ret != rw_nblocks)
- {
- ferr("ERROR: Failed to read errno=%d\n", ret);
- DEBUGASSERT(0);
- }
-
- if (!memcmp(wbuf, rbuf, size))
- {
- ferr("ASSERT: Encrypted and normal data is same\n");
- DEBUGASSERT(0);
- }
-
- for (i = 0; i < size; i++)
- {
- wbuf[i] = (uint8_t)random();
- }
-
- ret = MTD_ERASE(enc_mtd, erase_block, erase_nblocks);
- if (ret != erase_nblocks)
- {
- ferr("ERROR: Failed to erase errno=%d\n", ret);
- DEBUGASSERT(0);
- }
-
- ret = MTD_BWRITE(mtd, rw_block, rw_nblocks, wbuf);
- if (ret != rw_nblocks)
- {
- ferr("ERROR: Failed to write errno=%d\n", ret);
- DEBUGASSERT(0);
- }
-
- memset(rbuf, 0, size);
- ret = MTD_BREAD(enc_mtd, rw_block, rw_nblocks, rbuf);
- if (ret != rw_nblocks)
- {
- ferr("ERROR: Failed to decrypt read errno=%d\n", ret);
- DEBUGASSERT(0);
- }
-
- if (!memcmp(wbuf, rbuf, size))
- {
- ferr("ASSERT: Normal and decrypted data is same\n");
- DEBUGASSERT(0);
- }
-
- memset(rbuf, 0, size);
- ret = MTD_BREAD(mtd, rw_block, rw_nblocks, rbuf);
- if (ret != rw_nblocks)
- {
- ferr("ERROR: Failed to read errno=%d\n", ret);
- DEBUGASSERT(0);
- }
-
- if (memcmp(wbuf, rbuf, size))
- {
- ferr("ASSERT: Normal and normal data is not same\n");
- DEBUGASSERT(0);
- }
-
- kmm_free(wbuf);
- kmm_free(rbuf);
-
- finfo("INFO: SPI Flash encryption test success\n");
-}
-
-#endif /* CONFIG_ESP32C3_SPIFLASH_ENCRYPTION_TEST */
[incubator-nuttx] 05/08: arch/risc-v/esp32c3: Remove the bignum
test from the driver.
Posted by gu...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit e424241d09abc84a7def4e1ffacdff0a20548bbc
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 15 13:27:52 2021 +0200
arch/risc-v/esp32c3: Remove the bignum test from the driver.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
arch/risc-v/src/esp32c3/Kconfig | 9 -
arch/risc-v/src/esp32c3/esp32c3_bignum.c | 248 ---------------------
arch/risc-v/src/esp32c3/esp32c3_bignum.h | 20 --
.../esp32c3/esp32c3-devkit/configs/rsa/defconfig | 1 -
4 files changed, 278 deletions(-)
diff --git a/arch/risc-v/src/esp32c3/Kconfig b/arch/risc-v/src/esp32c3/Kconfig
index b48b3b2..05db1fb 100644
--- a/arch/risc-v/src/esp32c3/Kconfig
+++ b/arch/risc-v/src/esp32c3/Kconfig
@@ -1045,13 +1045,4 @@ endmenu # Partition Configuration
endif
-menu "BIGNUM"
- depends on ESP32C3_BIGNUM_ACCELERATOR
-
-config ESP32C3_BIGNUM_ACCELERATOR_TEST
- bool "BIGNUM driver test"
- default n
-
-endmenu # ESP32C3_BIGNUM_ACCELERATOR
-
endif # ARCH_CHIP_ESP32C3
diff --git a/arch/risc-v/src/esp32c3/esp32c3_bignum.c b/arch/risc-v/src/esp32c3/esp32c3_bignum.c
index 0e52e7e..a36a8a3 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_bignum.c
+++ b/arch/risc-v/src/esp32c3/esp32c3_bignum.c
@@ -3815,253 +3815,5 @@ cleanup:
return ret;
}
-/****************************************************************************
- * Test Functions
- ****************************************************************************/
-
-#ifdef CONFIG_ESP32C3_BIGNUM_ACCELERATOR_TEST
-
-#define GCD_PAIR_COUNT 3
-
-/****************************************************************************
- * Name: esp32c3_mpi_self_test
- *
- * Description:
- * Checkup routine
- *
- * Input Parameters:
- * verbose - The result output or not
- *
- * Returned Value:
- * OK on success; Negated errno on failure.
- *
- ****************************************************************************/
-
-int esp32c3_mpi_self_test(int verbose)
-{
- int ret;
- int i;
- struct esp32c3_mpi_s A;
- struct esp32c3_mpi_s E;
- struct esp32c3_mpi_s N;
- struct esp32c3_mpi_s X;
- struct esp32c3_mpi_s Y;
- struct esp32c3_mpi_s U;
- struct esp32c3_mpi_s V;
-
- const int gcd_pairs[GCD_PAIR_COUNT][3] =
- {
- {
- 693, 609, 21
- },
-
- {
- 1764, 868, 28
- },
-
- {
- 768454923, 542167814, 1
- }
- };
-
- esp32c3_mpi_init(&A);
- esp32c3_mpi_init(&E);
- esp32c3_mpi_init(&N);
- esp32c3_mpi_init(&X);
- esp32c3_mpi_init(&Y);
- esp32c3_mpi_init(&U);
- esp32c3_mpi_init(&V);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&A, 16,
- "EFE021C2645FD1DC586E69184AF4A31E" \
- "D5F53E93B5F123FA41680867BA110131" \
- "944FE7952E2517337780CB0DB80E61AA" \
- "E7C8DDC6C5C6AADEB34EB38A2F40D5E6"), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&E, 16,
- "B2E7EFD37075B9F03FF989C7C5051C20" \
- "34D2A323810251127E7BF8625A4F49A5" \
- "F3E27F4DA8BD59C47D6DAABA4C8127BD" \
- "5B5C25763222FEFCCFC38B832366C29E"), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&N, 16,
- "0066A198186C18C10B2F5ED9B522752A" \
- "9830B69916E535C8F047518A889A43A5" \
- "94B6BED27A168D31D4A52F88925AA8F5"), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_mul_mpi(&X, &A, &N), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&U, 16,
- "602AB7ECA597A3D6B56FF9829A5E8B85" \
- "9E857EA95A03512E2BAE7391688D264A" \
- "A5663B0341DB9CCFD2C4C5F421FEC814" \
- "8001B72E848A38CAE1C65F78E56ABDEF" \
- "E12D3C039B8A02D6BE593F0BBBDA56F1" \
- "ECF677152EF804370C1A305CAF3B5BF1" \
- "30879B56C61DE584A0F53A2447A51E"), cleanup);
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, " MPI test #1 (mul_mpi): ");
- }
-
- if (esp32c3_mpi_cmp_mpi(&X, &U) != 0)
- {
- if (verbose != 0)
- {
- syslog(LOG_INFO, "failed\n");
- }
-
- ret = 1;
- goto cleanup;
- }
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, "passed\n");
- }
-
- ESP32C3_MPI_CHK(esp32c3_mpi_div_mpi(&X, &Y, &A, &N), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&U, 16,
- "256567336059E52CAE22925474705F39A94"), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&V, 16,
- "6613F26162223DF488E9CD48CC132C7A" \
- "0AC93C701B001B092E4E5B9F73BCD27B" \
- "9EE50D0657C77F374E903CDFA4C642"), cleanup);
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, " MPI test #2 (div_mpi): ");
- }
-
- if (esp32c3_mpi_cmp_mpi(&X, &U) != 0 ||
- esp32c3_mpi_cmp_mpi(&Y, &V) != 0)
- {
- if (verbose != 0)
- {
- syslog(LOG_INFO, "failed\n");
- }
-
- ret = 1;
- goto cleanup;
- }
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, "passed\n");
- }
-
- ESP32C3_MPI_CHK(esp32c3_mpi_exp_mod(&X, &A, &E, &N, NULL), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&U, 16,
- "36E139AEA55215609D2816998ED020BB" \
- "BD96C37890F65171D948E9BC7CBAA4D9" \
- "325D24D6A3C12710F10A09FA08AB87"), cleanup);
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, " MPI test #3 (exp_mod): ");
- }
-
- if (esp32c3_mpi_cmp_mpi(&X, &U) != 0)
- {
- if (verbose != 0)
- {
- syslog(LOG_INFO, "failed\n");
- }
-
- ret = 1;
- goto cleanup;
- }
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, "passed\n");
- }
-
- ESP32C3_MPI_CHK(esp32c3_mpi_inv_mod(&X, &A, &N), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&U, 16,
- "003A0AAEDD7E784FC07D8F9EC6E3BFD5" \
- "C3DBA76456363A10869622EAC2DD84EC" \
- "C5B8A74DAC4D09E03B5E0BE779F2DF61"), cleanup);
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, " MPI test #4 (inv_mod): ");
- }
-
- if (esp32c3_mpi_cmp_mpi(&X, &U) != 0)
- {
- if (verbose != 0)
- {
- syslog(LOG_INFO, "failed\n");
- }
-
- ret = 1;
- goto cleanup;
- }
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, "passed\n");
- }
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, " MPI test #5 (simple gcd): ");
- }
-
- for (i = 0; i < GCD_PAIR_COUNT; i++)
- {
- ESP32C3_MPI_CHK(esp32c3_mpi_lset(&X, gcd_pairs[i][0]), cleanup);
- ESP32C3_MPI_CHK(esp32c3_mpi_lset(&Y, gcd_pairs[i][1]), cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_gcd(&A, &X, &Y), cleanup);
-
- if (esp32c3_mpi_cmp_int(&A, gcd_pairs[i][2]) != 0)
- {
- if (verbose != 0)
- {
- syslog(LOG_INFO, "failed at %d\n", i);
- }
-
- ret = 1;
- goto cleanup;
- }
- }
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, "passed\n");
- }
-
-cleanup:
-
- if (ret != 0 && verbose != 0)
- {
- syslog(LOG_INFO, "Unexpected error, return code = %08X\n", ret);
- }
-
- esp32c3_mpi_free(&A);
- esp32c3_mpi_free(&E);
- esp32c3_mpi_free(&N);
- esp32c3_mpi_free(&X);
- esp32c3_mpi_free(&Y);
- esp32c3_mpi_free(&U);
- esp32c3_mpi_free(&V);
-
- if (verbose != 0)
- {
- syslog(LOG_INFO, "\n");
- }
-
- return ret;
-}
-
-#endif /* CONFIG_ESP32C3_BIGNUM_ACCELERATOR_TEST */
-
#endif /* CONFIG_ESP32C3_BIGNUM_ACCELERATOR */
diff --git a/arch/risc-v/src/esp32c3/esp32c3_bignum.h b/arch/risc-v/src/esp32c3/esp32c3_bignum.h
index 3ee4a58..d6d269b 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_bignum.h
+++ b/arch/risc-v/src/esp32c3/esp32c3_bignum.h
@@ -863,26 +863,6 @@ int esp32c3_mpi_inv_mod(struct esp32c3_mpi_s *X,
const struct esp32c3_mpi_s *A,
const struct esp32c3_mpi_s *N);
-#ifdef CONFIG_ESP32C3_BIGNUM_ACCELERATOR_TEST
-
-/****************************************************************************
- * Name: esp32c3_mpi_self_test
- *
- * Description:
- * Checkup routine
- *
- * Input Parameters:
- * verbose - The result output or not
- *
- * Returned Value:
- * OK on success; Negated errno on failure.
- *
- ****************************************************************************/
-
-int esp32c3_mpi_self_test(int verbose);
-
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
index b0afcbe..d4c1486 100644
--- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
@@ -23,7 +23,6 @@ CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEV_ZERO=y
CONFIG_ESP32C3_BIGNUM_ACCELERATOR=y
-CONFIG_ESP32C3_BIGNUM_ACCELERATOR_TEST=y
CONFIG_ESP32C3_RSA_ACCELERATOR=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
[incubator-nuttx] 06/08: esp32c3_bignum.c & esp32c3_sha.c: Fix some
trivial nxstyle complaints.
Posted by gu...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit c83c1071ccb222f160b5dae732e44e591a96995c
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 15 13:35:23 2021 +0200
esp32c3_bignum.c & esp32c3_sha.c: Fix some trivial nxstyle complaints.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
arch/risc-v/src/esp32c3/esp32c3_bignum.c | 2 +-
arch/risc-v/src/esp32c3/esp32c3_sha.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/risc-v/src/esp32c3/esp32c3_bignum.c b/arch/risc-v/src/esp32c3/esp32c3_bignum.c
index a36a8a3..6728ec4 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_bignum.c
+++ b/arch/risc-v/src/esp32c3/esp32c3_bignum.c
@@ -1431,7 +1431,7 @@ int esp32c3_mpi_copy(struct esp32c3_mpi_s *X,
}
}
- i ++;
+ i++;
X->s = Y->s;
diff --git a/arch/risc-v/src/esp32c3/esp32c3_sha.c b/arch/risc-v/src/esp32c3/esp32c3_sha.c
index dd71d60..6e800df 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_sha.c
+++ b/arch/risc-v/src/esp32c3/esp32c3_sha.c
@@ -251,7 +251,7 @@ static int esp32c3_sha1_block(struct esp32c3_sha1_context_s *ctx,
{
}
- for (i = 0; i < 5; i ++)
+ for (i = 0; i < 5; i++)
{
ctx->state[i] = getreg32(SHA_H_0_REG + i * 4);
}
@@ -357,7 +357,7 @@ static int esp32c3_sha256_block(struct esp32c3_sha256_context_s *ctx,
num_block = 7;
}
- for (i = 0; i < num_block; i ++)
+ for (i = 0; i < num_block; i++)
{
ctx->state[i] = getreg32(SHA_H_0_REG + i * 4);
}
[incubator-nuttx] 02/08: arch/risc-v/esp32c3: Remove the AES test
from the driver.
Posted by gu...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 5d1c01aea7e2f5d46b2e36c7575bf792c3301e87
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 15 13:15:13 2021 +0200
arch/risc-v/esp32c3: Remove the AES test from the driver.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
arch/risc-v/src/esp32c3/Kconfig | 8 -
arch/risc-v/src/esp32c3/esp32c3_aes.c | 475 ---------------------
.../esp32c3/esp32c3-devkit/configs/aes/defconfig | 3 +-
3 files changed, 1 insertion(+), 485 deletions(-)
diff --git a/arch/risc-v/src/esp32c3/Kconfig b/arch/risc-v/src/esp32c3/Kconfig
index e0866ab..ea356f8 100644
--- a/arch/risc-v/src/esp32c3/Kconfig
+++ b/arch/risc-v/src/esp32c3/Kconfig
@@ -1045,14 +1045,6 @@ endmenu # Partition Configuration
endif
-menu "AES accelerator"
- depends on ESP32C3_AES_ACCELERATOR
-
-config ESP32C3_AES_ACCELERATOR_TEST
- bool "AES driver test"
- default n
-
-endmenu # AES accelerator
menu "SHA accelerator"
depends on ESP32C3_SHA_ACCELERATOR
diff --git a/arch/risc-v/src/esp32c3/esp32c3_aes.c b/arch/risc-v/src/esp32c3/esp32c3_aes.c
index b2a4305..74588eb 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_aes.c
+++ b/arch/risc-v/src/esp32c3/esp32c3_aes.c
@@ -651,478 +651,3 @@ int aes_cypher(void *out, const void *in, uint32_t size,
#endif
-/****************************************************************************
- * Test Functions
- ****************************************************************************/
-
-#ifdef CONFIG_ESP32C3_AES_ACCELERATOR_TEST
-
-/****************************************************************************
- * Name: esp32c3_aes_ecb_test
- ****************************************************************************/
-
-static bool esp32c3_aes_ecb_test(void)
-{
- int ret;
- int i;
- int keybits;
- uint8_t encrypt_buf[16];
- uint8_t decrypt_buf[16];
- struct esp32c3_aes_s aes;
- const int size = 16;
-
- const uint32_t input[8] =
- {
- 0x740fdb34, 0x002defca, 0xb042437b, 0xc2f42cf9,
- 0xc64444be, 0x32365bc1, 0xb613cfa2, 0x15ce0d23
- };
-
- const uint32_t key[16] =
- {
- 0x8ffdc2c5, 0x14d6c69d, 0x9cb7608f, 0x899b2472,
- 0xbf9e4372, 0x855290d0, 0xc62753da, 0xdeedeab7
- };
-
- const uint32_t result[3][4] =
- {
- /* keybits = 128 */
-
- {
- 0xc810df2a, 0x8ae67e6e, 0x50c5e32c, 0xd535f3e4
- },
-
- /* keybits = 256 */
-
- {
- 0xa0714c2b, 0x356adb1f, 0xe905c243, 0x35195a7c
- }
- };
-
- esp32c3_aes_init();
-
- for (i = 0; i < 2; i++)
- {
- keybits = i * 128 + 128;
-
- ret = esp32c3_aes_setkey(&aes, key, keybits);
- if (ret < 0)
- {
- return false;
- }
-
- ret = esp32c3_aes_ecb_cypher(&aes, 1, input, encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result[i], size);
- if (ret)
- {
- return false;
- }
-
- ret = esp32c3_aes_ecb_cypher(&aes, 0, encrypt_buf, decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- syslog(LOG_INFO, "ESP32-C3 AES ECB key=%d bits test: PASS\n", keybits);
- }
-
- return true;
-}
-
-/****************************************************************************
- * Name: esp32c3_aes_cbc_test
- ****************************************************************************/
-
-static bool esp32c3_aes_cbc_test(void)
-{
- int ret;
- int i;
- int keybits;
- uint8_t encrypt_buf[32];
- uint8_t decrypt_buf[32];
- uint8_t iv_buf[16];
- struct esp32c3_aes_s aes;
- const int size = 32;
-
- const uint32_t input[8] =
- {
- 0x740fdb34, 0x002defca, 0xb042437b, 0xc2f42cf9,
- 0xc64444be, 0x32365bc1, 0xb613cfa2, 0x15ce0d23
- };
-
- const uint32_t key[16] =
- {
- 0x8ffdc2c5, 0x14d6c69d, 0x9cb7608f, 0x899b2472,
- 0xbf9e4372, 0x855290d0, 0xc62753da, 0xdeedeab7
- };
-
- const uint32_t iv[4] =
- {
- 0xf53a50f2, 0x8aaf711d, 0x953bbbfa, 0x228d53cb
- };
-
- const uint32_t result[3][8] =
- {
- /* keybits = 128 */
-
- {
- 0x04e27d12, 0x1a91e508, 0x01092431, 0x9d572184,
- 0xa39979e1, 0x5543e1bc, 0x7173b71d, 0x4e3be064
- },
-
- /* keybits = 256 */
-
- {
- 0x6f36b8fe, 0x33bc1f37, 0x24fe659c, 0x0370def0,
- 0xb9a852f8, 0x64a79ae2, 0xd59f5045, 0x648a0f44
- }
- };
-
- for (i = 0; i < 2; i++)
- {
- keybits = i * 128 + 128;
-
- ret = esp32c3_aes_setkey(&aes, key, keybits);
- if (ret < 0)
- {
- return false;
- }
-
- memcpy(iv_buf, iv, 16);
- ret = esp32c3_aes_cbc_cypher(&aes, 1, iv_buf, input, encrypt_buf,
- size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result[i], size);
- if (ret)
- {
- return false;
- }
-
- memcpy(iv_buf, iv, 16);
- ret = esp32c3_aes_cbc_cypher(&aes, 0, iv_buf, encrypt_buf,
- decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- syslog(LOG_INFO, "ESP32-C3 AES CBC key=%d bits test: PASS\n", keybits);
- }
-
- return true;
-}
-
-/****************************************************************************
- * Name: esp32c3_aes_ctr_test
- ****************************************************************************/
-
-static bool esp32c3_aes_ctr_test(void)
-{
- int ret;
- int i;
- int keybits;
- uint8_t encrypt_buf[32];
- uint8_t decrypt_buf[32];
- uint8_t cnt_buf[16];
- uint8_t cache_buf[16];
- uint32_t nc_off;
- struct esp32c3_aes_s aes;
- const int size = 32;
-
- const uint32_t input[8] =
- {
- 0x740fdb34, 0x002defca, 0xb042437b, 0xc2f42cf9,
- 0xc64444be, 0x32365bc1, 0xb613cfa2, 0x15ce0d23
- };
-
- const uint32_t key[16] =
- {
- 0x8ffdc2c5, 0x14d6c69d, 0x9cb7608f, 0x899b2472,
- 0xbf9e4372, 0x855290d0, 0xc62753da, 0xdeedeab7
- };
-
- const uint32_t cnt[4] =
- {
- 0xf53a50f2, 0x8aaf711d, 0x953bbbfa, 0x228d53cb
- };
-
- const uint32_t result[3][8] =
- {
- /* keybits = 128 */
-
- {
- 0x5f922338, 0x5aff403d, 0x45fede3f, 0x616568c6,
- 0x3cd0ffc7, 0xa26cb704, 0x0aaa8b6a, 0x1d0b5e1c
- },
-
- /* keybits = 256 */
-
- {
- 0x70af4473, 0x597d2126, 0xd598ed09, 0x3fea540c,
- 0xfb5c743c, 0x0c1a39ca, 0xcbcf2d17, 0x341a7a0c
- }
- };
-
- for (i = 0; i < 2; i++)
- {
- keybits = i * 128 + 128;
-
- ret = esp32c3_aes_setkey(&aes, key, keybits);
- if (ret < 0)
- {
- return false;
- }
-
- nc_off = 0;
- memcpy(cnt_buf, cnt, 16);
- ret = esp32c3_aes_ctr_cypher(&aes, &nc_off, cnt_buf, cache_buf,
- input, encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result[i], size);
- if (ret)
- {
- return false;
- }
-
- nc_off = 0;
- memcpy(cnt_buf, cnt, 16);
- ret = esp32c3_aes_ctr_cypher(&aes, &nc_off, cnt_buf, cache_buf,
- encrypt_buf, decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- syslog(LOG_INFO, "ESP32-C3 AES CTR key=%d bits test: PASS\n", keybits);
- }
-
- return true;
-}
-
-/****************************************************************************
- * Name: esp32c3_aes_xts_test
- ****************************************************************************/
-
-static bool esp32c3_aes_xts_test(void)
-{
- int ret;
- int i;
- int keybits;
- uint8_t encrypt_buf[32];
- uint8_t decrypt_buf[32];
- uint8_t unit_buf[16];
- struct esp32c3_aes_xts_s aes;
- int size;
-
- const uint32_t input[8] =
- {
- 0x740fdb34, 0x002defca, 0xb042437b, 0xc2f42cf9,
- 0xc64444be, 0x32365bc1, 0xb613cfa2, 0x15ce0d23
- };
-
- const uint32_t key[16] =
- {
- 0x8ffdc2c5, 0x14d6c69d, 0x9cb7608f, 0x899b2472,
- 0xbf9e4372, 0x855290d0, 0xc62753da, 0xdeedeab7,
- 0x7ac6c53b, 0xc94f0b81, 0xdd673fc9, 0x8c1b71a6,
- 0x1f99b728, 0x5e7af2eb, 0xcc7274a3, 0xf0005b23
- };
-
- const uint32_t unit[4] =
- {
- 0xf53a50f2, 0x8aaf711d, 0x953bbbfa, 0x228d53cb
- };
-
- const uint32_t result_in32[2][8] =
- {
- /* keybits = 256 */
-
- {
- 0xf70e05fd, 0x2791be41, 0x926ec006, 0xc76068f4,
- 0x01fd0843, 0xdf5e576a, 0xa4b1833d, 0x90502608
- },
-
- /* keybits = 512 */
-
- {
- 0x164b4185, 0x4cb1cce7, 0xf285e523, 0x06a5923a,
- 0xae4fcb7b, 0x59ce9dc6, 0xed64546f, 0x5889cb17
- }
- };
-
- const uint32_t result_in30[2][8] =
- {
- /* keybits = 256 */
-
- {
- 0x26991fb6, 0x72e4a7bc, 0x97041d61, 0x9ec889af,
- 0xf70e05fd, 0x2791be41, 0x926ec006, 0x000068f4
- },
-
- /* keybits = 512 */
-
- {
- 0x4b42dd86, 0xeee792c0, 0x1516ff95, 0x1f5fd9e6,
- 0x164b4185, 0x4cb1cce7, 0xf285e523, 0x0000923a
- }
- };
-
- for (i = 0; i < 2; i++)
- {
- keybits = i * 256 + 256;
-
- ret = esp32c3_aes_xts_setkey(&aes, key, keybits);
- if (ret < 0)
- {
- return false;
- }
-
- /* Encrypt/Decrypt 32 bytes */
-
- size = 32;
-
- memcpy(unit_buf, unit, 16);
- ret = esp32c3_aes_xts_cypher(&aes, true, unit_buf, input,
- encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result_in32[i], size);
- if (ret)
- {
- return false;
- }
-
- memcpy(unit_buf, unit, 16);
- ret = esp32c3_aes_xts_cypher(&aes, false, unit_buf, encrypt_buf,
- decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- /* Encrypt/Decrypt 30 bytes */
-
- size = 30;
-
- memcpy(unit_buf, unit, 16);
- ret = esp32c3_aes_xts_cypher(&aes, true, unit_buf, input,
- encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result_in30[i], size);
- if (ret)
- {
- return false;
- }
-
- memcpy(unit_buf, unit, 16);
- ret = esp32c3_aes_xts_cypher(&aes, false, unit_buf, encrypt_buf,
- decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- syslog(LOG_INFO, "ESP32-C3 AES XTS key=%d bits test: PASS\n", keybits);
- }
-
- return true;
-}
-
-/****************************************************************************
- * Name: esp32c3_aes_main
- ****************************************************************************/
-
-int esp32c3_aes_main(int argc, char *argv[])
-{
- bool success;
-
- syslog(LOG_INFO, "----- BEGIN TEST -----\n");
-
- esp32c3_aes_init();
-
- success = esp32c3_aes_ecb_test();
- if (!success)
- {
- goto test_end;
- }
-
- success = esp32c3_aes_cbc_test();
- if (!success)
- {
- goto test_end;
- }
-
- success = esp32c3_aes_ctr_test();
- if (!success)
- {
- goto test_end;
- }
-
- success = esp32c3_aes_xts_test();
- if (!success)
- {
- goto test_end;
- }
-
-test_end:
- syslog(LOG_INFO, "----- END TEST -----\n");
-
- syslog(LOG_INFO, "\n");
-
- syslog(LOG_INFO, "----- RESULT: %s -----\n",
- success ? "SUCCESS" : "FAILED");
-
- return 0;
-}
-
-#endif
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/aes/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/aes/defconfig
index ec0efd3..bfa01f0 100644
--- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/aes/defconfig
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/configs/aes/defconfig
@@ -21,7 +21,6 @@ CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEV_ZERO=y
CONFIG_ESP32C3_AES_ACCELERATOR=y
-CONFIG_ESP32C3_AES_ACCELERATOR_TEST=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INTELHEX_BINARY=y
@@ -42,4 +41,4 @@ CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USER_ENTRYPOINT="esp32c3_aes_main"
+CONFIG_USER_ENTRYPOINT="nsh_main"
[incubator-nuttx] 01/08: arch/xtensa/esp32: Remove the AES test
from the driver.
Posted by gu...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 8288a04a0be3dc9c64335d8ef98eaf5d5a87124b
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 15 12:56:32 2021 +0200
arch/xtensa/esp32: Remove the AES test from the driver.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
arch/xtensa/src/esp32/Kconfig | 9 -
arch/xtensa/src/esp32/esp32_aes.c | 493 ---------------------
.../esp32/esp32-devkitc/configs/aes/defconfig | 3 +-
3 files changed, 1 insertion(+), 504 deletions(-)
diff --git a/arch/xtensa/src/esp32/Kconfig b/arch/xtensa/src/esp32/Kconfig
index 6b2e60d..2b8d752 100644
--- a/arch/xtensa/src/esp32/Kconfig
+++ b/arch/xtensa/src/esp32/Kconfig
@@ -1364,15 +1364,6 @@ endmenu # Partition Configuration
endif
-menu "AES accelerate"
- depends on ESP32_AES_ACCELERATOR
-
-config ESP32_AES_ACCELERATOR_TEST
- bool "AES driver test"
- default n
-
-endmenu # ESP32_AES_ACCELERATOR
-
config ESP32_AUTO_SLEEP
bool "Auto-sleep"
default n
diff --git a/arch/xtensa/src/esp32/esp32_aes.c b/arch/xtensa/src/esp32/esp32_aes.c
index b1c9008..eec72c5 100644
--- a/arch/xtensa/src/esp32/esp32_aes.c
+++ b/arch/xtensa/src/esp32/esp32_aes.c
@@ -643,496 +643,3 @@ int aes_cypher(void *out, const void *in, uint32_t size,
#endif
-/****************************************************************************
- * Test Functions
- ****************************************************************************/
-
-#ifdef CONFIG_ESP32_AES_ACCELERATOR_TEST
-
-/****************************************************************************
- * Name: esp32_aes_ecb_test
- ****************************************************************************/
-
-static bool esp32_aes_ecb_test(void)
-{
- int ret;
- int i;
- int keybits;
- uint8_t encrypt_buf[16];
- uint8_t decrypt_buf[16];
- struct esp32_aes_s aes;
- const int size = 16;
-
- const uint32_t input[8] =
- {
- 0x740fdb34, 0x002defca, 0xb042437b, 0xc2f42cf9,
- 0xc64444be, 0x32365bc1, 0xb613cfa2, 0x15ce0d23
- };
-
- const uint32_t key[16] =
- {
- 0x8ffdc2c5, 0x14d6c69d, 0x9cb7608f, 0x899b2472,
- 0xbf9e4372, 0x855290d0, 0xc62753da, 0xdeedeab7
- };
-
- const uint32_t result[3][4] =
- {
- /* keybits = 128 */
-
- {
- 0xc810df2a, 0x8ae67e6e, 0x50c5e32c, 0xd535f3e4
- },
-
- /* keybits = 192 */
-
- {
- 0x00d2f88e, 0x4e859ec6, 0x394e0af7, 0x965326d8
- },
-
- /* keybits = 256 */
-
- {
- 0xa0714c2b, 0x356adb1f, 0xe905c243, 0x35195a7c
- }
- };
-
- esp32_aes_init();
-
- for (i = 0; i < 3; i++)
- {
- keybits = i * 64 + 128;
-
- ret = esp32_aes_setkey(&aes, key, keybits);
- if (ret < 0)
- {
- return false;
- }
-
- ret = esp32_aes_ecb_cypher(&aes, 1, input, encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result[i], size);
- if (ret)
- {
- return false;
- }
-
- ret = esp32_aes_ecb_cypher(&aes, 0, encrypt_buf, decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- syslog(LOG_INFO, "ESP32 AES ECB key=%d bits test: PASS\n", keybits);
- }
-
- return true;
-}
-
-/****************************************************************************
- * Name: esp32_aes_cbc_test
- ****************************************************************************/
-
-static bool esp32_aes_cbc_test(void)
-{
- int ret;
- int i;
- int keybits;
- uint8_t encrypt_buf[32];
- uint8_t decrypt_buf[32];
- uint8_t iv_buf[16];
- struct esp32_aes_s aes;
- const int size = 32;
-
- const uint32_t input[8] =
- {
- 0x740fdb34, 0x002defca, 0xb042437b, 0xc2f42cf9,
- 0xc64444be, 0x32365bc1, 0xb613cfa2, 0x15ce0d23
- };
-
- const uint32_t key[16] =
- {
- 0x8ffdc2c5, 0x14d6c69d, 0x9cb7608f, 0x899b2472,
- 0xbf9e4372, 0x855290d0, 0xc62753da, 0xdeedeab7
- };
-
- const uint32_t iv[4] =
- {
- 0xf53a50f2, 0x8aaf711d, 0x953bbbfa, 0x228d53cb
- };
-
- const uint32_t result[3][8] =
- {
- /* keybits = 128 */
-
- {
- 0x04e27d12, 0x1a91e508, 0x01092431, 0x9d572184,
- 0xa39979e1, 0x5543e1bc, 0x7173b71d, 0x4e3be064
- },
-
- /* keybits = 192 */
-
- {
- 0x9b894bd8, 0x7dc31ec6, 0xde40c3d5, 0xc2ed0679,
- 0xa8a857fc, 0x815db8ca, 0x33f18ab8, 0x752c1b8e
- },
-
- /* keybits = 256 */
-
- {
- 0x6f36b8fe, 0x33bc1f37, 0x24fe659c, 0x0370def0,
- 0xb9a852f8, 0x64a79ae2, 0xd59f5045, 0x648a0f44
- }
- };
-
- for (i = 0; i < 3; i++)
- {
- keybits = i * 64 + 128;
-
- ret = esp32_aes_setkey(&aes, key, keybits);
- if (ret < 0)
- {
- return false;
- }
-
- memcpy(iv_buf, iv, 16);
- ret = esp32_aes_cbc_cypher(&aes, 1, iv_buf, input, encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result[i], size);
- if (ret)
- {
- return false;
- }
-
- memcpy(iv_buf, iv, 16);
- ret = esp32_aes_cbc_cypher(&aes, 0, iv_buf, encrypt_buf,
- decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- syslog(LOG_INFO, "ESP32 AES CBC key=%d bits test: PASS\n", keybits);
- }
-
- return true;
-}
-
-/****************************************************************************
- * Name: esp32_aes_ctr_test
- ****************************************************************************/
-
-static bool esp32_aes_ctr_test(void)
-{
- int ret;
- int i;
- int keybits;
- uint8_t encrypt_buf[32];
- uint8_t decrypt_buf[32];
- uint8_t cnt_buf[16];
- uint8_t cache_buf[16];
- uint32_t nc_off;
- struct esp32_aes_s aes;
- const int size = 32;
-
- const uint32_t input[8] =
- {
- 0x740fdb34, 0x002defca, 0xb042437b, 0xc2f42cf9,
- 0xc64444be, 0x32365bc1, 0xb613cfa2, 0x15ce0d23
- };
-
- const uint32_t key[16] =
- {
- 0x8ffdc2c5, 0x14d6c69d, 0x9cb7608f, 0x899b2472,
- 0xbf9e4372, 0x855290d0, 0xc62753da, 0xdeedeab7
- };
-
- const uint32_t cnt[4] =
- {
- 0xf53a50f2, 0x8aaf711d, 0x953bbbfa, 0x228d53cb
- };
-
- const uint32_t result[3][8] =
- {
- /* keybits = 128 */
-
- {
- 0x5f922338, 0x5aff403d, 0x45fede3f, 0x616568c6,
- 0x3cd0ffc7, 0xa26cb704, 0x0aaa8b6a, 0x1d0b5e1c
- },
-
- /* keybits = 192 */
-
- {
- 0xe1052003, 0x429823e2, 0x547e3f33, 0xbe55c832,
- 0x037f9f57, 0x1b3f025f, 0xc4c9a836, 0x164e2730
- },
-
- /* keybits = 256 */
-
- {
- 0x70af4473, 0x597d2126, 0xd598ed09, 0x3fea540c,
- 0xfb5c743c, 0x0c1a39ca, 0xcbcf2d17, 0x341a7a0c
- }
- };
-
- for (i = 0; i < 3; i++)
- {
- keybits = i * 64 + 128;
-
- ret = esp32_aes_setkey(&aes, key, keybits);
- if (ret < 0)
- {
- return false;
- }
-
- nc_off = 0;
- memcpy(cnt_buf, cnt, 16);
- ret = esp32_aes_ctr_cypher(&aes, &nc_off, cnt_buf, cache_buf,
- input, encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result[i], size);
- if (ret)
- {
- return false;
- }
-
- nc_off = 0;
- memcpy(cnt_buf, cnt, 16);
- ret = esp32_aes_ctr_cypher(&aes, &nc_off, cnt_buf, cache_buf,
- encrypt_buf, decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- syslog(LOG_INFO, "ESP32 AES CTR key=%d bits test: PASS\n", keybits);
- }
-
- return true;
-}
-
-/****************************************************************************
- * Name: esp32_aes_xts_test
- ****************************************************************************/
-
-static bool esp32_aes_xts_test(void)
-{
- int ret;
- int i;
- int keybits;
- uint8_t encrypt_buf[32];
- uint8_t decrypt_buf[32];
- uint8_t unit_buf[16];
- struct esp32_aes_xts_s aes;
- int size;
-
- const uint32_t input[8] =
- {
- 0x740fdb34, 0x002defca, 0xb042437b, 0xc2f42cf9,
- 0xc64444be, 0x32365bc1, 0xb613cfa2, 0x15ce0d23
- };
-
- const uint32_t key[16] =
- {
- 0x8ffdc2c5, 0x14d6c69d, 0x9cb7608f, 0x899b2472,
- 0xbf9e4372, 0x855290d0, 0xc62753da, 0xdeedeab7,
- 0x7ac6c53b, 0xc94f0b81, 0xdd673fc9, 0x8c1b71a6,
- 0x1f99b728, 0x5e7af2eb, 0xcc7274a3, 0xf0005b23
- };
-
- const uint32_t unit[4] =
- {
- 0xf53a50f2, 0x8aaf711d, 0x953bbbfa, 0x228d53cb
- };
-
- const uint32_t result_in32[2][8] =
- {
- /* keybits = 256 */
-
- {
- 0xf70e05fd, 0x2791be41, 0x926ec006, 0xc76068f4,
- 0x01fd0843, 0xdf5e576a, 0xa4b1833d, 0x90502608
- },
-
- /* keybits = 512 */
-
- {
- 0x164b4185, 0x4cb1cce7, 0xf285e523, 0x06a5923a,
- 0xae4fcb7b, 0x59ce9dc6, 0xed64546f, 0x5889cb17
- }
- };
-
- const uint32_t result_in30[2][8] =
- {
- /* keybits = 256 */
-
- {
- 0x26991fb6, 0x72e4a7bc, 0x97041d61, 0x9ec889af,
- 0xf70e05fd, 0x2791be41, 0x926ec006, 0x000068f4
- },
-
- /* keybits = 512 */
-
- {
- 0x4b42dd86, 0xeee792c0, 0x1516ff95, 0x1f5fd9e6,
- 0x164b4185, 0x4cb1cce7, 0xf285e523, 0x0000923a
- }
- };
-
- for (i = 0; i < 2; i++)
- {
- keybits = i * 256 + 256;
-
- ret = esp32_aes_xts_setkey(&aes, key, keybits);
- if (ret < 0)
- {
- return false;
- }
-
- /* Encrypt/Decrypt 32 bytes */
-
- size = 32;
-
- memcpy(unit_buf, unit, 16);
- ret = esp32_aes_xts_cypher(&aes, true, unit_buf, input,
- encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result_in32[i], size);
- if (ret)
- {
- return false;
- }
-
- memcpy(unit_buf, unit, 16);
- ret = esp32_aes_xts_cypher(&aes, false, unit_buf, encrypt_buf,
- decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- return false;
- }
-
- /* Encrypt/Decrypt 30 bytes */
-
- size = 30;
-
- memcpy(unit_buf, unit, 16);
- ret = esp32_aes_xts_cypher(&aes, true, unit_buf, input,
- encrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(encrypt_buf, result_in30[i], size);
- if (ret)
- {
- return false;
- }
-
- memcpy(unit_buf, unit, 16);
- ret = esp32_aes_xts_cypher(&aes, false, unit_buf, encrypt_buf,
- decrypt_buf, size);
- if (ret < 0)
- {
- return false;
- }
-
- ret = memcmp(decrypt_buf, input, size);
- if (ret)
- {
- DEBUGASSERT(0);
- }
-
- syslog(LOG_INFO, "ESP32 AES XTS key=%d bits test: PASS\n", keybits);
- }
-
- return true;
-}
-
-/****************************************************************************
- * Name: esp32_aes_main
- ****************************************************************************/
-
-int esp32_aes_main(int argc, char *argv[])
-{
- bool success;
-
- syslog(LOG_INFO, "----- BEGIN TEST -----\n");
-
- esp32_aes_init();
-
- success = esp32_aes_ecb_test();
- if (!success)
- {
- goto test_end;
- }
-
- success = esp32_aes_cbc_test();
- if (!success)
- {
- goto test_end;
- }
-
- success = esp32_aes_ctr_test();
- if (!success)
- {
- goto test_end;
- }
-
- success = esp32_aes_xts_test();
- if (!success)
- {
- goto test_end;
- }
-
-test_end:
- syslog(LOG_INFO, "----- END TEST -----\n");
-
- syslog(LOG_INFO, "\n");
-
- syslog(LOG_INFO, "----- RESULT: %s -----\n",
- success ? "SUCCESS" : "FAILED");
-
- return 0;
-}
-#endif
diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig
index 72e87bc..2e9427f 100644
--- a/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig
+++ b/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig
@@ -28,7 +28,6 @@ CONFIG_CRYPTO_SW_AES=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
CONFIG_ESP32_AES_ACCELERATOR=y
-CONFIG_ESP32_AES_ACCELERATOR_TEST=y
CONFIG_ESP32_UART0=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
@@ -53,4 +52,4 @@ CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USER_ENTRYPOINT="esp32_aes_main"
+CONFIG_USER_ENTRYPOINT="nsh_main"
[incubator-nuttx] 08/08: boards/esp32&esp32c3: Remove crypto
accelerators' defconfigs.
Posted by gu...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 9235d6605b94c91b65ca6af41b21ddcc15449e6c
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Sat Oct 16 18:22:03 2021 +0200
boards/esp32&esp32c3: Remove crypto accelerators' defconfigs.
Since the tests were removed from the drivers, there is no need for
these defconfigs anymore.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
.../esp32c3/esp32c3-devkit/configs/aes/defconfig | 44 -----------------
.../esp32c3/esp32c3-devkit/configs/rsa/defconfig | 48 -------------------
.../esp32c3/esp32c3-devkit/configs/sha/defconfig | 46 ------------------
.../esp32/esp32-devkitc/configs/aes/defconfig | 55 ----------------------
4 files changed, 193 deletions(-)
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/aes/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/aes/defconfig
deleted file mode 100644
index bfa01f0..0000000
--- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/aes/defconfig
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="esp32c3-devkit"
-CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y
-CONFIG_ARCH_CHIP="esp32c3"
-CONFIG_ARCH_CHIP_ESP32C3=y
-CONFIG_ARCH_CHIP_ESP32C3WROOM02=y
-CONFIG_ARCH_INTERRUPTSTACK=1536
-CONFIG_ARCH_RISCV=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=15000
-CONFIG_BUILTIN=y
-CONFIG_DEV_ZERO=y
-CONFIG_ESP32C3_AES_ACCELERATOR=y
-CONFIG_FS_PROCFS=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_PERROR_STDOUT=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_READLINE=y
-CONFIG_NSH_STRERROR=y
-CONFIG_PREALLOC_TIMERS=0
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_START_DAY=29
-CONFIG_START_MONTH=11
-CONFIG_START_YEAR=2019
-CONFIG_SYSTEM_NSH=y
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
deleted file mode 100644
index d4c1486..0000000
--- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="esp32c3-devkit"
-CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y
-CONFIG_ARCH_CHIP="esp32c3"
-CONFIG_ARCH_CHIP_ESP32C3=y
-CONFIG_ARCH_CHIP_ESP32C3WROOM02=y
-CONFIG_ARCH_INTERRUPTSTACK=1536
-CONFIG_ARCH_RISCV=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=15000
-CONFIG_BUILTIN=y
-CONFIG_DEBUG_ASSERTIONS=y
-CONFIG_DEBUG_FEATURES=y
-CONFIG_DEV_ZERO=y
-CONFIG_ESP32C3_BIGNUM_ACCELERATOR=y
-CONFIG_ESP32C3_RSA_ACCELERATOR=y
-CONFIG_FS_PROCFS=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_PERROR_STDOUT=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_READLINE=y
-CONFIG_NSH_STRERROR=y
-CONFIG_PREALLOC_TIMERS=0
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_START_DAY=29
-CONFIG_START_MONTH=11
-CONFIG_START_YEAR=2019
-CONFIG_SYSTEM_NSH=y
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/sha/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/sha/defconfig
deleted file mode 100644
index 46d8269..0000000
--- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/sha/defconfig
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="esp32c3-devkit"
-CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y
-CONFIG_ARCH_CHIP="esp32c3"
-CONFIG_ARCH_CHIP_ESP32C3=y
-CONFIG_ARCH_CHIP_ESP32C3WROOM02=y
-CONFIG_ARCH_INTERRUPTSTACK=1536
-CONFIG_ARCH_RISCV=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=15000
-CONFIG_BUILTIN=y
-CONFIG_DEBUG_ASSERTIONS=y
-CONFIG_DEBUG_FEATURES=y
-CONFIG_DEV_ZERO=y
-CONFIG_ESP32C3_SHA_ACCELERATOR=y
-CONFIG_FS_PROCFS=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_PERROR_STDOUT=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_READLINE=y
-CONFIG_NSH_STRERROR=y
-CONFIG_PREALLOC_TIMERS=0
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_START_DAY=29
-CONFIG_START_MONTH=11
-CONFIG_START_YEAR=2019
-CONFIG_SYSTEM_NSH=y
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig
deleted file mode 100644
index 2e9427f..0000000
--- a/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig
+++ /dev/null
@@ -1,55 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_LEDS is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ALLOW_BSD_COMPONENTS=y
-CONFIG_ARCH="xtensa"
-CONFIG_ARCH_BOARD="esp32-devkitc"
-CONFIG_ARCH_BOARD_ESP32_DEVKITC=y
-CONFIG_ARCH_CHIP="esp32"
-CONFIG_ARCH_CHIP_ESP32=y
-CONFIG_ARCH_CHIP_ESP32WROVER=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH_XTENSA=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ALGTEST=y
-CONFIG_CRYPTO_CRYPTODEV=y
-CONFIG_CRYPTO_SW_AES=y
-CONFIG_DEBUG_ASSERTIONS=y
-CONFIG_DEBUG_FEATURES=y
-CONFIG_ESP32_AES_ACCELERATOR=y
-CONFIG_ESP32_UART0=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_IDLETHREAD_STACKSIZE=3072
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=3
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_SYSTEM_NSH=y
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
[incubator-nuttx] 04/08: arch/risc-v/esp32c3: Remove the RSA test
from the driver.
Posted by gu...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 91cb9dafaf1eed39cfe92e397aec44fe53c372da
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 15 13:23:49 2021 +0200
arch/risc-v/esp32c3: Remove the RSA test from the driver.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
arch/risc-v/src/esp32c3/Kconfig | 9 -
arch/risc-v/src/esp32c3/esp32c3_rsa.c | 199 ---------------------
.../esp32c3/esp32c3-devkit/configs/rsa/defconfig | 3 +-
3 files changed, 1 insertion(+), 210 deletions(-)
diff --git a/arch/risc-v/src/esp32c3/Kconfig b/arch/risc-v/src/esp32c3/Kconfig
index 6be9855..b48b3b2 100644
--- a/arch/risc-v/src/esp32c3/Kconfig
+++ b/arch/risc-v/src/esp32c3/Kconfig
@@ -1045,13 +1045,6 @@ endmenu # Partition Configuration
endif
-menu "RSA Accelerate Configuration"
- depends on ESP32C3_RSA_ACCELERATOR
-
-config ESP32C3_RSA_ACCELERATOR_TEST
- bool "RSA driver test"
- default n
-
menu "BIGNUM"
depends on ESP32C3_BIGNUM_ACCELERATOR
@@ -1061,6 +1054,4 @@ config ESP32C3_BIGNUM_ACCELERATOR_TEST
endmenu # ESP32C3_BIGNUM_ACCELERATOR
-endmenu # ESP32C3_RSA_ACCELERATOR
-
endif # ARCH_CHIP_ESP32C3
diff --git a/arch/risc-v/src/esp32c3/esp32c3_rsa.c b/arch/risc-v/src/esp32c3/esp32c3_rsa.c
index fd4d21f..f88d92a 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_rsa.c
+++ b/arch/risc-v/src/esp32c3/esp32c3_rsa.c
@@ -2174,202 +2174,3 @@ void esp32c3_rsa_free(struct esp32c3_rsa_context_s *ctx)
#endif
-/****************************************************************************
- * Test Functions
- ****************************************************************************/
-
-#ifdef CONFIG_ESP32C3_RSA_ACCELERATOR_TEST
-
-/* Example RSA-1024 keypair, for test purposes */
-
-#define KEY_LEN 128
-
-#define RSA_N "9292758453063D803DD603D5E777D788" \
- "8ED1D5BF35786190FA2F23EBC0848AEA" \
- "DDA92CA6C3D80B32C4D109BE0F36D6AE" \
- "7130B9CED7ACDF54CFC7555AC14EEBAB" \
- "93A89813FBF3C4F8066D2D800F7C38A8" \
- "1AE31942917403FF4946B0A83D3D3E05" \
- "EE57C6F5F5606FB5D4BC6CD34EE0801A" \
- "5E94BB77B07507233A0BC7BAC8F90F79"
-
-#define RSA_E "10001"
-
-#define RSA_D "24BF6185468786FDD303083D25E64EFC" \
- "66CA472BC44D253102F8B4A9D3BFA750" \
- "91386C0077937FE33FA3252D28855837" \
- "AE1B484A8A9A45F7EE8C0C634F99E8CD" \
- "DF79C5CE07EE72C7F123142198164234" \
- "CABB724CF78B8173B9F880FC86322407" \
- "AF1FEDFDDE2BEB674CA15F3E81A1521E" \
- "071513A1E85B5DFA031F21ECAE91A34D"
-
-#define RSA_P "C36D0EB7FCD285223CFB5AABA5BDA3D8" \
- "2C01CAD19EA484A87EA4377637E75500" \
- "FCB2005C5C7DD6EC4AC023CDA285D796" \
- "C3D9E75E1EFC42488BB4F1D13AC30A57"
-
-#define RSA_Q "C000DF51A7C77AE8D7C7370C1FF55B69" \
- "E211C2B9E5DB1ED0BF61D0D9899620F4" \
- "910E4168387E3C30AA1E00C339A79508" \
- "8452DD96A9A5EA5D9DCA68DA636032AF"
-
-#define PT_LEN 24
-#define RSA_PT "\xAA\xBB\xCC\x03\x02\x01\x00\xFF\xFF\xFF\xFF\xFF" \
- "\x11\x22\x33\x0A\x0B\x0C\xCC\xDD\xDD\xDD\xDD\xDD"
-
-#if defined(ESP32C3_PKCS1_V15)
-static int myrand(void *rng_state, unsigned char *output, size_t len)
-{
-#if !defined(__OpenBSD__) && !defined(__NetBSD__)
- size_t i;
-
- if (rng_state != NULL)
- rng_state = NULL;
-
- for (i = 0; i < len; ++i)
- output[i] = rand();
-#else
- if (rng_state != NULL)
- rng_state = NULL;
-
- arc4random_buf(output, len);
-#endif /* !OpenBSD && !NetBSD */
-
- return OK;
-}
-#endif /* ESP32C3_PKCS1_V15 */
-
-/* Checkup routine */
-
-int esp32c3_rsa_self_test(int verbose)
-{
- int ret = 0;
-#if defined(ESP32C3_PKCS1_V15)
- size_t len;
- struct esp32c3_rsa_context_s rsa;
- unsigned char rsa_plaintext[PT_LEN];
- unsigned char rsa_decrypted[PT_LEN];
- unsigned char rsa_ciphertext[KEY_LEN];
-
- struct esp32c3_mpi_s K;
-
- esp32c3_mpi_init(&K);
- esp32c3_rsa_init(&rsa, ESP32C3_RSA_PKCS_V15, 0);
-
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&K, 16, RSA_N), cleanup);
- ESP32C3_MPI_CHK(esp32c3_rsa_import(&rsa, &K, NULL, NULL, NULL, NULL),
- cleanup);
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&K, 16, RSA_P), cleanup);
- ESP32C3_MPI_CHK(esp32c3_rsa_import(&rsa, NULL, &K, NULL, NULL, NULL),
- cleanup);
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&K, 16, RSA_Q), cleanup);
- ESP32C3_MPI_CHK(esp32c3_rsa_import(&rsa, NULL, NULL, &K, NULL, NULL),
- cleanup);
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&K, 16, RSA_D), cleanup);
- ESP32C3_MPI_CHK(esp32c3_rsa_import(&rsa, NULL, NULL, NULL, &K, NULL),
- cleanup);
- ESP32C3_MPI_CHK(esp32c3_mpi_read_string(&K, 16, RSA_E), cleanup);
- ESP32C3_MPI_CHK(esp32c3_rsa_import(&rsa, NULL, NULL, NULL, NULL, &K),
- cleanup);
-
- ESP32C3_MPI_CHK(esp32c3_rsa_complete(&rsa), cleanup);
-
- if (verbose != 0)
- syslog(LOG_INFO, " RSA key validation: ");
-
- if (esp32c3_rsa_check_pubkey(&rsa) != 0 ||
- esp32c3_rsa_check_privkey(&rsa) != 0)
- {
- if (verbose != 0)
- syslog(LOG_INFO, "failed\n");
-
- ret = 1;
- goto cleanup;
- }
-
- if (verbose != 0)
- syslog(LOG_INFO, "passed\n PKCS#1 encryption : ");
-
- memcpy(rsa_plaintext, RSA_PT, PT_LEN);
-
- if (esp32c3_rsa_encrypt(&rsa, myrand, NULL, ESP32C3_RSA_PUBLIC,
- PT_LEN, rsa_plaintext,
- rsa_ciphertext) != 0)
- {
- if (verbose != 0)
- syslog(LOG_INFO, "failed\n");
-
- ret = 1;
- goto cleanup;
- }
-
- if (verbose != 0)
- syslog(LOG_INFO, "passed\n PKCS#1 decryption : ");
-
- if (esp32c3_rsa_decrypt(&rsa, myrand, NULL, ESP32C3_RSA_PRIVATE,
- &len, rsa_ciphertext, rsa_decrypted,
- sizeof(rsa_decrypted)) != 0)
- {
- if (verbose != 0)
- syslog(LOG_INFO, "failed\n");
-
- ret = 1;
- goto cleanup;
- }
-
- if (memcmp(rsa_decrypted, rsa_plaintext, len) != 0)
- {
- if (verbose != 0)
- syslog(LOG_INFO, "failed\n");
-
- ret = 1;
- goto cleanup;
- }
-
- if (verbose != 0)
- syslog(LOG_INFO, "passed\n");
-
-cleanup:
- esp32c3_mpi_free(&K);
- esp32c3_rsa_free(&rsa);
-#else /* ESP32C3_PKCS1_V15 */
- ((void) verbose);
-#endif /* ESP32C3_PKCS1_V15 */
- return ret;
-}
-
-/****************************************************************************
- * Name: esp32c3_rsa_main
- ****************************************************************************/
-
-int esp32c3_rsa_main(int argc, char *argv[])
-{
- int ret = 0;
-
- syslog(LOG_INFO, "----- BEGIN TEST -----\n");
-
- ret = esp32c3_mpi_self_test(true);
- if (ret)
- {
- goto test_end;
- }
-
- ret = esp32c3_rsa_self_test(true);
- if (ret)
- {
- goto test_end;
- }
-
-test_end:
- syslog(LOG_INFO, "----- END TEST -----\n");
-
- syslog(LOG_INFO, "\n");
-
- syslog(LOG_INFO, "----- RESULT: %s -----\n",
- !ret ? "SUCCESS" : "FAILED");
-
- return 0;
-}
-
-#endif
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
index d234f2d..b0afcbe 100644
--- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/configs/rsa/defconfig
@@ -25,7 +25,6 @@ CONFIG_DEV_ZERO=y
CONFIG_ESP32C3_BIGNUM_ACCELERATOR=y
CONFIG_ESP32C3_BIGNUM_ACCELERATOR_TEST=y
CONFIG_ESP32C3_RSA_ACCELERATOR=y
-CONFIG_ESP32C3_RSA_ACCELERATOR_TEST=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INTELHEX_BINARY=y
@@ -47,4 +46,4 @@ CONFIG_START_YEAR=2019
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_USER_ENTRYPOINT="esp32c3_rsa_main"
+CONFIG_USER_ENTRYPOINT="nsh_main"
[incubator-nuttx] 03/08: arch/risc-v/esp32c3: Remove the SHA test
from the driver.
Posted by gu...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 652d77efd2ff693c462f0e4b62f00a9b992d1e1e
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 15 13:19:07 2021 +0200
arch/risc-v/esp32c3: Remove the SHA test from the driver.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
arch/risc-v/src/esp32c3/Kconfig | 9 -
arch/risc-v/src/esp32c3/esp32c3_sha.c | 581 ---------------------
.../esp32c3/esp32c3-devkit/configs/sha/defconfig | 3 +-
3 files changed, 1 insertion(+), 592 deletions(-)
diff --git a/arch/risc-v/src/esp32c3/Kconfig b/arch/risc-v/src/esp32c3/Kconfig
index ea356f8..6be9855 100644
--- a/arch/risc-v/src/esp32c3/Kconfig
+++ b/arch/risc-v/src/esp32c3/Kconfig
@@ -1045,15 +1045,6 @@ endmenu # Partition Configuration
endif
-menu "SHA accelerator"
- depends on ESP32C3_SHA_ACCELERATOR
-
-config ESP32C3_SHA_ACCELERATOR_TEST
- bool "SHA accelerator test"
- default n
-
-endmenu # ESP32C3_SHA_ACCELERATOR
-
menu "RSA Accelerate Configuration"
depends on ESP32C3_RSA_ACCELERATOR
diff --git a/arch/risc-v/src/esp32c3/esp32c3_sha.c b/arch/risc-v/src/esp32c3/esp32c3_sha.c
index 773ad23..dd71d60 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_sha.c
+++ b/arch/risc-v/src/esp32c3/esp32c3_sha.c
@@ -1132,584 +1132,3 @@ int esp32c3_sha_init(void)
#endif
-/****************************************************************************
- * Test Functions
- ****************************************************************************/
-
-#ifdef CONFIG_ESP32C3_SHA_ACCELERATOR_TEST
-
-/****************************************************************************
- * Name: esp32c3_sha1_self_test
- *
- * Description:
- * Checkup routine
- *
- * Input Parameters:
- * verbose - The result output or not
- *
- * Returned Value:
- * OK on success; Negated errno on failure.
- *
- ****************************************************************************/
-
-static int esp32c3_sha1_self_test(bool verbose)
-{
- int i;
- int j;
- int buflen;
- int ret = 0;
- unsigned char buf[1024];
- unsigned char sha1sum[20];
- struct esp32c3_sha1_context_s ctx;
-
- /* FIPS-180-1 test vectors */
-
- const unsigned char sha1_test_buf[3][57] =
- {
- {
- "abc"
- },
-
- {
- "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"
- },
-
- {
- ""
- }
- };
-
- const size_t sha1_test_buflen[3] =
- {
- 3, 56, 1000
- };
-
- const unsigned char sha1_test_sum[3][20] =
- {
- {
- 0xa9, 0x99, 0x3e, 0x36, 0x47, 0x06, 0x81, 0x6a, 0xba, 0x3e,
- 0x25, 0x71, 0x78, 0x50, 0xc2, 0x6c, 0x9c, 0xd0, 0xd8, 0x9d
- },
-
- {
- 0x84, 0x98, 0x3e, 0x44, 0x1c, 0x3b, 0xd2, 0x6e, 0xba, 0xae,
- 0x4a, 0xa1, 0xf9, 0x51, 0x29, 0xe5, 0xe5, 0x46, 0x70, 0xf1
- },
-
- {
- 0x34, 0xaa, 0x97, 0x3c, 0xd4, 0xc4, 0xda, 0xa4, 0xf6, 0x1e,
- 0xeb, 0x2b, 0xdb, 0xad, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6f
- }
- };
-
- esp32c3_sha1_init(&ctx);
-
- for (i = 0; i < 3; i++)
- {
- if (verbose)
- {
- syslog(LOG_INFO, " SHA-1 test #%d: ", i + 1);
- }
-
- ret = esp32c3_sha1_starts(&ctx);
- if (ret != 0)
- {
- goto fail;
- }
-
- if (i == 2)
- {
- memset(buf, 'a', buflen = 1000);
-
- for (j = 0; j < 1000; j++)
- {
- ret = esp32c3_sha1_update(&ctx, buf, buflen);
- if (ret != 0)
- {
- goto fail;
- }
- }
- }
- else
- {
- ret = esp32c3_sha1_update(&ctx,
- sha1_test_buf[i],
- sha1_test_buflen[i]);
- if (ret != 0)
- {
- goto fail;
- }
- }
-
- ret = esp32c3_sha1_finish(&ctx, sha1sum);
- if (ret != 0)
- {
- goto fail;
- }
-
- if (memcmp(sha1sum, sha1_test_sum[i], 20) != 0)
- {
- ret = 1;
- goto fail;
- }
-
- if (verbose)
- {
- syslog(LOG_INFO, "passed\n");
- }
- }
-
- if (verbose)
- {
- syslog(LOG_INFO, "\n");
- }
-
- goto exit;
-
-fail:
- if (verbose)
- {
- syslog(LOG_INFO, "failed\n");
- }
-
-exit:
- esp32c3_sha1_free(&ctx);
-
- return (ret);
-}
-
-/****************************************************************************
- * Name: esp32c3_sha256_self_test
- *
- * Description:
- * Checkup routine
- *
- * Input Parameters:
- * verbose - The result output or not
- *
- * Returned Value:
- * OK on success; Negated errno on failure.
- *
- ****************************************************************************/
-
-static int esp32c3_sha256_self_test(bool verbose)
-{
- int i;
- int j;
- int k;
- int buflen;
- int ret = 0;
- unsigned char *buf;
- unsigned char sha256sum[32];
- struct esp32c3_sha256_context_s ctx;
-
- /* FIPS-180-2 test vectors */
-
- const unsigned char sha256_test_buf[3][57] =
- {
- {
- "abc"
- },
-
- {
- "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"
- },
-
- {
- ""
- }
- };
-
- const size_t sha256_test_buflen[3] =
- {
- 3, 56, 1000
- };
-
- const unsigned char sha256_test_sum[6][32] =
- {
- /* SHA-224 test vectors */
-
- {
- 0x23, 0x09, 0x7d, 0x22, 0x34, 0x05, 0xd8, 0x22,
- 0x86, 0x42, 0xa4, 0x77, 0xbd, 0xa2, 0x55, 0xb3,
- 0x2a, 0xad, 0xbc, 0xe4, 0xbd, 0xa0, 0xb3, 0xf7,
- 0xe3, 0x6c, 0x9d, 0xa7
- },
-
- {
- 0x75, 0x38, 0x8b, 0x16, 0x51, 0x27, 0x76, 0xcc,
- 0x5d, 0xba, 0x5d, 0xa1, 0xfd, 0x89, 0x01, 0x50,
- 0xb0, 0xc6, 0x45, 0x5c, 0xb4, 0xf5, 0x8b, 0x19,
- 0x52, 0x52, 0x25, 0x25
- },
-
- {
- 0x20, 0x79, 0x46, 0x55, 0x98, 0x0c, 0x91, 0xd8,
- 0xbb, 0xb4, 0xc1, 0xea, 0x97, 0x61, 0x8a, 0x4b,
- 0xf0, 0x3f, 0x42, 0x58, 0x19, 0x48, 0xb2, 0xee,
- 0x4e, 0xe7, 0xad, 0x67
- },
-
- /* SHA-256 test vectors */
-
- {
- 0xba, 0x78, 0x16, 0xbf, 0x8f, 0x01, 0xcf, 0xea,
- 0x41, 0x41, 0x40, 0xde, 0x5d, 0xae, 0x22, 0x23,
- 0xb0, 0x03, 0x61, 0xa3, 0x96, 0x17, 0x7a, 0x9c,
- 0xb4, 0x10, 0xff, 0x61, 0xf2, 0x00, 0x15, 0xad
- },
-
- {
- 0x24, 0x8d, 0x6a, 0x61, 0xd2, 0x06, 0x38, 0xb8,
- 0xe5, 0xc0, 0x26, 0x93, 0x0c, 0x3e, 0x60, 0x39,
- 0xa3, 0x3c, 0xe4, 0x59, 0x64, 0xff, 0x21, 0x67,
- 0xf6, 0xec, 0xed, 0xd4, 0x19, 0xdb, 0x06, 0xc1
- },
-
- {
- 0xcd, 0xc7, 0x6e, 0x5c, 0x99, 0x14, 0xfb, 0x92,
- 0x81, 0xa1, 0xc7, 0xe2, 0x84, 0xd7, 0x3e, 0x67,
- 0xf1, 0x80, 0x9a, 0x48, 0xa4, 0x97, 0x20, 0x0e,
- 0x04, 0x6d, 0x39, 0xcc, 0xc7, 0x11, 0x2c, 0xd0
- }
- };
-
- buf = calloc(1024, sizeof(unsigned char));
- if (NULL == buf)
- {
- if (verbose)
- {
- syslog(LOG_INFO, "Buffer allocation failed\n");
- }
-
- return (1);
- }
-
- esp32c3_sha256_init(&ctx);
-
- for (i = 0; i < 6; i++)
- {
- j = i % 3;
- k = i < 3;
-
- if (verbose)
- {
- syslog(LOG_INFO, " SHA-%d test #%d: ", 256 - k * 32, j + 1);
- }
-
- ret = esp32c3_sha256_starts(&ctx, k);
- if (ret != 0)
- {
- goto fail;
- }
-
- if (j == 2)
- {
- memset(buf, 'a', buflen = 1000);
-
- for (j = 0; j < 1000; j++)
- {
- ret = esp32c3_sha256_update(&ctx, buf, buflen);
- if (ret != 0)
- {
- goto fail;
- }
- }
- }
- else
- {
- ret = esp32c3_sha256_update(&ctx,
- sha256_test_buf[j],
- sha256_test_buflen[j]);
- if (ret != 0)
- {
- goto fail;
- }
- }
-
- ret = esp32c3_sha256_finish(&ctx, sha256sum);
- if (ret != 0)
- {
- goto fail;
- }
-
- if (memcmp(sha256sum, sha256_test_sum[i], 32 - k * 4) != 0)
- {
- ret = 1;
- goto fail;
- }
-
- if (verbose)
- {
- syslog(LOG_INFO, "passed\n");
- }
- }
-
- if (verbose)
- {
- syslog(LOG_INFO, "\n");
- }
-
- goto exit;
-
-fail:
- if (verbose)
- {
- syslog(LOG_INFO, "failed\n");
- }
-
-exit:
- esp32c3_sha256_free(&ctx);
- free(buf);
-
- return (ret);
-}
-
-/****************************************************************************
- * Name: esp32c3_sha512_self_test
- *
- * Description:
- * Checkup routine
- *
- * Input Parameters:
- * verbose - The result output or not
- *
- * Returned Value:
- * OK on success; Negated errno on failure.
- *
- ****************************************************************************/
-
-static int esp32c3_sha512_self_test(bool verbose)
-{
- int i;
- int j;
- int k;
- int buflen;
- int ret = 0;
- unsigned char *buf;
- unsigned char sha512sum[64];
- struct esp32c3_sha512_context_s ctx;
-
- /* FIPS-180-2 test vectors */
-
- const unsigned char sha512_test_buf[3][113] =
- {
- {
- "abc"
- },
-
- {
- "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmn"
- "hijklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu"
- },
-
- {
- ""
- }
- };
-
- const size_t sha512_test_buflen[3] =
- {
- 3, 112, 1000
- };
-
- const unsigned char sha512_test_sum[6][64] =
- {
- /* SHA-384 test vectors */
-
- {
- 0xcb, 0x00, 0x75, 0x3f, 0x45, 0xa3, 0x5e, 0x8b,
- 0xb5, 0xa0, 0x3d, 0x69, 0x9a, 0xc6, 0x50, 0x07,
- 0x27, 0x2c, 0x32, 0xab, 0x0e, 0xde, 0xd1, 0x63,
- 0x1a, 0x8b, 0x60, 0x5a, 0x43, 0xff, 0x5b, 0xed,
- 0x80, 0x86, 0x07, 0x2b, 0xa1, 0xe7, 0xcc, 0x23,
- 0x58, 0xba, 0xec, 0xa1, 0x34, 0xc8, 0x25, 0xa7
- },
-
- {
- 0x09, 0x33, 0x0c, 0x33, 0xf7, 0x11, 0x47, 0xe8,
- 0x3d, 0x19, 0x2f, 0xc7, 0x82, 0xcd, 0x1b, 0x47,
- 0x53, 0x11, 0x1b, 0x17, 0x3b, 0x3b, 0x05, 0xd2,
- 0x2f, 0xa0, 0x80, 0x86, 0xe3, 0xb0, 0xf7, 0x12,
- 0xfc, 0xc7, 0xc7, 0x1a, 0x55, 0x7e, 0x2d, 0xb9,
- 0x66, 0xc3, 0xe9, 0xfa, 0x91, 0x74, 0x60, 0x39
- },
-
- {
- 0x9d, 0x0e, 0x18, 0x09, 0x71, 0x64, 0x74, 0xcb,
- 0x08, 0x6e, 0x83, 0x4e, 0x31, 0x0a, 0x4a, 0x1c,
- 0xed, 0x14, 0x9e, 0x9c, 0x00, 0xf2, 0x48, 0x52,
- 0x79, 0x72, 0xce, 0xc5, 0x70, 0x4c, 0x2a, 0x5b,
- 0x07, 0xb8, 0xb3, 0xdc, 0x38, 0xec, 0xc4, 0xeb,
- 0xae, 0x97, 0xdd, 0xd8, 0x7f, 0x3d, 0x89, 0x85
- },
-
- /* SHA-512 test vectors */
-
- {
- 0xdd, 0xaf, 0x35, 0xa1, 0x93, 0x61, 0x7a, 0xba,
- 0xcc, 0x41, 0x73, 0x49, 0xae, 0x20, 0x41, 0x31,
- 0x12, 0xe6, 0xfa, 0x4e, 0x89, 0xa9, 0x7e, 0xa2,
- 0x0a, 0x9e, 0xee, 0xe6, 0x4b, 0x55, 0xd3, 0x9a,
- 0x21, 0x92, 0x99, 0x2a, 0x27, 0x4f, 0xc1, 0xa8,
- 0x36, 0xba, 0x3c, 0x23, 0xa3, 0xfe, 0xeb, 0xbd,
- 0x45, 0x4d, 0x44, 0x23, 0x64, 0x3c, 0xe8, 0x0e,
- 0x2a, 0x9a, 0xc9, 0x4f, 0xa5, 0x4c, 0xa4, 0x9f
- },
-
- {
- 0x8e, 0x95, 0x9b, 0x75, 0xda, 0xe3, 0x13, 0xda,
- 0x8c, 0xf4, 0xf7, 0x28, 0x14, 0xfc, 0x14, 0x3f,
- 0x8f, 0x77, 0x79, 0xc6, 0xeb, 0x9f, 0x7f, 0xa1,
- 0x72, 0x99, 0xae, 0xad, 0xb6, 0x88, 0x90, 0x18,
- 0x50, 0x1d, 0x28, 0x9e, 0x49, 0x00, 0xf7, 0xe4,
- 0x33, 0x1b, 0x99, 0xde, 0xc4, 0xb5, 0x43, 0x3a,
- 0xc7, 0xd3, 0x29, 0xee, 0xb6, 0xdd, 0x26, 0x54,
- 0x5e, 0x96, 0xe5, 0x5b, 0x87, 0x4b, 0xe9, 0x09
- },
-
- {
- 0xe7, 0x18, 0x48, 0x3d, 0x0c, 0xe7, 0x69, 0x64,
- 0x4e, 0x2e, 0x42, 0xc7, 0xbc, 0x15, 0xb4, 0x63,
- 0x8e, 0x1f, 0x98, 0xb1, 0x3b, 0x20, 0x44, 0x28,
- 0x56, 0x32, 0xa8, 0x03, 0xaf, 0xa9, 0x73, 0xeb,
- 0xde, 0x0f, 0xf2, 0x44, 0x87, 0x7e, 0xa6, 0x0a,
- 0x4c, 0xb0, 0x43, 0x2c, 0xe5, 0x77, 0xc3, 0x1b,
- 0xeb, 0x00, 0x9c, 0x5c, 0x2c, 0x49, 0xaa, 0x2e,
- 0x4e, 0xad, 0xb2, 0x17, 0xad, 0x8c, 0xc0, 0x9b
- }
- };
-
- buf = calloc(1024, sizeof(unsigned char));
- if (NULL == buf)
- {
- if (verbose)
- {
- syslog(LOG_INFO, "Buffer allocation failed\n");
- }
-
- return (1);
- }
-
- esp32c3_sha512_init(&ctx);
-
- for (i = 0; i < 6; i++)
- {
- j = i % 3;
- k = i < 3;
-
- if (verbose)
- {
- syslog(LOG_INFO, " SHA-%d test #%d: ", 512 - k * 128, j + 1);
- }
-
- ret = esp32c3_sha512_starts(&ctx, k);
- if (ret != 0)
- {
- goto fail;
- }
-
- if (j == 2)
- {
- memset(buf, 'a', buflen = 1000);
-
- for (j = 0; j < 1000; j++)
- {
- ret = esp32c3_sha512_update(&ctx, buf, buflen);
- if (ret != 0)
- {
- goto fail;
- }
- }
- }
- else
- {
- ret = esp32c3_sha512_update(&ctx,
- sha512_test_buf[j],
- sha512_test_buflen[j]);
- if (ret != 0)
- {
- goto fail;
- }
- }
-
- ret = esp32c3_sha512_finish(&ctx, sha512sum);
- if (ret != 0)
- {
- goto fail;
- }
-
- if (memcmp(sha512sum, sha512_test_sum[i], 64 - k * 16) != 0)
- {
- ret = 1;
- goto fail;
- }
-
- if (verbose)
- {
- syslog(LOG_INFO, "passed\n");
- }
- }
-
- if (verbose)
- {
- syslog(LOG_INFO, "\n");
- }
-
- goto exit;
-
-fail:
- if (verbose)
- {
- syslog(LOG_INFO, "failed\n");
- }
-
-exit:
- esp32c3_sha512_free(&ctx);
- free(buf);
-
- return (ret);
-}
-
-/****************************************************************************
- * Name: esp32c3_sha_main
- ****************************************************************************/
-
-int esp32c3_sha_main(int argc, char *argv[])
-{
- int ret = 0;
-
- syslog(LOG_INFO, "----- BEGIN TEST -----\n");
-
- esp32c3_sha_init();
-
- ret = esp32c3_sha1_self_test(true);
- if (ret)
- {
- goto test_end;
- }
-
- ret = esp32c3_sha256_self_test(true);
- if (ret)
- {
- goto test_end;
- }
-
- ret = esp32c3_sha512_self_test(true);
- if (ret)
- {
- goto test_end;
- }
-
-test_end:
- syslog(LOG_INFO, "----- END TEST -----\n");
-
- syslog(LOG_INFO, "\n");
-
- syslog(LOG_INFO, "----- RESULT: %s -----\n",
- !ret ? "SUCCESS" : "FAILED");
-
- return OK;
-}
-
-#endif
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/sha/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/sha/defconfig
index 30b2bc3..46d8269 100644
--- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/sha/defconfig
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/configs/sha/defconfig
@@ -23,7 +23,6 @@ CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEV_ZERO=y
CONFIG_ESP32C3_SHA_ACCELERATOR=y
-CONFIG_ESP32C3_SHA_ACCELERATOR_TEST=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INTELHEX_BINARY=y
@@ -44,4 +43,4 @@ CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USER_ENTRYPOINT="esp32c3_sha_main"
+CONFIG_USER_ENTRYPOINT="nsh_main"