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Posted to commits@mynewt.apache.org by je...@apache.org on 2021/02/01 07:15:44 UTC
[mynewt-core] 01/03: bsp/nucleo-f103rb: Use HSE instead of HSI
This is an automated email from the ASF dual-hosted git repository.
jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit c4fd789a70adca4948f9cb9ee237f84060f4f2fd
Author: Jerzy Kasenberg <je...@codecoup.pl>
AuthorDate: Thu Jan 21 13:09:41 2021 +0100
bsp/nucleo-f103rb: Use HSE instead of HSI
Nucleo board have 8MHz clock generated by on-board
st-link debugger.
This clock has higher accuracy then internal HSI.
Changing from HSI to HSE (both 8MHz) results in:
- System clock increased from 64MHz to 72MHz (maximum)
- Peripherals can operate on higher baud rates.
- Greater stability of system clock that may impact USB
transfers.
---
hw/bsp/nucleo-f103rb/syscfg.yml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/bsp/nucleo-f103rb/syscfg.yml b/hw/bsp/nucleo-f103rb/syscfg.yml
index 742ec83..01c18bc 100644
--- a/hw/bsp/nucleo-f103rb/syscfg.yml
+++ b/hw/bsp/nucleo-f103rb/syscfg.yml
@@ -28,9 +28,9 @@ syscfg.vals:
NFFS_FLASH_AREA: FLASH_AREA_NFFS
COREDUMP_FLASH_AREA: FLASH_AREA_IMAGE_1
STM32_CLOCK_HSI: 1
- STM32_CLOCK_HSE: 0
- STM32_CLOCK_HSE_BYPASS: 0
- STM32_CLOCK_PLL_MUL: 'RCC_PLL_MUL16'
+ STM32_CLOCK_HSE: 1
+ STM32_CLOCK_HSE_BYPASS: 1
+ STM32_CLOCK_PLL_MUL: 'RCC_PLL_MUL9'
STM32_CLOCK_PREDIV: 'RCC_HSE_PREDIV_DIV1'
STM32_CLOCK_AHB_DIVIDER: 'RCC_SYSCLK_DIV1'
STM32_CLOCK_APB1_DIVIDER: 'RCC_HCLK_DIV2'