You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@mynewt.apache.org by ma...@apache.org on 2016/11/22 20:07:01 UTC
[47/59] [abbrv] [partial] incubator-mynewt-core git commit: Remove
non-Apache-compatible Nordic SDK files.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/a1481cb2/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_clock.h
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_clock.h b/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_clock.h
deleted file mode 100644
index b9839dc..0000000
--- a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_clock.h
+++ /dev/null
@@ -1,422 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef NRF_CLOCK_H__
-#define NRF_CLOCK_H__
-
-#include <stddef.h>
-#include <stdbool.h>
-
-#include "nrf.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_clock_hal Clock HAL
- * @{
- * @ingroup nrf_clock
- * @brief Hardware access layer for managing the low-frequency clock (LFCLK) and the high-frequency clock (HFCLK).
- */
-
-#define NRF_CLOCK_TASK_TRIGGER (1UL)
-#define NRF_CLOCK_EVENT_CLEAR (0UL)
-
-/**
- * @brief Low-frequency clock sources.
- * @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers.
- */
-typedef enum
-{
- NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */
- NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */
- NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth /**< Internal 32 kHz synthesizer from HFCLK system clock. */
-} nrf_clock_lfclk_t;
-
-/**
- * @brief High-frequency clock sources.
- */
-typedef enum
-{
- NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */
- NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal /**< External 16 MHz/32 MHz crystal oscillator. */
-} nrf_clock_hfclk_t;
-
-/**
- * @brief Trigger status of task LFCLKSTART/HFCLKSTART.
- * @details Used by LFCLKRUN and HFCLKRUN registers.
- */
-typedef enum
-{
- NRF_CLOCK_START_TASK_NOT_TRIGGERED = CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */
- NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
-} nrf_clock_start_task_status_t;
-
-/**
- * @brief Crystal frequency selection.
- */
-typedef enum
-{
-#ifdef NRF51
- NRF_CLOCK_XTALFREQ_Default = CLOCK_XTALFREQ_XTALFREQ_16MHz, /**< Default. 32 MHz. */
- NRF_CLOCK_XTALFREQ_16MHz = CLOCK_XTALFREQ_XTALFREQ_16MHz, /**< 16 MHz crystal. */
- NRF_CLOCK_XTALFREQ_32MHz = CLOCK_XTALFREQ_XTALFREQ_32MHz /**< 32 MHz crystal. */
-#elif defined NRF52
- NRF_CLOCK_XTALFREQ_Default, /**< Default. 64MHz. */
-#endif
-} nrf_clock_xtalfreq_t;
-
-/**
- * @brief Interrupts.
- */
-typedef enum
-{
- NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */
- NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */
- NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */
- NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */
-} nrf_clock_int_mask_t;
-
-/**
- * @brief Tasks.
- *
- * @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running.
- * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
-{
- NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/
- NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/
- NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source.*/
- NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source.*/
- NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator.*/
- NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/
- NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/
-} nrf_clock_task_t; /*lint -restore */
-
-/**
- * @brief Events.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
-{
- NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/
- NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/
- NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/
- NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/
-} nrf_clock_event_t; /*lint -restore */
-
-/**
- * @brief Function for enabling a specific interrupt.
- *
- * @param[in] int_mask Interrupt.
- */
-__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask);
-
-/**
- * @brief Function for disabling a specific interrupt.
- *
- * @param[in] int_mask Interrupt.
- */
-__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask);
-
-/**
- * @brief Function for retrieving the state of a specific interrupt.
- *
- * @param[in] int_mask Interrupt.
- *
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
- */
-__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask);
-
-/**
- * @brief Function for retrieving the address of a specific task.
- * @details This function can be used by the PPI module.
- *
- * @param[in] task Task.
- *
- * @return Address of the requested task register.
- */
-__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task);
-
-/**
- * @brief Function for setting a specific task.
- *
- * @param[in] task Task.
- */
-__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task);
-
-/**
- * @brief Function for retrieving the address of a specific event.
- * @details This function can be used by the PPI module.
- *
- * @param[in] event Event.
- *
- * @return Address of the requested event register.
- */
-__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event);
-
-/**
- * @brief Function for clearing a specific event.
- *
- * @param[in] event Event.
- */
-__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event);
-
-/**
- * @brief Function for retrieving the state of a specific event.
- *
- * @param[in] event Event.
- *
- * @retval true If the event is set.
- * @retval false If the event is not set.
- */
-__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event);
-
-/**
- * @brief Function for changing the low-frequency clock source.
- * @details This function cannot be called when the low-frequency clock is running.
- *
- * @param[in] source New low-frequency clock source.
- *
- */
-__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source);
-
-/**
- * @brief Function for retrieving the selected source for the low-frequency clock.
- *
- * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the selected source for the low-frequency clock.
- * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the selected source for the low-frequency clock.
- * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the selected source for the low-frequency clock.
- */
-__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void);
-
-/**
- * @brief Function for retrieving the active source of the low-frequency clock.
- *
- * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the active source of the low-frequency clock.
- * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the active source of the low-frequency clock.
- * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the active source of the low-frequency clock.
- */
-__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void);
-
-/**
- * @brief Function for retrieving the clock source for the LFCLK clock when the task LKCLKSTART is triggered.
- *
- * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is running and generating the LFCLK clock.
- * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is running and generating the LFCLK clock.
- * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is running and generating the LFCLK clock.
- */
-__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void);
-
-/**
- * @brief Function for retrieving the state of the LFCLK clock.
- *
- * @retval false If the LFCLK clock is not running.
- * @retval true If the LFCLK clock is running.
- */
-__STATIC_INLINE bool nrf_clock_lf_is_running(void);
-
-/**
- * @brief Function for retrieving the trigger status of the task LFCLKSTART.
- *
- * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered.
- * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered.
- */
-__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void);
-
-/**
- * @brief Function for retrieving the active source of the high-frequency clock.
- *
- * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal 16 MHz RC oscillator is the active source of the high-frequency clock.
- * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external 16 MHz/32 MHz crystal oscillator is the active source of the high-frequency clock.
- */
-__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void);
-
-/**
- * @brief Function for retrieving the state of the HFCLK clock.
- *
- * @param[in] clk_src Clock source to be checked.
- *
- * @retval false If the HFCLK clock is not running.
- * @retval true If the HFCLK clock is running.
- */
-__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src);
-
-/**
- * @brief Function for retrieving the trigger status of the task HFCLKSTART.
- *
- * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered.
- * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered.
- */
-__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void);
-
-/**
- * @brief Function for retrieving the frequency selection of the external crystal.
- *
- * @retval NRF_CLOCK_XTALFREQ_16MHz If a 16 MHz crystal is used as source for the HFCLK oscillator.
- * @retval NRF_CLOCK_XTALFREQ_32MHz If a 32 MHz crystal is used as source for the HFCLK oscillator.
- */
-__STATIC_INLINE nrf_clock_xtalfreq_t nrf_clock_xtalfreq_get(void);
-
-/**
- * @brief Function for changing the frequency selection of the external crystal.
- *
- * @param[in] xtalfreq New frequency selection for the external crystal.
- */
-__STATIC_INLINE void nrf_clock_xtalfreq_set(nrf_clock_xtalfreq_t xtalfreq);
-
-/**
- * @brief Function for changing the calibration timer interval.
- *
- * @param[in] interval New calibration timer interval in 0.25 s resolution (range: 0.25 seconds to 31.75 seconds).
- */
-__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval);
-
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-
-__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask)
-{
- NRF_CLOCK->INTENSET = int_mask;
-}
-
-__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask)
-{
- NRF_CLOCK->INTENCLR = int_mask;
-}
-
-__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask)
-{
- return (bool)(NRF_CLOCK->INTENCLR & int_mask);
-}
-
-__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task)
-{
- return ((uint32_t )NRF_CLOCK + task);
-}
-
-__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task)
-{
- *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER;
-}
-
-__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event)
-{
- return ((uint32_t)NRF_CLOCK + event);
-}
-
-__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event)
-{
- *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR;
-#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event));
- (void)dummy;
-#endif
-}
-
-__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event)
-{
- return (bool)*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event));
-}
-
-__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source)
-{
- NRF_CLOCK->LFCLKSRC =
- (uint32_t)((source << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
-}
-
-__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void)
-{
- return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRC &
- CLOCK_LFCLKSRC_SRC_Msk) >> CLOCK_LFCLKSRC_SRC_Pos);
-}
-
-__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void)
-{
- return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSTAT &
- CLOCK_LFCLKSTAT_SRC_Msk) >> CLOCK_LFCLKSTAT_SRC_Pos);
-}
-
-__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void)
-{
- return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRCCOPY &
- CLOCK_LFCLKSRCCOPY_SRC_Msk) >> CLOCK_LFCLKSRCCOPY_SRC_Pos);
-}
-
-__STATIC_INLINE bool nrf_clock_lf_is_running(void)
-{
- return ((NRF_CLOCK->LFCLKSTAT &
- CLOCK_LFCLKSTAT_STATE_Msk) >> CLOCK_LFCLKSTAT_STATE_Pos);
-}
-
-__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void)
-{
- return (nrf_clock_start_task_status_t)((NRF_CLOCK->LFCLKRUN &
- CLOCK_LFCLKRUN_STATUS_Msk) >>
- CLOCK_LFCLKRUN_STATUS_Pos);
-}
-
-__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void)
-{
- return (nrf_clock_hfclk_t)((NRF_CLOCK->HFCLKSTAT &
- CLOCK_HFCLKSTAT_SRC_Msk) >> CLOCK_HFCLKSTAT_SRC_Pos);
-}
-
-__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src)
-{
- return (NRF_CLOCK->HFCLKSTAT & (CLOCK_HFCLKSTAT_STATE_Msk | CLOCK_HFCLKSTAT_SRC_Msk)) ==
- (CLOCK_HFCLKSTAT_STATE_Msk | (clk_src << CLOCK_HFCLKSTAT_SRC_Pos));
-}
-
-__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void)
-{
- return (nrf_clock_start_task_status_t)((NRF_CLOCK->HFCLKRUN &
- CLOCK_HFCLKRUN_STATUS_Msk) >>
- CLOCK_HFCLKRUN_STATUS_Pos);
-}
-
-__STATIC_INLINE nrf_clock_xtalfreq_t nrf_clock_xtalfreq_get(void)
-{
-#ifdef NRF51
- return (nrf_clock_xtalfreq_t)((NRF_CLOCK->XTALFREQ &
- CLOCK_XTALFREQ_XTALFREQ_Msk) >> CLOCK_XTALFREQ_XTALFREQ_Pos);
-#elif defined NRF52
- return NRF_CLOCK_XTALFREQ_Default;
-#endif
-}
-
-__STATIC_INLINE void nrf_clock_xtalfreq_set(nrf_clock_xtalfreq_t xtalfreq)
-{
-#ifdef NRF51
- NRF_CLOCK->XTALFREQ =
- (uint32_t)((xtalfreq << CLOCK_XTALFREQ_XTALFREQ_Pos) & CLOCK_XTALFREQ_XTALFREQ_Msk);
-#elif defined NRF52
- return;
-#endif
-}
-
-__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval)
-{
- NRF_CLOCK->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk);
-}
-
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
-
-/**
- *@}
- **/
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_CLOCK_H__
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/a1481cb2/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_comp.h
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_comp.h b/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_comp.h
deleted file mode 100644
index b1a3b71..0000000
--- a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_comp.h
+++ /dev/null
@@ -1,477 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-/**
- * @file
- * @brief COMP HAL API.
- */
-
-#ifndef NRF_COMP_H_
-#define NRF_COMP_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_comp_hal COMP HAL
- * @{
- * @ingroup nrf_comp
- * @brief @tagAPI52 Hardware access layer for managing the Comparator (COMP).
- */
-
-#include "nrf.h"
-
-#include <stdbool.h>
-#include <stddef.h>
-#include <stdint.h>
-
-/**
- * @enum nrf_comp_input_t
- * @brief COMP analog pin selection.
- */
-typedef enum
-{
- NRF_COMP_INPUT_0 = COMP_PSEL_PSEL_AnalogInput0, /*!< AIN0 selected as analog input. */
- NRF_COMP_INPUT_1 = COMP_PSEL_PSEL_AnalogInput1, /*!< AIN1 selected as analog input. */
- NRF_COMP_INPUT_2 = COMP_PSEL_PSEL_AnalogInput2, /*!< AIN2 selected as analog input. */
- NRF_COMP_INPUT_3 = COMP_PSEL_PSEL_AnalogInput3, /*!< AIN3 selected as analog input. */
- NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4, /*!< AIN4 selected as analog input. */
- NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5, /*!< AIN5 selected as analog input. */
- NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6, /*!< AIN6 selected as analog input. */
- NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7 /*!< AIN7 selected as analog input. */
-}nrf_comp_input_t;
-
-/**
- * @enum nrf_comp_ref_t
- * @brief COMP reference selection.
- */
-typedef enum
-{
- NRF_COMP_REF_Int1V2 = COMP_REFSEL_REFSEL_Int1V2, /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V). */
- NRF_COMP_REF_Int1V8 = COMP_REFSEL_REFSEL_Int1V8, /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V). */
- NRF_COMP_REF_Int2V4 = COMP_REFSEL_REFSEL_Int2V4, /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V). */
- NRF_COMP_REF_VDD = COMP_REFSEL_REFSEL_VDD, /*!< VREF = VDD. */
- NRF_COMP_REF_ARef = COMP_REFSEL_REFSEL_ARef /*!< VREF = AREF (VDD >= VREF >= AREFMIN). */
-}nrf_comp_ref_t;
-
-/**
- * @enum nrf_comp_ext_ref_t
- * @brief COMP external analog reference selection.
- */
-typedef enum
-{
- NRF_COMP_EXT_REF_0 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference0, /*!< Use AIN0 as external analog reference. */
- NRF_COMP_EXT_REF_1 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 /*!< Use AIN1 as external analog reference. */
-}nrf_comp_ext_ref_t;
-
-/**
- * @brief COMP THDOWN and THUP values that are used to calculate the threshold voltages VDOWN and VUP.
- */
-typedef struct
-{
- uint8_t th_down; /*!< THDOWN value. */
- uint8_t th_up; /*!< THUP value. */
-}nrf_comp_th_t;
-
-/**
- * @enum nrf_comp_main_mode_t
- * @brief COMP main operation mode.
- */
-typedef enum
-{
- NRF_COMP_MAIN_MODE_SE = COMP_MODE_MAIN_SE, /*!< Single ended mode. */
- NRF_COMP_MAIN_MODE_Diff = COMP_MODE_MAIN_Diff /*!< Differential mode. */
-}nrf_comp_main_mode_t;
-
-/**
- * @enum nrf_comp_sp_mode_t
- * @brief COMP speed and power mode.
- */
-typedef enum
-{
- NRF_COMP_SP_MODE_Low = COMP_MODE_SP_Low, /*!< Low power mode. */
- NRF_COMP_SP_MODE_Normal = COMP_MODE_SP_Normal, /*!< Normal mode. */
- NRF_COMP_SP_MODE_High = COMP_MODE_SP_High /*!< High speed mode. */
-}nrf_comp_sp_mode_t;
-
-/**
- * @enum nrf_comp_hyst_t
- * @brief COMP comparator hysteresis.
- */
-typedef enum
-{
- NRF_COMP_HYST_NoHyst = COMP_HYST_HYST_NoHyst, /*!< Comparator hysteresis disabled. */
- NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */
-}nrf_comp_hyst_t;
-
-/**
- * @brief COMP current source selection on analog input.
- */
-typedef enum
-{
- NRF_COMP_ISOURCE_Off = COMP_ISOURCE_ISOURCE_Off, /*!< Current source disabled. */
- NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 uA). */
- NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA). */
- NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA). */
-}nrf_isource_t;
-
-/**
- * @enum nrf_comp_task_t
- * @brief COMP tasks.
- */
-typedef enum
-{
- /*lint -save -e30*/
- NRF_COMP_TASK_START = offsetof(NRF_COMP_Type, TASKS_START), /*!< COMP start sampling task. */
- NRF_COMP_TASK_STOP = offsetof(NRF_COMP_Type, TASKS_STOP), /*!< COMP stop sampling task. */
- NRF_COMP_TASK_SAMPLE = offsetof(NRF_COMP_Type, TASKS_SAMPLE) /*!< Sample comparator value. */
- /*lint -restore*/
-}nrf_comp_task_t;
-
-/**
- * @enum nrf_comp_event_t
- * @brief COMP events.
- */
-typedef enum
-{
- /*lint -save -e30*/
- NRF_COMP_EVENT_READY = offsetof(NRF_COMP_Type, EVENTS_READY), /*!< COMP is ready and output is valid. */
- NRF_COMP_EVENT_DOWN = offsetof(NRF_COMP_Type, EVENTS_DOWN), /*!< Input voltage crossed the threshold going down. */
- NRF_COMP_EVENT_UP = offsetof(NRF_COMP_Type, EVENTS_UP), /*!< Input voltage crossed the threshold going up. */
- NRF_COMP_EVENT_CROSS = offsetof(NRF_COMP_Type, EVENTS_CROSS) /*!< Input voltage crossed the threshold in any direction. */
- /*lint -restore*/
-}nrf_comp_event_t;
-
-/**
- * @brief COMP reference configuration.
- */
-typedef struct
-{
- nrf_comp_ref_t reference; /*!< COMP reference selection. */
- nrf_comp_ext_ref_t external; /*!< COMP external analog reference selection. */
-}nrf_comp_ref_conf_t;
-
-
-/**
- * @brief Function for enabling the COMP peripheral.
- */
-__STATIC_INLINE void nrf_comp_enable(void);
-
-
-/**
- * @brief Function for disabling the COMP peripheral.
- */
-
-__STATIC_INLINE void nrf_comp_disable(void);
-
-/**
- * @brief Function for checking if the COMP peripheral is enabled.
- *
- * @retval true If the COMP peripheral is enabled.
- * @retval false If the COMP peripheral is not enabled.
- */
-__STATIC_INLINE bool nrf_comp_enable_check(void);
-
-/**
- * @brief Function for setting the reference source.
- *
- * @param[in] reference COMP reference selection.
- */
-__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference);
-
-
-/**
- * @brief Function for setting the external analog reference source.
- *
- * @param[in] ext_ref COMP external analog reference selection.
- */
-__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref);
-
-
-/**
- * @brief Function for setting threshold voltages.
- *
- * @param[in] threshold COMP VDOWN and VUP thresholds.
- */
-__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold);
-
-
-/**
- * @brief Function for setting the main mode.
- *
- * @param[in] main_mode COMP main operation mode.
- */
-__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode);
-
-
-/**
- * @brief Function for setting the speed mode.
- *
- * @param[in] speed_mode COMP speed and power mode.
- */
-__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode);
-
-
-/**
- * @brief Function for setting the hysteresis.
- *
- * @param[in] hyst COMP comparator hysteresis.
- */
-__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst);
-
-
-/**
- * @brief Function for setting the current source on the analog input.
- *
- * @param[in] isource COMP current source selection on analog input.
- */
-__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource);
-
-
-/**
- * @brief Function for selecting the active input of the COMP.
- *
- * @param[in] input Input to be selected.
- */
-__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input);
-
-
-/**
- * @brief Function for getting the last COMP compare result.
- *
- * @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN+ > VIN-.
- *
- * @note If VIN+ == VIN-, the return value depends on the previous result.
- */
-__STATIC_INLINE uint32_t nrf_comp_result_get(void);
-
-
-/**
- * @brief Function for enabling interrupts from COMP.
- *
- * @param[in] comp_int_mask Mask of interrupts to be enabled.
- *
- * @sa nrf_comp_int_enable_check()
- */
-__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask);
-
-/**
- * @brief Function for disabling interrupts from COMP.
- *
- * @param[in] comp_int_mask Mask of interrupts to be disabled.
- *
- * @sa nrf_comp_int_enable_check()
- */
-__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask);
-
-
-/**
- * @brief Function for getting the enabled interrupts of COMP.
- *
- * @param[in] comp_int_mask Mask of interrupts to be checked.
- *
- * @retval true If any interrupts of the specified mask are enabled.
- */
-__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask);
-
-
-
-/**
- * @brief Function for getting the address of a specific COMP task register.
- *
- * @param[in] comp_task COMP task.
- *
- * @return Address of the specified COMP task.
- */
-__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task);
-
-
-/**
- * @brief Function for getting the address of a specific COMP event register.
- *
- * @param[in] comp_event COMP event.
- *
- * @return Address of the specified COMP event.
- */
-__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event);
-
-
-/**
- * @brief Function for setting COMP shorts.
- *
- * @param[in] comp_short_mask COMP shorts by mask.
- *
- */
-__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask);
-
-
-/**
- * @brief Function for clearing COMP shorts by mask.
- *
- * @param[in] comp_short_mask COMP shorts to be cleared.
- *
- */
-__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask);
-
-
-/**
- * @brief Function for setting a specific COMP task.
- *
- * @param[in] comp_task COMP task to be set.
- *
- */
-__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task);
-
-
-/**
- * @brief Function for clearing a specific COMP event.
- *
- * @param[in] comp_event COMP event to be cleared.
- *
- */
-__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event);
-
-
-/**
- * @brief Function for getting the state of a specific COMP event.
- *
- * @retval true If the specified COMP event is active.
- *
- */
-__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event);
-
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-
-__STATIC_INLINE void nrf_comp_enable(void)
-{
- NRF_COMP->ENABLE = (COMP_ENABLE_ENABLE_Enabled << COMP_ENABLE_ENABLE_Pos);
-}
-
-__STATIC_INLINE void nrf_comp_disable(void)
-{
- NRF_COMP->ENABLE = (COMP_ENABLE_ENABLE_Disabled << COMP_ENABLE_ENABLE_Pos);
-}
-
-__STATIC_INLINE bool nrf_comp_enable_check(void)
-{
- return ((NRF_COMP->ENABLE) & COMP_ENABLE_ENABLE_Enabled);
-}
-
-__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference)
-{
- NRF_COMP->REFSEL = (reference << COMP_REFSEL_REFSEL_Pos);
-}
-
-__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref)
-{
- NRF_COMP->EXTREFSEL = (ext_ref << COMP_EXTREFSEL_EXTREFSEL_Pos);
-}
-
-__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold)
-{
- NRF_COMP->TH =
- ((threshold.th_down << COMP_TH_THDOWN_Pos) & COMP_TH_THDOWN_Msk) |
- ((threshold.th_up << COMP_TH_THUP_Pos) & COMP_TH_THUP_Msk);
-}
-
-__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode)
-{
- NRF_COMP->MODE |= (main_mode << COMP_MODE_MAIN_Pos);
-}
-
-__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode)
-{
- NRF_COMP->MODE |= (speed_mode << COMP_MODE_SP_Pos);
-}
-
-__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst)
-{
- NRF_COMP->HYST = (hyst << COMP_HYST_HYST_Pos) & COMP_HYST_HYST_Msk;
-}
-
-__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource)
-{
- NRF_COMP->ISOURCE = (isource << COMP_ISOURCE_ISOURCE_Pos) & COMP_ISOURCE_ISOURCE_Msk;
-}
-
-__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input)
-{
- NRF_COMP->PSEL = ((uint32_t)input << COMP_PSEL_PSEL_Pos);
-}
-
-__STATIC_INLINE uint32_t nrf_comp_result_get(void)
-{
- return (uint32_t)NRF_COMP->RESULT;
-}
-
-__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask)
-{
- NRF_COMP->INTENSET = comp_int_mask;
-}
-
-__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask)
-{
- NRF_COMP->INTENCLR = comp_int_mask;
-}
-
-__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask)
-{
- return (NRF_COMP->INTENSET & comp_int_mask); // when read this register will return the value of INTEN.
-}
-
-__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task)
-{
- return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_task);
-}
-
-__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event)
-{
- return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event);
-}
-
-__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask)
-{
- NRF_COMP->SHORTS |= comp_short_mask;
-}
-
-__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask)
-{
- NRF_COMP->SHORTS &= ~comp_short_mask;
-}
-
-__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task)
-{
- *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_task) ) = 1;
-}
-
-__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event)
-{
- *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)comp_event) ) = 0;
-}
-
-__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event)
-{
- return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_event));
-}
-
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
-
-/**
- *@}
- **/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_COMP_H_
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/a1481cb2/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.c
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.c b/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.c
deleted file mode 100644
index aef68c3..0000000
--- a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
-*
-* The information contained herein is property of Nordic Semiconductor ASA.
-* Terms and conditions of usage are described in detail in NORDIC
-* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
-*
-* Licensees are granted free, non-transferable use of the information. NO
-* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
-* the file.
-*
-* $LastChangedRevision: 25419 $
-*/
-
-/**
- * @file
- * @brief Implementation of AES ECB driver
- */
-
-
-//lint -e438
-
-#include <stdlib.h>
-#include <stdbool.h>
-#include <string.h>
-#include "nrf.h"
-#include "nrf_ecb.h"
-
-static uint8_t ecb_data[48]; ///< ECB data structure for RNG peripheral to access.
-static uint8_t* ecb_key; ///< Key: Starts at ecb_data
-static uint8_t* ecb_cleartext; ///< Cleartext: Starts at ecb_data + 16 bytes.
-static uint8_t* ecb_ciphertext; ///< Ciphertext: Starts at ecb_data + 32 bytes.
-
-bool nrf_ecb_init(void)
-{
- ecb_key = ecb_data;
- ecb_cleartext = ecb_data + 16;
- ecb_ciphertext = ecb_data + 32;
-
- NRF_ECB->ECBDATAPTR = (uint32_t)ecb_data;
- return true;
-}
-
-
-bool nrf_ecb_crypt(uint8_t * dest_buf, const uint8_t * src_buf)
-{
- uint32_t counter = 0x1000000;
- if(src_buf != ecb_cleartext)
- {
- memcpy(ecb_cleartext,src_buf,16);
- }
- NRF_ECB->EVENTS_ENDECB = 0;
- NRF_ECB->TASKS_STARTECB = 1;
- while(NRF_ECB->EVENTS_ENDECB == 0)
- {
- counter--;
- if(counter == 0)
- {
- return false;
- }
- }
- NRF_ECB->EVENTS_ENDECB = 0;
- if(dest_buf != ecb_ciphertext)
- {
- memcpy(dest_buf,ecb_ciphertext,16);
- }
- return true;
-}
-
-void nrf_ecb_set_key(const uint8_t * key)
-{
- memcpy(ecb_key,key,16);
-}
-
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/a1481cb2/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.h
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.h b/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.h
deleted file mode 100644
index 7c3f3d2..0000000
--- a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic
- * Semiconductor ASA.Terms and conditions of usage are described in detail
- * in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- * $LastChangedRevision: 13999 $
- */
-
-/**
- * @file
- * @brief ECB driver API.
- */
-
-#ifndef NRF_ECB_H__
-#define NRF_ECB_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_ecb AES ECB encryption
- * @{
- * @ingroup nrf_drivers
- * @brief Driver for the AES Electronic Code Book (ECB) peripheral.
- *
- * To encrypt and decrypt data, the peripheral must first be powered on
- * using @ref nrf_ecb_init. Next, the key must be set using @ref nrf_ecb_set_key.
- */
-
-#include <stdint.h>
-
-/**
- * @brief Function for initializing and powering on the ECB peripheral.
- *
- * This function allocates memory for the ECBDATAPTR.
- * @retval true If initialization was successful.
- * @retval false If powering on failed.
- */
-bool nrf_ecb_init(void);
-
-/**
- * @brief Function for encrypting and decrypting 16-byte data using current key.
- *
- * This function avoids unnecessary copying of data if the parameters point to the
- * correct locations in the ECB data structure.
- *
- * @param dst Result of encryption/decryption. 16 bytes will be written.
- * @param src Source with 16-byte data to be encrypted/decrypted.
- *
- * @retval true If the encryption operation completed.
- * @retval false If the encryption operation did not complete.
- */
-bool nrf_ecb_crypt(uint8_t * dst, const uint8_t * src);
-
-/**
- * @brief Function for setting the key to be used for encryption and decryption.
- *
- * @param key Pointer to the key. 16 bytes will be read.
- */
-void nrf_ecb_set_key(const uint8_t * key);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_ECB_H__
-
-/** @} */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/a1481cb2/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_egu.h
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_egu.h b/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_egu.h
deleted file mode 100644
index 105839c..0000000
--- a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_egu.h
+++ /dev/null
@@ -1,294 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef NRF_EGU_H__
-#define NRF_EGU_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef NRF52
- #error EGU is not supported on your chip.
-#endif
-
-/**
-* @defgroup nrf_egu EGU (Event Generator Unit) abstraction
-* @{
-* @ingroup nrf_drivers
-* @brief @tagAPI52 EGU (Event Generator Unit) module functions.
-*
-*/
-
-#include <stddef.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include "nrf_assert.h"
-#include "nrf.h"
-
-#define NRF_EGU_COUNT 6 /**< Number of EGU instances. */
-#define NRF_EGU_CHANNEL_COUNT 16 /**< Number of channels per EGU instance. */
-
-/**
- * @enum nrf_egu_task_t
- * @brief EGU tasks.
- */
-typedef enum
-{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
- NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */
- NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */
- NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */
- NRF_EGU_TASK_TRIGGER3 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[3]), /**< Trigger 3 for triggering the corresponding TRIGGERED[3] event. */
- NRF_EGU_TASK_TRIGGER4 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[4]), /**< Trigger 4 for triggering the corresponding TRIGGERED[4] event. */
- NRF_EGU_TASK_TRIGGER5 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[5]), /**< Trigger 5 for triggering the corresponding TRIGGERED[5] event. */
- NRF_EGU_TASK_TRIGGER6 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[6]), /**< Trigger 6 for triggering the corresponding TRIGGERED[6] event. */
- NRF_EGU_TASK_TRIGGER7 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[7]), /**< Trigger 7 for triggering the corresponding TRIGGERED[7] event. */
- NRF_EGU_TASK_TRIGGER8 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[8]), /**< Trigger 8 for triggering the corresponding TRIGGERED[8] event. */
- NRF_EGU_TASK_TRIGGER9 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[9]), /**< Trigger 9 for triggering the corresponding TRIGGERED[9] event. */
- NRF_EGU_TASK_TRIGGER10 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[10]), /**< Trigger 10 for triggering the corresponding TRIGGERED[10] event. */
- NRF_EGU_TASK_TRIGGER11 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[11]), /**< Trigger 11 for triggering the corresponding TRIGGERED[11] event. */
- NRF_EGU_TASK_TRIGGER12 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[12]), /**< Trigger 12 for triggering the corresponding TRIGGERED[12] event. */
- NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */
- NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */
- NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */
- /*lint -restore*/
-} nrf_egu_task_t;
-
-
-/**
- * @enum nrf_egu_event_t
- * @brief EGU events.
- */
-typedef enum
-{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
- NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */
- NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */
- NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */
- NRF_EGU_EVENT_TRIGGERED3 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[3]), /**< Event number 3 generated by triggering the corresponding TRIGGER[3] task. */
- NRF_EGU_EVENT_TRIGGERED4 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[4]), /**< Event number 4 generated by triggering the corresponding TRIGGER[4] task. */
- NRF_EGU_EVENT_TRIGGERED5 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[5]), /**< Event number 5 generated by triggering the corresponding TRIGGER[5] task. */
- NRF_EGU_EVENT_TRIGGERED6 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[6]), /**< Event number 6 generated by triggering the corresponding TRIGGER[6] task. */
- NRF_EGU_EVENT_TRIGGERED7 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[7]), /**< Event number 7 generated by triggering the corresponding TRIGGER[7] task. */
- NRF_EGU_EVENT_TRIGGERED8 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[8]), /**< Event number 8 generated by triggering the corresponding TRIGGER[8] task. */
- NRF_EGU_EVENT_TRIGGERED9 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[9]), /**< Event number 9 generated by triggering the corresponding TRIGGER[9] task. */
- NRF_EGU_EVENT_TRIGGERED10 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[10]), /**< Event number 10 generated by triggering the corresponding TRIGGER[10] task. */
- NRF_EGU_EVENT_TRIGGERED11 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[11]), /**< Event number 11 generated by triggering the corresponding TRIGGER[11] task. */
- NRF_EGU_EVENT_TRIGGERED12 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[12]), /**< Event number 12 generated by triggering the corresponding TRIGGER[12] task. */
- NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */
- NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */
- NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */
- /*lint -restore*/
-} nrf_egu_event_t;
-
-
-/**
- * @enum nrf_egu_int_mask_t
- * @brief EGU interrupts.
- */
-typedef enum
-{
- NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */
- NRF_EGU_INT_TRIGGERED1 = EGU_INTENSET_TRIGGERED1_Msk, /**< Interrupt on EVENTS_TRIGGERED[1] event. */
- NRF_EGU_INT_TRIGGERED2 = EGU_INTENSET_TRIGGERED2_Msk, /**< Interrupt on EVENTS_TRIGGERED[2] event. */
- NRF_EGU_INT_TRIGGERED3 = EGU_INTENSET_TRIGGERED3_Msk, /**< Interrupt on EVENTS_TRIGGERED[3] event. */
- NRF_EGU_INT_TRIGGERED4 = EGU_INTENSET_TRIGGERED4_Msk, /**< Interrupt on EVENTS_TRIGGERED[4] event. */
- NRF_EGU_INT_TRIGGERED5 = EGU_INTENSET_TRIGGERED5_Msk, /**< Interrupt on EVENTS_TRIGGERED[5] event. */
- NRF_EGU_INT_TRIGGERED6 = EGU_INTENSET_TRIGGERED6_Msk, /**< Interrupt on EVENTS_TRIGGERED[6] event. */
- NRF_EGU_INT_TRIGGERED7 = EGU_INTENSET_TRIGGERED7_Msk, /**< Interrupt on EVENTS_TRIGGERED[7] event. */
- NRF_EGU_INT_TRIGGERED8 = EGU_INTENSET_TRIGGERED8_Msk, /**< Interrupt on EVENTS_TRIGGERED[8] event. */
- NRF_EGU_INT_TRIGGERED9 = EGU_INTENSET_TRIGGERED9_Msk, /**< Interrupt on EVENTS_TRIGGERED[9] event. */
- NRF_EGU_INT_TRIGGERED10 = EGU_INTENSET_TRIGGERED10_Msk, /**< Interrupt on EVENTS_TRIGGERED[10] event. */
- NRF_EGU_INT_TRIGGERED11 = EGU_INTENSET_TRIGGERED11_Msk, /**< Interrupt on EVENTS_TRIGGERED[11] event. */
- NRF_EGU_INT_TRIGGERED12 = EGU_INTENSET_TRIGGERED12_Msk, /**< Interrupt on EVENTS_TRIGGERED[12] event. */
- NRF_EGU_INT_TRIGGERED13 = EGU_INTENSET_TRIGGERED13_Msk, /**< Interrupt on EVENTS_TRIGGERED[13] event. */
- NRF_EGU_INT_TRIGGERED14 = EGU_INTENSET_TRIGGERED14_Msk, /**< Interrupt on EVENTS_TRIGGERED[14] event. */
- NRF_EGU_INT_TRIGGERED15 = EGU_INTENSET_TRIGGERED15_Msk, /**< Interrupt on EVENTS_TRIGGERED[15] event. */
- NRF_EGU_INT_ALL = 0xFFFFuL
-} nrf_egu_int_mask_t;
-
-
-/**
- * @brief Function for triggering a specific EGU task.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_task EGU task.
- */
-__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task)
-{
- *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL;
-}
-
-
-/**
- * @brief Function for returning the address of a specific EGU task register.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_task EGU task.
- */
-__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
- nrf_egu_task_t egu_task)
-{
- return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task);
-}
-
-
-/**
- * @brief Function for returning the address of a specific EGU TRIGGER task register.
- *
- * @param NRF_EGUx EGU instance.
- * @param channel Channel number.
- */
-__STATIC_INLINE uint32_t * nrf_egu_task_trigger_addres_get(NRF_EGU_Type * NRF_EGUx,
- uint8_t channel)
-{
- ASSERT(channel < NRF_EGU_CHANNEL_COUNT);
- return (uint32_t*)&NRF_EGUx->TASKS_TRIGGER[channel];
-}
-
-
-/**
- * @brief Function for returning the specific EGU TRIGGER task.
- *
- * @param channel Channel number.
- */
-__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(uint8_t channel)
-{
- ASSERT(channel <= NRF_EGU_CHANNEL_COUNT);
- return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t)));
-}
-
-
-/**
- * @brief Function for returning the state of a specific EGU event.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_event EGU event to check.
- */
-__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
- nrf_egu_event_t egu_event)
-{
- return (bool)*(volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
-}
-
-
-/**
- * @brief Function for clearing a specific EGU event.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_event EGU event to clear.
- */
-__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
- nrf_egu_event_t egu_event)
-{
- *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)) = 0x0UL;
-}
-
-
-/**
- * @brief Function for returning the address of a specific EGU event register.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_event EGU event.
- */
-__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
- nrf_egu_event_t egu_event)
-{
- return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
-}
-
-
-/**
- * @brief Function for returning the address of a specific EGU TRIGGERED event register.
- *
- * @param NRF_EGUx EGU instance.
- * @param channel Channel number.
- */
-__STATIC_INLINE uint32_t * nrf_egu_event_triggered_addres_get(NRF_EGU_Type * NRF_EGUx,
- uint8_t channel)
-{
- ASSERT(channel < NRF_EGU_CHANNEL_COUNT);
- return (uint32_t*)&NRF_EGUx->EVENTS_TRIGGERED[channel];
-}
-
-
-/**
- * @brief Function for returning the specific EGU TRIGGERED event.
- *
- * @param channel Channel number.
- */
-__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(uint8_t channel)
-{
- ASSERT(channel < NRF_EGU_CHANNEL_COUNT);
- return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t)));
-}
-
-
-/**
- * @brief Function for enabling one or more specific EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to enable.
- */
-__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
-{
- NRF_EGUx->INTENSET = egu_int_mask;
-}
-
-
-/**
- * @brief Function for retrieving the state of one or more EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to check.
- *
- * @retval true If all of the specified interrupts are enabled.
- * @retval false If at least one of the specified interrupts is disabled.
- */
-__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
-{
- return (bool)(NRF_EGUx->INTENSET & egu_int_mask);
-}
-
-
-/**
- * @brief Function for disabling one or more specific EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to disable.
- */
-__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
-{
- NRF_EGUx->INTENCLR = egu_int_mask;
-}
-
-/**
- * @brief Function for retrieving one or more specific EGU interrupts.
- *
- * @param channel Channel number.
- *
- * @returns EGU interrupt mask.
- */
-__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(uint8_t channel)
-{
- ASSERT(channel < NRF_EGU_CHANNEL_COUNT);
- return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel));
-}
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/a1481cb2/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_gpio.h
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_gpio.h b/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_gpio.h
deleted file mode 100644
index 3e8b2d7..0000000
--- a/hw/mcu/nordic/src/ext/nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_gpio.h
+++ /dev/null
@@ -1,655 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
-*
-* The information contained herein is property of Nordic Semiconductor ASA.
-* Terms and conditions of usage are described in detail in NORDIC
-* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
-*
-* Licensees are granted free, non-transferable use of the information. NO
-* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
-* the file.
-*
-*/
-#ifndef NRF_GPIO_H__
-#define NRF_GPIO_H__
-
-#include "nrf.h"
-#include <stdbool.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_gpio GPIO abstraction
- * @{
- * @ingroup nrf_drivers
- * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
- *
- * Here, the GPIO ports are defined as follows:
- * - Port 0 -> pin 0-7
- * - Port 1 -> pin 8-15
- * - Port 2 -> pin 16-23
- * - Port 3 -> pin 24-31
- */
-
-#define NUMBER_OF_PINS 32
-
-/**
- * @brief Enumerator used for selecting between port 0 - 3.
- */
-typedef enum
-{
- NRF_GPIO_PORT_SELECT_PORT0 = 0, ///< Port 0 (GPIO pin 0-7)
- NRF_GPIO_PORT_SELECT_PORT1, ///< Port 1 (GPIO pin 8-15)
- NRF_GPIO_PORT_SELECT_PORT2, ///< Port 2 (GPIO pin 16-23)
- NRF_GPIO_PORT_SELECT_PORT3, ///< Port 3 (GPIO pin 24-31)
-} nrf_gpio_port_select_t;
-
-/**
- * @brief Enumerator used for setting the direction of a GPIO port.
- */
-typedef enum
-{
- NRF_GPIO_PORT_DIR_OUTPUT, ///< Output
- NRF_GPIO_PORT_DIR_INPUT ///< Input
-} nrf_gpio_port_dir_t;
-
-/**
- * @brief Pin direction definitions.
- */
-typedef enum
-{
- NRF_GPIO_PIN_DIR_INPUT = GPIO_PIN_CNF_DIR_Input, ///< Input
- NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output ///< Output
-} nrf_gpio_pin_dir_t;
-
-/**
- * @brief Connection of input buffer
- */
-typedef enum
-{
- NRF_GPIO_PIN_INPUT_CONNECT = GPIO_PIN_CNF_INPUT_Connect, ///< Connect input buffer
- NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect ///< Disconnect input buffer
-} nrf_gpio_pin_input_t;
-
-/**
- * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
- */
-typedef enum
-{
- NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pullup resistor disabled
- NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pulldown resistor enabled
- NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pullup resistor enabled
-} nrf_gpio_pin_pull_t;
-
-/**
- * @brief Enumerator used for selecting output drive mode
- */
-typedef enum
-{
- NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'
- NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1, ///< !< High drive '0', standard '1'
- NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1, ///< !< Standard '0', high drive '1'
- NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1, ///< !< High drive '0', high 'drive '1''
- NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1, ///< !< Disconnect '0' standard '1'
- NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1, ///< !< Disconnect '0', high drive '1'
- NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1, ///< !< Standard '0'. disconnect '1'
- NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High drive '0', disconnect '1'
-} nrf_gpio_pin_drive_t;
-
-/**
- * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
- */
-typedef enum
-{
- NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
- NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level.
- NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
-} nrf_gpio_pin_sense_t;
-
-
-/**
- * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
- * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
- *
- * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
- *
- * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
- *
- * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
- * Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
- */
-__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end);
-
-/**
- * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
- * This function can be used to configure pin range as simple input.
- *
- * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
- *
- * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
- *
- * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
- *
- * @note For configuring only one pin as input use @ref nrf_gpio_cfg_input
- * Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
- */
-__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config);
-
-/**
- * @brief Pin configuration function
- *
- * The main pin configuration function.
- * This function allows to set any aspect in PIN_CNF register.
- * @param pin_number Specifies the pin number (allowed values 0-31).
- * @param dir Pin direction
- * @param input Connect or disconnect input buffer
- * @param pull Pull configuration
- * @param drive Drive configuration
- * @param sense Pin sensing mechanism
- */
-__STATIC_INLINE void nrf_gpio_cfg(
- uint32_t pin_number,
- nrf_gpio_pin_dir_t dir,
- nrf_gpio_pin_input_t input,
- nrf_gpio_pin_pull_t pull,
- nrf_gpio_pin_drive_t drive,
- nrf_gpio_pin_sense_t sense);
-
-/**
- * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
- * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
- *
- * @param pin_number specifies the pin number (allowed values 0-31)
- *
- * @note Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
- */
-__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number);
-
-/**
- * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
- * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
- *
- * @param pin_number Specifies the pin number (allowed values 0-30).
- * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high).
- *
- * @note Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
- */
-__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config);
-
-/**
- * @brief Function for reseting pin configuration to its default state.
- *
- * @param pin_number Specifies the pin number (allowed values 0-31).
- */
-__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number);
-
-/**
- * @brief Function for configuring the given GPIO pin number as a watcher. Only input is connected.
- *
- * @param pin_number Specifies the pin number (allowed values 0-31).
- *
- */
-__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number);
-
-/**
- * @brief Function for disconnecting input for the given GPIO.
- *
- * @param pin_number Specifies the pin number (allowed values 0-31).
- *
- */
-__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number);
-
-/**
- * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
- * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
- * Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
- *
- * @param pin_number Specifies the pin number (allowed values 0-30).
- * @param pull_config State of the pin pull resistor (no pull, pulled down or pulled high).
- * @param sense_config Sense level of the pin (no sense, sense low or sense high).
- */
-__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config);
-
-/**
- * @brief Function for configuring sense level for the given GPIO.
- *
- * @param pin_number Specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
- * @param sense_config Sense configuration.
- *
- */
-__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config);
-
-/**
- * @brief Function for setting the direction for a GPIO pin.
- *
- * @param pin_number specifies the pin number (0-31) for which to
- * set the direction.
- *
- * @param direction specifies the direction
- */
-__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction);
-
-/**
- * @brief Function for setting a GPIO pin.
- *
- * Note that the pin must be configured as an output for this
- * function to have any effect.
- *
- * @param pin_number Specifies the pin number (0-31) to set.
- */
-__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number);
-
-/**
- * @brief Function for setting GPIO pins.
- *
- * Note that the pins must be configured as outputs for this
- * function to have any effect.
- *
- * @param pin_mask Specifies the pins to set.
- */
-__STATIC_INLINE void nrf_gpio_pins_set(uint32_t pin_mask);
-
-/**
- * @brief Function for clearing a GPIO pin.
- *
- * Note that the pin must be configured as an output for this
- * function to have any effect.
- *
- * @param pin_number Specifies the pin number (0-31) to clear.
- */
-__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number);
-
-/**
- * @brief Function for clearing GPIO pins.
- *
- * Note that the pins must be configured as outputs for this
- * function to have any effect.
- *
- * @param pin_mask Specifies the pins to clear.
- */
-__STATIC_INLINE void nrf_gpio_pins_clear(uint32_t pin_mask);
-
-/**
- * @brief Function for toggling a GPIO pin.
- *
- * Note that the pin must be configured as an output for this
- * function to have any effect.
- *
- * @param pin_number Specifies the pin number (0-31) to toggle.
- */
-__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number);
-
-/**
- * @brief Function for toggling GPIO pins.
- *
- * Note that the pins must be configured as outputs for this
- * function to have any effect.
- *
- * @param pin_mask Specifies the pins to toggle.
- */
-__STATIC_INLINE void nrf_gpio_pins_toggle(uint32_t pin_mask);
-
-/**
- * @brief Function for writing a value to a GPIO pin.
- *
- * Note that the pin must be configured as an output for this
- * function to have any effect.
- *
- * @param pin_number specifies the pin number (0-31) to
- * write.
- *
- * @param value specifies the value to be written to the pin.
- * @arg 0 clears the pin
- * @arg >=1 sets the pin.
- */
-__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value);
-
-/**
- * @brief Function for reading the input level of a GPIO pin.
- *
- * Note that the pin must have input connected for the value
- * returned from this function to be valid.
- *
- * @param pin_number specifies the pin number (0-31) to
- * read.
- *
- * @return
- * @retval 0 if the pin input level is low.
- * @retval 1 if the pin input level is high.
- * @retval > 1 should never occur.
- */
-__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number);
-
-/**
- * @brief Function for reading the input level of all GPIO pins.
- *
- * Note that the pin must have input connected for the value
- * returned from this function to be valid.
- *
- * @retval Status of input of all pins
- */
-__STATIC_INLINE uint32_t nrf_gpio_pins_read(void);
-
-/**
- * @brief Function for reading the sense configuration of a GPIO pin.
- *
- * @param pin_number specifies the pin number (0-31) to
- * read.
- *
- * @retval Sense configuration
- */
-__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number);
-
-/**
- * @brief Generic function for writing a single byte of a 32 bit word at a given
- * address.
- *
- * This function should not be called from outside the nrf_gpio
- * abstraction layer.
- *
- * @param word_address is the address of the word to be written.
- *
- * @param byte_no is the word byte number (0-3) to be written.
- *
- * @param value is the value to be written to byte "byte_no" of word
- * at address "word_address"
- */
-__STATIC_INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value);
-
-/**
- * @brief Generic function for reading a single byte of a 32 bit word at a given
- * address.
- *
- * This function should not be called from outside the nrf_gpio
- * abstraction layer.
- *
- * @param word_address is the address of the word to be read.
- *
- * @param byte_no is the byte number (0-3) of the word to be read.
- *
- * @return byte "byte_no" of word at address "word_address".
- */
-__STATIC_INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no);
-
-/**
- * @brief Function for setting the direction of a port.
- *
- * @param port is the port for which to set the direction.
- *
- * @param dir direction to be set for this port.
- */
-__STATIC_INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir);
-
-/**
- * @brief Function for reading a GPIO port.
- *
- * @param port is the port to read.
- *
- * @return the input value on this port.
- */
-__STATIC_INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port);
-
-/**
- * @brief Function for writing to a GPIO port.
- *
- * @param port is the port to write.
- *
- * @param value is the value to write to this port.
- *
- * @sa nrf_gpio_port_dir_set()
- */
-__STATIC_INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value);
-
-/**
- * @brief Function for setting individual pins on GPIO port.
- *
- * @param port is the port for which to set the pins.
- *
- * @param set_mask is a mask specifying which pins to set. A bit
- * set to 1 indicates that the corresponding port pin shall be
- * set.
- *
- * @sa nrf_gpio_port_dir_set()
- */
-__STATIC_INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask);
-
-/**
- * @brief Function for clearing individual pins on GPIO port.
- *
- * @param port is the port for which to clear the pins.
- *
- * @param clr_mask is a mask specifying which pins to clear. A bit
- * set to 1 indicates that the corresponding port pin shall be
- * cleared.
- *
- * @sa nrf_gpio_port_dir_set()
- */
-__STATIC_INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask);
-
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
-{
- /*lint -e{845} // A zero has been given as right argument to operator '|'" */
- for (; pin_range_start <= pin_range_end; pin_range_start++)
- {
- nrf_gpio_cfg_output(pin_range_start);
- }
-}
-
-__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
-{
- /*lint -e{845} // A zero has been given as right argument to operator '|'" */
- for (; pin_range_start <= pin_range_end; pin_range_start++)
- {
- nrf_gpio_cfg_input(pin_range_start, pull_config);
- }
-}
-
-__STATIC_INLINE void nrf_gpio_cfg(
- uint32_t pin_number,
- nrf_gpio_pin_dir_t dir,
- nrf_gpio_pin_input_t input,
- nrf_gpio_pin_pull_t pull,
- nrf_gpio_pin_drive_t drive,
- nrf_gpio_pin_sense_t sense)
-{
- NRF_GPIO->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos)
- | ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos)
- | ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)
- | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos)
- | ((uint32_t)sense << GPIO_PIN_CNF_SENSE_Pos);
-}
-
-__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
-{
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_OUTPUT,
- NRF_GPIO_PIN_INPUT_DISCONNECT,
- NRF_GPIO_PIN_NOPULL,
- NRF_GPIO_PIN_S0S1,
- NRF_GPIO_PIN_NOSENSE);
-}
-
-__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
-{
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_INPUT,
- NRF_GPIO_PIN_INPUT_CONNECT,
- pull_config,
- NRF_GPIO_PIN_S0S1,
- NRF_GPIO_PIN_NOSENSE);
-}
-
-__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number)
-{
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_INPUT,
- NRF_GPIO_PIN_INPUT_DISCONNECT,
- NRF_GPIO_PIN_NOPULL,
- NRF_GPIO_PIN_S0S1,
- NRF_GPIO_PIN_NOSENSE);
-}
-
-__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number)
-{
- /*lint -e{845} // A zero has been given as right argument to operator '|'" */
- uint32_t cnf = NRF_GPIO->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
- NRF_GPIO->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos);
-}
-
-__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number)
-{
- /*lint -e{845} // A zero has been given as right argument to operator '|'" */
- uint32_t cnf = NRF_GPIO->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
- NRF_GPIO->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos);
-}
-
-__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
-{
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_INPUT,
- NRF_GPIO_PIN_INPUT_CONNECT,
- pull_config,
- NRF_GPIO_PIN_S0S1,
- sense_config);
-}
-
-__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config)
-{
- /*lint -e{845} // A zero has been given as right argument to operator '|'" */
- //uint32_t cnf = NRF_GPIO->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_SENSE_Msk;
- NRF_GPIO->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_SENSE_Msk;
- NRF_GPIO->PIN_CNF[pin_number] |= (sense_config << GPIO_PIN_CNF_SENSE_Pos);
-}
-
-__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
-{
- if(direction == NRF_GPIO_PIN_DIR_INPUT)
- {
- nrf_gpio_cfg(
- pin_number,
- NRF_GPIO_PIN_DIR_INPUT,
- NRF_GPIO_PIN_INPUT_CONNECT,
- NRF_GPIO_PIN_NOPULL,
- NRF_GPIO_PIN_S0S1,
- NRF_GPIO_PIN_NOSENSE);
- }
- else
- {
- NRF_GPIO->DIRSET = (1UL << pin_number);
- }
-}
-
-__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number)
-{
- NRF_GPIO->OUTSET = (1UL << pin_number);
-}
-
-__STATIC_INLINE void nrf_gpio_pins_set(uint32_t pin_mask)
-{
- NRF_GPIO->OUTSET = pin_mask;
-}
-
-__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
-{
- NRF_GPIO->OUTCLR = (1UL << pin_number);
-}
-
-__STATIC_INLINE void nrf_gpio_pins_clear(uint32_t pin_mask)
-{
- NRF_GPIO->OUTCLR = pin_mask;
-}
-
-__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
-{
- nrf_gpio_pins_toggle(1UL << pin_number);
-}
-
-__STATIC_INLINE void nrf_gpio_pins_toggle(uint32_t pin_mask)
-{
- uint32_t pins_state = NRF_GPIO->OUT;
- NRF_GPIO->OUTSET = (~pins_state & pin_mask);
- NRF_GPIO->OUTCLR = ( pins_state & pin_mask);
-}
-
-__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
-{
- if (value == 0)
- {
- nrf_gpio_pin_clear(pin_number);
- }
- else
- {
- nrf_gpio_pin_set(pin_number);
- }
-}
-
-__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
-{
- return ((NRF_GPIO->IN >> pin_number) & 1UL);
-}
-
-__STATIC_INLINE uint32_t nrf_gpio_pins_read(void)
-{
- return NRF_GPIO->IN;
-}
-
-__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number)
-{
- return (nrf_gpio_pin_sense_t)((NRF_GPIO->PIN_CNF[pin_number] & GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos);
-}
-
-__STATIC_INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
-{
- *((volatile uint8_t*)(word_address) + byte_no) = value;
-}
-
-__STATIC_INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
-{
- return (*((const volatile uint8_t*)(word_address) + byte_no));
-}
-
-__STATIC_INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
-{
- if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
- {
- nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
- }
- else
- {
- nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
- }
-}
-
-__STATIC_INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
-{
- return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
-}
-
-__STATIC_INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
-{
- nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
-}
-
-__STATIC_INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
-{
- nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
-}
-
-__STATIC_INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
-{
- nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
-}
-#endif //SUPPRESS_INLINE_IMPLEMENTATION
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif