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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/06/15 13:29:51 UTC
[incubator-nuttx] branch master updated: risc-v/mpfs: update clock configuration parameters
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 5683e020e8 risc-v/mpfs: update clock configuration parameters
5683e020e8 is described below
commit 5683e020e84de65319385f1e322df2b01ebbb29e
Author: Eero Nurkkala <ee...@offcode.fi>
AuthorDate: Wed Jun 15 14:56:18 2022 +0300
risc-v/mpfs: update clock configuration parameters
Update PLL configuration parameters to match the values provided
by the vendor.
Also remove extra call to mpfs_pll_config() as it's already called
at mpfs_clockconfig().
Signed-off-by: Eero Nurkkala <ee...@offcode.fi>
---
arch/risc-v/src/mpfs/mpfs_clockconfig.c | 2 --
boards/risc-v/mpfs/icicle/include/board_liberodefs.h | 10 +++++-----
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/risc-v/src/mpfs/mpfs_clockconfig.c b/arch/risc-v/src/mpfs/mpfs_clockconfig.c
index 5587351eeb..320021a278 100755
--- a/arch/risc-v/src/mpfs/mpfs_clockconfig.c
+++ b/arch/risc-v/src/mpfs/mpfs_clockconfig.c
@@ -570,8 +570,6 @@ static void mpfs_sgmii_setup(void)
putreg32(0x7f, MPFS_CFG_DDR_SGMII_PHY_DYN_CNTL);
}
}
-
- mpfs_pll_config();
}
/****************************************************************************
diff --git a/boards/risc-v/mpfs/icicle/include/board_liberodefs.h b/boards/risc-v/mpfs/icicle/include/board_liberodefs.h
index e579195677..63259b7454 100644
--- a/boards/risc-v/mpfs/icicle/include/board_liberodefs.h
+++ b/boards/risc-v/mpfs/icicle/include/board_liberodefs.h
@@ -38,11 +38,11 @@
#define LIBERO_SETTING_MSS_FMETER_DATAR 0x00000000
#define LIBERO_SETTING_MSS_PLL_REF_FB 0x00000500
#define LIBERO_SETTING_MSS_PLL_CTRL 0x01000037
-#define LIBERO_SETTING_MSS_PLL_DIV_0_1 0x01000200
-#define LIBERO_SETTING_MSS_PLL_DIV_2_3 0x0f000600
+#define LIBERO_SETTING_MSS_PLL_DIV_0_1 0x01000100
+#define LIBERO_SETTING_MSS_PLL_DIV_2_3 0x4b000300
#define LIBERO_SETTING_MSS_SSCG_REG_0 0x00000000
#define LIBERO_SETTING_MSS_SSCG_REG_1 0x00000000
-#define LIBERO_SETTING_MSS_SSCG_REG_2 0x000000c0
+#define LIBERO_SETTING_MSS_SSCG_REG_2 0x00000060
#define LIBERO_SETTING_MSS_SSCG_REG_3 0x00000001
#define LIBERO_SETTING_MSS_PLL_FRACN 0x00000000
#define LIBERO_SETTING_MSS_PLL_CTRL2 0x00001020
@@ -579,7 +579,7 @@
#define LIBERO_SETTING_REFCLK_LPDDR4_1333_OFFSET_2 3
#define LIBERO_SETTING_REFCLK_LPDDR4_1333_OFFSET_3 0
-#define LIBERO_SETTING_TIP_CFG_PARAMS 0x07cfe02f
+#define LIBERO_SETTING_TIP_CFG_PARAMS 0x07cfe02a
#define LIBERO_SETTING_DDR_32_CACHE 0x80000000
#define LIBERO_SETTING_DDR_32_CACHE_SIZE 0x100000
@@ -590,7 +590,7 @@
#define LIBERO_SETTING_DDR_64_NON_CACHE 0x1400000000
#define LIBERO_SETTING_DDR_64_NON_CACHE_SIZE 0x100000
-#define LIBERO_SETTING_DPC_BITS 0x00050422
+#define LIBERO_SETTING_DPC_BITS 0x0004c422
#define LIBERO_SETTING_DATA_LANES_USED 0x00000004
/* Cache settings */