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Posted to commits@tvm.apache.org by tq...@apache.org on 2026/10/20 14:40:14 UTC
(tvm-tirx) branch main created (now 1a4a3ecf)
This is an automated email from the ASF dual-hosted git repository.
tqchen pushed a change to branch main
in repository https://gitbox.apache.org/repos/asf/tvm-tirx.git
at 1a4a3ecf [CI] Add standalone TIRx build, wheel, and docs pipelines
This branch includes the following new commits:
new fd543065 Initial commit
new f93f91df init skeletons
new 1ff18ecd checkin basic expr
new 8567dbce fix bug for rdiv
new 09391e6b Move Var back to Expr, add format str test
new 6e82e93f add expr simplify and canonical
new 62fcf269 checkin tensor
new 59418141 checkin domain
new af225a5b finish tensor dom infer
new 8837cc17 checked split
new 7f5eb3c4 Temp checkin c++ code.
new 80f40ed2 Merge branch 'master' of ssh://github.com/tqchen/tvm
new b8121c3d checkin basic cpp test
new 4ec032fc Enable array, basic form of tensor
new 92040b35 C++ API work with python
new 73276385 Add safe destructor
new 23ba66ec fix c api
new a0709aa8 [API] expose dir
new 20f00fc7 checked buffer / schedule / code gen
new 8f2451d6 Allow all enum int to be exposed
new e710b6bd Check in basic schedule container
new 46bc863a checkin stmt
new d6f3577f check stmt in
new 884f17dd Switch to HalideIR, with C API compile
new 7e5cd368 promote C API lib to root, pass basic_test
new c3d80ee2 Add most of IR constructors
new 30cf327d Add in Array, fix most of IR
new 45548505 Change name matching to SSA Variable and Function matching
new a2cb97c8 python3 compatibility
new 7585877f Check in Tensor API on python
new e331bb3a Checkin reduce
new fbe6d732 Add new functor
new aef3752a Enable reduction in front-end
new 12162ee3 Checkin Schedule and split construction in front-end
new 3b34c902 temp checkin
new e8ea578a SSA Pass
new 04e3ea45 Enable attribute key in LetStmt
new ae15728f Add Operation class
new dfa178df Check in inline and test
new 3845cc31 Add AttrStmt
new 59fbcf50 Keep up with changes of NodeRef
new f2dd7253 checkin initial of itervar
new a39969d6 Refactor to use iterVar
new 9b835700 Enable bracket syntax sugar to get tensor element
new 0dd0de00 Skeleton of bound inference passing rule
new d47213d3 IntSet Evaluation, skeleton finish
new e06f2889 Rename bound to schedule, add graph related utils
new b3d59f81 Add map container and tests
new 79e5c99b Pass first basic case of bound inference
new b6b20836 Fix Tile, add a few more test cases on bound inference
new be1672fd Rename dim_var to axis, update testcases
new 54d88565 Stronger type checker during conversion
new 48ef8c02 Make Tensor comparator and hash to be aware of same op and index, init checkin of the ir generation
new 5f6454ef [PASS] Schedule Ops init working version (#6)
new a801ea7d [LANG] Enable json load/save and pickle (#10)
new bbf8c3c0 [LANG] Include buffer semnatics, introduce pylint (#11)
new e927b903 [PASS] Basic storage flatten (#13)
new da4d1280 [RUNTIME] Add interface header of runtime (#15)
new 01d2b078 [RUNTIME] Finish GPU runtime and python interface (#16)
new 41cf3ee3 [RUNTIME] Enable OpenCL (#17)
new 356f2353 [IR] Move AttrStmt to HalideIR (#21)
new 0a5fcd05 [CODEGEN] Add CodeGenC (#22)
new fd23c52c [CODEGEN] Add LoweredFunc, MakeAPI to build a C API function (#23)
new d0c0cc8a [RUNTIME] Add Function, Unify TVMTypeCode and TVMArgTypeID (#24)
new 4559c9c3 [API/JIT] Enable registerable global function, introduce StackVM intepreter (#25)
new 1be581fa [API/Refactor] Unified PackedFunc for API and Generated Functions (#26)
new 61f19514 [CODEGEN/EXEC] CUDA, NVRTC pipeline complete (#27)
new 21a2f1f8 [TEST/PYTHON] Add unittest folder, add a build pipeline. Rename Buffer.ptr to Buffer.data to be consistent with Array. (#29)
new be4d6da2 [SCHEDULE] Improve bound inference, support reduce codegen. (#30)
new 8d419b33 [PASS] StorageFlatten and StorageSync, safe condition in schedul_ops, gemm example. (#31)
new 5c11dc3f [PASS] UnrollLoop, isolate arithmetic module. (#32)
new b4c50fab [PASS] Canonical form simplify (#34)
new a24d8325 [ADDON] Allow piggy back nvcc compiler and code (#35)
new dcd94171 [LANG/PASS] Support Vectorize (#37)
new 9021d4f9 [PYTHON/API] Add compare and logic build-in op for Expr (#39)
new 63928663 [LANG/PASS] InjectVirtualThread (#38)
new ec1ede0f [SCHEDULE] Refactor bound inference logic (#41)
new 211f0117 [LANG] Introduce Scan, Bugfix Canonical (#43)
new 88d027c4 [ARITH] DeduceBound (#40)
new 1428ea1e [SCAN/Refactor] Refactor scan interface, enable fix point analysis. (#47)
new 907cfcd0 [ARITH] Add CombineInterval<Div> in IntSet (#48)
new eab52ba5 [CODEGEN/LLVM] Initial support for codegen LLVM. (#49)
new 3db7d953 [MODULE/REFACTOR] Introduce Module for AOT and runtime linking. (#51)
new 0594d75a [MODULE] Enable OpenCL and CUDA Modules (#53)
new 4fa810b9 [LLVM/RUNTIME] Support Parallel for on CPU (#54)
new a91b823c [BUILD] Add CMake for Windows build (#55)
new 9d9e3b43 [BUILD] Windows build pass on LLVM/CUDA/OPENCL (#57)
new ab073726 [VISITOR] New ExprFunctor, StmtFunctor Interface. Modular analysis (#58)
new e41d75f5 [LLVM] Vectorized load/store (#60)
new 3b7ef072 [PASS]LoopPartition (#56)
new a22a7491 [REFACTOR] Add Types to IterVar, Isolate Operator (#62)
new c84a40aa [BUGFIX/TESTS] Bugfix of Tenso slicing. Union. (#66)
new cd714f26 [PASS] RemoveNoOp. (#68)
new f73aba4a [OP/LANG] Support Extern Call, more regression tests (#69)
new 7eb45520 [RUNTIME] Make rutnime DLPack compatible, allow new device plugin (#71)
new 6ef58f3f [VERILOG] VPI Mem Interface/ VPI MMap (#73)
new fada9cc7 [CODEGEN] Refactor common codegen, Verilog Codegen (#74)
new 21768962 [LANG/SCHEDULE] Reduction factor, predicate in reduction. (#77)
new a910dae4 [LANG/GPU] Cross Thread Reduction (#79)
new 2155a7e9 [SCHEDULE] Add group, refactor thread bind api. (#82)
new e539aa14 [IR] Rename attr_key in AttrStmt (#83)
new c45e9100 [PERF] Persitent kernel (#87)
new d08ffaa9 [DOC] Initial doc system (#88)
new b8b3054d [DOC] API doc organization. (#90)
new 7fa0b7ab [DOC] move comments to file header (#91)
new 6ebcc4d5 [SCHEDULE] Normalize returns a new schedule (#94)
new 9cea8740 [DOC/PERF] Reduction Tutorial and GEMM (#96)
new 7b969a76 [LANG] Change namespace convention to dot (#100)
new 0c450f1f [LANG/CODEGEN] Intrinsics and Extern Math (#101)
new 0b7e9576 [DEV/IR] Python IRBuilder (#102)
new d25070d8 [PASS] StorageRewrite, Memory optimization pass as in NNVM. (#104)
new b11306cb [PYTHON] Rename the namespace (#105)
new a9959a7c [LANG] CommReducer (#103)
new 88abdb58 [PYTHON/FFI] Enable Cython FFI (#106)
new a3817b77 [PYTHON] addon->contrib add docs (#107)
new efb9916c [CODEGEN/PASS] Improve callpacked lowering, allow pass array callback. (#110)
new 352cfe35 [CODEGEN/RUNTIME] Metal support, runtime improvement. (#111)
new 4ad628ca [PYTHON] Enable cython ndarray API (#113)
new 2e4d8f85 [METAL] Switch to manual ref counting (#114)
new 09664277 Fix comment (#115)
new 1b0b7fef [IR] Update new version of HalideIR (#116)
new 290eabc1 License as BSD for now before we finish approval for apache (#118)
new e1ea5d31 [CONTRIB/BLAS] Add CBLAS Example to contrib (#120)
new 611cb13b [CMAKE] Windows support upgrade (#125)
new 50c70a79 [BUGFIX] Fix schedule dataflow rewrite with multiple scan states (#126)
new 73bded85 [BUGFIX/REGRESSION] Complex inline call, regression test on lstm cell (#128)
new baf02baa [FIX] Miss kUInt in TypeCode2Str & dir method (#130)
new 8a49df44 [SCHEDULE] Add store_predicate (#131)
new 4f24a5e7 [MODULE/DSO] Support pack everything into one shared library. (#133)
new 408b6554 [DOC/LICENSE] Make doc and license consistent, opensource repo when we get approval (#134)
new e75ab932 [PASS] Use likely tag & enable LoopPartition by default (#132)
new 5e4a5d3c [BUGFIX/PASS] Fix Vectorize with If condition (#135)
new 1351b48a [PYTHON] Support DLTensor compatible API (#136)
new 51cb2e34 [FIX] Add CombineInternal<Mod> & Fix LoopPartition (#138)
new 304c12ed [PASS] Improve SSA conversion, add forbid list in loop-par (#142)
new 122ba9af fix doc examples & easy install (#143)
new 7f073d6c use auto source_group (#146)
new 3f44ef0f [RUNTIME] RPC runtime that support run testing on remote device. (#147)
new 765402d3 add tvm.select (#148)
new cd563b38 [DLPACK] Upgrade to the latest version (#150)
new 06b81dab [TEST/CI] 32bit compatibility and CI. (#159)
new f1677441 [CODEGEN/RUNTIME] Cross Compile Test (#160)
new 07727a64 [BUILD] Enable RTTI of most part of library, example extension pkg. (#161)
new b565480c [EXAMPLE/PYTHON] Improve extension type, add operator lib (#162)
new e8f7c6a3 [CODEGEN] Change default max_auto_unroll from 256 to 32 (#164)
new 7686a72e [PASS] Refactor build config, allow implicit unroll pragma (#167)
new 6f5305d2 [PERF/TIMER] Add builtin timing logic (#168)
new 57dd5b30 [BUILD/CODEGEN] Allow combine multiple functions in build stage. (#169)
new 212504d3 [MODULE/RUNTIME] Remove Precompile, simplify module (#174)
new c94ea346 Support for Tuple Inputs of Reducer and ComputeOp (#175)
new bc9f5d1d [MODULE] support load back of .ll file into llvm module (#183)
new d08a1d19 [TUTORIAL] Cross Compilation and RPC (#184)
new 859ae478 [RUNTIME] Move device_api to include (#185)
new 0da41ab4 [CODEGEN] More storage alignment info aware generation (#186)
new 279f6826 [LLVM] More optimized option, allow emit assembly (#187)
new 02c50e25 [IR] Include PrefetchIR (#189)
new dc1bba59 [CODEGEN] Make codegen registerable (#193)
new 011b9450 [LANG] Expose tvm.cast (#195)
new 6c1379eb [LANG] Add all and any in the python API (#196)
new cc3dc196 [OP] Initial Stucture of Op Library (#198)
new ebf856c1 [INTRINSIC] Add sqrt (#202)
new eb404db9 [LANG/BUFFER] Change buffer arguments to match DLPack order, add scope (#203)
new 07b399c4 [CODEGEN] Concise typecast for threadIdx (#208)
new cf2e7e23 [BUFFER/REFACTOR] Buffer byte_offset-> elem_offset, add buffer_bind_scope (#209)
new 07fdb511 [REFACTOR/PASS] Formalize argument bind and match util (#214)
new dd5587d6 [PASS/OP/REFACTOR] IRDeepCompare, isolate computeop part, allow fuzzy bind (#218)
new cf514eb1 [TAG] Add tvm.tag module for tagging operator (#217)
new fcd4f870 [IR] Add body to AssertStmt (#220)
new 6a620dd7 [CODEGEN/PASS] add restricted, alignment option (#221)
new c59cff12 [C API] Make DSL API registerable, add copy from/to raw bytes (#222)
new 49e5a7a3 [SCHEDULE] tensorize (#223)
new c1ad9825 [RUNTIME] Add System Lib (#227)
new 56c284ea [RUNTIME] Add workspace pool (#229)
new 004562db [TEST] Add scipy to test dep (#231)
new 5141414f [RUNTIME][ABI] Flat structure arguments (#232)
new 0fad9954 [JS][WEB][BACKEND] Javascript(webassembly) backend. (#239)
new 1e0ac2f7 [RUNTIME] Fix Metal runtime compile (#241)
new 3dbdcda0 [REFACTOR] collections->container, RPC returns func, time_evaluator r… (#244)
new 66903db1 [INTRIN] prefetch support (#246)
new 26619a0a [DOC] Fix doxygen comments (#247)
new c1593704 [RENAME] nvcc_compiler->nvcc, cc_compiler->cc, metal_compiler->xcode (#248)
new 1c9d4068 [DOC] Make range related function consistent (#249)
new f943de9f [EXECUTOR] Enable load executor remotely (#245)
new f8c40ddf [CODEGEN] Generate main compute function separately with alias info (#253)
new 25795b50 [PASS] Add storage alignment info to heap allocated data (#254)
new 50ff26db [PASS] CombineContextCall (#255)
new 5628ba06 [RPC] Allow RPCServer to run without decorator (#257)
new 2576f86a [API] Prefetch schedule supported (#258)
new d6e07d15 [RUNTIME] Enable injection of some core runtime functions to avoid dynamic lookup (#260)
new c81d941a [RPC] IOS RPC (#261)
new 023500b5 [LANG] Add reflection routine to construct node (#265)
new 1b571995 [STORAGE][BUFFER] Support access ptr for clear access pattern. (#266)
new 48263272 [BUGFIX] Fix CanonicalSimplify change type of int constant (#269)
new ea2cff68 [BUILD] Fix osx compilation (#271)
new 1f8d39be [BUILD] rename build.py to avoid conflict name of build (#284)
new 72f2f507 Fix issue relating to serialization of reducer (#282)
new 94d397b7 Build system and dynamic library fixes (#283)
new 66d5e760 [PASS] Simplify dependency of StorageRewrite (#291)
new 56855928 Conda build recipe (#288)
new e6e758f7 [ARITH] Refactor intset eval with functor (#295)
new a6ad911a [PASS] Refactor thread storage sync to a common visitor (#296)
new bacfb39a [PASS] More storage sync. (#297)
new 9df5933f [SCHEDULE][RUNIME] Introduce pragma for additional extension hint, threadpool runtime. (#299)
new 66a86815 [RUNTIME][PASS] Allow declare vector type array (#302)
new 297af7c8 [PASS][RUNTIME] Support attr scope lift and runonce (#303)
new 2ef240f5 [PASS] Allow allocation in parallel scope (#305)
new 40b38db5 [TEST] Upgrade gpu docker to cudnn7 (#306)
new 655b6ac9 [PASS] Memory barrier detection, storage access lower. (#317)
new 1f0dfa20 [PASS][PRAGMA] Allow pragma debug_skip_region to skip region of computation (#318)
new 7ba4ff1b [TOPI] Add broadcast and reduce operators (#267)
new 18ef19b3 [TOPI] Isolate padding option, improve decl of depthwise/conv2d/pool (#332)
new c985551a [Contrib] CuDNN v7 Support (#311)
new e901dcf8 [PASS] RewriteUnsafeSelect lowers unsafe select to condition expr (#335)
new 95434289 Allow install-dev to include all necessary header files (#338)
new dcbef5fc Fix CUDA library search (#339)
new 4e5000d5 [Python] Dist wheel tools (#348)
new c8ee325c [BUILD][LLVM] Support LLVM mainline 5.0 6.0 (#356)
new a97d0740 [iOS] Better RPC guide and bug fix (#357)
new b8007d14 [CODEGEN][LLVM] Refactor cpu runtime related code to CodeGenCPU (#361)
new 6e57d180 [APP] Android RPC (#359)
new ea0c965e [RUNTIME] v2: runtime support for rocm (#386)
new d478d90f [CODEGEN] NVPTX backend. (#392)
new 48729081 [CODEGEN] Multiple parallel in one launch (#399)
new e7c03ff7 [SCHEDULE][PASS] support storage_align of certain axis (#400)
new 16729467 [PASS] IRTransform to enable IR pass proptype in python (#401)
new 514e8217 [BACKEND] Allow nvptx to pass ll ir to CUDAModule (#404)
new 320e665d [PASS] InjectDoubleBuffer (#405)
new bdf97feb [BACKEND] Explicitly allow specialization of FMA in llvm (#407)
new 435870bc [PASS] Improve vthread injection. (#411)
new 9d30369f [SETUP] Always use relpath for setup (#421)
new 6ef7628d [BUILD] Improve build instruction with llvm. (#422)
new 42351e7b [TEST] Add memoize to save test data (#424)
new fb1ac1f1 [PYTHON] Allow general types (#425)
new 54998bf2 [METAL][RUNTIME] Fix bug of memcpy into metal buffer (#428)
new 027bd377 [LLVM] Protect ll when emit pass (#436)
new 3c973924 [RUNTIME][RPC] Enable remote linking of device code. (#444)
new 26698296 [RUNTIME] Enable extension type to PackedFunc. (#447)
new 2ea845a2 [RUNTIME] Add function to pack arguments (#452)
new 316c8b23 [BACKEND] initial llvm codegen for amdgpu (#402)
new 9b6c812c [PASS] Fix intrinsic lowering with fma and other intrin (#457)
new 30c62327 [METAL] use 32bit indexing for metal until we have a bound adapted pass (#462)
new 073e0ef0 [RUNTIME][PYTHON] More compatibility in ndarray (#463)
new 4e07d413 Acknowledge related projects (#465)
new c95ba9e3 More on source reference (#466)
new 1540ee66 [CODEGEN] Fix Metal codegen when storage scope is needed (#469)
new 0d1f0d0d [INTRIN] Enable pow (#471)
new 400812d1 [BASE] Make macro namespace angostic (#480)
new 603af3a6 [RUNTIME] Minimum graph runtime (#484)
new 2dfb354a [DOC][BUILD] Fix cmake and docs (#485)
new af5c6ae0 [ARITH] More robust int set checking (#487)
new 35dde27e [CUDA] auto detect compatibility when arch is not passed (#490)
new 98bbf3b7 [UTILS] Move target to tvm; rename convolution as conv2d (#492)
new 19f03a7e [LANG] Support for Bitwise Operation (#502)
new 28446f54 [RUNTIME] Better error message in cuda launch (#513)
new cbf562fc [CODEGEN] More robust llvm intrin handling, remove graph executor (#519)
new 806141c5 [CMAKE] Fix cmake build (#520)
new ddbd6493 [BUILD] Windows support of DLL exports (#522)
new 12fca557 Use LIB_SUFFIX (#526)
new 25c51a05 [ARITH] Improve detect linear equation (#529)
new cccb5238 Case-sensitive CMake module for OpenCL (#537)
new dc8ea925 [PASS] copy intrin (#536)
new 3f46103a [RUNTIME] Enable ext_dev type for quick plugin of device (#542)
new 13bc8a92 fixed rocm runtime. set default gcn arch to be gfx803 (#544)
new 4b427aa1 [TOPI] Fix declaration for different dtypes (#546)
new 75488115 [CODEGEN] Skip unrolled hint, export symbol on win32 (#547)
new b863e72c add msvc in cc (#531)
new e73b00f3 added support for rocm gpu autodetect (#549)
new a2667480 Add same_as to NodeBase (#550)
new a84da559 [CODEGEN] Detect broadcast(cast(x)) pattern in FMA (#551)
new be02fa8f [Refactor] Introduce target generic dispatch system (#556)
new 57dd2670 [CODEGEN] Force not inline compute core for better debug (#557)
new b166b092 [CODEGEN] Bugfix multiple condition generation (#558)
new 133aa5ba [CODEGEN] Allow link additional module (#559)
new 6ddc6213 [CODEGEN] Use correct math intrin for metal (#562)
new 055e3ba5 [PYTHON] Improve equal sugar (#564)
new 4095f418 [PYTHON] Improve equality wrapper (#567)
new 307e0eb0 [ROCM] Working math function support for ROCm backend, a bug fix in LLVM based codegen (#570)
new f2d20f7f add friendly tips when not found cl and link (#574)
new c4acc317 [PASS] More robust UnrollLoop configuratin (#576)
new cc3f43dd [CODEGEN] Fix CPU compute attribute (#582)
new da457c12 [BUFFER] Smarter slice to detect compactness (#587)
new 22aa3bd8 [ROCM] View llvm ir and gcn asm with module.get_source(...) (#590)
new 92ab86ea [ROCM] remove fma dispatch (#591)
new cf6b9def [INTRIN] Enable popcount (#606)
new 58890bd0 [DLPack] Upgrade dlpack to 0.2 (#609)
new 44894220 add tanh dispatch (#619)
new 5711c595 Support vector operations for AMD (llvm IR) (#623)
new 1332cb11 inline AMD GPU functions (#625)
new 5e170a47 [PASS] Update coproc sync (#634)
new 5cd75369 [CODEGEN] Enable closure with no argument (#635)
new 395016bb [UNROLL] New unroll option (#647)
new c07f5064 Compat for opencl mode between cpu mode and gpu mode (#655)
new d7b15c03 [RUNTIME] support limited save without cross compile (#659)
new 44d5987d [PASS/SETUP] Fix minior issues (#663)
new 93c2e1f3 [CUDA] Enable int64 (#683)
new 413b3868 Support rank-0 tensor (#687)
new e3556556 [CODEGEN] add fp16 and fp64 enable pragma for opencl (#697)
new a796376b Fix long for windows in cuda (#700)
new e9461d27 1) Make unroll code reusable 2) reduce non-determinisim in CanonicalSimplify (#701)
new b203f6fe Simplify expressions early on (#702)
new 4dc4fef1 Halide -> HalideIR (#698)
new 1b95d061 Update metal_module.mm
new 7797c2db [CODEGEN] enable static handle cache (#723)
new ff3248d1 [CODEGEN] update codegen for vector operation (#711)
new 6d0f025f enable partition const loop with build flag (#732)
new e1163eac [CODEGEN] fix & improments in codegen (#745)
new 50faaacf [CODEGEN] use charp for voidp (#753)
new 8e5765b3 [SCHEDULE]Improve bound deduce for loop partition (#743) (#755)
new f0993b7c [PASS] StorageRewrite Fold Inplace op storage when possible (#759)
new ca6e2f8d [PASS] Fix storage rewrite merge rule for special tag memory (#770)
new 9d973e86 [INTRIN] enable popcount on cuda, opencl, metal (#774)
new d73c60b8 [LLVM] Enable same target option in JITModule (#778)
new 110e280e [CODEGEN] fix vector conversion for opencl (#783)
new ab917e8e fix the description of create_shared (#793)
new 32cb6e37 [WIP] WebGL Backend (#672)
new be9a753e [OPENCL] Fix 32bit pointer size in OpenCL runtime (#809)
new b38981c2 [PASS] enhance storage_rewrite to support different dtypes for unified buffer (#805)
new 650d0035 support using pointer with an original offset (#826)
new dce8c597 [TIMER] Enhance time evaluator to create multiple results (#830)
new d6666178 Add type code and bits to AllocWorkspace. (#831)
new e8a4a4b3 Porting schedules (except convolutions) to C++ (#763)
new 0ab19037 fixed #841 (#845)
new 2fd4b85d [PASS] Improve storage rewrite(#846) (#847)
new 462bad58 [TOPI] Fix cpp library dependency on MAC (#852)
new 1d9363e4 [RELEASE] Release note for 0.2 (#853)
new d42bfdf7 [BACKEND] Vulkan Runtime and SPIRV Codegen (#861)
new 4a60238a Fix boolean type (#862)
new 7e94b337 Note about CodeGenC's Range of Use (#866)
new d7c2a0f5 Fix Vulkan Build, add tanh to llvm instrinsic, fix halideIR (#868)
new 55a96908 Fix bugs with C++ TOPI flatten and relu (#869)
new f79acd00 enhance pragma to support single point copy (#863)
new 0aff6ba8 [CODEGEN] Fix vector element access in metal (#872)
new 0d8d6326 [WIP] Add OpenGL topi. (#836)
new a05a1005 [PASS] Enable StorageRewrite before virtual thread lowering (#880)
new ccbff6d1 [PASS] Prepare storage rewrite for unified buffer (#885)
new 1716bde2 Change CodeGenCPU::GetPackedFuncHandle to generate global variable with InternalLinkage. (#901)
new 7022bd44 [RUNTIME] More reliable runtime only detection (#914)
new 4ffadd5c [PASS] Support buffer reuse for different types (#891)
new 89580463 [RUNTIME] Refactor extension type handling, now it is header only (#924)
new 22cf51d1 Revert "[RUNTIME] Refactor extension type handling, now it is header only (#924)" (#925)
new 39487ddf [EXT] Allow easy extraction of extern module (#926)
new c491b843 TVM SGX (#919)
new 90a63e06 Name all the lock guards. (#938)
new a99c53f3 Add test case: Create a static WebGL library and run it in the browser. (#932)
new f93eb15e Fix compiler warnings (#939)
new 8f314d47 Better error message handling for contrib (#946)
new c95f759d [RUNTIME] Stream API (#953)
new bb4a33ff [CODEGEN] Fix alignment generation (#955)
new 59924441 MPS conv (#822)
new 6655aa6a enhance access_ptr that args can support Expr (#970)
new fa09e626 [RUNTIME] Better scalability for multi-thread parallelization of CPUs (#971)
new 26f60c73 [IOS] Improve the iOS RPC with exclusive filesys lock (#981)
new 944bebbc Bug fix for Android platforms (https://github.com/dmlc/tvm/pull/971) (#986)
new 80517962 [RUNTIME] Update graph runtime to rely on smarter planner, add get_input (#990)
new 4cbf0b27 [BUILD] Windows build with cuDNN support (#999)
new 499ea19e [PASS] Add VerifyMemory pass and test cases (#410) (#993)
new 9942dc35 Pluggable Thread Launching Mechanism (#991)
new a0c2dc06 [CONTRIB] windows compatiblity (#1009)
new 85203e28 [PASS] Fix reuse small buffer in storage rewrite (#1012)
new 6d2fd67a Simplify enclave lifecycle management (#1013)
new 441adf32 [RUNTIME] More reliable thread enumeration (#1017)
new 4e9cca3a Implement C++ registry to back Python target.generic_func (#892)
new 0ff1d89c [RUNTIME] better parallel launcher and task distribution (#1026)
new a101c804 Fix fatal error <CL/opencl.h: No such file> when building with CMake (#1045)
new 01c5dcb5 LLVM 7.0 support (#1048)
new 98e26125 [CONTRIB] Patch nnvcc to generate error when build the empty result (#1049)
new 1e53002a [SCHEDULE][PASS] Enable Warp memory and lower to shuffle (#1050)
new 4b8e23fa [TOPI] Overload operators of Tensor when TOPI is imported (#1029)
new 5c25ab9b fix Android build w/ threading_backend (#1059)
new d8de6a13 fix warning (#1041)
new aa7571fe support string option when create cuda/rocm/... target (#1071)
new f27f119d add query for shared memory size (#1083)
new 59d4cfe5 Intel target added, sub group sync added (#1084)
new de3a0241 Update halideIR, add more device query for shared memory (#1087)
new 9d9a435d Make target and build module more pythonic (#1089)
new 6bd18e2d add device name to context attribute (#1090)
new 18251f3c Add SGXModule (#1019)
new b7a32030 Fix device name and Issue #874 (#1096)
new f5f3a91a [RPC] LocalSession to provide RPCSession back by local env (#1102)
new 6cec206c Fix metal backward compatibility (#1105)
new 9420ceef [RUNTIME] Fault tolerant vulkan init error (#1107)
new 3e89874a [IR] Change pragma convention, enable pass unroll option via pragma (#1112)
new b609309a add two more device properties (#1124)
new 0cd0549f [Metal] Correct handle warning info (#1140)
new 7b21365d register loadbinary_hip (#1151)
new d4afaea4 [CODEGEN] Enable cross compile of AMDGPU without rocm, update rpc (#1154)
new 1762b75d make ThreadPool thread local (#1152)
new 2552f036 Fix error during running on nvptx with cuda9 (#1162)
new e3765ce5 [llvm] fixed issue with llvm 5 vs 6 (#1167)
new d839f343 change version number (#1175)
new be3f99ec [DOCS] documentation merge
new 72682b48 [DOCS] Improve docs naming, fix docs warnings
new 3f60c5a0 [RUNTIME] update to make runtime copy type aware
new 0a453592 Fix compilation failure with latest LLVM (#1208)
new f684ca34 [Metal] Fix block launching parameter (#1219)
new 7998d5b5 add test to irbuilder for gpu execution (#1228)
new d0e7a28d fix extern naming (#1238)
new 2d3cef89 Unite cmake builds (#1248)
new 6956d57d [BUILD] Switch to CMake only Infra (#1254)
new e47a6d02 Fix the building error in android_deploy (#1262)
new 6f97eaaa [INTRIN] Add support for floor and ceil (#1267)
new 87136b97 [CODEGEN] ARM Popcount lowering rule and codegen updates (#1235)
new 0427c718 [BUILD] Enable path option for ROCM, CUDA, Vulkan, simplify optional build (#1270)
new cc047c16 [BUILD] Add clang to build matrix, -Werror (#1273)
new e4e79242 Fix missing cublas libraries (#1281)
new 2e46a5ab Link system library needed for LLVM (#1282)
new 3dbc9229 [CONTAINER] Introduce StrMap (#1292)
new 98ed0cad [DOCS] Improve review guide, improve cmake llvm build (#1295)
new 34b521bc Check common subdirs for vulkan/spirv headers (#1298)
new bdf08379 [BUILD] Fix reflection build for gcc-8 (#1304)
new 1dac37e9 [MATH][TOPI][NNVM] introduce trunc, round (#1310)
new f77972fe [TOPI] Conv2d Added and Optimized for Intel HD Graphics (#1290)
new 04c1a9cc [TOPI] Numpy consistency: always broadcast binary op. (#1321)
new b84dd160 Import hybrid module in __init__.py (#1323)
new 8bb8c9b9 [PASS] Add GPU IR verifier (#1296)
new 90750a32 Contrib: add mkl blas support (#1336)
new 3404f34a Add support for Xilinx FPGA board with SDAccel (#1278)
new e7354a24 Fix cmake search for vulkan on Windows (#1343)
new a515d1b9 [RUNTIME] keep opencl runtime deps free from node (#1349)
new 0438713a [PYTHON] Make decorator optional for runtime (#1350)
new 1e98cef3 update include regex to work for path with symbol (#1354)
new 40dd3eef fix narrow conversion on gcc-8 (#1376)
new 855f6caf [NVPTX] libdevice support, enable NVPTX backend in topi tests (#1365)
new 3f2049ad Fixing issue #1395: Undefined symbol: cudaGetDevice (#1396)
new 186f92ba Add support for multiple OpenCL platforms (#1345)
new 87df7728 [RUNTIME][OPENCL] Create program lazily when the program is built (#1408)
new 39c0c7d1 [TVM] Fixed SPIR-V codegen incorrectly not declaring the interface for the entry point (#1400)
new bec40886 [RPC] graduate tvm.contrib.rpc -> tvm.rpc (#1410)
new 0381842f [TVM] Fixed SPIR-V codegen for OpControlBarrier (#1409)
new 6fbbe5b4 [OP] Improve bitwise op type checks (#1415)
new 110a90ad [RUNTIME] Simple NDArray container API in c++ (#1418)
new d788cce4 [BUILD][DOCS] Migrate VTA CI, test, build, docs
new fd85c906 Added option to build android rpc app with vulkan support
new 18fd8a53 [RUNTIME] Support setting CPU affinity (#1403)
new 35ba5557 [AUTOTVM] Core part of auto-tuning module (#1312)
new ba132e85 Add support for absolute opeartion (#1406)
new 19ff4f07 [BUILD] enhance vta build (#1434)
new a2a62d9b Fix cmake for building with cuda in msvc (#1437)
new 88b9a912 [RUNTIME][OPENCL] show correct device type name (#1441)
new 3255705a [BUILD] restrict runtime include headers (#1444)
new bedcef2f Fix conda package builds (#1445)
new 8677ce38 use SetAffinity when logical cores > physical cores (hyperthreading) (#1453)
new 3309bd76 [NODE][REFLECTION] Support NDArray as field (#1452)
new acd560ab [CUDA] FP16 support (#1413)
new 0d7df6bd [TOPI] Bitserial low-precision convolution (#1332)
new 1f17cca4 [BUILD] Fix LLVM static/dynamic link issue (#1461)
new 349df9dd [IR] support general type annotation. (#1480)
new 56fd2dd7 [CODEGEN] Enable inline llvm asm code (#1486)
new 109e4a16 [BUILD] warning fix: new does not have an alignment parameter (#1478)
new f9f9c2cf Add initial support for Intel FPGA SDK for OpenCL (AOCL) (#1474)
new 1ec8772c [TVM][CUDA] NVIDIA GPU Int8 Support (#1503)
new 63ea3a5d Fix a testcase name in test_codegen_cuda (#1526)
new 0cc71d8e [AUTOTVM] TOPI integration for ARM CPU (#1487)
new 77f9cb1e add tvm external registry entrypoint (#1562)
new bb893752 Use int for int8x4 due to performance overhead of char4 (#1569)
new a648f423 DLPack Conversion API (#1573)
new 723e5950 [RUNTIME] Refactor to enable stackvm in runtime. (#1588)
new 485f3510 [DLPACK] Enable cython support (#1589)
new b68bf228 [RUNTIME] Enable return NDArray in RPC (#1610)
new efe9c21a #1592 [PASS] Fix missing mem CHECK in storage_rewrite (#1616)
new 2d8138f6 [NODEREF] Introduce named attribute system. (#1618)
new fb086c65 [VERSION] Update to 0.5.dev (#1623)
new 6ada2ea3 [ATTRS] change AttrFiledInfo->Node (#1634)
new 4c73d1d9 Remove leading "./" from include paths (#1640)
new 00629648 [RUNTIME] [OPENCL] Fix access modifiers (#1643)
new 8f7888bd [PYTHON] Enable constructors in Node (#1647)
new 4928a785 [NODE] Enable global singleton object, allow set_body_typed in function registry, default fallback of IRPrinter. (#1652)
new dba84994 [LANG] Improve serializer (#1658)
new f25d24c8 [RUNTIME][OPENCL] delay device check (#1657)
new a23c969c [CUDA][TVM] fix constructing invalid command line string for nvcc (#1674)
new 1f934c21 [AUTOTVM][TOPI] Use tunable templates for GPU (CUDA/OpenCL/ROCm/Mali) (#1638)
new 3d28aebb [RUNTIME][API] Graph runtime API enahncement to support NDArray (#1659)
new 203d0567 [NODE] Enable EnvFunc to serialize global function as node (#1721)
new ea96a2b9 [NNVM][TOPI] Add mean and product operators (#1628)
new dc5d4370 [CODEGEN] Fix let expression (#1727)
new 2dc1a3ab [High level OPT][RFC] NNVMv2 IR - Relay (#1672)
new 126be9e0 [NODE] Node base system refactor (#1739)
new c0bf6ece [NODE][RELAY] Move most of the reference related code to node (#1747)
new 9f30e2d2 fix buffer elem_offset calculation (#1762)
new 1ef7f886 Update SGX cmake (#1763)
new 8a14c6c0 [DOC]Errors corrected (#1767)
new c0c8b779 [RUNTIME] Add fp16/fp32 conversion functions (#1766)
new b05bae1f [RUNTIME] Use weak link for fp16 functions (#1769)
new c29659f8 [SGX] Improve edgeroutines (#1775)
new d1228804 [RELAY] Refactor type inference to use type solver (#1779)
new b981db0a [BUG] Fix incorrect libcuda.so found by cmake when multiple versions of CUDA exist (#1788)
new d209b75b [IR] eager constant folding in operator overloading (#1789)
new 21b53830 [RELAY] First pass at pretty printer (#1749)
new 99e234fb [NODE] Keep base node system in HalideIR (#1793)
new 0bdd30ee Fix vulkan build with homebrew install of vulkan-sdk (#1802)
new 076f2b73 [RELAY][OP] conv2d, ShapeExpr->IndexExpr (#1798)
new e93e603e [TVM] Fix negating undefined in DetectLinearEquation (#1816)
new 12ce102e [DEBUG]Support a debug framework for TVM Runtime (#1378)
new 70453fb6 [RELAY][DOCS] Core Operator docs (#1821)
new 86135eb2 [RELAY][PASS] Dead Code Elimination (#1776)
new 638905c2 Enable bool type as storage type (#1853)
new 11789740 Allow override gtest library search path (#1867)
new 9d1174a3 Fixes for tensorize in Windows build to expose TensorIntrin::make and search clang.exe (#1896)
new 60347605 [LANG][ATTRS] Enable deep equality comparison and hash of Attrs (#1903)
new b1b5a48a [TVM] Eagerer const folding for logic ops (#1907)
new 72ce6f63 fix build issue for MSVC 2017 15.8.0 and above (#1928)
new 3046e153 [RELAY][Refactor] TextPrinter, move ret_type after body in Function. (#1918)
new 4b95b2e7 [RELAY] IR builder stablize refactor, clean pass (#1934)
new ab1f9361 Fix typo in module.py line 90 (#1947)
new 23291a1b [TOPI] Specify non-zero absolute tolerance in tests (#1925)
new faf5b644 Fix non-zero extent of access_ptr out of range (#1937) (#1939)
new f1aa0d47 up (#1940)
new 1ced09d0 [Relay] Fix format (#1957)
new 65aabef5 [RELAY] Refactor AlphaEqual to support deep comparison of Attrs. (#1958)
new 021f8257 [RELAY][TypeSystem] Add support for populating type args (#1962)
new 4dbb66d8 Fix int8x4 broadcast value codegen in cuda (#1959)
new dcb4827b [RELAY] BiasAdd, MLP, Resnet testing (#1969)
new e3d7d633 [ATTR] Introduce Integer container (#1994)
new 16373888 [RELAY][OP] Split (#1876)
new 3294f9ee [RELAY][OP] Fix conv2d NHWC type inference. (#2019)
new 4eab71f0 [OPENCL][RUNTIME] Fix race condition of modules (#2018)
new 323e4baf [RELAY][PASS] FoldScaleAxis Forward (#2020)
new 7571a911 [intrin]support fmod for cuda (#1964)
new 012d0be6 [PASS]unroll loops with extent=1 (#2027)
new 90c866c6 [PASS] add a pass for the specific hardware accelarator when it is not binded (#1999)
new d24976fb [RELAY][RUNTIME] Add Relay interpreter and compiler for TVM runtime system. (#1954)
new 73f03c26 Better gemm support for cublas and cpu (#1967)
new c675e145 [Cleanliness] [Easy] Make TVM leak-sanitizer and Wnon-virtual-dtor clean. (#2046)
new f24fea41 Refine CMakeLists.txt (#2049)
new 6422f716 Rename relay::Environment to relay::Module (#2054)
new 5c82732b [RELAY][RUNTIME] Add compute and schedule attributes for all ops in relay/op/tensor.py (#2050)
new 778cf82c [RELAY][BACKEND] CompileEngine refactor. (#2059)
new acfff037 [CODEGEN][LLVM] Cache packed func ptr, lift alloca (#2070)
new a2e12f1f [OPENCL] Make use of cpu device when gpu device doesn't exist. (#2076)
new 0a8d790f [RELAY][OP] strided_slice (#2094)
new da59f1e5 [RELAY][PASS] Bind, FoldConstant (#2100)
new 0131cff0 [RELAY][[PASS] Consolidate ForwardRewrite pass. (#2124)
new f7f0f791 [HYBRID FRONTEND] Modify hybrid script to new interface; hybrid op supported; enable compilation_database in CMakeList.txt (#1757)
new d0ddc669 Fix str decoding error on non-English Windows (#2158)
new 2434919b [RELAY][IR] Introduce IdNode to preserve var id across rewriting (#2178)
new 166dc30c [BACKEND][CODEGEN] C codegen with tests (#2161)
new 833838cc fix llvm dependency bug (#2198)
new 2d280a28 [Relay] Alter Op Layout (#2150)
new 77620fdc [PASS] InstrumentBoundCheckers pass (#2079)
new e548de1e NOTICE (#2203)
new 3a9d24ec [TVM] Fix llvm codegen (div by power of 2) (#2204)
new 4eff60de Python security issue about mktemp() and abspath() (#2202)
new 520d457c Run verifier during LLVM code generation (#2211)
new b59c24e6 [Relay][RFC] Relay IR Text Format (#1781)
new 1e3b12ef [typo] fucntion ==> function (#2239)
new 5b82a0a9 [typo] fucn => func (#2240)
new 75d9d693 GetChar() in base64.h should return int, not char (#2255)
new b5f0073e Fix missing sigmoid intrinsic in C++ (#2231)
new ea36ce2e Fix serialization issue (#2263)
new c67123c7 [TVM] Move check_numerical_grads to tvm.testing_ (#2314)
new f4f7f963 [ROCM] Make sure all bit code files exist (#2323)
new 1f3b5c7f [RELAY][EXPR] Make const numpy consistent (#2349)
new bee7865c [RUNTIME] Add min_repeat_ms to time_evaluator (#2200)
new 694a40a0 Enhanced simplification rules for Div by a positive constant (#2346)
new 59743bd6 [RELAY] Port winograd ops to relay (#2356)
new 7ab6854d Added LLVM TargetIRAnalysis pass (#2386)
new 25e15fec [RUNTIME][TRACE] Support trace primitive. (#1973)
new 332047eb [PASS] not vectorize if_then_else (#2389)
new a3c6749e [LLVM CodeGen] Partially disable unsafe fp math (#2422)
new bfc32483 [PASS][TENSOR] Use correct select semantics (#2394)
new e4de1eb4 [relay][pass] Annotation for heterogeneous compilation (#2361)
new 18db5603 [RELAY] Support recursive call syntax (#2352)
new 6cd2cc4b [Runtime] Make runtime compatible with android ndk api 15 (#2446)
new 5669197a [Relay][Parser] Improve Relay parser and pretty printing, including CMAKE (#2377)
new 1aca1e14 Fix broadcast add and subtract grad (#2465)
new 70d6394c [Relay] Add generic & informative Relay error reporting (#2408)
new ccda6d16 Optimize Linux shared library modules (*.so files) (#2445)
new 1246e959 [OPT] Low-bit Quantization (#2116)
new 2f8f47dd Remove duplicate as Checks and CHECK value (#2531)
new 29cc9114 Misc refactor on graph runtime, layout node (#2557)
new 5c646ea5 Tighten buffer bound for TensorComputeOp by improving EvalSet on ranges (#2565)
new 7649b9cb [Hybrid script] Backend support (#2477)
new bee9aeba [RUNTIME] Enable NDArray type extension (#2598)
new 2ee5c8de [TVM][Bugfix] fix storage_rewrite bug when input is big (#2580)
new 596c5a0f [Relay] Algebraic data types (#2442)
new 0af5018f [EXPR] Expression-template based pattern matching. (#2589)
new 6d367558 [TVM][LANG] Add eager simplification for operations with FloatImm (#2615)
new 52bfe7ca [Bugfix] Missing #include <sstream> (#2629)
new 22edce55 [RUNTIME][NDArray] Allowing External Libraries to Subclass NDArrays (#2613)
new 18516e86 Fix pylint 2.2.2 gripes. (#2642)
new f7a53a72 [Relay] add more function to prelude (#2660)
new 684f0efa [BUILD] Simplify after bind device type (#2670)
new 43ab4fbe Handle Select in IntSetEvaluator (#2687)
new dd4ec38d [CODEGEN LLVM GPU] Initialize llvm before lookup for the target (#2683)
new c41875b4 [ARITH] Analyzer Infra, ConstIntBound, Modular (#2668)
new cc35b20e [EXPR] ir_operator.h->expr_operator.h Centralize const folder logic (#2719)
new d625ad67 use LLVM linker (#2713)
new eecb8a86 [VERSION] Update to 0.6.dev (#2736)
new 6673861e [RUNTIME][OPENCL] clFinish before releasing memory (#2737)
new 6a0d2c40 Fix vmlal.s16 code generation for int8 x int8 -> int32 (#2748)
new b247ca03 [RUNTIME][OPENCL] set type_key even when platform is not available (#2741)
new e196f6e0 [WIN] Fix a bug in find_llvm when specify llvm-config (#2758)
new e1e30f00 [ARITH] Analyzer RewriteSimplifier: add/sub/mul/div/mod (#2722)
new 9d6c01bf [Relay] Pass manager (#2546)
new 4a575310 [DOCKER] Update docker protocol (#2793)
new 5b326c53 Make cpptest build on Ubuntu (#2798)
new ba24b70e Ensure loop count is a constant before trying to unroll. (#2797)
new e4ac6029 [ARITH] RewriteSimplifier: min/max, logical, select (#2768)
new b76c18f4 xcode.py: Decode bytes before output (#2833)
new cd4ffbeb Fix Xcode 10 metal compile error (#2836)
new 724169fd [CODEGEN][OPENCL] Fix compile error about ternary expression. (#2821)
new 97eb7a92 [RUNTIME] Scaffold structured error handling. (#2838)
new 0473a5c9 [ARITH] RewriteSimplifier: improved cmp simplification (#2851)
new 3329211d [AUTOTVM] Refactor measure build func (#2927)
new 7f0c5960 Fix intersect of modular set (#2904)
new e4ceb6f4 Consistent result of DetectLinearEquation() when an empy vars is passed (#2860)
new 7aa4edcc Fix vcvtph2ps codegen (#2925)
new f1368016 [ARITH] Analyzer CanonicalSimplifier (#2891)
new 03c99635 [RUNTIME][OPENCL] Make OpenCL runtime Compatible with OpenCL2.0 #2897 (#2950)
new 100f06cc fix undefined reference to dlopen, etc (#2957)
new 1c07cc94 [HEADER] Add Header to Comply with ASF Release Policy (#2982)
new 552e3fcc Expose backtrace symbols in Debug mode (#3001)
new 77262916 add output format to ndk build func (#2999)
new facfde02 [REFACTOR] Use more TypedPackedFuncs (#2981)
new e37cbd4d [Relay] C++ GraphRuntimeCodegen, Deprecate Python2 (#2986)
new 355b25df [ARITH] Fix x||!x for comparisons in rewrite simplifier (#3029)
new 9fc193a2 Fix code comment and typos. (#3063)
new cfbd5e13 [Relay][TOPI] Add rsqrt operator (#2949)
new b7b5cd15 [TVM][ARITH] Teach BoundDeduce to handle the case in which target var can appear in rhs of expression (#2795)
new c86d22c2 [Bugfix] Fix type code error for StringImm (#3050)
new 90579171 [DOC] various assorted grammar fixes (#3127)
new 83021e86 [Relay][Runtime] Add memory manager for NDArray (#3121)
new 6c3be071 [ARITH] Constraint-aware ConstIntBound, Enhance CanonicalSimplify (#3132)
new 98703c02 Handle vectorize for LE statement (#3137)
new 1e930acb [Relay][Runtime] Implementation of Relay VM (#2889)
new 73d00746 Fix a multithreaded bug in llvm LazyInitJIT (#3158)
new 11776049 Avoid using heavy API to query single attribution (#3179)
new 0ee4825d [Datatypes] Custom datatypes (#2900)
new e6330bd9 [CODEGEN][CUDA][OPENCL] Handle INF and NAN (#3194)
new d11a60a8 [BugFix] Fix bug in cast to bool (#3207)
new 9daa0b3a [Relay][TOPI] operator All (#3124)
new 1e35f91e Add `SkipVectorize` pass (#3222)
new 358b71ef [relay][pass manager] Open transform namespace (#3226)
new 6df80a0e [NODE] Macro to define NodeRef methods, constructor style example (#3224)
new 81decee1 [C++][API] Consistent RAII scoping API. (#3231)
new 0f58e660 [Relay][Transform] merge PassContext and BuildConfig (#3234)
new 85a7d673 [Relay] Start porting pass to the pass manager (#3191)
new 380e173a [ARITH] Improve div/mod in rewrite simplifier (#3149)
new 4767d6db [C++] Cleanup transform API nits (#3253)
new 8bddafa0 [Bugfix] Fix a memory leak in OpManager (#3263)
new 345a13bf [ARITH] Bugfix: check arg positiveness for mod rules (#3279)
new aec09f50 [RELAY][TRANSFORM] Migrate buildmodule to transform (#3251)
new 0e6969e5 [ARITH] Bugfix: int bound analysis for mod (#3288)
new cb25965e [LANG] Comparison operators support for Imm expressions (#3283)
new 8d8be4fd [PASS][RELAY] polish pass infra (#3319)
new b4768cb6 [relay][vm] move vm opt passes to pass manager (#3323)
new 5c30b12a [RELAY] Pass infra cleanup (#3336)
new 3fcc25b9 Support export ADT value in Python (#3299)
new 4df9a1dc [Relay][Transform] quantize opt passes to pass manager (#3289)
new 8493ddef [ARITH] Revamp IntSet (#3272)
new 30d0a18b Update CMakeLists.txt to be more flexible (#3354)
new 979c55c6 [BUILD] Enable more visible symbols by default (#3365)
new 75d7d69c [Relay][VM] Add AllocTensor instruction and better instruction printer (#3306)
new 45a8d363 Fix typo in word explicitly (#3376)
new a52e1b3f [ARITH] Bugfix min/max const canonicalize rule (#3386)
new 94830d72 fix (#3417)
new 2ec8ac2d [VTA][Relay] Relay Compilation + AutoTVM compatible operator libraries for VTA (#3135)
new 44fc6e93 [CI] Fix windows build, add azure pipeline (#3458)
new e4f1d0eb [ARITH] Improve min/max/div cases in RewriteSimplify (#3463)
new 0b9c4e4b [ARITH] CanonicalSimplifier, better folding, eliminate store. (#3464)
new c33d3a21 [ARITH][SCHEDULE] Update schedule to use the new analyzer (#3466)
new 22d29a2f [ARITH] Canonicalize comparison to move constant to one side (#3467)
new af4f32f6 [Relay][Pass] Only allow Module -> Module for opts managed by pass infra (#3430)
new 55805b77 Migrate simplifier to new infra. (#3368)
new aa9856ea [Relay] fix 'please use input parameter mod warning' triggered in build_module (#3452)
new ff2bbf11 [Codegen] Support broadcast op with symbolic shape (#3389)
new b67e18eb Clean up pass.h (#3312)
new fd8d4452 [Relay] Continuation Passing Style (#3456)
new 358bdee7 [Relay] Fix PE (#3482)
new 992d5170 [Relay][Module] Make tags for ADT constructors and ConstructorValues more robust (#3369)
new 8156ab0b [relay][frontend] Return Module from get_workload (#3483)
new f1bafa13 [ARITH] Refactor: Remove un-necessary usage of ComputeExpr (#3503)
new ed30f734 [ARITH] Bugfix div subtract rewrite rule (#3504)
new e464633e [ARITH] More recursive rewrite rule, cleanup simplify tests (#3502)
new c11df92f [Vulkan] Added conversion from bool to float. (#3513)
new bc5950ee [Relay][Testing] Relay-to-Python compilation (#3156)
new 3adb8a03 [Relay][RFC] Implement type checking for Any (#3221)
new 3d6415f9 init (#3476)
new 1f6aa37b posix_memalign appears in API 17, not 16 (#3532)
new bd503349 [INFA][IR] Build and Evolve Low-level IR. Remove HalideIR dep. (#3533)
new 7f731ea4 [ARITH][IR] Introduce FloorDiv/Mod (#3479)
new e0a382d0 [Runtime] Enable set_input_zero_copy in GraphRuntime (#3416)
new e600f57a Emit DWARF debug information (#3420)
new bed1e0d4 [ARITH] Simplify let (#3568)
new 9f5d6017 [RPC] Better handle tempdir if subprocess killed. (#3574)
new 2ba0aec4 [CI] Upgrade LLVM envs (#3590)
new c806ea71 [Runtime] [ThreadPool] Make SpscTaskQueue::Pop(..) spin_count configurable (#3577)
new ed48abbc {relay,topi}.reinterpret support (#3599)
new 53304f4e [TEST] Fix testcase to make them more compatible to zero-rank (#3612)
new 67a71ea0 fix typo (#3611)
new 131309b3 Add a missing header in cuda_device_api.cc (#3621)
new adfcbc50 Implementation of uTVM (#3227)
new 74bcb2dd Make Google Test usage configurable in CMake files (#3628)
new 6906bbd9 Print llvm source by default in ROCMModuleNode::GetSource (#3662)
new 33c61309 tvm/contrib/rocm: improve finding of ld.lld (#3664)
new 38c67bbe ROCm: Add SaveToFile and LoadFile (#3665)
new 6eca7f56 Add support for Tensorflow operators log1p, cos, sin (#3614)
new dbb325d0 Add shuffle support to TVM (#3633)
new dd483650 Align the naming rule for OpAttributeUnImplemented (#3695)
new d20d12cf Add an option to build with -pthread (ON by default) (#3671)
new 4657d92a Metal reinterpret fix (#3706)
new 4bf8354c Quit and clean when TVM is interrupted (#3640)
new 83868e46 Export tvm::relay::OpRegistry::OpRegistry (#3711)
new 9cf86909 [Bugfix] Fix the issue that function pass modifies original module (#3712)
new 7607196e Take zero extent loops as NoOp and remove it and add unittest for the same (#3724)
new 1e629dde Revert compile_cmd kwarg name change (#3746)
new 77050dc0 Don't replace reduction init axis with new axis if bound to a thread. (#3408)
new a3d97291 [ARITH] Simplify casts of constants 0 and 1 (#3758)
new 67ec999d add gfx906 bc (#3808)
new a33c1c3d [Relay][VM]VM Profiler (#3727)
new 13e36b60 [TVM] Fix warnings (#3817)
new 1a1dc494 [CODE] Halide attributions (#3824)
new c457797f Fix inconsistent python/cpp API behavior for if_then_else, power (#3829)
new 0fe66701 Add build_create_shared_func to tvm/contrib/cc.py (#3840)
new e52ef2f5 codegen_spirv support Call::reinterpret (#3795)
new 78d8a842 [Relay][Any] Add shape func for dynamic shape (#3606)
new 4919f13d [WIP][µTVM] Add OpenOCD Low-Level Device (RISC-V Support) (#3756)
new a078515b [Runtime] Allow parameter sharing between modules (#3489)
new 2819af9e Revert "[Runtime] Allow parameter sharing between modules (#3489)" (#3884)
new 9f59b71d [PYTHON/FFI] Search PATH for DLLs (#3888)
new 9177b4e2 [Relay] Add ADTs to text format (#3863)
new d7abb4ea Add .hsaco save/load for ROCm target (#3852)
new 10beecab Support LLVM trunk (#3907)
new 83916538 [Relay/TOPI][Op] Add erf intrinsic and op (#3702)
new 2f17de94 Numpy compatible dtype inference for `tvm.convert` and `tvm.const` (#3861)
new 1e0b0884 [CODEGEN] Remove incorrect check for LLVM in C codegen test (#3921)
new 80d81e6c [Relay][Module] Refactor the way we interface between different modules of Relay. (#3906)
new 7c04ba0e [RFC] [Contrib] Minimal runtime (~12kb .text on ARMv7/x86) for subset of TVM models (#3567)
new 4a34b1ee Fix CUDA int8x4 vectorize (#3928)
new f5fd1b17 Vulkan2 Runtime API (#3849)
new 26cb3376 1) Add EQ op to the deduce_bound and add unittests for the same (#3775)
new 233954fc trivial (#3954)
new 4836d1b6 [tvm][codegen] Make buffer auto broadcast independent to the order of input args (#3956)
new 56eed317 More friendly error msg; Fix Android Demo LLVM ver (#3962)
new a483188b [Vulkan] Minor optimization for deferred token lookups. (#3960)
new 657c6643 [TVM][AutoTVM] cast filepath arguments to string (#3968)
new 74fcde01 [ARITH] Introduce base-class IRMutatorWithAnalyzer for scope dependent analysis (#3969)
new 3d6c1782 Add support for MXNet pad operator. (#3739)
new 5253122d [ARITH] Add Lowering rule for FloorDiv/Mod (#3976)
new 21bd3125 add bc for gfx1010 (#3984)
new 50b96818 Add operator `isnan` (#3979)
new 90f4b04c [ARITH] Explicitly state truncdiv/mod in pattern matching. (#3986)
new b4fc509c Changes to make tensorize work. These changes also fix the previously broken test. (#3981)
new c3883581 Expose llvm.nearbyint intrinsic. This is a faster alternate to rounding. (#4001)
new 8e74834e [ARITH] Refactor to use explicit div/mod functions instead of operators. (#4000)
new e730b99f [ARITH] Use explicit div mode in python. (#4014)
new dd777397 [ARITH] cleanup the indexmod/div on python side (#4028)
new 3a0e3d33 [Relay] Move prelude to text format (#3939)
new e0f5abdf [ARITH] migrate indexdiv/mod to floordiv/mod (#4008)
new 838befc4 Add dmlc-core to the list of installed header directories. (#4035)
new f474afe9 [QNN][Relay] Calling Dialect passes from inside Relay Build API. (#3971)
new 8c3ccaad [llvm] switch to use Align for llvm trunk (#4051)
new 97155e75 Hide symbols from dependent libraries if HIDE_PRIVATE_SYMBOLS is ON. (#4041)
new 6e4827a8 [ARITH] Add floordiv for the deduce bound (#4025)
new d592d64c [TVM] Rewrite simplification rule to eliminate unnecessary conditionals. (#4076)
new 66729db3 force code object v2 for amd gpu backend (#4099)
new 86fdaac4 [tvm][any] broadcast with values other than one (#3967)
new 4bb0f99c [codegen] Add multiple operands and function support when using fp16 compilation (#4056)
new 52fccc90 [ARITH] Fix lowering of floormod(x, y) != 0 (#4127)
new 62456048 Fix typo (#4144)
new d6e33b67 [Runtime] Enable option to use OpenMP thread pool (#4089)
new 2b4178a7 [REFACTOR][NODE][RUNTIME] Move Node to the new Object protocol. (#4161)
new 5cbbb85d [cmake][ANTLR] Support setting path to ANTLR jar (#4176)
new f5ef6939 [TOPI] Tunable Template for Conv2D HWCN on CUDA (#4168)
new b20bcf7e TensorCore Support using Intrinsic (#4136)
new c6795edd [NODE][REFACTOR] Refactor reflection system in node. (#4189)
new c129f39b [hotfix] missing include headers (#4204)
new b908529d [RUNTIME] Separate runtime related contrib into runtime/contrib (#4207)
new cfe6c835 [Relay][Op] Enhance Upsample Operator to support float scales (#4206)
new 9117ce1a Update have_int8 condition to run on compute capability 7.x devices (#4214)
new f1902c3d [ARITH] Fix the rule y < x && x <= y (#4220)
new ec00e262 [Relay][Topi][TensorFlow][ONNX][Lang] Add support for Any op (#4205)
new 9ca6c059 [CI] Update GPU docker to cuda10 (#4228)
new 3f9d490c [CUDA] Fix fp16 intrin, disable bad fp16 vecadd test for now (#4239)
new f3c38dde [ARITH] Fix lowering of FloorMod (#4236)
new 64d8d023 Implement explicit IR representation of memory alloction (#3560)
new ddd90367 [NODE][REFACTOR] Rename IRFunctor->NodeFunctor, use func pointer (#4247)
new 5c849ed1 Require LLVM >= 9 for AMDGPU backend (#4253)
new b0d1acbc [DOCS] Update link loc (#4257)
new cd967a31 Auto TensorCore CodeGen (#4234)
new 318f3565 [Codegen][cuda-fp16] fallback to fp32 simulation when cuda arch < sm53 (#4268)
new fe7d5cb5 [RUNTIME][REFACTOR] Use object protocol to support runtime::Module (#4289)
new 9a2eb2ec [Codegen] remove fp16 function override for cuda (#4331)
new 19c3eda8 Enable hipModuleGetGlobal() (#4321)
new cfa5efd1 [Contrib] Add MKL DNN option (#4323)
new b1dbdf0a [RUNTIME] Add device query for AMD GcnArch (#4341)
new 87e0436a [CodeGen] Add build config option disable_assert to control whether to generate assert (#4340)
new f2396151 [COMMUNITY] Add DISCLAIMER, KEYS for ASF release (#4345)
new a1253775 [Relay][VM][Interpreter] Enable first-class constructors in VM and interpreter via eta expansion (#4218)
new 55f84b62 Add workgroup size attribute to AMDGPU functions in codegen (#4342)
new 68fa36b2 proper device query through rocm api (#4305)
new 7ffa642a [Relay tests] AlterOpLayout - Temporary attr update (#4357)
new 5122cf02 [nvcc] enable multiple arch in one fatbin (#4377)
new aa16d098 fix build with llvm trunk (#4386)
new a427dbe7 [ThreadPool] Solve thread transitions issue (#4344)
new 0912ed84 [LICENSE] add 3rdparty licenses (#4402)
new d6594f1c [TVM][RUNTIME] A minimum example to generate external library wrappers for DSOModule (#4280)
new 0c115b28 [Release] resolve license issues (#4408)
new ab133c62 [LINT] Remove unnecessary copyright message for files with ASF header (#4409)
new f8275d8c [License] move cma_api to 3rdparty. separate BSD 2-clause and 3-clause (#4410)
new 8eef64e1 [LICENSE] clarify the blockingqueue license, update version to 0.6.0 (#4414)
new ec2bbec5 add rocm codegen unittest for cross thread reduction (#4423)
new bdd78376 [RELEASE] Update copyright message, change notice, remove cma kernel module for now (#4431)
new 16ce6a7c add DeviceName to ROCm api (#4437)
new f8b91134 [µTVM] Enable AutoTVM for ARM STM32F746XX Boards (#4274)
new 49b01e20 [doc] fix typo (#4463)
new c41d864a [CONTRIB] TFLite Runtime (#4439)
new ce8705de [BUGFIX] Fix search path for libtvm_topi.so (#4467)
new 7833d8fe Fix typo in travserse (#4469)
new 85ec8fc3 [Codegen] fix bug on LLVM 10.0 (#4480)
new ae14cf81 [REFACTOR][RUNTIME] Add LibraryModule that merges systemlib and dso. (#4481)
new a9cbb890 [docs] typos in include/tvm/ir.h (#4493)
new b38c3479 Add __float2half_rn for cuda compute capabilities less than 53 (#4489)
new 4e4a551f update rocm intrin rule (#4499)
new 6e2ffb28 [codegen][Build] it's more readable to move the if condition out of the loop (#4501)
new 23c4ce7e Add AMD codeGen unit tests (#4509)
new 51ae2d05 Fix build for llvm newer than 9.0 (#4515)
new 83d3ca1c [ir] use DataType instead of Type for readability because Type has been deprecated (#4513)
new 9130b53b [Relay] External codegen (#4482)
new 45759e62 [PYTHON][FFI] Cythonize NDArray.copyto (#4549)
new df50a80a [REFACTOR][DTYPE] Isolate dtype to runtime (#4560)
new 40b5fa8b Support standardize runtime module (#4532)
new c2489c0a [TEST] Remove nnvm related code in topi and test script (#4562)
new eef99fb3 [DEPRECATION] Remove NNVM compiler (#4571)
new efbaee90 [DEPRECATION] Cleanup legacy verilog support (#4576)
new cd9a6c0c [RUNTIME] Remove Extension VTable in favor of Unified Object system. (#4578)
new 0f756328 Some Windows and MSVC fixes (#4569)
new 3e6856be [Container] Fix NDArray SaveDLTensor declaration and implementation signature different (#4586)
new e4a95162 [Runtime] add necessary const qualifier for NDArray container of parameters (#4590)
new 04f5cdab [REFACTOR][RUNTIME] Update NDArray use the Unified Object System (#4581)
new 7089c4ee [relay][refactor] Cache Op::Get in passes to reduce lookup overhead (#4594)
new 4159ea1a [REFACTOR][OBJECT] Consoldiate NodePtr/Ref/Hash/Equal to Object (#4603)
new 2bccb5ba [IR] Unify approach to Visitor/Mutator under Functor (#4606)
new e83afb1e Bugfix StmtMutator IfThenElse (#4609)
new 94cc1633 [REFACTOR] Migrate Low-level IR Passes into the New Stmt/Expr Mutator (#4607)
new 8aa837f9 [CMAKE] Remove unecessary rdynamic (#4613)
new 71d03105 [REFACTOR][TYPE] Remove un-necessary var sub-field in GlobalTypeVar and TypeVar (#4615)
new 1e808708 [REFACTOR] Unified IR base types. (#4616)
new 566f3445 [REFACTOR] TVM_REGISTER_API -> TVM_REGISTER_GLOBAL (#4621)
new 424ece3c [REFACTOR] IRPrinter->NodePrinter, move to node/printer.h (#4622)
new 47b8b6b9 Get around limitation of g++-4.8 (#4626)
new 5e843396 [REFACTOR] Automatically deduce function type signature in Registry.set_body_typed (#4623)
new 2d2f42d1 [REFACTOR][IR] Introduce SeqStmt to replace ir::Block (#4627)
new 98b26516 [RUNTIME][DSO] Improve TVMBackendPackedCFunc to allow return val (#4637)
new 1c0feecb [REFACTOR][IR] Add Node suffix to low-level IR nodes (#4649)
new d04d125b [CI] Recover Windows Mac Build CI via Github Actions (#4662)
new 1cb5fcb5 [REFACTOR] relay::Module Def -> TypeDef (#4665)
new 541a8324 Use int for endch to fix portability issues regarding signed/unsigned char (#4668)
new 5daf5725 [REFACTOR][IR] tvm::Expr -> PrimExpr(Primitive Expr) (#4669)
new 40095762 [CodeGen] Generate blob use LLVM directly (#4657)
new 528bc8f8 [REFACTOR] Replace TensorObj and TensorValue with NDArray (#4643)
new 8765b1b9 [REFACTOR][IR] Initialize Unified IR Expr Data Structure (#4673)
new 7f3c91ff [REFACTOR][IR] Allow Module to store BaseFunc. (#4678)
new 9d0ce549 [REFACTOR][IR] Unified IR Primitive Op and Registry (#4687)
new 4a9c6f72 [REFACTOR][IR] Unified IR IRModule structure. (#4699)
new 49a31110 [REFACTOR][IR] Initialize Unified IR Pass Infra. (#4702)
new cd313d5a [REFACTOR][IR] Polish ir/type (#4705)
new 4177b0e6 [REFACTOR][IR] Unify IntImm and UIntImm (#4706)
new c1a3d99a use packed func macro for external codegen (#4710)
new d47cfd99 link the math library by default (#4713)
new acd481e8 [REFACTOR][IR] attrs.h -> ir (#4709)
new 6ad59352 [REFACTOR] Move support related code to include/tvm/support (#4716)
new cac715d3 [REFACTOR][FFI] Make more clear naming for C API Type codes. (#4715)
new 0444d691 [VERSION] Update mainline version to 0.7.dev0 (#4720)
new b2baa97e [REFACTOR][IR] Introduce include/tvm/target (#4721)
new 2a51542c [Arith] add SizeVar representing non-neg valued variable in a tensor shape (#4684)
new 203a30df [REFACTOR][ARITH] Unified IR, introduce arith subfolder. (#4722)
new 5ee40f90 [REFACTOR] top - namespace for Tensor Operation DSL (#4727)
new a426afee [REFACTOR] Polish runtime (#4729)
new 9f6f0a40 export builtin_fp16 on Windows (#4731)
new 975f19c0 [TOOLS] JSON upgrader to upgrade serialized json. (#4730)
new 83ffc338 [REFACTOR] Get rid of packed_func_ext. (#4735)
new 8abfb489 [CodeGen][CUDA] Improve CUDA vectorizer (#4736)
new 6b6c5ea9 [REFACTOR] Establish tir (#4740)
new d7fdd6c3 [REFACTOR][CODEGEN] codegen->target, build_module->driver (#4742)
new a00e9e64 [REFACTOR][TYPE] Finish move all types to IR. (#4746)
new 59fd3a7f [REFACTOR] Establish printer in the source folder (#4752)
new 59cbc76e [REFACTOR] top->te (#4759)
new 84090add [Build] Explicitly link to cublasLt if it exists (#4776)
new a994551c properly extract error type from windows error message (#4780)
new 33d7233b [PassManager] Implement pass manager tracing API (#4782)
new ce921364 Fix parsing of different exception string formats (#4785)
new cd257e8b [ThreadPool] Solve ARM BIG.LITTLE heterogeneous multicores (#4747)
new da5423bc [TIR] Create a StringImm reference type (#4806)
new 7d862e0f [LINT] Fix -Wextra (#4804)
new 4726c944 fix memory leak (#4811)
new 9c2a80ad [REFACTOR][PY] tvm._ffi (#4813)
new f012f37f [REFACTOR][PY] Establish tvm.runtime (#4818)
new bbbc6a1d [CONTRIB][CC] Enhance cc.cross_compiler (#4817)
new dc6eb29a It's gpu not cpu. (#4832)
new be977f9a [REFACTOR][PY][API-Change] Polish tvm.runtime, tvm.runtime.module API update (#4837)
new 2a1ee93a [LINT][PY] Fixes for pylint==2.4.4 (#4849)
new 3795935c Fixed bug in ExprOp that caused bitwise operators to fail when a basic python type was on the left hand side of the expression. Added regression test for crashing cases. (#4852)
new ea14fd5a [LLVM] Explicit llvm::StringRef to std::string conversion (#4859)
new db0944c5 [REFACTOR][PY][API-CHANGE] establish tvm.ir, migrate corresponding files (#4862)
new 5d03e84f [DOCS][PY] Sphinx docs about tvm.ir
new 19a76e69 [REFACTOR][PY][API-CHANGE] Establish tvm.target
new ab80c44b [REFACTOR][PY] Establish tvm.tir
new 85da76ac [CodeGen][CUDA] Fix issues in cuda codegen (#4876)
new 7d7c5f28 [REFACTOR][PY] Establish tvm.te and tvm.driver (#4900)
new 6c2fdbdc Fixed bugs that occured when using bitwise operators on floating point type expressions. Further crash when using ops <<, >>, %. Finally added regression tests for both types of bug. (#4892)
new ea6180a0 [REFACTOR][PY] Establish tvm.arith (#4904)
new 0ef52652 [DOCS] Update API docs to reflect the status after the refactor. (#4907)
new a4a967c3 [REFACTOR] Polish ffi convention. (#4912)
new e5a7ece6 [DOCS] Fix sphinx warnings (#4917)
new 18d62e92 [CODEGEN] Support cuda tensorcore subbyte int data type in auto tensorcore (#4546)
new bf68c0cf [Relay][AutoTVM] Relay op strategy (#4644)
new 6ed8bd28 [LLVM] Fix build breaks from StringRef changes (#4923)
new ad5623c1 Bump up dev version (#4941)
new aee0ba46 [REFACTOR][PY][API-CHANGE] Remove legacy python files. (#4943)
new e64f5d9e [RELAY] fix error message (#4945)
new 8a75ff44 [DOCS] Sphinx -- Introduce alias detection. (#4954)
new d8c08651 Added CopyFromBytes and CopyToBytes convenience methods to NDArray. Fixed typos. (#4970)
new 8b7611f6 [Doc]refine the example description of max/min/sum/tag_scope (#4974)
new c7b71daf [topi][relay] add operation tan to TVM (#4938)
new 0c0fbb32 typo (#5008)
new dadb7dc4 Revive the Rust + SGX refactor (#4976)
new 88cca872 Implemented kDLCPUPinned (cudaMallocHost) (#4985)
new 0e8353a1 Revert "[topi][relay] add operation tan to TVM (#4938)" (#5017)
new b3b37253 [topi][relay] new PR to re-add tan to TVM (#5025)
new 4c8e7c6f [CodeGen][CUDA] Enhance CUDA codegen for SelectNode (#4983)
new bcfd6cea [Intrin] Adding a few missing math intrin (#5011)
new 29f1dc88 [refactor][relay pass] Separate analysis and transform passes (#5035)
new 2bec44fb [REFACTOR] Streamline Function Attr interface. (#5045)
new b0415954 Fixed div by zero core dump. Fixed rounding intrinsics on int crash (#5026)
new 438ba624 [C++] Require c++14 by default (#5056)
new fe55e704 [Bugfix][IR][ATTRS] Fix AttrEqual for Array and StrMap, double (#5054)
new 1432bbce [TIR] Introduce tir::PrimFunc (#5070)
new 916ae39c [TESTS] Triage the testcases to fit the the new namespaces (#5071)
new ef9f9885 [IR] Update the type_keys to reflect the code-org (#5074)
new 26034237 Return empty CSourceModule when no lowered_funcs exists in Relay mod (#4847)
new 2212aad6 [CODEGEN][OPENCL] Explicitly cast min/max operands (#5090)
new 001f9b59 [TIR][TARGET] Refactor Target codegen to use IRModule and PrimFunc. (#5107)
new 4b2dcf52 [TOPI][OP] Use Thrust sort for argsort and topk (#5097)
new 2f9b52c6 [CodeGen][CUDA] Vectorization for intrinsics (#5101)
new 42ca479c [Relay, Topi, TF Frontend] Isfinite operator (#4981)
new edebc7d0 [Bugfix] Fixed bug where shifting by out-of-bounds value results in no compute code being emitted. (#5115)
new bf825055 [Relay] GradientCell Relay Pass (#5039)
new e7aeb226 [REFACTOR][TIR] Introduce PrimFuncPass. (#5139)
new 7db64f0d Handle empty LLVMModule in GetFunction (#5146)
new 4cef7a97 [NODE][IR] Introduce StructuralEqual Infra for the unified IR. (#5154)
new b2b741e1 [NODE][IR] Introduce StructuralHash for the Unified IR. (#5160)
new ea3530cd [REFACTOR][IR] alpha_equal to structural_equal (#5161)
new 5692c082 remove AttrsEqual and AttrsHash related code (#5169)
new 468e6dcb [REFACTOR][TIR] Migrate Low-level Passes to Pass Manager (#5198)
new 12142eae [REFACTOR][TIR] Introduce ExprDeepEqual, Remove IRDeepCompare (#5206)
new 49f8878a [TIR][PASS] dtype rewrite for indexing variables (#5092)
new 4b5a2696 [TIR] Introduce BufferLoad/Store (#5205)
new 97cf59ab [REFACTOR][TIR] Migrate low-level pass functions to Pass Manager, (#5213)
new 6fdff5e8 [REFACTOR] tvm.hybrid -> te.hybrid (#5223)
new 7a22e537 [CodeGen][CUDA] Fix bugs (#5209)
new 304726f5 [PYTHON] Make IntImm more like an integer (#5232)
new 4eb3a08f [REFACTOR][TIR] Migrate most of low-level build to use the Pass Manager. (#5225)
new 21ad02ae [TE] Support mixing normal and cross-thread reduction (#5193)
new dc27cd9b [REFACTOR][TIR] Migrate all low-level passes to the Pass Manager. (#5233)
new df1dfd1e [TIR] Fix perf regression of tir refactor (#5258)
new 2aba2f13 [LLVM] Use llvm::Align with LLVM 11+ to avoid warnings (#5264)
new 939d1948 [LLVM] Use llvm::ElementCount with LLVM 11+ when creating vectors (#5265)
new 0b6ae994 [LLVM] Do not use x86_vcvtph2ps_256 intrinsic with LLVM 11+ (#5267)
new ff9b6da8 [RUNTIME] Implement TVMDSOOp(TensorFlow custom op) for TVM runtime (#4459)
new 5bcb8b82 [NODE] General serialzation of leaf objects into bytes. (#5299)
new ae23c89a [RUNTIME] Initial implementation of Hexagon runtime support (#5252)
new 15549848 [NDArray] Set shape_ in NDArray::FromDLPack (#5301)
new ca90be77 [REFACTOR][IR] Move to runtime::String (#5276)
new 039c4c2b [Arith] linear system and equation solver (#5171)
new 0d79b8ae [CI] Fix the hexagon string (#5304)
new d561c28a [RUNTIME] Introduce RValue reference(move) support to TypedPackedFunc (#5271)
new e0012ad6 [LLVM] Fix generation of LLVM intrinsics (#5282)
new 94cd1fa5 [IR][TRANSFORM] Enable CopyOnWrite for passes. (#5309)
new 328af2b9 Remove PrimExpr from String (#5311)
new d68ffbed [Intrinsic] Add log1p, ldexp, atan2, hypot, nextafter, copysign (#5312)
new f5e868ad [RUNTIME][IR] Allow non-nullable ObjectRef, introduce Optional<T>. (#5314)
new 0ac6876b [CODEGEN][CUDA] Fix vector load (#5226)
new 74f2a51a [TIR] Refactor MakePackedAPI to target dependent stage. (#5326)
new ace9a1d3 [RELAY] Remove re-exports of tvm.transform (#5337)
new c32b6412 [LLVM] Use llvm::FunctionCallee in IRBuilder::CreateCall with LLVM 11+ (#5338)
new 2a194a06 Windows Support for cpp_rpc (#4857)
new 55cb69f5 [PYTHON] Enhance with_attr API, cleanup MakeAPILegacy in testcases (#5335)
new a534c30f [TIR] Remove ProducerConsumer and AllocateNode::new_expr (#5333)
new 0d557410 [Hexagon] Add hexagon_posix.cc to TVM/RT sources in the right place (#5346)
new 051b742c [TIR] Make lower_warp_memory support extent(threadIdx.x) < warp_size (#5307)
new e315ecf3 [TIR][REFACTOR] Migrate low-level passes in tvm.lower to the Unified IR pass manager. (#5364)
new 58179c94 [TIR][REFACTOR] Remove te::Tensor dependencies from TIR passes. (#5372)
new 82af1278 [ARITH] Remove the legacy Simplify, migrate to Analyzer. (#5385)
new dbb761d7 [ARITH] Remove legacy const pattern functions (#5387)
new d9185a93 Fix test_ir_type. (#5390)
new ec8f18df [PTYTHON] Migrate VTA TIR passes to the new pass manager. (#5397)
new 72bb45b8 [LLVM] Use ArrayRef<int> in calls to CreateShuffleVector (#5399)
new b23f4839 [TIR] Enhance Substitute, python bindings for Substitute/PostOrderVisit/IRTransform. (#5400)
new a41345c7 [LLVM] Replace calls to Type::getVectorNumElements (#5398)
new e8bb5b2b Don't remove() TempDirectory in __del__ after atexit hook runs. (#5414)
new a6e87820 [TIR][REFACTOR] Remove ir_pass in favor of analysis/transform. (#5415)
new 7a744cb5 [RUNTIME][CONTRIB] CoreML Runtime (#5283)
new bc462a4e [PY][FFI] Introduce PyNativeObject, enable runtime.String to subclass str (#5426)
new c4847107 misc fixes for ROCm (pointer lifetime, runtime::String refactor) (#5431)
new 07fb6da4 [RUNTIME][OBJECT] Introduce static slots for common objects. (#5423)
new 23926339 [RELAY][PYTORCH]cosh,sinh,log2,log10,log1p op support (#5395)
new 42828e17 [CodeGen] Cleanup generated code (#5424)
new 6815c2e7 Improve IntervalSet's floormod (#5367)
new 8042b3d6 [CODEGEN][CUDA] Fix a bug when vectorized load&store was involved for… (#5428)
new c9867cff [intrin] a few more math functions (#5468)
new da659029 [RUNTIME][uTVM] AutoTVM + uTVM for Cortex-M7 (#5417)
new 6884f0d5 [IR] Initial stab at std::string->String upgrade (#5438)
new 57a5ac65 Make "none" DataType explicit (#5491)
new 40beadff Link necessary libraries when building runtime for Android (#5496)
new 2a40d250 Fix Canonical Simplifier (#5505)
new 9aa4cde2 [REFACTOR][RPC][PROCOTOL-CHANGE] Modularize the RPC infra (#5484)
new dc56de80 [RUNTIME] Improve PackedFunc robustness (#5517)
new b2b9da18 Cache PrimExpr instead of raw pointers in bound analyzer (#5533)
new 5ef1866e [WEB][RUNTIME] TVM WebAssembly JS Runtime (#5506)
new 73bdd052 [Refactor][std::string --> String] IRModule is updated with String (#5523)
new 81e1a13e [TIR][Printer] text format printer considering future parsing use (#5483)
new a9e6dd60 [Optimization] Warp level reduction support for CUDA (#5498)
new 4e7b0905 [WEB] WebGPU support (#5545)
new 6fc2c792 [RUNTIME] Hexagon driver for offloading kernels to simulator (#5492)
new b67b2b66 [LINT] clang-format the h,cc,m files. (#5557)
new 2eb7cb13 [Refactor][std::string --> String] IR is updated with String (#5547)
new ea4454d7 [TARGET] Phase out WebGL (#5570)
new c9c10cc6 [LINT] Enable clang-format. (#5572)
new 92079c07 [Hexagon] One more fix for concurrency count (#5589)
new 7c2e23a0 [TFLite Runtime] Fix bug and re-enable RPC execution test (#5436)
new 8956adcc [Relay][VM] Memory planner (part 1) (#5144)
new f9330239 [Reduction] Fix cross thread redunction (#5551)
new 2900083a [LLVM] Represent alignment information in LLVM IR (#5598)
new 950e2b14 Add debug mode to tempdir() (#5581)
new 5478c149 [REFACTOR][IR] Streamline ir/op Registry (#5609)
new 9026951a [CUDA] Fix codegen for warp shuffle intrinsics (#5606)
new a6297376 Fix a typo. (#5611)
new bec5ff5c [Relay][Refactor][std::string --> String] Relay updated with String (#5578)
new 8bda6587 Fix three typos (#5620)
new fcf89b4e [NODE][PASS] Introduce config to PassContext. (#5631)
new b5946700 [Runtime] Introduce runtime::Array (#5585)
new 2d605479 [REFACTOR][IR] Migrate IRModule ObjectRef to not-null (#5654)
new bf16a2fb [TIR][BUILD] Remove buffer params from pass config. (#5652)
new b0939325 handle likely in IRMutatorWithAnalyzer (#5665)
new 1a780954 [TOPI] Improve CUDA softmax scheduling (#5600)
new a5ec5925 [Relay][Op]Support symbolic TopK, Ones, Zeros and Full (#5459)
new c2b9a170 [REFACTOR][TIR][API-Change] Migrate BuildConfig to PassContext. (#5668)
new ecbb88b0 Call previous excepthook in tvm_excepthook. (#5675)
new f9850eef [Bugfix] Fix Python debugger segfaults with TVM built with LLVM (#5685)
new cc8bbe47 [TIR][REFACTOR] std::string -> String Migration in TIR nodes (#5596)
new 08f15c24 [REFACTOR][RELAY] move fallback_device to config (#5690)
new 53e76d25 [REFACTOR][RELAY] Replace build_config with PassContext (#5698)
new a65f31be [Arith] ExtendedEuclidean merge impl to int_operator (#5625)
new e2f7bba5 [REFACTOR][PY] relay.op.Op -> tvm.ir.Op (#5705)
new 87d937bf Remove deprecated opengl files (#5711)
new 628ebf42 [Object] Unify StrMapNode and MapNode (#5687)
new 00cc4d25 [Object][FFI] Introduce runtime::String::CanConvertFrom (#5718)
new c7da19a5 [Object] Restore the StrMap behavior in JSON/SHash/SEqual (#5719)
new 218b2f80 Fix generating types like float44 and float88 (#5722)
new 508d9123 Fix runtime::String backward compatibility in JSON (#5725)
new 3158c51a codegen llvm: move nvptx-specific intrinsic handling into codegen_nvptx (#5726)
new 1c89c1e6 [REFACTOR] Separate ArgTypeCode from DLDataTypeCode (#5730)
new 67210909 ROCm: Add warp shuffles and enable reductions (#5727)
new e3c99294 [REFACTOR][ARITH] Remove legacy compute_expr.h (#5738)
new 5760e793 [REFACTOR][TE][TIR] Call::Halide => ProducerLoad, DSL/TIR decouple. (#5743)
new c5d25b06 [ARITH][BACKPORT-0.6] fix a min/max simplify bug (#5749)
new 1b1c28b4 [REFACTOR][TIR] Provide->ProducerStore, Realize->ProducerRealize. (#5750)
new 8a3e4223 [Rust] Second stage of Rust Refactor (#5527)
new b379d3a9 [TIR][REFACTOR][API-Change] Migrate the tvm/tir/expr.h to construct style. (#5773)
new cc98b883 [TIR][REFACTOR][API-Change] Migrate tir/stmt.h to use constructor. (#5778)
new e9a2a0be [RUNTIME] Add compile_shared option to linux compile utility fn (#5751)
new 564a42a6 [REFACTOR][API-Change] Migrate all Object construction to constructor. (#5784)
new 602b5cea [CODEGEN][CONTRIB] CoreML codegen (#5634)
new 502760ba [cmake] update vulkan rules (#5777)
new d4d14906 [TIR][REFACTOR] Cleanup unused classes (#5789)
new e015744c [TIR][REFACTIR] Update TIR nodes std::string->String. (#5793)
new 3c3301c5 [TIR][REFACTOR] Add tir prefix to type keys (#5802)
new 4c7c6f89 Error msg update (#5818)
new ae016870 [RUNTIME][String] Overload string operators (#5806)
new 8e2842d7 [RUNTIME] Introduce MetadataModule to separate code compilation/interpretation and weight initialization (#5770)
new 53c2f19a Additional canonicalization added for AddNode (#5846)
new 5ed0dd8b [FIX] Recover global state after test_util.py (#5824)
new e29c7de1 [Object] Introduce POD-C Compliant tvm::Map (#5740)
new 19f9a1a8 [DataType] Add bfloat16 (#5601)
new c28da31f Fix map assign issue in CI test (#5854)
new c84295ae [Target] Introduce Target Id Registry (#5838)
new 0d13540c [Bugfix][Build] Fix building with LLVM-10 on macOS (#5859)
new 132e6e44 [TIR][REFACTOR][API-CHANGE] Change Call.name to Call.op(RelayExpr) (#5863)
new 216c3c8b remove fatal (#5888)
new 3d39c011 [Relay]Allow every runtime module to handle constants (#5885)
new 44d9b5b2 Fix the python intrin rule (#5895)
new 11883085 Add Binary Intrinsic ops to TIR Ops in C++ (#5900)
new bcecc3fe Allow implicit conversion in TVM FFI to tvm::Bool (#5907)
new daa0e854 [TIR][REFACTOR] Deprecate FreeStmt (#5890)
new 9bb231d6 [Thread Backend]Fix CPU Thread Binding for Multiple Sockets (#5918)
new f389b613 CUDA device API & VerifyGPUCode pass update (#5898)
new 133a4bf4 Two small fixes to AMDCPU codegen for LLVM 10+ and ROCm 3.5+ (#5920)
new 761c7e56 [BACKPORT-0.6][Bugfix][Arith] keep div_mode during floordiv simplify (#5922)
new a4c04b95 [Arith][GPU]Rewrite simplify fix for Vectorized Cooperative Fetching (#5924)
new 181f5309 [TIR][OP][API-CHANGE] Remove CallNode.call_type in favor of attribute. (#5937)
new 0f4dac16 Update date in the NOTICE (#5942)
new 347f7338 [TIR] Improve Let/LetStmt support. (#5949)
new d0ef0915 [REFACTOR][TIR][API-Change] Range/IntSet API style consistency. (#5953)
new f6471fd2 [BUGFIX] Add cuda 11 to contrib.nvcc.find_libdevice_path() (#5902)
new ebb87eae [TIR][ANALYSIS] Refine side effect analysis. (#5954)
new f04e7ab7 [OpenCL] Fix OpenCL get_valid_counts errors due to intrinsic atomic_add (#5857)
new 8f775e9f [LLVM] Remove redundant function CreateBufferVecPtr (#5982)
new c38055e3 [Target] Migrate data structure of TargetNode (#5960)
new 792b3c49 [LLVM] VectorType::get with two parameters is deprecated in LLVM 11+ (#5984)
new 170c83e2 [Target] Use TargetNode::attrs for Target serialization (#5993)
new 524addc5 [Arith] Inequalities solver (#5618)
new 39359494 Undefuned names: import os for line 324 & import re for line 308 (#6003)
new f1289379 [LLVM] Auto-convert shuffle with single index to "extract element" (#6006)
new a99bf1b0 [Frontend][Relay] Add Parser 2.0 (#5932)
new 50102d53 [TARGET] each option of target str should only contain one '=' (#5988)
new c0f45084 [LLVM/CPU] Terminate basic block after "ret" instruction (#6036)
new 87d6413e µTVM CRT modifications for on-device RPC server (#5921)
new 92b5b865 [CODEGEN] Fix code generation bugs for C/CUDA & Improve VerifyGPUCode pass (#6041)
new 7c1aa066 [LLVM] Create TBAA information based on the unrelying buffer type (#6046)
new ffa62097 [IR] Fix a primitive check error (#5991)
new 6644546c [Ansor][AutoTVM v2.0] Part 0: Ansor minimum system for auto schedule generating (#5962)
new 73066a5d [RUNTIME] Support module based interface runtime (#5753)
new 1feec56a [Ansor][AutoTVM v2.0] Part 1: Rename namspace form auto_schedule to auto_scheduler (#6059)
new 5709c38e [TARGET] ONNX codegen (#5052)
new ed50cb43 [clflush] Enable x86 cpu cache flush (#5914)
new efe5580f Fix error message in Buffer::vstore, NFC (#6056)
new b3ad26f8 [ARITH] Improve vector simplification for float operands (#6043)
new 761c51bd Fixed point multiplication improvements for AArch64 (#5980)
new 2535fb3c [DSL/TE] Scalar support for `te.extern` (#6079)
new 43235324 [Cmake] Add default value for option USE_DNNL_CODEGEN in the cmake (#6099)
new 480d4317 [BYOC][Contrib] Arm Compute Library integration (#5915)
new 9f8a219e add attr option mfloat-abi for arm32 (#6123)
new 2b00ec69 [TIR][Bugfix] Improved massive build times caused by tir.floormod and tir.floordiv. Fixed Topi testcase. (#5666)
new 338daf8e [BYOC] Retire the example json runtime (#6177)
new b9a327ec [REFACTOR] topi -> tvm/topi (#6186)
new d42364c1 [BUILD] Remove libtopi from the build (#6189)
new 6e82666c [Fix] avoid unexpected throw in AttrInitEntry (#6128)
new ea8b05f0 [TIR][Transform] HoistIfThenElse added (#6066)
new 3ec59fca [Target] Rename target_id => target_kind (#6199)
new 5c4a2cf6 Fix compile warnings. (#6204)
new fc1e394b [Target] 64-bit RPi4b target (#6211)
new 346ea5be Pass mfloat-abi to LLVMModule::Init (#6150)
new dad0d8c4 [µTVM] Add --runtime=c, remove micro_dev target, enable LLVM backend (#6145)
new 78a99bca [uTVM] fix crt building and running error (#6231)
new 0f9f17fc [TIR][Hybrid] Hybrid Script Support for TIR (#6227)
new 21cc7c35 fix cuda half math function is undefined: hpow, htanh (#6225)
new e169e06c [Topi,x86] Split MKL from BLAS. (#6182)
new 653a6653 [RPC] Update build support for cross compiling apps/cpp_rpc with OpenCL (#6229)
new a2ed0416 Fix division range estimation error in simplifier (#6244)
new 8c21a7cc [Parser] Parser 2.0 part 2 (#6162)
new c2d35452 Revert "fix cuda half math function is undefined: hpow, htanh (#6225)" (#6249)
new 8e3f83bd fix cuda half math function is undefined: hpow, htanh (#6253)
new 431e1814 [TESTS] Decrease test times by introducing testing model (#6235)
new 4e289724 [Target] Creating Target from JSON-like Configuration (#6218)
new 3a15ab2b Improve error messages for memory verifier and gpu memory verifier (#6281)
new a613eb5a [Build] Reflect Compile-Time CMake Options into libtvm.so (#6280)
new 93c9576e [Build] Add cmake options into libinfo (#6286)
new 2ad63a6c [TOPI] Support int4/int8 conv2d tensor core with HWNC layout (#6121)
new b60d4779 [RUNTIME][REFACTOR] Use new to avoid exit-time de-allocation order problem in DeviceAPI (#6292)
new 9fb4b5b2 [Autodiff] Optimize and eliminate the Jacobian tensor for te.autodiff (#6078)
new f363ab19 Add tvm::support::hexdump() debug utility (#6154)
new 5487c3e0 [Hexagon] Initial support for Hexagon codegen (#6261)
new 55f8b996 [BYOC][ETHOSN] Introduce the Ethos-N BYOC integration (#6222)
new e69d7d08 [Target] Add python binding to new JSON target construction. (#6315)
new 063fe473 [TIR] Enforce buffer pointer var type to be consistent with dtype. (#6317)
new eeb457a9 [Relay] Make check stricter: disallow inserting function with free vars into module. (#6313)
new bc7b5791 [MSVC] Make able to compile with MSVC (#6341)
new 08521d35 ROCm changed name of library and removed old one in ROCm 3.7 release. (#6345)
new b22d8b70 Add `init` member to ReduceNode (#6138)
new 9ba65485 [CMAKE] Compatible for ROCm before 3.7 (#6359)
new eed84bdc [Target][Codegen] Use target class in all codegens (#6347)
new 04358071 [TIR][Transform]Block scope hoisting added (#6238)
new dd9b1453 [Relay] support i64 indices (#6143)
new 1b91f78e [TESTS] Refactor tests to run on either the GPU or CPU. (#6331)
new 69a7cdeb [RELAY][VM] Enable heterogeneous execution for Relay VM (#6337)
new ee93e071 [METAL] Use CFBridgeRetain for retaining the allocated resource (#6393)
new 57f4ab15 Remove unintentional pytest dependency. Fix #6398 (#6399)
new a9d23e8a [TESTING] Fix the error when running tests with default targets (#6394)
new d77b1b41 [METAL] set MTLBuffer purgeable state (#6376) (#6438)
new f5b8daf9 [Target] Tags, Composite Target, Unified Interface (#6369)
new f48f8d64 CUDA: broaden path detection (#6444)
new 5c77b931 ROCm: use GcnArch for mcpu and ApiVersion to select code object version (#6447)
new 83a72185 [Format] Convert all Python code w/o CI (#6448)
new 0cdc9fec [TEST] Fix Some Failed Test Cases and Tutorials of The Issue #6453 (#6454)
new 7f1a50ee [WINDOWS][MSVC] Fix MSVC warnings (#6450)
new 6535ff3f [CMAKE] Improve FindLLVM to handle llvm-prefix with space. (#6466)
new dfc19159 [RFC][Formatting] Add scripts for applying Black to the Python code. (#6437)
new a2866bd0 µTVM RPC server and Part 1 of AutoTVM compilation infrastructure (#6334)
new 14729132 [FIX] Save tensor size with alignment (#6487)
new 923278cd [PY] GraphRuntime: Update the tutorials to the module-based interface (#6482)
new 56b81f4d black format master (#6494)
new 75ef9153 extending FindVulkan to build RPC server on Windows correctly (#6498)
new bb92bfb3 Switch CRC-CCITT libraries (#6499)
new d71fdc62 [TIR][Hybrid] Hybrid Script Improvement (#6507)
new 97b071d7 Add beagleboard ai, thunderx and stm32mp1 to the arm_cpu target. (#6501)
new a892c206 [LINT] Use fmt off to disable problematic black fmt (#6519)
new 45bd42c1 Enable more warnings when compiling with clang 10.0 or greater (#6456)
new 06ac3d84 fix libtvm build dependencies when USE_MICRO is ON. (#6524)
new 2beb1f79 Add the SYSTEM keyword to all cmake include_directories commands for 3rd party or external headers. Warning flags should only be applied to code within the tvm repository. (#6531)
new e0c2fd06 Add alternate cublaslt library name. CUDA 11.0 uses cublasLt. (#6541)
new 8c906c9b Generalize the use of booleans to support all cmake boolean values. (#6515)
new 4c551038 [TIR] Fix rewrite_simplify tir::builtin::shift_left (#6555)
new 8e000c2a Add proper cmake PATHS when multiple NAMES. (#6558)
new ae599e31 Make CMakefile/config.cmake/install_tvm consistent (#6562)
new 86646798 Rename tvm.hybrid.script to tvm.script. (#6522)
new c82301d9 Bring Your Own Datatypes (#5812)
new 61411dd1 [BYODT] fix CMAKE flag name + update documentation (#6567)
new 9a2f5cd8 [RUNTIME] NDArray CopyFrom/To Bytes always synchronize (#6586)
new 47c55a7c dynamic conv2d for cuda (#6598)
new 96643a87 [Parser] Fix parsing op string attributes (#6605)
new c8f3280e [RELEASE] Bump version to 0.7.0 (#6614)
new 1b9717c7 Updated runtime to run under FreeBSD. (#6600)
new ffdb2fff [VERSION] Version for v0.8 cycle (#6615)
new e64bb6e9 [Rust] Improve NDArray, GraphRt, and Relay bindings (#6563)
new 3f328455 [µTVM] Avoid use of builtin math functions (#6630)
new ce448669 [Diagnostics][Relay][InferType] Refactor InferType to work on whole module, and use new diagnostics. (#6274)
new dc1b894b Faster sparse_dense on GPUs (#6580)
new 79dd5439 [CI] Move to use main as the default (#6665)
new 3c33a880 don't validate AttrInitEntry until a value has attempted to be set (#6672)
new 7cb98925 [ARITH] Introduce iterator (quasi)affine map detection. (#6667)
new ad1a061f [REFACTOR] util => utils for consistency in the project. (#6684)
new f720ecb6 [FIX,MICROTVM] Skip microtvm tests if microtvm is not built (#6693)
new d227c82a [LLVM][WINDOWS] Recover windows support for the latest LLVM (#6698)
new 757fa1bd [PYTHON][WINDOWS] More robust dll loading behavior after python3.8 (#6707)
new 02c4a1b3 [CI] Update docker to latest (#6708)
new 4896cbb3 Fix the Type bug in ConvertSSA. (#6709)
new a43db493 [BYOC][TensorRT] TensorRT BYOC integration (#6395)
new 6039b852 [TVMScript] refactor (#6734)
new 18e082e1 [FIX,CMAKE] Use set_property with append flag instead of (#6725)
new daa6703b [LLVM] Create fixed vector size according to latest LLVM12+ changes (#6717)
new 6f19598f [LLVM] Avoid warnings when compiling getNumElements with LLVM12+ (#6738)
new 80db13b1 Update include and src dir CHECK* to ICHECK* (#6745)
new 5b7b9147 [CI] Introduce all platform test for windows/mac/linux. (#6756)
new 9ca697bc [ARITH] iter_affine_map bug fix, stride generalize (#6753)
new 2c8bdeec More CHECK to ICHECK (#6758)
new 047e9ba7 [LLVM] Add target feature string to function attributes (#6763)
new 589ec100 [ARITH] Tight bound for floormod (#6771)
new a58a8cb4 [REFACTOR] Remainings of util => utils (#6778)
new 28f094c7 fix a bug in convertSSA. (#6785)
new 750452a9 [QNN] Optimize requantize for power of 2 and fix dequantize for per-channel quantized input (#6675)
new 11bc4881 [FIX,AUTOSCHEDULER] Fix auto_scheduler to run with multiprocessing's spawn start method (#6671)
new 15590860 [µTVM] Add serial transport, parameterize µTVM Zephyr test, run on physical HW (#6789)
new 0ec9b53c [CI] Add m6g instance (ARM64) to mainline CI (#6804)
new 904e8578 [OBJECT] Update types slots for baseexpr and primexpr (#6814)
new c60ba810 [Rust][Diagnostics] Add initial boilerplate for Rust diagnostic interface. (#6656)
new 4570eb30 [µTVM] Add virtual machine, test zephyr runtime on real hardware (#6703)
new a5dd0fbb [Rust][IRModule] Flesh out IRModule methods (#6741)
new f76436de [TVMSCRIPT] Using diagnostics for TVM Script (#6797)
new 493c056f [Bugfix][Module] Fix recursive GetFunction in runtime::Module (#6859)
new dd52f1f5 [BYOC][CONTRIB] Vitis-AI codegen integration (#6343)
new 016d8011 Update search for bitcode files for rocm 3.9 (#6865)
new f87ce8bc Do not show meta-data when printing IRModule (#6881)
new a794ee86 [GCC] Fix GCC8.1 and GCC8.2 template dispatch compilation issue (#6893)
new e8ae03d3 Fix bug of generate-unmatched-brackets in CodeGenC::PrintSSAAssign (#6887)
new 2f5605d2 [TIR] Add spans to all ExprNodes (#6860)
new dd9dd88a Fix edge cases in const_int_bound and fold_scale_axis (#6911)
new 14852f1b Consolidate RPC Context helper functions (#6915)
new dfb9a423 [DOC] Fix typo (#6920)
new 9c0809c9 Fix code to work with cmake 3.2 (#6952)
new 12c9d2bb Fix #6954 uTVM, fix when building the runtime for native hardware (#6957)
new cab6a14e Add Relay option to link parameters into runtime Modules (#6917)
new b0911e3f [Hardware][Verilator] Integrating and simulating hardware accelerators in TVM (#6971)
new 9ce848df [AutoScheduler] Support layout rewrite for whole networks (#6987)
new 0d8bfd11 [Diagnostics] Add environment variable for controlling top-level printing and fix issue with pretty printing/parsing roundtrip. (#6874)
new fb3b8560 Add version 11.1 in finding CUDA libdevice (#7033)
new 59d7d7a8 [TVMSCRIPT] Attach span information to tir nodes in tvmscript (#6910)
new a62da087 [LLVM] Support atomic for GPU backend (NVPTX, ROCm) (#7051)
new 9bc1c3af [TOPI] GPU scatter 1D via sorting based approach (#7056)
new 19af07d0 fix nvcc compile option to be compatible with older cuda (#7065)
new 57c630f2 [FIX] Improve error messages and docs (#7064)
new c10b12ef [FIX] Remove debugging print statement (#7072)
new 613ad112 [Relay][Strategy] Allow cuda cross compilation without physical device. (#7063)
new b435d227 Rollback changes to SSA begin/end scope for Store in (#7073)
new 43b86c80 [metal] support int64 (#7105)
new 0d454e28 [metal] update language version (#7116)
new 26331146 [metal] Remove support of `double` type (#7118)
new 65c28dcc [CONTRIB] PopenPoolExecutor (#6959)
new 883a0d47 Fix a few OpNode argument field descriptions when registered (#7140)
new 0bd7fdac Created CSourceMetaData module for model metadata (#7002)
new b464fc91 [AutoScheduler] Add layout rewrite support for dense and batch matmul on CPU (#7161)
new 5d07ef26 [AutoScheduler] Fix the conflict of thread pool in measurement (#7166)
new 5ac1fc3a [FIX] Fix using num_workers in omp (#7078)
new b23414ce [TIR][REFACTOR] Enforce allocate to use the correct var pointer hint. (#7216)
new bf080527 [Arith] Simplify cast (#7045)
new 9ca7a3e2 Change the all #pragma once to ifdef include guard (#7264)
new aefef066 fix mcpu on os x (#7276)
new 5dc2a7f4 [TIR] Support Return in TIR (#7084)
new dc79f52a [TIR][REFACTOR] ForNode introduce thread binding and remove legacy field (#7306)
new 15629ffe [TFLite] Strided slice handling of shrink_axis_mask improved (#6998)
new 74759752 [TOPI] Rewrite GPU argwhere using exclusive scan (#7314)
new ab5782cd [CMake] use wrong flag name (#7341)
new f14fb6df [FIX] Don't add $TVM_HOME/.. to the include path when compiling code. (#7342)
new 1469a55d Update uTVM code to work with the nRF5340DK dev board. (#7331)
new 88c01ef6 Improve op_type missing message (#7384)
new 94efca53 Fix missing round(), floor(), ceil() for target C lowering (#7382)
new 22b8ef45 [FFI] Improve error messages when array/map types do not match in function calls (#7330)
new f6476367 Add cuda tags and unit test (#7410)
new 8bdc9851 [FIX,CMAKE] Only compile runtime files once (#7417)
new e4cdb46a [FIX,CMAKE] Only set Clang flags for C++ files (#7424)
new 842f3727 [Arith] Fix iter_affine_map with non-const extent (#7437)
new 76731c7c Make the TVM targets list available in Python (#7427)
new e1456494 update stm32mp1 arm_cpu target configuration (#7443)
new cb4ce233 [ROCM] Add Thrust support (#7458)
new d5467a98 [RUNTIME] Fast path for single thread run to allow app level threading (#7454)
new a3f213e6 [TIR] Specialize MutateArray in StmtFunctor. (#7486)
new 22d0f453 Fixed minor misspelling (#7499)
new 36756c39 [Target] Add target host field for target specification (#7462)
new 5bbb89ec [CRT] Create C-runtime-style metadata module for llvm builds (#7398)
new 2801f996 [DOCS] Remove incubating from docs (#7525)
new 4284e6a2 [PYTHON] Enable proper error message in python package (#7521)
new 3b8843ef Many fixes to get unit tests passing on Windows. (#7431)
new 1cd58d11 [CI] Move ci-cpu to use llvm-11 (#7541)
new ceb18b73 [Runtime] Special Memory Scope Support (#7488)
new fce7a7b0 [TensorIR] introduce Block and BlockRealize (#312) (#7553)
new 05ceb773 [Codegen][CUDA] Fix: cuda codegen vectorize cast (#7561)
new b50a3860 [Pass] Profiling TVM compiler passes (#7500)
new e99acbc6 [TIR] Add TIR While node (#7425)
new 086b8d4f [SPIR-V] Add SPIR-V lowering for While node (#7574)
new 75546495 [RUNTIME] Move Map into runtime (#7570)
new df0ec77f Fixes for using Python APIs from Rust. (#7085)
new bf97ee18 [SPIRV] Support Bool buffer argument (#7591)
new 6b6aa7a1 [Vulkan] Support passing 64 bit scalar (#7572)
new f4c0a3ff [RUNTIME] Add device specific timers (#7472)
new 6a9013b1 [CUDA] BF16 support (#7014)
new aa2b082b [RUNTIME] Unify load params interface (#7559)
new 1333a797 Added MaybeAlign to CreateAtomicRMW calls to fix build for LLVM13 (#7617)
new f669706d Prevent host Vulkan SDK blocking cross-compilation (#7609)
new ebd3dc7f Allow cuDNN in non-CUDA non-system dir (#7608)
new c4f3f49f [SPIR-V] Fix pushconstants offset calculation for 32 bit values (#7620)
new 7aa01885 Introduce Model Library Format export format (#7533)
new 848e87e2 [CUDA][TOPI] Fix CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES with NMS for certain GPUs (#7623)
new e649f987 [TIR] Add PreOrderVisit and VisitPrimFuncs (#7627)
new 126033c3 [MIPS] Fix CALL16 reloc at 0x290 not against global symbol (#7634)
new 39eff133 Introduce Apple BNNS backend (#7299)
new 7d36f660 [PROFILING] Combine USE_VM_PROFILER and USE_GRAPH_RUNTIME_DEBUG into a single flag USE_PROFILER (#7637)
new 697003da [TOPI][GPU] Mergepath sort with odd-even block sort (#7611)
new 35f503a3 add nvcc support (#7668)
new 8db99685 [SPIRV] Declare int64 capability by default (#7681)
new 81391ad0 [Runtime] Extend Graph Runtime To Support Cuda Graph Launch (#7616)
new e048585c [RUNTIME] Add libbacktrace for backtraces with line numbers (#7153)
new 00fb8947 [RUNTIME] Cleanup build for libbacktrace (#7706)
new 1c0b7c57 [TensorIR] TVMScript Parser/Printer (#7630)
new 1003826b [TensorIR] add TIRTextPrinter support for Block and BlockRealize (#7716)
new 5abb6982 [METAL] Fix memory leaks in Metal runtime (#7714)
new e8481e9b [TensorIR] Fix parser autocompletion mode (#7737)
new 268f9320 [Refactor] Rename TVMContext to Device (#7721)
new 20b5a8a1 [RUNTIME][WEB] Cleanup logging for web runtime. (#7750)
new 43e754af [ARITH] detect iter affine map with predicate (#7752)
new 20dcb41b [Logging] Bring back the stack size optimization (#7756)
new c0f7208d Clean up uTVM demo runtime, add ONNX model test and tutorial (#7557)
new 63e55bdb [ARITH] normalize iter affine map expr to PrimExpr (#7759)
new 9835549e Rename GraphRuntime to GraphExecutor (#7653)
new 91e733dd [ONNX] Enable GPU in ONNX importer tests (#7438)
new 958686ca Add support for using the VM across the RPC boundary. (#7746)
new fdc1afe0 [Target] Add support for target object with host field compatible with previous api (#7534)
new ed8309b8 [PYTHON][RPC] Make rpc proxy jupyter friendly via PopenWorker. (#7757)
new 8e028f78 [CodeGen][OpenCL] Limit OpenCL built-in vector lanes to 2, 3, 4, 8, 16. (#7777)
new c1632f5d [ARITH] Subspace division (#7760)
new 9cc84152 Fix compilation errors with clang 11 (#7783)
new 3da13c9a [Hexagon] Reenable compilation of TVM runtime for Hexagon (#7784)
new 62c5b0e9 [Target] Fix empty target and host for autotvm task (#7791)
new b7849ed6 [FIX] tvm.testing.parametrize_targets documentation for arguments does not match what it is acutally using. (#7778)
new c3038985 [M1b] Scaffolding ScheduleState data structure (#7765)
new ea2402f2 introduce pass lower_init_block (#7806)
new ac415eef [Vulkan] Support uniform buffer object for passing many scalar arguments (#7717)
new 00712bf2 Revert "[Vulkan] Support uniform buffer object for passing many scalar arguments (#7717)" (#7821)
new 6c762e41 [BugFix] Fix the race condition issue of packed func. (#7246). (#7619)
new e89a7184 Fix Metal accuracy problem caused by <dtype>3 vectors usage (#7830)
new 1b2dfbf0 [µTVM] Add support for mps2_an521 board (#7813)
new 91fd3f4d [TensorIR] [Script] adding support for opaque block (#7829)
new d67a1cd8 Misc. improvements to documentation/build setup for first-time builds. (#7840)
new 3562f4fb Fix typos in comments (#7862)
new a05c76b2 [Vulkan] Support uniform buffer object for passing many scalar arguments (Take 2) (#7833)
new 5933506e [TIR] Add a new intrinsic count leading zeros for LLVM and SPIR-V (#7825)
new 1ce952d4 [TensorIR][M1c] LCA detector (#7848)
new dd66d202 [METAL] Fix issue with GPU fails (#7819)
new 5aa41b63 [TensorIR][M1b] Schedule class (#7847)
new 0ede3526 [TIR] An analysis pass to calculate workspace size for primfuncs (#7859)
new 39618d31 [TensorIR][PASS][M1c] PlanUpdateBufferAllocationLocation (#7873)
new 6208c0d8 [VTA][OpenCL] intelfocl (#6126)
new 3313a344 [PROFILER] Add CSV output to profiler (#7797)
new e42c8e8b [RPC][REFACTOR] Use PopenWorker to handle RPC Server. (#7889)
new 73e9fb7f [Runtime] Driver version + consistent clock speed units (#7867)
new 4def45b9 Update ICHECK error message with link to documentation page. (#7869)
new d0ce2875 Remove unnecessary bracelet around make_int (#7907)
new ad8d47b7 [Target][Lowering] Update Op Intrinsic Lowering Mechanism And Intrinsic Lowering Pass (#7809)
new 6614fd3b [TIR][SPIR-V] Fix computing clz on int64 input for vulkan (#7913)
new f3852da8 [CodeGenC] Fix bugs when calling extern functions (#7911)
new a5afe848 [TensorIR][PASS] CompactBufferAllocation (#7923)
new aa7c3f8f [RUNTIME][BUGFIX] Fix DSO module problem when its parent get destructed. (#7918)
new c01e7b94 [TIR][TRANSFORM] Return value support in tir.tvm_call_packed (#7932)
new cfe1f974 [AutoTVM] [TOPI] Support AutoTVM for int4 tensorcore (#7831)
new 63a1cf5b [Target][Legalization]Add Tir Level Legalization Function Registration And Update Intrinsic Lowering Pass (#7936)
new f737b5e7 [OpenCL] Refactor cl_program generation (#7834)
new b88bba10 Replace 0.0.0.0 with 127.0.0.1 for client connections (#7766)
new 71666f26 [NVCC] Bugfix nvcc command tool that relies on the compile time env (#7964)
new 8ab4de65 [Codegen] Fix assertion errors in llvm backend when using llvm debug build (#7959)
new 13931c1f [Graph Executor Debugger] Fix parameter dump (#7903)
new fd605d34 [TensorIR][Pass][M1c] FlattenBuffer (#7962)
new aeb5f986 [RPC] Make tracker jupyter friendly (#7961)
new 86c0adaf [Vulkan][Runtime] Uniform buffer bugfix, minor cleanup (#7966)
new 37284628 [AOT] Introducing AOT in TVM (#7785)
new 3cf522c1 [DLPACK] Support the new python array api with DLPack (#7993)
new 82d68d0d [RELAY] Enable registering op with python (#8002)
new 569ec21a [Vulkan][Codegen] Spir-V codegen, correct labels/blocks in WhileNode. (#8013)
new 5eaaf2b9 Rename gpu to cuda, and bump dlpack to v0.5 (#8032)
new 6d4a82e7 Rename gpu to cuda in java/rust/typescript (#8036)
new fd558c67 [uTVM][AOT] Adding workspace byte alignment (#8019)
new 05787309 [RUNTIME] Improve signal handling in python env. (#7919)
new d5502375 [Tests] Fix requires_gpu (#8050)
new 4d683fe3 [TensorIR][M1c] Lower and build TensorIR (#8044)
new 30ee8f87 [METAL] Fix codegen for inf and erf (#8054)
new c11eaa19 allow module exits without del (#8063)
new 54a5ee7b [IR] Add storage scope to PointerType (#8017)
new 29614e1e [Vulkan] Broke out implicit device requirements into SPIRVSupport (#8048)
new e149efae Add flag to build static version of TVM runtime (#8059)
new 2da1365d Custom dyld linker for iOS mach-o executable files (#7875)
new 23e23f4f [AOT] Remove lookup parameter function in AOT (#7988)
new e5b47f11 [Vulkan][Codegen] Added spvValidate check after vulkan shader generation (#8098)
new cb2e73f3 [Refactor] Rename asnumpy -> numpy in NDArray (#8083)
new 58acca11 [Vulkan] Remove some interface block decoration (#8102)
new fb9d22de Add a default warp size 1 for vulkan and opencl (#8109)
new 07be31bc [TensorIR][M2a] Verification of cached flags (#8114)
new 74f72398 [METAL] Split kernels and compile them separately (#7980)
new c217b91d [TensorIR][M2a] Structural Error Reporting (#8121)
new 66da8f79 [Vulkan] Add device capabilities to Target, use in codegen (#8127)
new 8b6b97f8 [Codegen][CUDA] Fix make_int4x cuda codegen vectorize (#8137)
new 3067b117 [microTVM] AOT Demo (#8075)
new ab34347b [IR][Pass][Instrument] Pass instrument framework (#7952)
new cc4b7bf8 [Vulkan][Refactor] Split out vulkan.cc into separate distinct functionality. (#8157)
new 2e8cf5ef [CMake][Minor] Update CMake warning flags (#8152)
new 687d1bd3 [Vulkan][Docs] Minor updates following Vulkan target query. (#8151)
new 6df2d4f1 [Vulkan] Remove dependency on Target from -from_device functionality. (#8171)
new e2358a01 [Vulkan][UnitTests] Compatibility fix for test_vulkan_unique(). (#8186)
new 26e7be96 [Vulkan] Corrected typo in Vulkan capability error messages. (#8187)
new d31bf56d [Vulkan][Refactor] Pull out vulkan initialization into VulkanInstance and VulkanDevice (#8188)
new 599f734f Complete register op from python (#8079)
new 8dd3b141 [Codegen] Use "target.build.$TARGET_KIND" for all codegen functions. (#8071)
new 277b543e [METAL] Fix the rest memory leaks in Metal runtime (#8175)
new 71a28cfd [CMake] Add compile-time check that libtvm_runtime.so has no undefined symbols. (#8178)
new 660a3bc0 [AOT] Initial implementation of --unpacked-api (#8023)
new 956f75e0 fix py files (#8194)
new dc49259d [Texture support][Part 0] Device API and runtime support (#7711)
new 786a1a8a [RUNTIME][REFACTOR] Re-organize Containers into SubFolders (#8183)
new 604f76db Add thread_warp_size for Metal device in default target attributes (#8202)
new ddda33ad Expose list of PassContext configurations to the Python APIs (#8212)
new 22b0302b [RUNTIME] ShapeTuple Container (#8200)
new 129778c8 Add metadata information to the listing of PassContext configuration listing function (#8226)
new 74edf7d0 [LLVM] Fix CodeGenLLVM::LinkParameters (#8213)
new 787864e9 [Vulkan][Refactor] Move ownership of per-CPU-thread objects to VulkanDeviceAPI (#8196)
new 97e59e7f Unify Python and C++ TIR lower API (#8110)
new 8fda85c6 [BUG FIX] Add _type_has_method_sequal_reduce to Span and SourceNode (#8248)
new 8d16a70e [Target] Allow 'true' and 'false' strings in conversions to integer (#8254)
new 25b0df2d Update parsed kernel sources check. (#8257)
new b3ad4187 Add check to only cast opaque handles to cl::BufferDescriptor at runtime. (#8256)
new 6d18fa85 Fix compilation of tvm runtime for iOS (#8242)
new 65567178 [Metal] Fix run metal model when non first device is selected (#8261)
new 305de7c9 [TVMSCRIPT] Fix printing of rank 0 buffer access (#8215)
new 9f2292e3 [Metal] Fix bad stream after interrupted tuning session (#8244)
new 8d248b08 Fix a word typo and add spaces. (#8278)
new 82b3de62 [Vulkan][Codegen] Fixed SPIR-V scoping bug with threadIdx (#8281)
new 26e48c88 Fix Intel OpenCL SDK search path for Windows (#8301)
new 378afc58 [TVMSCRIPT] add more type support in script function parameter (#8235)
new 59db5133 [Docs] Prevented docs/1 file from being generated. (#8029)
new da42c098 [UnitTests] Automatic parametrization over targets, with explicit opt-out (#8010)
new 166a1bcc [Vulkan] Implement sync for SyncThread("warp") (#8320)
new b2c4da89 [Vulkan] Improved error message for extern calls passed to SPIR-V codegen. (#8332)
new cbc4c386 [Vulkan] Added debug saving of Vulkan shaders, environment variable documentation. (#8333)
new 373d7e98 [AOT] Name mangling in AOT (#8014)
new 2b6cdc35 [TIR] Tighten up invariance of CopyOnWrite in recursive stmt visitor (#8358)
new 9a1d5e96 Decoupling AOT from graph memory planner (#8096)
new 1aec776d [Topi][Unittests] Parametrized tests in `test_topi_dense.py`, split out gpu-independent implementations (#8336)
new bdd9ade4 [Build] Add CUDA_VERSION and GIT_COMMIT_TIME (#8372)
new bc321c8e [Vulkan][Unittests] Add parametrization to vulkan unit tests. (#8348)
new f6ceb95f [FIX] Detect like cores by looking at scaling_max_freq instead of (#8370)
new ad6a2af0 [Metal] Add pass for splitting kernel with huge number of args (#8313)
new 24b94374 [Tuning] Allow multiprocessing spawn to work (on macOS llvm at least) (#8363)
new 839c0abd [TIR][TVMScript] specialize (#8354)
new 0f2849d4 Add "operator" style to Model Library Format (#8072)
new 26d04980 [microTVM] Add Nucleo stm32l4r5zi board to zephyr (#8386)
new 0ff5f3e0 [Arith] Inverse affine map (#8384)
new 8603b8d6 fix storage rewrite index remap (#8338)
new 43a74306 Cleanup more uses of np.bool and np.int. (#8399)
new b844c5e6 [DOCS] Add docs for Pass Instrument (#8220)
new 7f5466ab Refactor the compile engine into a cleaner interface. (#7518)
new 0f8c7f59 [Arith] Simplify MatchFusePattern in InverseAffineMap (#8427)
new a08826bf [TVMSCRIPT] TVMScript Parser support BufferSlice indices (#8408)
new e71f9db8 fix wrong log of tir pass VerifyMemory (#8445)
new 5b6b2ac5 [ROCM] Fix undefined symbols by adding library (#8446)
new 15d538ff [MyPy] Extend type checking and annotation for TIR (#8429)
new 6c2b060b [PROFILING] Use PAPI to collect hardware performance counters on CPU and CUDA (#7983)
new 9afc6da4 [Refactor] Enforce attaching storage scope to PointerType (#8366)
new 9887c3d8 [Fix] Explicitly retain `__hash__` of `StringImm` (#8449)
new 14331cb5 [UnitTests] Minor fixes to unit tests for cudnn/vulkan targets (#8462)
new 6517035b fix typo (#8484)
new 6a56af77 [TVMSCRIPT] Support tir.abs node in tvm script (#8488)
new 8033c2a3 [Bugfix] [tir] do not simplify 'Any() - Any()' to 0 (#8266)
new 181be7f5 Switch from CompileEngine to TECompiler in Interpreter (#8486)
new eb3fbde5 [ARITH] fix zero iter bug in arith (#8494)
new daa0272d src/runtime/module.cc (#8496)
new 13481515 Fix 8093, Enhance Buffer Index Simplify (#8204)
new 7282bb7d [Refactor] Remove scope attribute from Buffer class (#8463)
new 1facd61e [TIR] Bugfix for zero number arguments tir functions. (#8515)
new f0e80116 [TensorIR][M2a] Fuse, Split (#8467)
new ba668c90 [CUDA] Initial support for dynamic shared memory (#8466)
new cdb711aa [microTVM][Cortex-R5] Add zephyr cortex-r5 board to Zephyr (#8519)
new a0f640a3 [TVMSCRIPT]Fix script printters StructuralEqual check failed (#8499)
new b98c5434 [PRINTER] Fix the repeatitive cast in scripr printing (#8531)
new 01982990 [CMake] Split out libinfo.cc into a separate target. (#8520)
new 331d2735 [RUNTIME] Fix TypeKey2Index when for root Object (#8547)
new 6a85b095 [TIR] cast disparate floating point types for binary ops (#8517)
new a69cf820 [Refactor] Remove AttrStmt with storage_scope key (#8516)
new a26311a4 [Vulkan] Prioritize discrete GPUs as device_id=0. (#8588)
new a6950e4b use sizevar when convert any to tir (#8555)
new 1c9f2d75 [Vulkan] Rewrote PointerValueTypeRewrite transform (#8528)
new f9ca8358 [TensorIR][M2a] Reduction Factoring (RFactor) (#8544)
new e8442cdc [TensorIR] Support for match_buffer from subregion (#8585)
new 5a53c2d2 [CUDA] Support multiple TIR-level dynamic shared memory allocations (#8571)
new e4d65c1a [BUILD] Add caching to CMake (#8373)
new 0d5a9250 Introduce --interface-api={c,packed} parameter (#8280)
new 6107a465 [Fix] Fix a typo in include/tvm/ir/function.h (#8617)
new 2684c0dd [Relay][Quantization] Extend FakeQuantizationToInteger to more ops (#8241)
new b48e0aa6 [Target] Enable device querying for all targets. (#8602)
new 573bf062 [Relay] Change Default "opt_level" of Sequantial from 2 to 0 (#8634)
new 3492ee72 [Target] Allow spaces in target attributes (#8587)
new f7f55e39 [Target] Several minor corrections to the device property query (#8651)
new 82242046 [Bugfix][Target] Correct passing of target-queried bool/int parameters (#8660)
new f684e105 [TENSORIR] Add `from_legacy_te_schdule` attr to TE PrimFuncs (#8641)
new e2ed5e79 [UnitTests] Apply correct requires_gpu() pytest marks for parametrized target (#8542)
new 3de2f888 [FIX] Fix threadpool reset by killing threads before destroying their shared queue (#8658)
new 594327e6 [Target] Add __launch_bounds__ directive as part of the CUDA code generation (#8678)
new f767307d [microTVM] Project API infrastructure (#8380)
new 568d04aa Fix error when compile tvm with latest llvm14git (#8682)
new aeabe3c9 [UnitTests] Added cuDNN to default test targets (#8383)
new 8a0defce Improve the error message in module.cc (#8694)
new 8b9cbc4b [FIX] Correctly link to PAPI (#8691)
new b9f44fa4 [TIR] Use PopenPool instead of multiprocessing.pool (#8492)
new f12da78b enhance tir signed-unsigned cast (#8706)
new a5cd56c6 [Vulkan] Check at codegen if the shader is within shared memory limits. (#8746)
new 20a799e1 Add DictAttrs to IRModule and refactor DictAttrs utility functions (#8750)
new 702e28a1 [UnitTests] Require cached fixtures to be copy-able, with opt-in. (#8451)
new 470fef1c [TIR] Change Integer Implicit Conversion Rule to C Standard Way (#8733)
new 729ce6fc [Relay] Refactor Interpreter to treat lowering as IRModule->IRModule rewrite. (#8597)
new e43b5b6e [TensorIR][M2a] Parallel, Vectorize, Bind & Unroll (#8716)
new cb08f990 [microTVM] Project API Arduino support (#8708)
new 70317643 [TIR] Fix buffer scope in structural equal (#8768)
new e4c60fa4 [CONTRIB] Allow customized initializer in PopenPool (#8789)
new 54437392 [Texture support][Part 1] TIR lowering and OpenCL support (#7686)
new ab93c632 [CODEGEN][OpenCL]: fix tir.erf codegen to opencl directly (#8756)
new 3608288d [TIR] Support fold constants in specialize process (#8803)
new f7dd30cf [Vulkan] Remote target.h #include (#8813)
new 64099363 Use CTest for C++ tests (#8809)
new 0f6062a6 [FIX] Remove leftover instances of USE_GRAPH_EXECUTOR_DEBUG (#8796)
new 1a8ef1ac [FLAKY] A small bug fix on the CmakeLists (#8826)
new 49ff3e24 Apply CPPLint to C++ Unit Tests (#8827)
new d80f8974 [GRAPH EXECUTOR,VM] Add benchmarking function to graph executor and vm (#8807)
new 7c9b2484 [Hexagon] Rework tvm.target.hexagon() interface (#8823)
new d49dc28e [FIX] Bug fix for a floormod rewrite simplify rule (#8852)
new 05adbd02 [Hexagon] Change declaration order of unique_ptr objects to fix crash (#8859)
new 4bb75202 [UnitTests] Expose TVM pytest helpers as plugin (#8532)
new bd85e6c7 [TIR] GetBlockReadWriteRegion (#8875)
new 4e88ada3 [RISCV] Add support for llvm parameter -mabi (-target-abi) (#8860)
new deb46259 [Vulkan][Target] Added the driver name to the vulkan target string. (#8882)
new 55f4132c Change target string to Target object in the TE compiler and interpreter (#8835)
new c63d9a17 [TVMScript] Fix printing ForNode annotations (#8891)
new 7a1f60be fix error report on Store (#8895)
new db64ff81 [Vulkan][Topi] Parametrizing additional topi tests, marking vulkan failures (#8904)
new 924c5a46 [UnitTests][Contrib] Enable contrib tensorrt/coreml unit tests (#8902)
new 1c182a3c Remove LoweredModule (#8886)
new 660f1d97 Sanitize names of input tensors in interface header (#8720)
new 568aa862 [UnitTests][Ethos-N] Mark unit tests as requiring Ethos-N (#8873)
new 25495a3e [TVMScript] Enhance printer (#8934)
new 625fee52 [Hexagon] Add support for linked-in model parameters (#8865)
new a9f23239 [Bugfix] Add check to avoid calling back() on an empty container (#8930)
new 3cd74729 [UnitTest][Vulkan] Runnable relay unit tests on Vulkan (#8947)
new 3b70689b [CMSIS-NN] code generator for softmax (#8833)
new 9cb54a93 [AutoTVM] Use popenpool in local_executor (#8851)
new 876f2c28 [2/6] Arm(R) Ethos(TM)-U NPU Relay passes and Conv2D op (#8795)
new 51dee6eb [Bugfix] Add a nullptr check to tir.Buffer to fix the illegal memory access (#8910)
new a39a5ad7 [LLVM/CG] Sort PrimFuncs when creating LLVM module (#8958)
new 114725e5 [Bugfix] Fix div zero error in rewrite_simplify (#8961)
new 8290d28b [microTVM] Add support for AutoTVM (#8715)
new 081c97dc [TIR][VM] Revert a change to lower_tvm_builtin.cc from #6126 (#8274)
new e52e76da [TensorIR][M2a] Compute-At (#8943)
new c10a9e70 Clean up LowerTEPass and pass IRModule Attrs through passes (#8914)
new cf62fed8 Add while node support in TVMScript (#9004)
new edeb9ed6 [CMake] Corrected warning message about USE_GRAPH_EXECUTOR_DEBUG (#9006)
new 9271300f [TIR] Add conversion from FloatImm to float in Python (#9009)
new 77def5b3 [Hexagon] `llvm-options` attribute is an array of strings (#9011)
new 549c9a21 [Runtime] Pipeline Executor Initial patch. (#8702)
new c17b98be [Hexagon] Allow undefined symbols in libtvm_runtime.so on Hexagon (#9024)
new 0e382f7a [Hexagon] Disable `thread_local` on Hexagon (#9025)
new 3fbe9851 [Bugfix] Fix other div zero errors also in rewrite_simplify (#8983)
new 32597fbf Implementation of relay_to_tir target hook (#8423)
new 59311c3b Support match pvar with dtype constraint (#9016)
new a21af4f0 [Meta Schedule][M3b] Builder (#9044)
new 40fdc17a [Relay] VLOG for finer grained control of hyper-detailed logging (#9012)
new ce6e8867 [Meta Schedule][M3c] Argument Info (#9059)
new 87e4ad85 [iOS] Add tracker support into ios-rpc application (#7876)
new 8c8579da [Hexagon] Pytestify Hexagon unit test (#8955)
new 4bad8968 Move the allocates of AoT codegen to be TVMBAWs (#9065)
new 90854fe5 [PYTHON][FFI] Skip numpy.ascontiguousarray if C_CONTIGUOUS == True (#9073)
new a1d75355 [Relay] Prepare for merging context_analysis.cc and device_annotation.cc (#9077)
new 39496f15 Fix the missing `dtype` attribute of `tir.Shuffle` in Python level (#9131)
new 1b5be049 prevent casting handle to other types (#9114)
new e97439f5 [LLVM] Refactor MakeCallPacked, NFC (#9118)
new dd28ef6d [Codegen] Swap out analyzer when outlining (#9117)
new 863cba2e [Bugfix] Add nullptr checking for `AttrStmt` with `coproc_uop_scope` attr key (#9123)
new 0f2efb37 [microTVM][Zephyr] Add MIMXRT1050 board support (#9068)
new 0260a12a [Relay] Prepare for new plan_devices.cc (part II) (#9130)
new 9ab3b049 [OpenCL] Remove redundant visit statement in CodeGen. (#9144)
new 713a2d33 [TIR] add loop partition hint pragma (#9121)
new bbabfbaa [LLVM] Make changes needed for opaque pointers (#9138)
new 0bafb185 Update find cublas so it search default path if needed. (#9149)
new 451e1d03 [TIR] tir.transform.StorageFlatten refactor (#9091)
new e1788428 [TEST] Move llvm import test away from minimum test (#9171)
new a30ccd8a [TVMScript] Script namespace changes (#9115)
new b5008cde [LLVM] Rename t_tvm_context_ to t_tvm_device_, NFC (#9176)
new 43457baa [LLVM/CPU] Add comments with origins of various runtime/backend types, NFC (#9177)
new 87d24435 [UnitTests][CMSISNN] Mark CMSISNN with skipif they are missing libraries (#9179)
new 32dc643c [TIR] Fix FlattenBuffer computing size for buffer with strides (#9195)
new 8ac5fdaa Fix end to end benchmark with rpc devices (#9175)
new 3718631f fix (#9205)
new e8ea9769 Adding annotations for tir.allocate (#9168)
new 58e03921 [cpptest] Use find_package to locate GTest files (#9208)
new 3eee0e64 Initial Implementation of TIRToRuntime Target hook (#9190)
new 20681a3c Fix typo in error message in CMakeLists.txt (#9251)
new 682de679 [TIR][USMP] Add a parallel to serial for loop converter pass (#8469)
new 66be8659 [Simplifier] Add printing of SplitExprNode and SumExprNode (#9262)
new f06d51b3 [LLVM] Treat scalars as single-lane vectors in CreateVecConcat (#9264)
new d43c8081 [TVMC] Compose target options from target registry (#9218)
new e61ad603 [TIR] Add support for 0-dim buffer (#9224)
new 470a0357 [Hexagon] Fix addressing TVMValue array (#9302)
new 6384580a [iOS] Fix build issues on the latest XCode and iOS (#9298)
new 421ef483 update block syntax (#9286)
new e90fcc56 [Codegen][LLVM] Add ability to turn on fast math flags (#9223)
new acb06a1b [Error reporting] Replace runtime errors with LOG(FATAL) (#9311)
new 6c49fd5a Specify argument to FastMathFlags setAllowContract (#9337)
new 9d04b681 [TIR] Add structural error printing for TensorIR (#9306)
new fedd2a71 [TVMScript] Parser for Lambdas, Parser/Printer for `CommReducer` (#9358)
new e7ef6ed0 [BugFix][Opencl] Explicitly cast min/max operands (#9374)
new c5e0bfcb [OPENCL] Workaround for zero size allocation (#9379)
new 785d49ed [BYOC] CUTLASS integration (#9261)
new a0ba40d5 [CUDA] Support memory reuse for dynamic shared memory (#9341)
new 42dbca92 [microTVM] Add microTVM Template Projects to tlcpack pip Package (#9309)
new 6eed854f BUG: Make sure FoldConstant can inline constants underneath on_device annotations (#9367)
new d30c747f Adds SEScope (Storage/Execution Scope) for use as new unit of planning in 'device' planning. (#9313)
new 57891a55 [TVMScript] Use // and % for FloorDiv/FloorMod (#9437)
new 17f425f9 [PyTorch]Add PyTorchTVM: compile torchscript to tvm and export as pytorch_op (#8777)
new db66eed7 [TensorIR] Print TVMScript with prefix T instead of tir (#9422)
new cfcd364f [TIR] Make compact buffer and get access region aware of conditions (#9372)
new 9a42c21f add is_entry_func tag for device function (#9436)
new 1c3098ab [TIR] Add type hint for TIR (#9432)
new 239fb031 Better host handling in CompilationConfig & debug printing (#9460)
new af168d59 [Support] Add libinfo into the runtime build (#9310)
new b5961ef8 [TARGET] Move target_host usage to new target style. (#9497)
new 2def3dc8 Switch PlanDevices pass to be w.r.t. SEScopes instead of DLDeviceTypes. (#9326)
new 9991ba55 [1/3][AOT][DeviceAPI] Connecting devices structure to relevant operators (#9395)
new 6f983d3e [TensorIR] Cross-Thread Reduction (#9360)
new 913b8a46 [BugFix][TVMScript] Fix printer for dependent loops (#9506)
new 0ba0cf67 [Topi] Cortex-M DSP support (#9233)
new 6a5671a2 [TVMScript] Report error if add attr to implicit root block (#9507)
new 935aeaf2 [ETHOSN] Cleanup of trademarks and registered trademarks (#9516)
new b4d724b5 [4/10] Code generation for Conv2D via CMSIS-NN (#9331)
new 977a68fa Add a 'rolling_buffer' scheduling primitive (#9444)
new 1805a9a9 [TVMC][Relay] Introduce executor and runtime parameters (#9352)
new 15b54b02 [TVMScript][Fix] Add type hints for more uncovered cases (#9505)
new 12e64401 [3/3][AOT][DeviceAPI] Wire up cpacked Device API context (#9501)
new 91946dea [TIR][USMP] Added buffer info extraction pass (#8468)
new ae039386 [BUG][TVMScript] fix block range error (#9574)
new 0277999e Prepare for switching VM to LowerTEPass. (#9550)
new 780b80e2 [Target] enable -arch=sm_xx for assigning cuda target arch and deprecate autotvm.measure.set_cuda_target_arch api (#9544)
new 3848520e Update license file to note libbacktrace (#9579)
new bf568f85 Bump version to 0.9.dev0 (#9581)
new f2888039 Introduction tutorial formatting fixes (#9539)
new b56388d4 [BugFix] fix nvptx not supported by device_enabled error (#9585)
new ec62e49d Section names for TVM generated constants (#9524)
new f778c605 Add minimal forwarding RPC server for host driven python execution on Hexagon (#9526)
new e57525da [microNPU] Move the compilation to use Target Hooks. (#9597)
new b1e602f2 [TVMScript] support kTarget func attr in tir script (#9594)
new 8c67eae1 [TVMSCRIPT] Misc error message improvements (#9543)
new 2bef4c96 [TVMScript] Syntax sugar for reads & writes (#9634)
new 3c43fbb8 [TVMScript] fixing block attr printing bug (#9667)
new 978d2219 [Target][TVMC][UX] Avoid creation of dummy Target objects in TVMC (#9662)
new c776d983 [TVMScript] Add for loop syntax sugar (#9620)
new 9eb1eae9 [TVMScript] Add syntax sugar for T.handle and T.match_buffer (#9492)
new 5bba37f0 [Hexagon] Add RPC Mechanism for Hexagon (#9631)
new 40e3da9e [TIR][USMP] adding the pass to convert to pool offsets (#9418)
new ebb9addd [TIR] Allow memory (aka storage) scopes to be retrieved/applied to PrimFuncs (#9689)
new f3fc5802 [TVMScript] Improve printer for TIR syntax sugar (#9680)
new 2c75f344 [RELAY] [AST] Add virtual_device as a first class field in Relay (#9641)
new 573a54f6 [Relay] PlanDevices supports 'free' on_device annotations (#9693)
new 998dffd3 [Hexagon] Detect link-params via IRModule instead of target attribute (#9695)
new ac54ba69 Add CMake summary (#9696)
new 7b0dd7e3 [CUDA] Do not emit vector load on unaligned base offset (#9731)
new 5651d222 [Relay] Re-run PlanDevices after LowerTE to flow new memory scope constraints. (#9613)
new 58bc3767 Add unit tests for HexagonBuffer (#9736)
new 18441e6f [TVMScript][FIX] Fix number of arguments for T.Buffer[...] (#9758)
new aca560ed [Relay] s/SEScope/VirtualDevice/g (#9759)
new c565177f Clarify error message for missing libraries (#9710)
new 43777395 [TIRScript] fix parse StringImm value in for loop annotations (#9755)
new 3ee19a46 fix int set analysis on negative scale (#9776)
new a331af7a [CodeGen] avoid crash if an exception is raised during llvm cpu codegen (#9786)
new bdbe84dd [Target] Fix device mask issue and typos (#9768)
new 8e291ea0 [CMAKE] Automatically detect newly added source files (#9611)
new 0bf75b80 [TIR] Affine utility support iter lowerbound and diagnostics (#9699)
new ad1db4c0 [TVM Basic] Extend generic func with get_packed_func() interface (#9784)
new 261447b5 [Target][BugFix] Convert dict and str to TVM object (#9807)
new cac7ae73 Add Python representation for VirtualDevice (#9812)
new 353d0d80 Generate compile_commands.json by default (#9763)
new 987f7055 [LLVM] LLVM codegen debug utilities (#9857)
new a733524f [MetaSchedule] Add Per-Store-Feature (#9860)
new 33c0597e Add a JSON converter for 0.7 -> 0.8 and 0.8 -> 0.9 (#9874)
new 1beab14c [BUGFIX] Check that virtual device is unchanged in WithFields (#9826)
new 075f434b [TEST] Remove `llvm -device=arm_cpu` and `cuda -libs=cudnn` from (#9905)
new c1bcee02 [TIR] Encode conditional accesses info into block read/write regions (#9880)
new 915146ad [MetaSchedule] random compute location (#9940)
new 9815279b [TIR][USMP] Integrating USMP to AoT Executor (#9565)
new b6e5fb0b [Fix] Fix flaky test of #9952 (#9958)
new b89ef230 [bugfix] Fix the behavior of TVMScript printer (#9974)
new cfa4fcc2 [MetaSchedule] Schedule Rule: Add RFactor (#9975)
new afdaf614 Add runtime.ModuleGetFormat method enabling export of BYOC generated sources which require a .cpp/.cc file extension (#9243)
new a49f185c [Minor] Typo Fixes (#10000)
new 2d7dd0ab Auto-discover C/C++ compiler instead of hardcoding g++ (#10007)
new 35afa101 Add user-configurable backtrace limit (#10025)
new cbf58146 [MetaSchedule] Schedule Rule: Parallelize-Vectorize-Unroll (#10033)
new 79f32001 [PTX-MMA] Add full PTX MMA code generation support (#9909)
new a5d089ee [Hexagon] Do not auto-build apps when building TVM (#9970)
new 6f710508 [CUTLASS] Profile only the largest-possible alignment by default (#10036)
new 833969c3 [TIR][Schedule] Blockize and Tensorize (#9871)
new 70c7c415 [MetaSchedule][M4a] Schedule Rule: Multi-Level-Tiling (#10043)
new dcff81d1 Clear warnings when building with MSVC. (#10059)
new e3c1378f Don't explicitly link libgcc.a into libtvm_runtime.so on Android (#10052)
new 01bf06fd Change function constructors to WithFields (#9690)
new be471108 [TE] Fix Const Int bound analysis to handle uints for division (#10102)
new 2ab95f49 [LLVM,TIR] Print LLVM intrinsic names instead of ids (#9964)
new 14ff948d [Ansor] Improve OpenCL support (#10108)
new f276181a [CUDA] Support float16 erf,tan,atan (#10122)
new 4d3cd53b [Runtime][PackedFunc] Bring `PackedFunc` into TVM Object System (#10032)
new 0eeecfbd [TVMScript] Support T.buffer_decl using data pointer from Let/Allocate (#10099)
new 83387199 remove async tst (#10160)
new 034b3350 OpenCL debug runtime timer handler added. (#10140)
new c3d759df [BugFix][TVMScript] Use operator `is` when recognizing TIR Module (#10175)
new 15c0ff38 [TIR] Allow compute_at create block predicate for non-trivial bounds and support floordiv pattern (#9527)
new b6e9b609 Implementation of Common Subexpression Elimination for TIR (#9482)
new 021b46b6 [USMP] adding support for U2 and U3 usecases (#10193)
new 1243ab08 add a simplify rule for floordiv(x*8+7, 16) => floordiv(x, 2) (#10232)
new 90091608 Support sub warp reduction for CUDA target. (#10207)
new c89baae8 [Cuda] Updated bfloat16 math defs. (#10258)
new 8ec131fa [CMake] add support for find_package (#10097)
new 3f3a1891 [TIR] Add software pipelining (#10066)
new 17b4f8d9 [UnitTest] Disable ptx mma tests on unsupported nvcc versions. (#10229)
new c663670b [TOPI] Add support for groupped conv3d (#9873)
new 9b82386a [Relay] [Virtual Device] Store function result virtual device in virtual_device_ field (#9848)
new 83cda4cd [TIR] add support for multi-blocking layout and their transformation (#9996)
new 06086a89 [Arith] Support integer BufferLoad in IntervalSetEvaluator (#10327)
new ff3ff951 Generate correct output tensor names in C Interface API (#10191)
new 5e7e4112 [TIR] Fix Ramp int32~64 mismatch in VectorizeLoop and NarrowDataType passes (#10172)
new 67861eaa [runtime] Add Metadata classes for AOTExecutor (#10282)
new 8e41c473 [TIR] Tir constants integration into compilation pipeline (#8509)
new 17ea0a2c [TIR] Misc minor updates (#10335)
new fce0553e [AOT] BugFix of workspace calculation (#10337)
new dcf751d8 [runtime] Improved log information with function signature (#10326)
new 865dce6d [BUGFIX][ARITH] Fix FloorMod Simplifier (#10336)
new 7a51a1a4 [TIR, Relay] improve bfloat16 support (#10112)
new 50558243 Lower cache_read and cache_write to Hexagon DMA via tensorize (#10365)
new 4be30e70 [RELAY] [VIRTUALDEVICE] Change syntax for device planning and store parameter virtual devices in virtual_device_ field (#10352)
new 7538a792 [Bugfix][TVMScript] Convert BufferSlice to BufferLoad when used as range/loop start and end (#10370)
new af838aa5 Enable groups argument for conv2d_transpose on the cudnn backend (#10396)
new efc36b0e [TensorIR] Renormalize split pattern (#10401)
new 96fb6935 [MetaSchedule] Arithmetic analysis (#10403)
new 79e292f4 Add @slow decorator to run tests on `main` (#10057)
new 37dd8147 [Runtime][ThreadPool]Refactor affinity function and support CPU affinity list setting. (#9802)
new b6f706d1 [Bugfix][Arith] Fix TryFuseIter (#10427)
new 46b74aff Fix plint complain for some files. (#10433)
new 8f1a0a5d [runtime] AOTExecutor implementation and c target code-generator (#10283)
new 8494228f [Runtime][ThreadPool] Handle the default value of affinity mode. (#10434)
new 6367831e [microTVM] Zephyr: add B-U585I-IOT02A board support (#10416)
new 344c3abc [MetaSchedule] Enable AutoTVM-style template-based search space (#10461)
new df0a0b7e [Arith] Handle mod/floormod in modular set analysis (#10453)
new 737fa483 [Minor][Build] Fix compiler warnings hidden overloaded virtual function (#10485)
new 90d4ba66 [CodeGen][CUDA] use hrint for cuda half rounding (#10460)
new ddd154f9 [MetaSchedule] Update scripts for subgraph tuning (#10501)
new fe08def1 [TE][TIR] Implement layout transformations, non-flat memory buffers (#9727)
new 83d92e39 fix: select narrow dtype (#10519)
new 8ca3d6b5 [vulkan] Add integer dot product (4xint8, 4xuint8) tensorization for the vulkan SPIR-V target. (#10391)
new 5c040695 Automatically close open files to prevent ResourceWarning (#10526)
new eec76813 Add Check about negative uint constant (#10484)
new f41a3aa9 [PTX] Support mma.sp to use Sparse Tensor Cores and refactor mma codegen (#10339)
new 9ab6cafc [skip ci][Bugfix] Allow constant folding of 0U - 0U (#10535)
new b8b3ba86 RFC: initial stab at TorchScript fallback (#7401)
new 3bc7d986 [LLVM][TIR] Propagate variable names to parameters. (#10514)
new 6471f889 [AOT] Introduce checks for return values from operators (#10424)
new ce972e32 [Hexagon] Resolve breakage in test_hexagon/test_cache_read_write (#10520)
new 6adadb37 [Runtime][ThreadPool] Remove a cout log output. (#10560)
new 885bc247 [TVMScript] Add intrinsic to look up llvm intrinsic id (#10551)
new fae8326b [Refactor] Reduced repetition in CodeGenLLVM's buffer access (#10567)
new eda74025 [CMAKE] Add option to enable custom logging (#10531)
new 3c8f3453 [TIR] Restrict Buffer indices, only last index can be multi-lane (#10513)
new fb5581f9 [CMAKE,HEXAGON] Only enable Hexagon custom logging when building for Hexagon (#10587)
new 33c92999 [TE] Promote substituted variable to iter_var's dtype (#10571)
new 7780b7ef [Fix] Refactor the roundtrip test. (#10592)
new af5f394b [TIR] Updated python docstring and parameter names for AllocateConst (#10602)
new e0767b2c [TVMScript] fix print target's host (#10598)
new 65078c28 [Arith] Improve floordiv / floormod rewrite simplifing rules (#10591)
new 9777a60f [Hexagon] Generalize builtin for Nd memory alloc with storage scope and add lowering for VTCM / Hexagon (#10558)
new 3db553da [microTVM] Zephyr: add mps3_an547 board support (#10479)
new f658d9f4 [Hexagon] Codegen for 2d Load/Store (#10586)
new 754b6014 [Hexagon] Refactor tvm.contrib.hexagon, NFC (#10616)
new dd2b8774 [Hexagon] Remove double ".hexagon.hexagon." from registered names, NFC (#10624)
new 9fc3e5a5 [Arith] Fix floormod rewrite simplify rule (#10626)
new e08ef04a [Hexagon] Add support for Hexagon v69, deprecate v60 and v62 (#10623)
new 4a205442 [Hexagon] Add flags to control floating point support in HVX (#10644)
new a1d6352b [C Codegen] Remove global packed variables when interface_api="packed" and target="c" (#10645)
new 9964c3bf Add order to functions in C Codegen (#10590)
new e0d9196c Mark x86 specific test (#10672)
new 1e1eb313 [ci] Fix condition for skipping tests in i386 (#10698)
new 00cd9c1d [build] Use mold or lld if detected (#10683)
new a057ab88 [UnitTest] Fuzz based on seed rather than random value. (#10515)
new c8488978 [TIR][Schedule] Transform layout (#10538)
new 8ddc6c83 [Hexagon][Codegen] Implement CodeGenHexagon::CreatePrintf (#10710)
new 9c23466a [TVMScript] Enable assignment statement without type annotation (#10736)
new 79a99627 [TIR][Schedule] Change BufferIndexType enum in python side to string (#10737)
new 501513ba [NDArray] Expose NDArray::CreateView to python (#10712)
new 7dc5e36d [NDArray] Update runtime.TVMArrayAllocWithScope to use ShapeTuple (#10728)
new 3157e7b2 [TIR] Simplify final indices from transform_layout (#10761)
new 9195ad50 Fix clang llvm 12.0.1 warnings (#10744)
new bfb1b46a Eliminate some compiler warnings for microNPU demo app (#10549)
new ec650197 [TIR][MetaSchedule] Estimate TIR FLOPs (#10782)
new 1b7d54a9 Check for toolchain when marking reference system tests (#10659)
new db7c3e18 [TIR][Analysis] Add SuggestIndexMap for layout rewriting (#10732)
new 62ca7aea [TVMScript] Parser `int64` support (#10789)
new d2e9b0f3 [Hexagon] 2-d allocation cleanup (#10786)
new 0d00e2df [Runtime][PipelineExecutor] Fix CPU affinity setting issue. (#10781)
new 91b2ba26 added surpport for arg type of numeric float16 and testcase, fixed the (#10797)
new 62fe786e [Arith] Remove diagnostic ctx argument from DetectIterMap (#10798)
new 513dc7ca Also strip prefix from TVM_LOG_DEBUG specs. (#10755)
new 79a7a417 [AutoScheduler] Supported CSE (variable definitions) in feature extraction (#10686)
new 65934b04 [CI] Fix Vitis-AI tests when USE_VITIS_AI flag set to OFF (#10802)
new d0cf76d2 [DOCS] Add background context for stack allocation in builtin lowering (#10632)
new b3e9f607 [Pass][Bugfix] Disable re-use of non-flat buffers in StorageRewrite. (#10787)
new 94362f5c [Metaschedule] Add demonstration of selectively tuning relay ops with TIR schedules (#10793)
new 2011519f [Hexagon] Pass extra parameters to link_params via Map (#10830)
new 55f595f3 Fix typo in comment about kill() (#10863)
new 4a833e5a [Pass] Fix printer formatting for PassInfo (#10844)
new 7c895eaf [PTX] `ldmatrix` builtin to accelerate copying data from shared memory to warp memory (#10855)
new 6b0b43fe [RUNTIME] Api to get number of runtime threads (#10896)
new 9318291e [LLVM] Support CodeGenBlob for large >2GB models on x86 (#10882)
new a3db163c [TIR] Fix int32 vs int64 mismatch in For construct. (#10595)
new 5a487ec6 [TIR] Fix check for multiple axis separators (#10845)
new c21b085e [Hexagon][LLVM][CodeGen] Make CodeGenHexagon a subclass of CodeGenCPU (#10908)
new a3c0d929 [TVMScript] Fixing T.buffer with typed positional arguments other than int32 (#10892)
new 38bc8eeb escape tvmscript's string literal (#10954)
new 27f826fc [CI] Bump black version to 22.3.0 (#10960)
new c8c017f8 [ci] Don't diff when running clang-format (#10933)
new c97bc9bc [Hexagon][LLVM] Enable/test tensorized Hexagon DMA on 2d transformed layout (#10905)
new 528b44a0 [FIX] resolve int64/32 for AttrStmtNode (#10983)
new eb6ba611 [Runtime][Vulkan] Add RGP support to TVM for vulkan device (#10953)
new d3333662 [ROCM] DP4A intrinsic support for TE/TIR (#11009)
new 02a7bd2a [Metaschedule] Support tuning on rocm and vulkan target (#11017)
new eb851528 [Arith] Updated arith::DetectIterMap to keep extent=1 components (#10980)
new cfa64844 [OpenCL] Fix type casting error (#11021)
new 13945f93 [VirtualMachine] Zero copy in set_input when input is DLTensor (#11003)
new 96b668f4 [Hexagon] Deprecate USE_HEXAGON_DEVICE, introduce USE_HEXAGON (#11025)
new 42d32f03 [AOT] Support LLVM backend with C++ runtime (#10753)
new ebbe6ec9 Revert "[OpenCL] Fix type casting error (#11021)" (#11035)
new 92e57f19 [OpenCL] Fix type casting (#11038)
new 39728884 [TIR] Utility function to decide loop mapping for auto tensorization (#11050)
new a9dae87e Fix While Node StructuralEqual and StructuralHash issue (#11073)
new ecb02940 Add two possible missing visit of let stmt in lowering (#11079)
new ef498e94 [TVMScript] Allow `val = buf[index]` without type annotation (#11060)
new 430c1b73 [TIR] StmtFunctor RenewDefs (#10843)
new e76ae674 STM32: add as a new target (#9385)
new 826b57b6 [Hexagon] AoT with LLVM Codegen on Hexagon (#11065)
new 16f0be7c [Hexagon] Delete offload runtime, move files to right places (#11090)
new 4a7cefd5 Prevent IRSbustitute to create new buffer when buffer var is unchanged (#11103)
new 7a846d20 [Analysis] Exposed Analyzer::CanProveEqual to Python API (#11102)
new 6fef8431 [CONTRIB] Add PopenWorker process recycling (#11094)
new d13a5bdc [USMP] Adding support for U4 usecase (#10785)
new 57f9e307 allow constant value let binding in script (#11115)
new 93920777 [Metaschedule] Auto tensorization for CPU / GPU dot product (#11088)
new f7cf83eb [TVMScript] Support TVMScript template meta-programming over variables (#11097)
new 39ec7438 [TIR] Get read/write access precisely for opaque access. (#11110)
new 2ea15d7c [Analysis] Readability/Deduplication in Analyzer CanProve/Simplify (#11130)
new 11b48a8e [Arith] Simplify the output of InverseAffineIterMap (#11167)
new fd32b03a [fix] vec * mat in matmul in onnx converter (#11174)
new 27c05c44 support round-trip for T.Ptr in tvmscript (#11179)
new d46bc064 Remove support for run-time linked-params from codegen (#11144)
new 611de4de [TIR] Reduced duplication in op.h (#11129)
new f0cefd98 [CI] Update GoogleTest (#11162)
new d52acdab [Hexagon] Add support for on-device unit testing using gtest (#11145)
new b8f54e06 [Hexagon][Runtime] Add QuRT thread pool backend (#11018)
new 030c75a2 [Relay] Support 'external codegen targets'. (#11173)
new 1c8bfff2 Implemented rpc logging (#10967)
new 457334e5 Revert "Implemented rpc logging (#10967)" (#11227)
new 5675a625 [TIR] Add schedule primitive SetAxisSeparator (#11225)
new ed1786d0 [LLVM] Fix a possible tbaa issue (#11181)
new 07f8bd0f fix two check typo in codegen (#11240)
new 7ed73c78 [TIR] Fix reverse_compute_at for trivial region with trivial block var (#11234)
new 76598176 [CI] Identify non-inclusive language in commits (#11230)
new 5c90067a [USMP] Change internal workspace section (#11246)
new 7b6c1e4f [LLVM] Make sure all functions have target-related attributes set (#11222)
new 59fbea46 [microTVM] Add support for host-driven AoT Executor (#11044)
new a16695a4 [OpenCL] Change of OpenCL profiling logic (#11180)
new 957d565d [ARM][Strategy] Fix is_int8_hw_support check function (#11193)
new 4cd78ecd Fix a case of linking to wrong OpenCL library (#11215)
new e08d2c6e [rpc] Implemented rpc logging (#11232)
new 2195c326 Add Adreno GPU target and topi supporting textures with dynamically allocated textures (#11161)
new 7f5b41df [logging] LOG(FATAL) calls [[noreturn]] functions (#11310)
new 18127d04 [Hexagon] Remove sim_options from tvm.target.hexagon() (#11293)
new 4f214802 [TIR][Arith] Implemented padded inverses in IndexMap (#11235)
new 6f98fa17 Avoid use of MemoryInfo when undefined in StorageRewrite (#11254)
new 3eef9061 [ci][docker] Update images to include sccache changes (#11314)
new 09dfdcf4 [TVMScript] Represent ramp as index slice (#11308)
new bbd038df [ONNX] Fix cast op to/from bfloat16 (#11171)
new 84047950 [TIR] Propagate storage scope of undefined vars in SplitHostDevice. (#11255)
new f175fd05 [TIR] Simplify indices in layout transform (#11330)
new 81860b69 [Hexagon]Use requires_hexagon instead of requires_hexagon_toolchain if running on hexagon target (#11294)
new bf4c4b87 [Runtime][ThreadPool] Enhance CPU Affinity configuration for OpenMP case. (#11343)
new 02d5389d [build] Fix/simplify `ccache` logic (#11189)
new becd8ddd Improve error messages with TVM_LOG_DEBUG and add docs (#11344)
new d3dbc656 [TVMScript] Support inlined function call as a sugar (#11324)
new 17049f6d [TIR] IndexMap Simplification Constraints (#11342)
new 53b0dc1a [Relay] Support i16, f16 scalars in Relay text (#11224)
new 3219b0ed [PTX] Intrinsics for async copy from global to shared (SM80) (#11368)
new df5f02e8 [TIR] Support tensorization using ldmatrix + MMA (#11355)
new 0c263ca8 [FFI] Renamed __VisitAttrs__ and __fvisit__ to non-reserved names (#11392)
new 14b43114 Fix int8 cuda kernels on older SM versions (#11389)
new 137cf161 [TVMScript] fix typo for block syntax (#11407)
new 3d66577a Finish support for list-of-targets (#11382)
new 045137fc [tests] add utility to replace direct call to pytest.main (#11393)
new 3e3cd8c8 [Bugfix][TIR] Removed passing of IterMapExpr into PrettyPrint (#11412)
new eb36c970 [TIR] Regression test for PrettyPrint/IterMapExpr bugfix (#11418)
new de135af6 [Arith] Allow unused trivial iterators in bijective check (#11425)
new d16ab4c1 [Arith][BoundDeducer] Forbid non-supported expr type in bound deducer (#11323)
new 0f78e0a2 [TIR][Schedule] Transform layout quality of life (#11269)
new c1407273 [BYOC] Enable bfloat16 in DNNL BYOC (#11111)
new 9a7ad604 [Runtime] Add 'static_library' runtime::Module (#11442)
new e989ca10 [TIR] Additional Stmt/Expr simplication rules (#11373)
new bd30c701 [VM] Memory alignment check for `set_input` in Virtual Machine (#11391)
new c39eb0c8 [CUDA] Allow dynamic shmem of size > 48K in runtime (#11478)
new b5bd9765 Fix structural error reporting on root block (#11477)
new cdc4ebb1 [FFI][CYTHON] Release GIL when calling into long running functions (#11461)
new ad6638af Silence unnecessary 'host' deprecation warnings (#11499)
new 4480bb85 [OpenCL] Avoid SelectNode ambiguous overloading (#11488)
new 62b40157 [TIR] Add schedule primitive TransformBlockLayout (#11485)
new 8d607192 [TVMScript] Allow T.Buffer[] arg annotation to use int as shape (#11454)
new 8e6d4067 [Pass] Add utility that asserts that IRModule is not mutated in a pass. (#11498)
new 1b7aa506 Canonicalize type annotation during construction of Var and SizeVar (#11443)
new 6a26012e [Arith] Merge surjective/non-surjective iter mapping detections (#11287)
new 56c8814d [microTVM][ARM][Zephyr] Add CMSIS dependencies in Zephyr project build (#11362)
new 2281b768 [BugFix] Add lock for ModuleNode::GetFuncFromEnv (#11467)
new 7dd2ca67 [Relay] Plumb external codegen target via Target.current() (#11432)
new 98a4c08f [VM] check DLManagedTensor for conditions to construct NDArray (#11504)
new 228e1828 [Bugfix][TIR] Handle bool tensor in FlattenBuffer (#11532)
new 457aa60c [TIR][Arith] Additional Simplifications Inside Conditionals (#11524)
new 21c171a6 [BYOC] Two helper passes for external codegen using RelayToTIR custom pass machinery (#11474)
new 7e45711b [CI] Refactor of tvm.testing.requires_* annotations (#11313)
new dce24fe9 [TIR] Expose tir.call_cpacked in python (#11563)
new ca5b6b77 [TIR] Prevent loop binding over-simplification (#11578)
new fce16933 [Hexagon][CI] Re-enable Hexagon tests in CI (#11613)
new 073fcad6 [OpenCL] Implement conv2d_winograd algorithm for Adreno (#11543)
new 5cd4a64d [TIR] CSE pass : Restrict the equivalence to be decided by a normal form - avoids comparison of terms (#11574)
new 97ae9c0d [PASS] Refactor a couple of TIR passes - BindTarget, AnnotateEntryFunc, Filter, LowerInitBlock (#11628)
new c8168a3f [TIR][Schedule] Allow named block and buffer arguments in Schedule (#11624)
new 13a6b851 [microTVM] Add support for Arduino Portenta H7 (#11636)
new ea5a318d [TIR, CUDA] Add pass to replace global to shared memory copy with cp.async (#11658)
new f398d4a3 [DNNL][CBLAS][BYOC] Unifles all MKLDNN/DNNL to DNNL (#11638)
new bf2fde3f [BYOC] Make CUTLASS BYOC integration 'Collage friendly' (#11631)
new c6e08e66 Fix typos in target warn of dnnl (#11678)
new 4affab3d [BYOC-OpenCLML] OpenCLML integration with TVM. (#10243)
new baf04d00 [microTVM][zephyr] Add support for host-driven AoT execution on zephyr (#11650)
new 8a96aefd [LLVM] Update uses of AllocaInst::getAlign[ment] (#11718)
new 94976095 [Bugfix][TIR] Narrow-Datatype for thread axis (#11725)
new 9dd0db08 [ci] Skip failing tests in wheel (#11705)
new ff1c15c5 [microTVM] Add support for the Raspberry Pi Pico via Arduino (#11694)
new 05ccce60 [TVMScript] Support roundtrip of LetNode (#11742)
new e79d0a1c Add optional mem_scope parameter to tvm.nd.array and tvm.nd.copyto (#11717)
new c90df818 [MetaSchedule][Runtime] Enhance Runner RandomFill (#11758)
new 427d6ca8 [Arith] Simplification of ceil, log2, and left_shift (#11646)
new aac49c92 [LLVM] Retrieve entire target string from LLVMModule (#11802)
new b8c1da70 [TIR] Add SHash and SEqual to IndexMap (#11798)
new 9c9dc71e [LLVM/String] Remove conversion operator of String to llvm::StringRef (#11807)
new 651bb3a1 [USMP] Adding support for U1 usecase for constant pools (#10189)
new 5870b687 [BugFix] IndexMap.Inverse for unit iters (#11841)
new 5b7ebaf5 [LLVM] Remove `using llvm::BasicBlock`, NFC (#11850)
new 61ad52b6 [LLVM] Remove PrintModule (defined in llvm_common.cc) (#11851)
new 0cd37677 [LLVM] Register factory function for CodeGenCPU (#11852)
new b9ba8960 [TIR][Pass] Remove-Weight-Layout-Rewrite-Block (#11870)
new 24d7d997 [Arith] Fix DetectIterMap floordiv when IterSum only contains base expr (#11887)
new 82d41af9 [TIR][Arith] Avoid assigning range of possible values to integers (#11859)
new f47a738d [TIR] HoistExpression, generalization of HoistIfThenElse (#11592)
new 4819f6ed [LLVM] Include LLVM headers in files that use them, not in llvm_common.h (#11888)
new b97e92e8 Add missing headers to llvm_module.cc/.h, NFC (#11925)
new 36f80e0d [usmp] U3 use case (#11015)
new 4514401e Add cooldown interval logic for the profiling functional (#11465)
new d3c7d805 [Relay] Handle memory scope during lowering from relay level (#11874)
new 0112314e [MetaSchedule] Handle 'warp_execution' implied extend of threadIdx.x in VerifyGpuCode (#11949)
new 0941eb35 [ci] Redirect sphinx-gallery URLs to S3 (#11839)
new 9fb88c1d [BYOC] Handle constants in IRModule-at-a-time external codegen (#11770)
new 544f11b4 [CI] Skip some additional tests that are failing in the wheel (#11969)
new 8b632431 [tests] Fix changed var name from 'target_str' to 'target_names', NFC (#11982)
new b31b0854 [Hexagon] Enable int8 vlut codegen for Relay take (LUT) operator (#11693)
new 864e44ad [LLVM] Remove use of deprecated PointerType::getPointerElementType() (#11984)
new 2a0ab054 add missing narrow down of index within conditions (#11942)
new 8e4d9840 [microTVM] Autotuning performance tests (#11782)
new 1ac8b1df [TIR] Make conversion from Integer to int64_t explicit (#12010)
new f8d67607 [Arith] Allow constant values in InverseAffineIterMap (#12026)
new 04cade6f [TVMScript] Doc Base Class & DocPrinter Scaffolding (#11971)
new 64a67482 [TIR] fix crash when comparing IntImm to None (#12034)
new fb6da138 [Texture] Add memory scope entity into graph JSON/runtime (#11875)
new 316a44f1 Several type mismatch fixes and checks (#12041)
new f3adf6f0 [Collage] SubGraphs (#11981)
new b4c975d1 [LLVM] Fix build errors in CodeGenCPU::AddDebugInformation (#12054)
new 0d52d931 [LLVM] Update creation of llvm::DebugLoc, remove TVM_LLVM_VERSION < 70 (#12069)
new e9f573d4 [CMSIS_NN] Align CMSIS-NN in TVM to TFLu SHA (#12030)
new 388502ef [Arith] Updated BufferDomainTouched to use IRVisitorWithAnalyzer (#11970)
new 408ae1c8 [WIN] export void Configure(...) symbol for Windows (#12091)
new 2f5cab54 [MetaSchedule] Add MultiLevelTilingTensorCore rule for auto-tensorization on CUDA (#12059)
new 722d0ecc Fix bug that disabled cuda integer dot product. (#12099)
new 5ab8176b [TVMSCRIPT] Make ceildiv available from tvmscript (#12096)
new 13c6c4df [Relay] Allow Primitive functions to carry virtual device annotations in PlanDevices (#12095)
new c2c89c9e Add member object accessors to With<> (#12100)
new 9a101ce3 [TIR] Moved PrimExpr operator overload from op.h to expr.h (#11973)
new ee8e1167 [Target] Add target_parser to TargetKind (#12119)
new 195e5104 [Target] Add "features" property to Target (#12121)
new f0e69b8c support overlapped itersum (#12039)
new 95598416 [LLVM] Clarify the status of pointers to llvm::Module in LLVMModule (#12123)
new 83d67ab7 Revert "support overlapped itersum (#12039)" (#12137)
new 50e01898 Fix #12039‘s broken cases (#12143)
new 9f16e357 [arith][BugFix] Fix simplify input PrimExpr of DetectClipBound (#12150)
new 78c0111b fix T.Ptr[T.void] for packed api roundtrip (#12118)
new 98bb996c [HEXAGON] QCOM hexagon library (qhl) (#12149)
new d820da61 [TIR] Well-Formed Verifier (#12166)
new cd1e0142 [Fix] Fix some errors in unittests (#12170)
new 9a037391 [TIR Pass] decouple flatten buffer to lower opaque block pass and flatten buffer. (#12172)
new a8891f4b Update to 0.10.0 (#12190)
new 38e5f147 [TVMScript] ExprDoc (#12048)
new e427e6c7 [OpenCL] Fix profiling hang for OpenCL device (#12173)
new 9d5e7adc [JIT] Force finalization of JITed code, expose sf/hf runtime functions (#12187)
new 481416f4 Use std::move to avoid warnings on clang-13 (#12196)
new 67070d89 [Target] Improve string interpretation in Target creation (#12152)
new 99c077ed [TVMScript] StmtDoc Definitions (#12111)
new b6c70583 [TVMScript] StmtDoc Printing (#12112)
new e6e891c3 [TIR] Asynchronous stage in software pipeline (#12171)
new 84c7409f [UX] highlight tvm script (#12197)
new a2dfef25 [UX][TVMSciprt] Use HTML formatter in notebook environments (#12240)
new 036cf2a7 [ROOFLINE] Add CUDA support to roofline analysis (#12205)
new 73c37cfe [Fix] Fix some errors in unittests (#12245)
new 9c2b5647 [TVMScript] Python Expression Precedence (#12148)
new cd0ceb69 [microTVM][ARM] Enable tests that were skipped unintentionally (#12223)
new acc0f996 [UnitTest][TIR] Testing utility for before/after transform tests (#12264)
new 82c554ac [Arith] Handle bitwise_and with power of 2 in modular set (#12272)
new 16195c64 [TVMScript] Add object path tracing to StructuralEqual (#12101)
new 849f629e [TIR][CUDA] Fix sub-warp reduction using "max" (#12275)
new aabde9df [LLVM] Create LLVM scope object for use with LLVM libraries (#12140)
new b2c903b8 [TIR] Add tir::builtin::assume (#12267)
new c7331b6c [TVMScript] Add source_paths to Doc (#12324)
new d511bf6c [TIR] Add DeclBuffer IR node and functors (#12300)
new c82f4591 [TIR] Add tir::builtin::undef (#12266)
new 704ecb72 [OpenCL] Use size_t instead of int64_t for OpenCL timer count (#12328)
new 599075a9 [UMA] UMA v1.0 (#12087)
new c0c17a0c [Hexagon] Minor changes/fixes in codegen_hexagon.cc (#12308)
new 581ba92d [Node] fix typos in include/tvm/node/functor.h
new e24601ed [FIX,STORAGE REWRITE] Rewrite buffers in let statements (#12349)
new 235a46d5 [testing] Remove wrapper from @slow (#11566)
new 0cc6c484 [TVMScript] Text underlining in DocPrinter based on Doc's source_paths (#12344)
new 54172e14 Unify name mangling in TVM (#12066)
new a8a49dc6 Build and test TVM under minimal configuration (#12178)
new 592c3805 Update C++ standard to C++17 (#12337)
new 23413acc [Adreno][OpenCL] Get rid of extra memory copy (#12286)
new fac6f0bc [Target] Add Target Parser for Arm(R) Cortex(R) M-Profile CPUs (#12319)
new 92b67f0c [Profiler] Fix graph_executor_debug hang (#12382)
new deb7084c [LowerVTCMAlloc] Move LowerVtcmAlloc to after StorageRewrite (#12364)
new 3b79c1e3 Update hexagon max_concurrency to be at most equal to the number of HVX units available. (#12394)
new bf7629e5 [TIR] Add pass ManifestSharedMemoryLocalStage (#12355)
new 8d6349a6 [Fix] Fix precision issue in FFI converting `int/float` to `PrimExpr` (#12417)
new 19765f67 [Fix] Fix errors in error checking and reporting (#12423)
new ac5c0277 Add `operator()` to `support::With` (#12418)
new 319f3700 [TIR] Allow converting `BufferRegion` to vectorized `BufferLoad` (#12420)
new 4930170c [TIR] Avoid `import *` in TIR tensor intrinsic registration (#12424)
new 07ecb634 [TIR] Allow `tir.Buffer` converted to `BufferLoad/BufferRegion` with `__getitem__` (#12422)
new fccc6564 [TIR] Expose: `call_packed_lowered`, `call_cpacked_lowered` (#12425)
new b4afc0c2 [TIR] Expose Stack-related TVM builtins in Python (#12429)
new 6f5f9802 [TIR][UX] allow override when register TensorIntrin (#12439)
new b907a989 [TIR] Expose Misc TIR operations to python (#12435)
new 85c535a0 [HotFix] Op is not bound to any variables (#12401)
new 1cb358e3 [Arith] Parse > and >= bounds in ConstIntBoundAnalyzer (#12457)
new adec3ede Expose `Struct/Tuple`-related TVM Builtins (#12452)
new 2a138c98 Change tir::GetPointerType to return std::optional<DataType> (#12458)
new 8cbe2d21 [TVMScript] Printer IRDocsifier (#12396)
new e78dcde4 Use std::make_unique instead of std::unique_ptr(new ...), NFC (#12459)
new 5ecfb2a9 Expose Missing TIR Builtins to Python (#12466)
new 4a5188bc [TIR] Expose TVM Backend API-related Builtins and Misc (#12468)
new 744738ac [TIR] Disallow vectorization with strides in VerifyGPUCode (#12477)
new 5d052548 [TVMScript] IRBuilder, IRBuilderFrame base class (#12482)
new 69ee5e8e [HEXAGON] Auto-vectorization (fp16) for v68 (#12397)
new e8a143fd [TIR] [bfloat16] add bfloat16 promotion for CallNode (#12370)
new 6c3c38a8 [CMSIS-NN] Re-use CPU Target Parser (#12320)
new 3a48ac66 [Target] Only append default keys if target doesn't have any yet (#12474)
new c27abd12 [TOPI]fix scatterND large shape problem (#12200)
new f2cf25ed [Fix] Fix some typos (#11503)
new 1374eefb [TIR][Schedule][UX] Beautify TIR Trace Printing (#12507)
new 6598d829 [TVMScript] Printer entry point (#12462)
new 95c68f36 [TVMScript] Printer: add boolean operators to OperationDoc (#12518)
new c5c6ecd1 [TIR] Support AllocateConst nodes in TensorIR scheduling flow (#12489)
new 2729a1b9 [ci] xfail failing ethosu codegen tests (#12508)
new e5a57dcd [LLVM] Add "cl-opt" attribute to target_kind "llvm" (#12440)
new 27673758 [TIR] Add pass to check for out of bounds memory access (#12352)
new 62300a9a [Target] Remove deprecated parameters from target (#12416)
new 6bc52089 [TIR][CompactBufferAllocation] Improve upperbound estimation of buffer compaction (#12527)
new 41d9134b [TIR] Expose Vector-related API in Python (#12571)
new 6ec0d8d2 [TIR] Expose `shift_left` and `shift_right` to Python (#12584)
new 3434f1a9 [TIR] Expose WMMA-related TensorCore builtins (#12589)
new 733fcd91 [CUDA][CodeGen] Fix cuda codegen's fp16 inf literal (#12581)
new a3522c55 [Runtime] Change default alignment to 64 bytes. (#12586)
new 5919f86c [TIR] Expose Memory Copy-Related PTX Builtins (#12611)
new 9329faf9 [Hexagon] Initial support for meta schedule tuning (#12587)
new 837d71d9 Replace '> >' in templates with >>, NFC (#12615)
new f9ed1823 [TIR] Expose MMA-related PTX builtins (#12623)
new 601839d4 [Refactor] Replace std::tie with structured bindings (#12610)
new 3a6a72ff [TVMScript] support float inf, -inf and nan in TVMScript parser and printer (#12618)
new 78fb5476 [TIR][TVMScript] Update printer / parser to make T.allocate return buffer var (#12412)
new d8144b22 [TIR] Handle DeclBuffer in ToSSA (#12679)
new 2d6e4d56 [TIR][StorageRewrite] Allow in-place buffer reuse of non-flat memory (#12655)
new 1970254b [TVMScript] IRBuilder methods for `IRModule` (#12694)
new f7efee13 [Test] Add tvm.testing.requires_libtorch (#12737)
new 316cf391 [TIR] Handle axis_separators during FlattenBuffer (#12652)
new c7f4ebf6 [TVMScript] Base IRBuilder methods for `PrimFunc` (#12745)
new b9bcf0a5 [OpenCL] Enable OpenCL for GPU tests (#12490)
new 770df029 [TIR][Arith] Add more strict checking in imm construction and folding. (#12515)
new 5d13aed7 [TVMScript] Base IRBuilder methods for `Block` (#12748)
new e9f0d1b3 [AOT] Add AOTLowerMain pass to lower a Relay main into TIR (#12550)
new 99a359b5 [TVMScript] IRBuilder methods for `PrimFunc` (#12755)
new 0c98b1bb [Arith][Refactor] Return Optional<PrimExpr> from TryConstFold (#12784)
new 569c3b6b [Arith] Simplify nested if_then_else (#12749)
new a712e0a9 Fix typo in doc of logging (#12798)
new 6b969d33 [TVMScript] IRBuilder methods for `For` (#12786)
new 88a1bb26 [TVMScript] Fix parse minimal i32 literal for tir script (#12772)
new 5df22454 [TVMScript] IRBuilder methods for `Axis` (#12808)
new caba2e41 [Testing] Add decorator tvm.testing.requires_cuda_compute_version (#12778)
new c0e729d5 [TVMScript] IRBuilder methods for `Block` (#12815)
new 399a539d [TIR] Construct the inverse in SuggestIndexMap (#12797)
new 231fbb41 [TVMScript] Add more helper functions to the printer infra (#12829)
new 2b208268 [TVMScript] IRBuilder methods for `Stmt` (#12830)
new b0368ad1 [TVMScript] IRBuilder methods for `Stmt` (#12831)
new 20f64357 [TIR] Implement API for padded layout transformations (#12720)
new ae3c2760 [Arith][TIR] IntSetAnalyzer, delay intersection of IntSet until use (#12821)
new ac61aa43 [BugFix][LLVM] Fix the bug that the generated systemlib cannot register ```__tvm_module_ctx``` symbol sometimes (#12817)
new b9ac2676 [Hexagon] 2-Stage Pipeline; Lower Async TIR primitives to Hexagon User DMA (#12785)
new b7627d0f [Containers] Add Array::Map (#12692)
new 6851154e [TIR] Enhance RemoveNoOp pass to remove negative loop (#12836)
new c80722fb [FIX,PROFILING] Fix gpu timer name and lookup (#12849)
new 53a92dec [TVMScript][Fix] Correct round-trip of explicit root block (#12673)
new 6e2cc837 [Utils] Disable automatic move constructor for tvm::With (#12822)
new 5a937dcd Fix clang warnings (#12876)
new 2cc0c9fb [TIR] Allow missing TensorIntrin in registry lookup (#12875)
new 8269b691 [IR] Use TVM_DEFINE_OBJECT_REF_METHODS macro for Op (#12893)
new c135e615 [BUILD] Re-enable ccache by default (#12839)
new e1900fd4 [TVMScript] Import TIR methods into the IRBuilder (#12900)
new cf78e585 [TVMScript] Infer T.match_buffer parameters for region (#12890)
new 6cd18403 [TIR] Refactor IndexMap::Inverse in terms of NonSurjectiveInverse (#12904)
new 0455683e [LLVM] Emit fp16/fp32 builtins directly into target module (#12877)
new 8af5e2cf [TIR][Transform] Remove num_unpacked_args from MakePackedAPI (#12892)
new 1201f303 [TIR][Transform] Clear buffer_map during MakeUnpackedAPI (#12891)
new 4ddd9eb2 [Bugfix][CMake] Update the minimum CMake version to 3.18 (#12682)
new e0331330 [CODEGEN][OPENCL] Compatibility for OpenCL version 3.0 (#12938)
new c8f15b39 [TIR] Use buffer's dtype when converting pad_value to TIR (#12925)
new a8e1cf58 [HEXAGON][QHL] Clippling the inputs of HVX version of QHL Sigmoid operation (#12919)
new 1948b307 [LLVM] Change CHECK_NE(x, nullptr) to CHECK(x != nullptr), NFC (#12943)
new af24c8b2 [Target] Add target_device_type attribute to override default device_type (#12509)
new 45b3e01b [CODEGEN][OPENCL] Sampler definition should be at outermost scope (#12951)
new 100ade6d [TIR] Use IndexMap to transform NDArray (#12949)
new 7f34d404 [TIR, MetaSchedule] Preserve unit block iters for auto-tensorization (#12974)
new 0aab4e03 [ci] Disable flaky ethosu + roofline tests (#12956)
new 614aac9d [TVMScript] Allow T.bool type annotations (#12975)
new 27e43012 [TEST] CPU feature detection for x86 and ARM dot product instructions (#12980)
new 627020b7 [Arith][IndexMap] Correct MapShape result for small vectorized dims (#12927)
new 97878fa2 [TIR] Require dtype.is_float() inside FloatImm (#12928)
new 5b0484a1 [LOGGING] Optionally print backtrace on segfault (#12959)
new fceb18bf [TIR][Arith] Prove conditionals by transitively applying knowns (#12863)
new 29aa019d [UnitTest][TIR] Support IRModule comparisons in CompareBeforeAfter (#12920)
new 0669e5e9 [TVMScript] AST, Source and diagnostics for Parser (#12978)
new 90efe3db Update to 0.11.dev0 (#13036)
new 5c0e05a0 [MetaSchedule] Allow skipping exact NDArray rewrite in RemoveWeightLayoutRewriteBlock (#13052)
new 686c1f39 [microTVM][Windows] Enable building TVM on Windows with USE_MICRO (#12851)
new b8e77c1e [Arith] Optional rewriting and simplification into AND of ORs (#12972)
new 3beae76d [TIR] Refactor NarrowDataType into DataTypeLegalizer (#13049)
new 236b8e41 [TE] Raise error for non-bijective transformation (#12926)
new fa8eb2c6 [TVMScript] Fix parsing int64 loop with optional loop start (#13068)
new c9781e89 [AOT] Sanitize input/output name in runtime (#13046)
new c3eb3930 [TIR] Fix handling of int64 extent in blockize and tensorize (#13069)
new f435fa84 [PopenPool] Enable Stdout & Stderr Redirect in PopenPool & PopenWorker (#13112)
new 829af2a6 [DOCKER][Adreno]Docker infra for Adreno target with CLML support (#12833)
new 93f1d08b [QNN][Hexagon] Disable QNN canonicalization pass (#12398)
new 1035a3e1 Skip stride check if shape is 1 in IsContiguous (#13121)
new 18fbcae5 [ci] Lint for trailing newlines and spaces (#13058)
new 620bb9e9 [TIR] Allow IndexMap applied to arguments with different dtypes (#13085)
new 06a59725 [Target] Add Target Parser for Arm(R) Cortex(R) A-Profile CPUs (#12454)
new f6dab1b4 [Hexagon] Support fetching and building Hexagon runtime with external runtime sources (#13138)
new 197dffa3 [TIR] Add the missing nearbyint intrinsic (#13175)
new 2090dd96 [TVMScript] IRModule parser (#13176)
new c9171e46 [Target] Replace utility functions with target.features (#12455)
new 0ef9f633 [AOT] Add CreateFunctionMetadata analysis pass (#13095)
new fcc52897 [TVMScript] TIR parser (#13190)
new 18d3dc7f [Hexagon] Add support for instrumentation based profiling for Hexagon (#12971)
new 66114061 [TIR] Add utility for anchor block extraction (#13194)
new bccd8f43 [Relay][Hexagon] Add per-channel FixedPointMultiply operation (#13080)
new 87d10ca0 [IR] Remove shadowing in IRSubstituteWithDataTypeLegalization (#13219)
new a87fe10b [TIR][Arith] Support negative coeff in ModularSet (#13081)
new 94bdfe4d [TIR][Schedule] Add cache_index to precompute index of buffer load (#13192)
new 9e95f3ac [MetaSchedule] Enable anchor-block tuning (#13206)
new c2dc34e9 [TIR][Arith] Implement kApplyConstraintsToBooleanBranches extension (#13129)
new 3fd85060 [Logging][Hexagon] Improve logging on Hexagon (#13072)
new 2ef44af5 [CI] Enable iOS RPC tests (#13229)
new 26f60cd6 [TIR] Use Optional<Stmt> for IfThenElseNode::else_case (#13218)
new c8be3f01 [Arith][TIR] Check for constant offsets of known literal constraints (#13023)
new 018e45e6 [BugFix][LLVM] Add UseInitArray flag in target_options_ (#13115)
new bf759cf1 [DLPack][runtime] Update DLPack to v0.7 (#13177)
new 2812c124 [build][relay][te][tir] remove unused vars / args (#13266)
new 27fb460b [ETHOSN] Throw error message when inference fails (#13022)
new 9933d95d [TIR][Arith] Use TryCompare to narrow inequalities if possible (#13024)
new f9db2c1d [build][tir] suppress -Woverloaded-virtual warning (#13267)
new 40bd49b9 [TIR] Added unit test for dynamic parameter in layout transform (#13298)
new ab399940 [Bugfix][Runtime] Fix sched_setaffinity in Android (#13158)
new 4c0283aa [TVMScript] Hide trailing return type if None (#13308)
new 9292d6ad [Minor][Testing] Consolidate IRs into corresponding functions (#13339)
new 36b0f73a [TIR][Arith] Fix divisor checking in `TryConstFold` (#13348)
new 92aa5422 [TIR] Make syntax of AST nodes different than ops (#13358)
new d359ac72 [IRBuilder][Minor] Add intrinsics like `T.int32x4` (#13361)
new 5161335d [TVMScript] Reorganize the folder structure (#12496)
new ff7bd2b2 [TIR][Bugfix] Fix AXIS_SEPARATORS in tir.Schedule.transform_layout (#13326)
new 4f48d0c8 [Codegen] Fix CUDA codegen for int64 Ramp (#13382)
new 15b6405a [RUNTIME][ALIGNMENT] Configurable kAllocAlignment if needed (#13307)
new 6c7320cb [OpenCL] Introduce OpenCL wrapper to TVM (#13362)
new 3c0aa251 [TVMScript] Use tir::Evaluate if expression is in statement context (#13396)
new 5eba3d79 Add support for cast double to fp16 (#13395)
new a92279c4 [ci] fix GPU other build (#13366)
new 80e1f893 [TIR] Remove PrimFuncNode::preflattened_buffer_map (#10940)
new 73e671c3 [TIR][Analysis][Arith] Implement basic data-flow analysis (#13130)
new ab1553e5 [Hexagon] Enable Hexagon User DMA bypass mode (#13381)
new d0e4a0c3 [Build] Fix MSVC compile option /bigobj (#13411)
new a3e04258 [TIR] Unify index data type when creating prim func (#13327)
new 551399d5 [TIR][Hexagon] Async DMA fixups (#13436)
new a3d29f18 [OpenCL] Improve OpenCL version detection (#13434)
new 12f15336 [TVMScript] Output elif where possible (#13433)
new 21695c9d [Fix] Fix IndexDataTypeNormalizer to avoid redundant casting (#13449)
new 844e5318 Fix building static tvm_runtime on windows (#13445)
new 90c87daf [microTVM] enable building microTVM components by default (#13073)
new a4d738bd [TVMScript] Improvements tvm.script.highlight (#13438)
new 83ae694d [TIR][Transform] Optional data-flow analysis in RemoveNoOp (#13217)
new f8e95e12 [TIR][TVMScript] Cleaner printing of And/Or chains (#13432)
new 358cff08 [RUNTIME] Correctly handling export_module when exporting modules of different type (#13489)
new 5086d59b [TIR][Schedule] Add condition to check buffer type (#13429)
new 185a470b [TIR] Fix buffer shape and IndexMap indices dtype mismatch (#13463)
new 2d3f3969 Revert "[microTVM] enable building microTVM components by default" (#13503)
new e37fafe8 [tir] Add copy on write to all nodes (#13512)
new 02aa3aab [LLVM] Switch to using New Pass Manager (NPM) with LLVM 16+ (#13515)
new 119c652e [TIR] Disable RewriteSimplifier extensions in RemoveNoOp (#13524)
new ea5e7080 [TIR][Analysis][Hexagon] Add vtcm memory capacity verification for Hexagon target (#13349)
new eeed951e [TIR] Introduce ReduceBranchingThroughOvercompute (#13299)
new 21350366 [Logging] Mark LogFatal::~LogFatal as [[noreturn]] (#13542)
new e61785ae [MetaSchedule][Hexagon] Add postproc for verifying VTCM usage (#13538)
new b355de45 [TIR] Fix remaining dtype mismatch issue caused by SubspaceDivide (#13558)
new 200b7ce8 [TIR] Fix layout free annotation in CreatePrimFunc (#13554)
new 6ec691c3 [CodegenC] Explicit forward function declarations (#13522)
new be811526 [TIR] Add preserve_unit_iters option to blockize/tensorize (#13579)
new 875c49cf [LLVM] Fix get tm allow_missing check pos (#13591)
new 84bea06c [OpenCL][CI] Enable OpenCL cpp tests in CI (#13400)
new 263a6356 [LLVM] Use std::nullopt instead of llvm::None (#13617)
new 27d45486 [TVMScript] Fix print round-tripable multi thread env binding (#13622)
new b2c2bf2a [Arith] Allow const folding on fp16 involving one and zero (#13631)
new d8556c71 [BugFix][TVMScript] Parser crash (#13630)
new 1f04167b [BugFix][TVMScript]fix var capturing order error (#13640)
new 3cc0e2a3 [CMSIS-NN] Add Cortex-M85 support (#13644)
new 3ffecf23 [Relay][Frontend] Span filling common API (#13402)
new d59515ce [TVMScript] More accurate hints for ImportError (#13662)
new e8f99f24 [CONTAINER] Struct Hash/Equal and JSON support for ShapeTuple (#13671)
new 1194b464 [RUNTIME][OPENCL] OpenCL host pointer support to acheive zero copy (#13413)
new e138f2ae [BugFix] Pylance emits the warnning 'Code is unreachable' (#13673)
new 260a77fb [Build] Expose missing USE_VERILATOR in cmake (#13676)
new fe861ffd [Bug][CodeGen,Cuda]fix cast fp16 to int8/uint8 in cuda (#13641)
new d6a9da4a [Tensorize][runtime] Add support for AMX(Advanced Matrix Extensions) through Tensor intrinsics (#13642)
new d33cb6fa [BugFix][TVMScript] Fix the roundtripability of intrinsic pow (#13692)
new 6bb8ae75 [tir] Add line level debug info (#13012)
new b4e24ec9 [TIR] Fix dtype mismatch error due to LetStmt (#13710)
new 8d07d2dc [TVMScript] Linter-friendly function definitions (#13713)
new 3c847af6 [Tests] Replace pytest.main with tvm.testing.main (#13717)
new 9dcf5e9b [TVMScript] Refactor IRDocsifier (#13593)
new 48b48195 [TIR][Arith] Add common sub expr analyzer (#13702)
new e6e4d7d7 [TE][PrimFunc] Fix create primfunc from te extern with explicit buffer load (#13729)
new b12a9aa8 [Arith] Use ConstIntBound to remove negative numerator when lowering (#13724)
new ed289b11 [Profiler] Allow user to flush L2 cache in `time_evalutor` function for profiling CUDA kernels (#13726)
new fff876e0 [CMake][OpenCL] Remove warning for OpenCL wrapper (#13683)
new 49805f28 [microTVM] tuning on micro targets with meta-schedule (#13514)
new 40b9ee47 [Hexagon][QNN] Improve performance wo QNN canonicalization (#13734)
new fa342a4a [Target] Make `key=arm_cpu` --> `key=arm_cpu,cpu` on AArch64 (#13775)
new 59dbfb25 [UnitTest] Parametrized test_arith_iter_affine_map::test_padding (#13774)
new 67247512 [TVMScript] IR Fragment Printing (#13742)
new e5a9c479 [TIR][Fix] Buffer slicing using index dtype as extent (#13788)
new 3e4f73ea [TIR][Fix] IndexDataTypeNormalizer not unwrapping float casting (#13789)
new 47e08bf5 [FIX] Minor Compilation Warning Fixes (#13794)
new cc24f32d [TIR][TOPI][x86][CI] Support skylake avx512 (#13621)
new 7a4f259e [TVMScript] Migrate More to TVMScripr Printer (#13785)
new e9319261 [TVMScript] `T.axis.remap` syntax sugar for TVMScript printer (#13743)
new 25a8806d [TVMScript] Use TVMScript for all TIR Printing (#13795)
new 8aa808a7 [TIR]Fix the crash of the pass RemoveNoOp (#13808)
new 9f3d00f7 [TVMScript] `T.match_buffer` syntax sugar in arguments for TVMScript printer (#13801)
new c0acf50f [TVMScript] `T.allocate` with `T.decl_buffer` syntax sugar for TVMScript printer (#13813)
new 7a4c9261 [TVMScript] Implicit root block syntax sugar for TVMScript printer (#13819)
new 2dc50846 [microTVM][CRT]Separate CRT template project from standalone CRT build (#13812)
new 68f9801b [TVMScript] Add ObjectPath to LiteralDoc (#13821)
new 7bfc9711 [TVMScript] More concise `T.allocate` syntax printing (#13830)
new 95f52553 [TOOL][NATIVE] Android native application for deploy and run (#13791)
new f55ac220 [TVMScript] Introduce `PrinterConfig` (#13831)
new 20fe67ff [RUNTIME] Fix determination of big/little cores domains (#13832)
new 5c818c7e [TVMScript] Default to T.Buffer than T.buffer_decl (#13838)
new 2afdb1d1 [TVMScript] Consolidate folder structure (#13841)
new 9857c93b [TVMScript] Comments and docstrings printing (#13839)
new 147d5bec [microTVM] Fix host-driven AOT memory workspaces (#13807)
new c79727ff [ROCM] Fixes compiling on ROCM 5 and accuracy on dense op (#13847)
new 9d2a3e00 [Arith] Support eq in detect_clip_bound (#13746)
new 85c51026 [RUNTIME][CLML] OpenCLML tuning and profiling enhanced (#13843)
new e24229f3 Enable C++17 for cmake modules (#13869)
new 0d756aeb [LLVM] Remove call to EmitDebugLocation from AddAliasInfo (#13872)
new b5366124 [TVMScript] Robustify the Highlight Printer (#13861)
new ee66fbc1 [ARITH] support floordiv in deduce bound (#13880)
new 1d2c14d6 [Build] Fix misleading error messages (#13887)
new b245ec5b [TIR] Handle nullptr returned by FindEntryFunc (#13852)
new b86fd4a1 Extend the USE_LIBBACKTRACE option (#13816)
new d8d89d75 [OpenCL] Implement save/load pre-compiled programs (#13868)
new 4ae67c29 [Fix][Arith] Analyzer simplification starts with canonical (#13875)
new ef259f46 [Fix][TVMScript] Fix `LetStmt` printing logic (#13900)
new fcc0f900 [TVMScript] Connect `assert_structural_equal` with new TVMScript printer (#13859)
new 6e13a956 [Arith] Updated incorrect simplification rule (#13922)
new bb9012da [OpenCL] Refactor OpenCL init function (#13919)
new c399edf5 [TVMScript] Schedule error reporting with new TVMScript printer (#13921)
new 35afcf55 [Arith][UnitTest] Parametrize tests of RewriteSimplifier (#13923)
new cb3a4835 [TVMScript] Support `show_meta` (#13934)
new 19dec9e9 [TIR] Allow TransformLayout index_map to contain RVs (#13930)
new b4d7fded [TVMScript][UX] Introduce decorator for deprecation (#13941)
new 67298905 [TIR] Expose bitwise ops to python (#13945)
new 2341483f [TVMScript][Fix] Print Multi-line String as Metadata (#13965)
new 967fea81 [TVMScript] Deterministic function ordering (#13962)
new 5084bd77 [TVMScript] Enable Safe Autocasting in BufferStore (#13960)
new d799840f Fix out of bound enum conversion (#13967)
new 77d74b7c [TVMScript] Unify `T.handle` and `T.Ptr` (#13969)
new 7d30da7b [TVMScript] Simplify TIR Var Definition (#13970)
new 1af30a6a [TVMScript] Encourage using T.Buffer directly (#13971)
new c2231b7d [microTVM] additional refactoring for enabling USE_MICRO in more builds (#13909)
new 9ff0c4c8 [microTVM]Refactor crt_config.h header file generation (#13955)
new 311cac70 [Build] Fix find_include_path when using TVM python package (#14007)
new 160beaf9 [CLML] Changes corresponding to OpenCL workspace refactorization (#13972)
new 44179702 [TIR] Add cp.async support for tir.if_then_else (#13966)
new 4fbfc581 [FIX][RUNTIME] Convert container with function value type (#14024)
new 0fd039a3 [Arith] Implemented PMatchesOneOf and matches_one_of (#13933)
new 17a00022 [TIR] [Bugfix] Pass the correct block_sref_reuse to Replace (#14023)
new 4ee468d7 [TIR] Enable Host Func Attribute for PrimFunc (#14020)
new b7b33550 [TIR] Introduce Pass InjectPTXLDG32 (#13973)
new be07ff45 [WEB] WebGPU Codegen (#14048)
new 0af7185d [Codegen][CUDA] Add error message for missing fragment info (#14073)
new 7e44f43d [LLVM] Add support for DeclBufferNode (#14103)
new b8ef73da [TVMScript] Use op attribute to control whether to print dtype in TVMScript (#14111)
new 0b9a73fb [Fix][TVMScript] Fix index of metadata in printed script (#14130)
new 1379231c [Arith] ConstIntBound was incorrectly assuming bounds were over int64… (#13918)
new 2364b6ac [Unittest] merge test_cp_async_in_if_then_else into test_tir_transform_inject_ptx_async_copy (#14138)
new 5091a058 [TVMScript][Printer] Remove relax prefix for now (#14140)
new 66789753 [Runtime] Fix high RAM usage when saving / loading paramters of big models (#14147)
new 4e12508a [microTVM] Use QNN schedules to give SOTA performance (#13752)
new a6e64162 [TIR] Allow TransformLayout with non-inversible index map (#14095)
new cd910574 [TIR][Analysis] Implement IdentifyMemCpy analysis function (#13947)
new 74a3f5d6 [TVMScript] Distinguish LetStmt and Let expression (#14207)
new 8d34bedf [TVMScript] Sugar T.env_thread + T.launch_thread (#14217)
new 5e7ee367 [TVMScript] Sugar Var Definition in TIR Buffer (#14223)
new 318eb7f5 [Refactor] Move `VarUseDefAnalysis` to header file (#14185)
new bec28e86 [TIR] Enhance loop unroll with unroll local access (#14224)
new 5d76716f [Fix][TVMScript]TVMScript BinOP printing refactor (#14200)
new c99ad4cb [Fix]Fix function ObjectPath in IRModule SEqual (#14230)
new 527ebb0e [TVMScript] Support SizeVar Roundtripping (#14227)
new 0057d2aa [TEST] Fix division by 0 in llvm codegen test (#14232)
new 2bc1a1bc [LLVM][BugFix] Fix include Triplet.h bug when LLVM version>= 17 (#14235)
new 9fcf0956 Update to v0.12.dev0 (#14241)
new 0013b3a5 [SVE] Adding codegen tests for SVE (#14239)
new 04c4593a [Arith] Add simplification rule for `x - max(x+y, z)` (#14271)
new ed5c513c [Transform] Use callable() instead of isinstance() for type checking (#14248)
new b1147bbf [TVMScript][Parser] Add more warp-level builtins and `Range` (#14279)
new 8fdffbf6 [IR] Enhance IRModule SEqual/SHash to support cross function calls (#14289)
new b1dacdfe [TIR][Hexagon] Enhancement of NarrowDataType pass for binary ops (#14298)
new d8d754e3 [TIR][Compute-at] Utilize InverseAffineIterMap for dom estimation (#14184)
new d0d50283 [LLVM] Add support to generate llvm.assume (#14294)
new 26e0d13b [Bugfix][TVMScript] Preserve variable names in LetStmt (#14319)
new a196a47e [Fix][TIR] Fix tvm::arith::UnionLowerBound (#14304)
new 94a22d1b [LLVM] Fix registerCallbacks API after recent change (#14323)
new e022da63 [CODEGEN][METAL] Fix ramp codegen (#14330)
new a4f3371b [METAL][CODEGEN] testcase for ramp codegen (#14331)
new a7ab6ea5 [CODEGEN][METAL] Fix unaligned vector load (#14332)
new af0bd412 [Hexagon] Add concept of DMA groups (#14254)
new c78c8067 [MetaSchedule] Introducing MemHammer (#14164)
new e78e095b [TIR] Fix Datatype in Lower TVM Builtin (#14347)
new 8e4e359c [CI] Update GPU image for CUDA 11.7 (#14363)
new 06c8e5f1 [TIR][Utility] More flexible tir::Substitute arguments (#14251)
new 9a1a6a9a [TVMScript] Use new variable frame in If/Then/Else (#14250)
new 5bd6cc18 [TIR] Remove LoadNode and StoreNode (#14381)
new 6c7b0ac9 [TVMScript][Fix] Fix `bool` printing for roundtrip (#14390)
new 367d57b8 [TIR] Legalize dtype of constants in IndexMap (#14385)
new b51a6350 [TIR] Improved MakePackedAPI error message (#14387)
new 1b5d2ced [TIR] Refactor BF16Legalize (#14405)
new 0eab9d61 [TVMScript] Improved error message for unexpected top frame (#14399)
new aafd336d [OpenCL][Textures] Always use SSA for texture loading (#14397)
new 8a58fdd3 [TIR] Remove special-casing of T.address_of in the storage rewrite pass (#14430)
new b1e5eb5f [Analysis] Improve error message in VerifyWellFormed (#14389)
new bb7a05bd [TIR] Update LowerTVMBuiltin to use Optional<T> (#14400)
new 9092a820 [Runtime] Introduce runtime module property (#14406)
new b8ab20af [Typo] Fix name of iter var type 4 (#14436)
new b3639397 [Hexagon] Fix deprecated call for data layout size in bits (#14438)
new ebc6a5d6 [Unity] Relax VM (#13878)
new f03351d2 [Unity] Relax expressions and types (#13901)
new 0a6a0220 [Unity][IR] First-class StructInfo (#13907)
new 26723bd2 [Unity] Basic StructInfo Analysis and Expr construction (#13916)
new 0109fd81 [Unity] Relax BlockBuilder and ExprMutator (#13926)
new ae5accd3 [Unity] Relax TVMScript Parser. (#13932)
new fd217ce2 [Unity] Relax TVMScript Printer (#13944)
new ca279a1b [Unity] e2e Relax minimum build flow (#13961)
new 28868de0 [Unity][Pass] Operator Fusion Passes (#14001)
new cdd898e8 [Unity][VM] Supporting "compiled" exec mode. (#14015)
new ac6341d8 [Unity][Pass] BindParams pass, FoldConstant pass (#14016)
new a341608b [Unity][Pass][TuningAPI] Introduce TuningAPI and MetaSchedule pass (#14014)
new 813d7dff [Unity][TVMScript] Move tir/relax import in script out of __init__.py (#14033)
new 10548e5d [Unity][Pass] Remove Unused Function (#14061)
new 9c5149e9 [Unity][BYOC][Pass] RunCodegen and TensorRT (#14078)
new bad4bb6f [Unity][BYOC] Add CUTLASS backend (#14081)
new 163496a3 [Unity][BYOC]Add relax backend pattern registry (#14106)
new b071bb8f [Unity] Add Global info (#14132)
new 2f1d6897 [Unity][WEBGPU] Codegen improvements and WebRuntime (#14187)
new e6a39f66 [Unity][TIR][Pass] ForceNarrowIndexToInt32 (#14203)
new 387ec4b7 [Unity] Introduce Default GPU Schedule Pass (#14182)
new 77238f5c [Unity][WEB] Improve webgpu codegen options to skip readonly (#14213)
new 1ff30263 [Unity][WEB] Simplify WebGPU Codegen per spec (#14225)
new bada3bfb [Unity][TVMScript] Fix prim_func lost issue in relax.emit_te (#14189)
new 7551feda [TVMScript][Unity] Improve PyLint Compatibility (#14276)
new 7fa1cd1f [Unity][DEBUG] Add Instrument (#14302)
new 09654404 [Unity][Transform] DefaultSchedule pass (#14266)
new a84261ad [Unity][TVMScript] Update GlobalVar `checked_type_` when `emit_te` (#14367)
new ff72a136 [Unity][VM] Add CUDA graph vm builtins (#14371)
new 637a8ca1 [Unity][Hexagon] Enable Relax VM for Hexagon (#14415)
new 394b5592 [Bugfix][TVMScript] Handle LetStmt for `var1 = var2` expressions (#14320)
new 626fe5eb [TVMScript][Bugfix] Tuple on the RHS of AssignDoc (#14452)
new d5248493 [Unity][BYOC] Add cuBLAS backend (#14291)
new f1b903d8 [TensorIR] Support for L2 prefetch async copy and pred_guard enabled async in vectorized if_then_else (#14329)
new 10c4e16f [Arith] Simplifications for floormod(x, 2) (#13936)
new cd6e0164 [TIR] Use same DataType of builtin::tvm_struct_set in C++ and Python (#14489)
new 4b71a301 [LLVM] Add guard for #include <llvm/Transforms/IPO/PassManagerBuilder.h> (#14469)
new 6018d0ff [TIR] Use IRModuleNode::Remove to remove None in PrimFuncPass (#14494)
new 60fce10a [LLVM] Add missing `override` to GetFormat and GetPropertyMask (#14470)
new a169c486 [TIR] Improved SeqStmt::Flatten utility (#14497)
new 5171a97a [TIR] Merged kDeviceThreadAxis and kUseDynamicSharedMemoryTag (#14495)
new e60e2a03 [Node] Utility methods for ObjectPathPair handling (#14498)
new fc7a3b29 [TVMScript] IRModule TVMScript Parser.
new b65b1f64 [TVMScript] Expose IRModule::attrs as I.module_attrs
new 894676af Expose attrs argument of "ir.IRModule" to Rust bindings
new b73819b1 [Runtime] Runtime module property mask for Metal and Vulkan
new 6074aaa9 [Arith][Bugfix] Simplify "x - 1 < y" into "x <= y" (#14528)
new 1a4c7473 [LLVM] Use DataLayout::getABITypeAlign instead of getABITypeAlignment
new ec6dd2e0 [TIR] Update SplitHostDevice to post-process with ConvertSSA (#14496)
new 53fce09d [ARITH] Enhance CanProve to handle symbolic bound (#14523)
new c4f355bd Update to v0.13.dev0 (#14544)
new d8a5114f [ARITH] Enhance CanonicalSimplify to Simplify ProdDiv (#14538)
new 46da7214 [Unity] Enable pod args in WebGPU (#14560)
new 4b9910fc [TVMScript] Distinguish between void* and handle (#14488)
new a5408c3e [Unity][TVMScript] Update struct_info for GlobalVar (#14579)
new f04b3b93 [Codegen][LLVM] Remove cast to i8* in builtin::address_of (#14563)
new c2937b73 [TIR] Use String instead of StringImm for AttrStmtNode::node (#14491)
new 2abafd61 [ARITH][BUGFIX] Fix a bug of iter map floormod(x,2) simplify (#14571)
new 159e579b [Object] Implemented .as<T> for ObjectRef param, returns Optional<T> (#14522)
new 5cde4d1d [LLVM] Expand tvm::Type to DWARF conversion (#14568)
new 32bab8a6 [ARITH] Enhance IterMapSimplify for symbolic (#14547)
new da4e8008 [ARITH][TensorIR] Improve CompactBufferRegion for symbolic shape (#14596)
new ad0d7d1e [LLVM] Validate generated LLVM module before optimization (#14564)
new 0a83b9d8 [MERGE] Bring changes from main into unity 2023-04-12
new 561511ea [Unity] Fix ForceNarrowI32 with pod arguments (#14605)
new e36f1ac6 [TIR][Hexagon] Use the "target" value in T.func_attr for VTCM limit (#14567)
new 3ffe4f9e [Unity] Update specific builtins for LM (#14617)
new d0b781a2 [Unity][CODEGEN] Fix metal codegen when with only single working dim (#14627)
new 5e3a9b37 [Unity] hotfix webgpu codegen for vec load (#14630)
new 162d0f6c [CODEGEN] Fix metal codegen when with only single working dim (#14628)
new 3c568e80 [Unity][TARGET] Updates vulkan codegen for DeclBuffer (#14641)
new 26db4c76 [METAL] Fix flaky memory issue due to racing (#14671)
new a05235ee [Unity] Improve WebGPU codegen for large grid (#14674)
new 5330d579 [TIR] Flatten SeqStmt on construction (#14492)
new 422bfa97 [CMAKE] Update search pattern of config (#14686)
new d18f2fb1 unify search path approach to various libs (#14694)
new 5b1baf12 [MERGE] Merge main into unity 2023-04-23
new 2236e076 [TIR] [Analysis] Calculate allocated memory at module level (#14711)
new ae31afa2 [TIR] [Hexagon] Add get_vtcm_allocation_sizes with lowering (#14720)
new 748157ac [METAL] Update metal runtime to directly store kernel map (#14727)
new 533b6d2d [Unity] Fix ForceNarrowIndexToI32 so it ignores i16 (#14733)
new b910feb4 [Unity] Add system lib build option to relax (#14734)
new e51de371 [TIR] More flexible buffer compaction (#14021)
new a39a317e [CI] Modify test cases to accommodate the CI upgrades (#14651)
new 4c78a3a6 [Arith] Implement statistics counters for RewriteSimplifier (#14532)
new 2623cbbc [TVMScript] Preserve LetStmt of constants (#14531)
new ff0bea51 [TIR][Driver] Move ShouldAnnotateEntryFunc logic into transform (#14562)
new 7d510cf0 [Bugfix][Codegen][CUDA] Wrong casting in ASM (#14782)
new 7dd8ef10 [TVMScript] Add `__name__` attr for parsed PrimFunc and IRModule (#14786)
new 52bdc84a More clear ref of thirdparty license (#14790)
new eaa2f956 [MERGE] Merge main into unity 2023-05-07
new 7840f81b [MERGE] Fix lint after lint image upgrade
new 74d239a0 [OpenCL] Refactor OpenCL runtime to support SPIRV binary ingestion (#14792)
new 8086e534 [Testing] Use TVMScript's "name" argument for error messages (#14808)
new e7248f10 [TIR] Improved parameter name in DLTensor unpacking error messages (#14776)
new 4c28a63c [LLVM][RUNTIME] Enable multi systemlib with device code (#14843)
new f40e0175 [Bugfix][TVMScript] Capture fails if var appears only in annotation (#14849)
new 671e18c6 [METAL] Fix vectorized select (#14846)
new f27c76e0 [Codegen][OpenCL] fix amibiguous selection operator call (#14833)
new f5aa3c4c [MERGE] Merge main into unity 2023-05-14
new ab797006 [LLVM] Use Var annotation in LetStmt for pointer type (#14570)
new 54d659f1 [TOPI][Target] Add SVE specific convolution (#14483)
new 1220cfcf [TIR] Avoid too complex predicate in compaction (#14866)
new 3453f317 [bugfix] fix the undeclared identifier 'f' (#14879)
new 002af920 [CONTRIB] Enable create_staticlib to take in tar files (#14876)
new ab74c572 [RUNTIME] Make systemlib unique per prefix (#14887)
new 58d44795 [TIR][Doc] Fix formatting in pop_trace docstring (#14894)
new 9b06fab1 [Vulkan] Add cooperative matrix support (#14817)
new 117a0870 [TIR][TVMScript] Added format/parsing of subroutine calls (#14889)
new 2e888fa8 [MERGE] merge main into unity 2023-05-20
new 10db1315 [Contrib] Use f-strings for string formatting, NFC (#14893)
new 6bbf2cc9 [TIR] Expand unit tests for ConvertSSA (#14892)
new 956dffa9 [TVMScript] Round-trip DeclBuffer with undefined data pointer (#14900)
new acc872d8 [LLVM] Codegen subroutine call when CallNode::op is GlobalVar (#14901)
new 4454d595 [Unity][WebGPU] Try F16 support for WebGPU Backend (#14904)
new d5b2d4a5 [TVMScript] Allow T.target("device", host="host") to specify host (#14915)
new 3a2487ad [BUILD] Enable log before throw message in windows (#14937)
new 2b59970a [Target] Add target to all TVM callbacks (#14939)
new bd6cff35 [LLVM] Expose Host CPU Feature Detection (#14946)
new d960f4df [TIR] Handle subroutine calls in MakePackedAPI (#14913)
new cd321768 [TIR] Restrict tir.transform.CombineContextCall to host functions (#14945)
new ef8ec72d [Bugfix][TIR] Avoid symbol conflicts in MakePackedAPI/MakeUnpackedAPI (#14950)
new 5e887063 [TIR] Preserve existing kTarget function attribute in BindTarget (#14942)
new f048ce46 [TVMScript] Prevent bool to int conversion in T.Assert condition (#14941)
new 1b85503c [Codegen][LLVM] Allow void return type from PackedFunc (#14958)
new 17be5372 [METAL] Fix int8 vectorized cast (#14962)
new f1afa116 [TIR] SplitHostDevice, handle subroutines (#14918)
new 65818ac6 [Runtime,RPC] Use f-strings for string formatting, NFC (#14967)
new 6bf5bb02 [Hexagon] Add support for v73, make v68 default (#14965)
new 4de0c08e [TVMScript][TIR] Parse subroutine calls with no arguments (#14919)
new aabf1e97 [TIR] Avoid re-defining `var = arg_var` in ArgBinder (#14952)
new 7d1a8f5d [IR][SIBuilder] (#14574)
new 556a8921 [Bugfix][TIR][VTA] Update host-side target, even without device func (#14982)
new 3b2ff7fe [CMAKE] Add a dummy target to defer libtvm dep (#14975)
new 9a2c0838 [OpenCL] Improve diagnostic message (#14995)
new fc759336 [RUNTIME] Update Module and Registry to use String Container (#14902)
new 46e5dde2 [DataType] Initial support of fp8 (e4m3/e5m2) (#14863)
new 7808e846 [CMAKE] Introduce dummy build as an option (#15000)
new 8b585d72 [OPENCL] Always use convert_T for type conversion (#14972)
new c6b2918b [MERGE] Merge main into unity 2023-06-01
new d9f11abe [IR,TE,TIR] Use f-strings for string formatting, NFC (#14990)
new 834fb629 [Minor] Fix compilation warnings (#15007)
new e0d2fa2d [Hotfix] Remove `LOG(INFO)` from unsupported dtype legalization pass (#15015)
new d85bdabe [TIR] Restrict tir.transform.LowerTVMBuiltin to host functions (#14944)
new 336ba94a [TIR] Keep trivial LetStmt in tir.Simplify when used in buffer decl (#14951)
new be0fc2be [TIR] Enhance TVMScript Buffer Slice Access (#14693)
new a722c0d8 [OpenCLML] Reactor and introduce on chip memory and memory planner (#14922)
new b07f5412 [TIR] Preserve object equality in Buffer::GetFlattenedBuffer (#15040)
new 29e40b15 [Vulkan] Allow DeclBuffer in CodeGenSPIRV (#15035)
new fc1f6af0 [TIR] Move SplitHostDevice to before MakePackedAPI (#14986)
new 75979c61 [TIR] Handle DeclBuffer in IRSubstitute (#15054)
new fb456729 [TIR] Handle DeclBuffer in StorageRewrite (#15051)
new 142c6dee [TOPI][Adreno] Fix problem with ceil_log2 (#15061)
new 386509e7 [TIR] Handle DeclBuffer in Inline/ComputeAt/ReverseComputeAt (#15038)
new 179693a9 [Unity] Add hexp for compute capacity <= 5.2 (#15070)
new f7e1a851 [BYOC] Add GEMM kernel from FasterTransformer as submodule (#15046)
new 43ef45b3 [Unity][Frontend] Add relax onnx importer and tests (#14999)
new 6dbae68e [Bugfix][CUDA] Fix codegen for hexp for sm >= 52 (#15079)
new 7c4523ef [CodeGenC] Use PrimFuncNode::ret_type in function signature (#15073)
new b76148b5 [ARITH] Improve arith simplify to handle symbolic reshape pattern (#15081)
new 3fc4cdc6 [MERGE] Merge main into unity 2023-06-13
new 5bcf35a2 [MERGE] Fix after merge
new a6b5176e [Target][rocm] Replace rocm arch parsing from int to string (#15088)
new 97feb0ae [TIR] Update primfunc host attachment to include host (#15102)
new 9a36a59e [TIR][CodeGen] Define PackedFunc error code in MakePackedAPI (#15076)
new 0e05cef8 [TIR][TVMScript] Convert tir.op operands to PrimExpr (#15091)
new d5c2063b [TIR] Handle DeclBuffer in RemoveNoOp (#15096)
new cbb71023 [TIR] Handle DeclBuffer in MergeDynamicSharedMemoryAllocations (#15094)
new 5ca220d0 [Unity][Relax][UX] Specify function purity in the @R.function decorator (#15109)
new 8f527256 [#15043][Docs] Updated the copyright year from 2020 to 2023 (#15071)
new 248af5dc [Arith][TIR] Recognize empty extents (#15129)
new 7273988f [ARITH] NormalizeToIterSum (#15120)
new a4ab92da [ARITH] Hotfix flaky test in padded matmul (#15131)
new 005bcd5f [TIR] Avoid duplicate GlobalVar names in SplitHostDevice (#15119)
new 035e5d67 [NDArray] Allow creating a view from a strided array (#15132)
new b102e921 [Test] Improve check for TVMError exception in test_cast (#15138)
new a028ef7c [LLVM] Minor refactor to LLVMModuleNode::SaveToFile (#15139)
new c705269a [LLVM] Remove the "ret_void" argument of AddFunction (#15127)
new a10b061d [TIR] Block dependence analysis without schedules (#15146)
new 81ab1e28 [MERGE] Merge main to unity 2023-06-24
new 593f0561 [Minor] Fix Compilation Warnings (#15154)
new ef3d4970 [Target] Add MetaSchedule-compatible attributes to OpenCL (#15166)
new 9d68750b [TIR] Fix RenewDef for symbolic input shapes (#15163)
new bb464bff [TIR] Expose UndefinedVars to Python (#15165)
new 65fae288 [Runtime] Clean TVM stacktrace in error messages (#15161)
new accb5a21 [MetaSchedule] Introduce MMA Tensor Core Multilevel Tiling (#14673)
new 654a89e9 [TensorIR][ROCm] AMD Matrix Core Support (#15106)
new 45c33704 [TIR][Schedule] Support padding-by-factor in PadEinsum (#15168)
new 1f701c33 [microNPU][ETHOSU] Fix compiler attributes types (#15159)
new 5f592279 [RUNTIME] Add weak symbol to builtin fp16 (#15182)
new 51c9c979 [Testing] Utility method to run TVM on remote device (#15179)
new 7639e7f7 Merge remote-tracking branch 'apache-upstream/main' into unity
new ac140c30 [CMake] Support LLVM-16 static linking (#15164)
new 77fb5b95 [TensorIR][Visitor] Visit buffer members in `match_buffer`'s in block visitor functions (#15153)
new a6f79c15 [RPC] Report RPC Session Timeout to Client Instead of "kShutdown" (#15187)
new bfba8756 [ARITH] Allow Analyzer to MarkGlobalNonNegValue (#15193)
new 73f1ed9d [TIR][Transform] Add LiftThreadBinding Pass (#15207)
new 96ae5346 Update version to 0.14.dev0 on main branch (#15208)
new f6b61c2d [MERGE] Merge main into unity 2023-07-03
new d0e98e39 [Android] ndk static build (#15215)
new 4af76474 [ARITH] Enhance buffer shape bound deduction to include offset (#15228)
new 418db68c [Dlight] Enhance Decode-GEMV Schedule (#15195)
new a43858d8 [CMAKE] Add Vulkan header for Android (#15229)
new d2b5d0b8 [UnitTest][NVPTX] Avoid cascading failures from CUDA postproc (#15136)
new 9fa4a877 [TIR] Allow VerifyWellFormed to accept IRModule (#15247)
new 52b62b26 [TIR] Preserve AllocateNode::annotations (#15242)
new da010bf5 [TVMScript] Handle parsing of PrimFunc calls with non-void return (#15239)
new 68fbd33c [TIR] Output DeclBuffer in LowerTVMBuiltin (#15243)
new ba5643d5 [Testing] Add tvm.testing.local_run (#15268)
new 267f5694 [TIR] Allow symbolic bounds in IndexMap analysis (#15264)
new 63a865b9 Merge remote-tracking branch 'apache-upstream/main' into unity-staging
new 3fdd0699 [TIR] Call TVMBackendFreeWorkspace inside LetStmt (#15253)
new 23abaa87 [TIR] Implement TIR macros (#15260)
new 41d9143e [Unity] [DistIR] Introducing DistIR (#15289)
new 7e11c66a [TIR] ThreadAllreduce warp-level primitive support with multi-warp (#15327)
new 77fc49d5 [Runtime] Device API to query L2 cache size (#15332)
new 78c18b3d [Runtime] Flush L2 cache in time eval (#15305)
new 45cf64ba [TIR] Return error code from kernels in SplitHostDevice (#15241)
new 81a3c37c [Unity] CUDA Graph update (#15320)
new 34a18544 Merge remote-tracking branch 'apache-upstream/main' into unity
new 84bf2ef9 [TIR][UX] Implement privacy annotations in TIR (#15214)
new 5fad153f [Relay] Introduce arguments limit to FuseOps pass (#15137)
new 998b7509 [BugFix][TIR] Fix multi-grouped multi-warp allreduce (#15399)
new c47d2751 [TIR] Allow starred expressions in TIR script (#15404)
new 8e631d7f [Codegen][Metal] Support metal warp-level primitive (#15401)
new 26a196a1 [TIR][BugFix]Ensure the Var's scope is correct (#15406)
new e01d2c1e [Hexagon] Add default vtcm capacity for targets (#15414)
new a428cb4b [Submodule] Add Flash attention v2 (#15423)
new f7345f3b Merge remote-tracking branch 'upstream/main' into unity-staging
new 8f33eeba [ROCm] Fix some ROCm codegen bugs (#15454)
new e67cc317 [TVMScript] Support starred indices in for-loop (#15442)
new f2fb558b [ROCm] fma intrin (#15464)
new f987537b [Bugfix][CUTLASS] CUTLASS path finding (#15476)
new 0a584aba [TIR] Output DeclBuffer in MakePackedAPI (#15263)
new bb521d0f [Bugfix][CUTLASS] CUTLASS path finding (#15480)
new 4ad9811c [MERGE] Merge main into unity 2023-08-04
new 6ac7b825 [Script] Be more careful when generating ast.ExtSlice for Subscript (#15483)
new 4bf7a479 [TVMScript] Allow use of Python builtins in script (#15492)
new f2034a44 [Unity][BYOC] Integrate Flash attention v2 kernel into CUTLASS BYOC (#15467)
new 4c58749b [ARITH] Enhance Canonical Simplify for LE (#15471)
new 56d18733 [VM][Textures] Enable OpenCL textures for VM (#15419)
new e1f79eb0 [CodeGenC] Handle GlobalVar callee as internal function call (#15103)
new 3df9dcd2 [Relax] CuDNN Fallback Support through BYOC. (#15462)
new 684a8025 Remove duplicate the word (#15524)
new 357d74e3 [Unity] Multi-device support for Relax (#15447)
new 6ac2a80b Remove IRModule Dependency from Target (#15511)
new 44911c97 [Runtime][Minor] Suppress verbose logging in Metal device API (#15543)
new f3e1b6cb [Unity][MSC][M0.1] Enable set name and layout for exprs (#15500)
new 2be81841 [Fix] Fix the typo in compile flag (#15542)
new b77eed5b [TVMScript] Create loop var with min_val dtype in for frame (#15547)
new 03042fb0 [Unity] Fix the ambiguity issue in `vDevice` constructor on Mac with Apple clang version 14.0.3 (#15546)
new 119ee623 [TVMScript] Use triple-quoted python strings for metadata (#15564)
new 9f0ccd44 [Arith] Fix handling of overlapping predicates (#15555)
new 9c238f75 [Testing] Allow Capitalized name in CompareBeforeAfter (#15568)
new 08bdebee [TIR] Shuffle in PointerValueTypeRewrite for scalar reads (#15517)
new 600cda54 [TVMScript] Optionally output the address as part of variable names (#15579)
new aaa0360c [Arith] Add tvm::arith::PresburgerSetNode to work with Presburger Set in MLIR (#14690)
new dc02c24b [CMake] Add NCCL to TVM and TVM Runtime (#15605)
new bae26103 [Arith] Fix detect linear equation with uint var (#15558)
new 9c8de9ce [Hopper TMA] CUDA codegen for async copy with barrier synchronization (#15616)
new 4c76394d [Unity] UpdateVDevice pass and infer vdevice (#15570)
new 2351c24e [Runtime] Expose ModuleGetFunction as PackedFunc (#15623)
new 0d6b69b1 [CMake] Add RCCL to TVM and TVM Runtime (#15624)
new 13eebe7c [Unity] Disco: A Framework-Agnostic SPMD Runtime for Distributed Inference/Training (#15622)
new bcc5c187 [Runtime] Utils to Stringify Device (#15630)
new 415d1670 [Runtime] Serialization/Deserialization of runtime module (#15244)
new 8cfa7242 [TIR] Output DeclBuffer in SplitHostDevice (#15493)
new fd4476bc [Arith] Added simplification rule for multiple equality compares (#15628)
new 4bc3608e Do not link LLVM libraries into cpptest binary (#15639)
new 02fc9d4f [Arith] MLIR PresburgerSet compile fix mlir >= 160 (#15638)
new d30e97b5 [Runtime] Make `export_library` parameters after `file_name` keyword-only (#15658)
new 83d92fc0 [IR] Use structural equal for Range equality (#15664)
new ed3528fe [Hopper TMA] Add CUDA codegen support for bulk asynchronous copy (#15656)
new 8e7b65ce [Unity] Add support for Google Pixel OpenCL (#15675)
new 9e3490f2 [BugFix][Arith] IterMapRewriter abort rewriting once failure (#15677)
new 956030aa [Module] Implement custom imported modules serialization (#15666)
new 4d85efe5 [MERGE] Merge main into unity 2023-09-06
new 54ef2cda Fix after merge
new 5835c228 [Runtime] Make `CSourceModule` and `StaticLibraryModule` Binary Serializable (#15693)
new 405b59c4 [FFI] Propagate Python errors across FFI boundaries (#15596)
new 543bdd08 [TVMScript][FIX] Disable `show_object_address` in printing by default (#15705)
new d03626a0 [TVMScript] Disable `black_format` by default (#15706)
new 35d14ca8 [Hopper TMA] Add intrinsic to create barriers for synchronization (#15684)
new 39195dec Merge remote-tracking branch 'main' into 'unity'
new 06f74f56 Revert "[CodeGenC] Handle GlobalVar callee as internal function call" (#15725)
new fdbb1f26 [Target][Device] Auto detect target and create device from str in torch style (#15714)
new 91f91530 [Disco] Pipe-based Multi-processing Session (#15727)
new 3ac6a779 [Target][TOPI] Use LLVM for x86 CPU feature lookup (#15685)
new dfc4456b [UnitTest][Metal] Parametrize allreduce GPU tests (#15749)
new 5f25bcb4 [TIR] Do not drop 4th argument to tir.max (#15763)
new 7fb70da2 [Arith] Fix detect non-divisible iteration form like (x % 255) // 16 (#15665)
new aff7168b [Runtime][CUDA] NVTX Integration (#15760)
new 3e584434 [Hotfix] NVTX for CPU-only Build (#15774)
new 91f083cc Merge branch 'main' into unity
new e7c5a60f [Codegen][ROCm] Mismatched Dtype of Workgroup/Workitem (#15777)
new d320887d [Disco] Integrate RCCL (#15776)
new 63f46341 [Disco] Improve RCCL Integration Logic (#15796)
new 0dd2a43b Merge remote-tracking branch 'apache-upstream/main' into unity-staging
new b80f33e5 [OpenCL] Don't initialize OpenCL runtime on host (#15745)
new 1bcb3a55 Revert "[TensorIR][Visitor] Visit buffer members in `match_buffer`'s in block visitor functions (#15153) (#15816)
new e3137165 [TVMScript] Use environment variable TVM_BLACK_FORMAT for .show() (#15762)
new fe1ff7dc [Unity][TVMScript] Produce var = R.ExternFunc("") statements (#15703)
new 67956f73 [Target] LLVM helper functions for any target info (#15761)
new 157f7bd2 [Unittest][Metal] Add minimal metal functionality test to CI (#15756)
new 9ecaef79 Merge remote-tracking branch 'apache-upstream/main' into unity-staging
new 4e77e364 [VM] Memory Manager moved up to runtime (#15833)
new b87c33e2 [Disco] Add -lrt to TVM runtime for NCCL (#15876)
new 2ea9cd32 [Fix] Remove duplicated words from comments, NFC (#15873)
new 9aa85269 [Disco][Fix] Remove Dependency to PyTest (#15886)
new e921fa6d [Arith] Simplify the result of non-divisible floordiv (#15881)
new a276f5f2 Merge remote-tracking branch 'apache-upstream/main' into apache-upstream-unity
new eb295672 [release] Update version to 0.14.0 and 0.15.0.dev on main branch (#15847)
new 71b5f72b [Target][CI] Add LLVM functions for current system info (#15903)
new c55851fc [Unity] Fix TVMScript Issues in Testcases (#15920)
new 45bca5db [LLVM] Fix for llvm CodeGenOpt API change (#15921)
new 6edd647e Revert "[release] Update version to 0.14.0 and 0.15.0.dev on main branch (#15847)"
new 0032fcce [release] Update version to 0.14.0 on main branch
new bdbc5fcd [Release] Update version to 0.15.dev0 on main branch
new 1dbb22ff [CodeGenC][Redo] Handle GlobalVar callee as internal function call (#15835)
new 69fbee22 [Minor] Fix compilation warnings for clang (#15940)
new 3153830a [CMake] Fix order of GNUInstallDirs module (#15966)
new e011ffab [TVMScript][TIR] Pretty print TIR LLVM function name (#15953)
new 3094d049 [Unity] Support symbolic PrimValue arguments (#15980)
new 31c79b00 [MERGE] Merge main into unity 2023-10-29
new 61e574ef Fix after merge
new 144ef16a [Fix][TIR]fix symbolic strides lower (#16000)
new 2aae90e4 [FFI][Python] Handle error propagation when line number is missing (#15955)
new 2b9181ce [Unity][nn.Module] Support `nn.SourceModule` (#16006)
new 3a34cee3 [Unity] Deterministic Ordering when Iterating IRModule::functions (#16020)
new 7cf07eb6 [Fix][TIR]fix mul dtype mismatch (#16010)
new bba3fa4d [Codegen] Add shuffle for cuda and metal (#15998)
new 908277c8 [Pylint] fix pylint issues for thrust&tflite_runtime&util (#16023)
new 018f95b1 [Codegen][Metal] Disable cross-function call in Metal codegen (#16033)
new 1038279d [TVMScript] Fix mismatched dtype of IterVar in `T.thread_binding` (#16041)
new 61cc0b88 [CMake] Use llvm-config to locate Findzstd.cmake (#16032)
new 7179f7e8 [TIR] Fix pass RenewDefs error in gather/take case (#16063)
new 5060fe48 [CUDA] Add an option for profiling cuda kernels (#16061)
new 53ebf908 [Unity] Fix FuseTIR pass for gather/take cases (#16064)
new a931f309 [Unity] Enhance Python Annotations for Relax Expr (#16075)
new 549684e8 Merge remote-tracking branch 'main' into unity
new 3a4bc25d [TIR] Enhance Python Type Annotations for TIR stmt (#16076)
new 15f0cf0c [Unity] Implement FNormalize attribute for operators (#16067)
new 55fc3091 [Fix][TIR] Fix dtype issues for match_buffer and ramp node (#16051)
new 442525e0 [Fix] Broken Windows Build with LLVM (#16081)
new fc8c834b [Target] Support obtain l2 cache size from target (#16039)
new 2918dca6 [TIR] Enhance Python Type Annotations for TIR Expr (#16083)
new db212dd7 Add _ffi_api.py under script folder (#16087)
new faaf2235 [Packaging] Include BYOC dynamic libraries into wheel (#16034)
new a548f00f [CI] Refactor unittest folder (#16110)
new 140b4944 [Runtime] Parallel-for with threading backend (#16133)
new 4cc93515 Merge branch 'main' into 'unity'
new cda84eac [Unity] Flash infer integration (#16146)
new 6f29fb18 [Unity][3rdparty] Remove TVM in 3rdparty of FlashInfer (#16155)
new 6f29206e [Unity][Transform] Implement RemoveUnusedOutputs (#16117)
new b7f9ba3e Enable ccache to accelerate contrib compilation (#16176)
new 6bf3e558 [Unity] Enable ccache for `nn.SourceModule` (#16189)
new 319f8b28 [Device][Metal] Fix metal warp size (#16192)
new 1d425c17 Fix IRModule initialization with attrs (#16202)
new 6da7ad1d [Unity] Update FlashInfer (#16208)
new f765d603 [Unity] Fix upstream tests that fail on unity branch (#16196)
new 949d2955 [Relax] Fix to enable emit_te of topi scan/sort kernels (#16226)
new 5ce817e3 [Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case (#16235)
new d139ed96 [TIR] ConvertSSA process entry func first (#16236)
new 8c23bb20 Revert "[Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case" (#16241)
new 6bea617e [Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case (#16245)
new d034b0b2 [Unity] Avoid to use `std::regex` (#16249)
new 116e69a2 [Unity][nn.Module] Refactor `ExternModule` (#16247)
new c24efe62 [ARITH] Simplify nested if_then_else when constant is appearing in then_expr (#16227)
new ddabe20e [Unity] Add missing library import (#16263)
new aa2ccd51 [Unity] Add Relax multi-device e2e cases (#15823)
new f23b3c5a [TVMScript] Disable concise scoping when the scope stmt is explicitly annotated (#16271)
new a3ecc17f [Unity] Update cutlass FpA IntB GeMM submodule (#16320)
new cfb207ae [release] Update version to 0.15.0 on main branch
new 8c5ea7fb [release] Update version to 0.16.dev0 on main branch
new af1ccc48 [Unity] Cutlass kernel compatibility with cmake 3.18+ (#16302)
new 6306b496 [TIR][Transform] Implement InlinePrivateFunctions (#16184)
new a68af954 [TIR] In SplitHostDevice, check for variables in thread extents (#16250)
new eb326df2 [TIR] Allow sync threads inside condition (#16345)
new b0746f5b [Codegen] Fix if_then_else codegen (#16242)
new c12e5e62 [CMake][MSVC] Disable permissive mode for MSVC builds (#16343)
new a9bb13e6 enhance shared memory merge.
new 78eb73b9 fix typo
new 9ba0a0e8 [Unity][Contrib] Add vLLM paged attention kernel (#16350)
new 6ea7858a Merge branch 'main' into 'unity'
new 52fcab2b Fix after merging 'main' into 'unity'
new 038d8a5f [TIR] Extend DP4A tensor intrin (#16293)
new 68463c63 [LLVM] Update Host.h path (#16373)
new 2da1f186 [Runtime] Use cudaGetDeviceCount to check if device exists (#16377)
new 161766b8 Merge branch 'main' of github.com:apache/tvm into unity
new 42af1725 [Unity] Set CMAKE_CUDA_ARCHITECTURES default to native (#16335)
new a91e35cf [TOPI][Target] Add fp16 SIMD support for conv2d on `arm_cpu` targets (#16383)
new ebb60cf1 [Bugfix] Disable SingleEnvThreadVerifier (#16361)
new 999823fd Merge remote-tracking branch 'upstream/main' into unity
new e21e6f4b [OpenCL][CMake] Fix OpenCL tests compilation (#16394)
new 0f56bab5 [DeviceAPI] Support querying total global memory (#16398)
new 6767e238 [ROCm] Some fixes of ROCm codegen (#16404)
new 958c76cc [Unity] Split DecomposeOpsForTraining into two steps (#15954)
new ec3fc6b6 [Bugfix][Unity] Recover MSVC/NVCC/ROCm/Vulkan (#16414)
new 26f8b668 [CMake] Enable cuda lang if USE_CUDA is on (#16426)
new f1d55191 Merge branch 'main' of into branch 'unity'
new 787e6be2 [Unity] downgrade cmake version requirement (#16432)
new b5dc27ad [Unity] Support cumsum with pure int32 (#16439)
new 69e3eafa [Metal] Dispatch numerically stable tanh for metal (#16438)
new 07305fc2 [BugFix]Ensure that bf16 arrays are created as expected (#16436)
new 93cd7925 Revert "[Unity] Split DecomposeOpsForTraining into two steps" (#16442)
new 6a07b3d2 [ROCm][WebGPU] Intrin Dispatch: `tanh`, `erf`, `log` (#16441)
new f35c612d Merge branch 'main' into unity
new 81b6919a fix typo in storage rewrite
new 1b4d1369 [Disco][3rdparty] Add latency optimized all reduce kernels.
new 25273746 Revert "[Disco][3rdparty] Add latency optimized all reduce kernels."
new d3fd01b0 [Unity][CodeGen] RunCodegen based on externally-exposed functions (#16422)
new 3427c4f5 [SVE] Add vscale builtin (#16484)
new 74ca9122 [Runtime] ParallelFor skipping thread backend for unit extent (#16508)
new f9908cb4 [Minor] Fix Clang compilation warning in fuse_tir.cc and codegen_c_host.cc (#16511)
new 3e59640a [TIR] Require exactly same-dtype matching for Vulkan smem reuse (#16515)
new 13e53839 [Redo][Unity] Split DecomposeOpsForTraining into two steps (#16465)
new a18f6d1a [CI] Fix CI Script and Broken Tests (#16521)
new 0f477768 [RUNTIME][ROCM] Properly align rocm parameter buffer (#16550)
new fa9ea982 [Unity][TVMScript] Optionally hide StructInfo that can be inferred (#16356)
new 2c7a79e8 [Web] Compatibility with PagedKVCache in WebGPU (#16554)
new a0719f5d Improve error message in NDArray::CopyFromTo (#16539)
new caec6da4 [Upd] Enable lld search to include /opt/rocm/llvm/bin for rocm (#16540)
new 043dd9fc [MISC] Fix compile warnings (#16571)
new e38cd985 [Marvell BYOC]: Marvell AI Accelerator Integration - Phase 1 (#16570)
new 051c7ced [RUNTIME][METAL] Fix multithreading access of metal runtime (#16605)
new a96ef428 [SVE] Change the dtype of Ramp and Broadcast lanes to PrimExpr (#16523)
new c0df7f70 [Doc] Fixed Docstring usage example in `tvm.ir.make_node` (#16610)
new d960f4c8 [TIR] Expand debug symbol output for CodeGenLLVM (#16544)
new 8f92d6d6 [Runtime] Add TVM_DLL to threading backend funcs (#16630)
new e6db8343 [Disco] Implement `Session.import_python_module` method (#16617)
new 5a2e07e0 [Disco] Expose functions to query the per-worker device/rank (#16639)
new e67617b2 [SVE] Add support for scalable data type strings (#16612)
new 41a525bd [TVMScript] Represent tir::builtin::ret() using python "return" (#16640)
new 6830334b [TIR] Enhance and fix tensorize schedule for some case (#16560)
new 55d8e860 [Bugfix][TIR] Handle AttrStmt of upcoming tir.Var in ConvertSSA (#16682)
new 9bcbb895 [DeviceAPI] Support "GetCurrentStream" (#16689)
new 2610c678 [TIR] Support Vector Reinterpret Calls (#16673)
new e9777edc [Unity][TIR] Clear struct info when specializing PrimFunc (#16584)
new 2a9caa44 [Lint] Add check to prevent usage of #include <regex> (#16412)
new 2f9f44b3 [LLVM][RUNTIME] Add optional LLVM ORCJIT runtime executor (#15964)
new e853f50e [Fix][Arith] Fix canonical simplification of LE (#16704)
new 1e040694 [Transform] Remove R.Object parameters after LazyTransformParams (#16699)
new 03726e4e [Target] Automatically detect system triple when not specified by the user (#16513)
new dc60aedc [TIR] Improve well-formed check's handling of match buffer (#16655)
new 95dfa355 [SVE] Add codegen support for scalable buffer accesses (#16696)
new ee0f43ea [RUNTIME] Ensure NDArray.CopyTo(Device) always sync (#16716)
new cb40470c [RUNTIME][METAL] Provide richer runtime when error happens (#16713)
new 2de4a8f4 [TIR][CUDA] Add native FP8 support to codegen (#16548)
new 1d463199 [Fix] Introduce TVM_DEBUG_WITH_ABI_CHANGE to warn ABI changes in debug mode (#16728)
new 5e36ae72 [Arith] Provide tighter ConstIntBounds for special cases (#16588)
new bbecefdb [Target][CUDA] Allow non-numeric arch as needed for latest gpu (#16736)
new 3cc3b0c3 [Arith][Fixup] Require feature flag for tighter inequality bounds (#16735)
new 8098f537 [Cutlass] Add group gemm kernels (#16751)
new f22c85ba [Runtime] CUDA IPC Memory support and custom allreduce kernels (#16750)
new 603c36f4 [Unity][Parser] Check well-formedness in the parser (#16569)
new 28d6647d [CONTRIB] Add nm symbol dump (#16763)
new e722cbb6 [LLVM] Lack of DWARF type is not an error (#16748)
new aafb7436 [Hotfix] Revert driver API pass ordering that breaks MLC, mark failing test (#16770)
new 6c6ccb87 [RUNTIME][OPENCL] Bugfix for ciImage create with host ptr (#16768)
new e7eeb128 [TIR][Driver] Use `BindTarget` to specify target for FP8 legalization (#16767)
new 711cb0c3 [IR] Default to empty attributes, instead of NULL (#16745)
new 86790aa3 [Fix] Fix build errors with VS2022 (#16790)
new 58ceeb2e [Codegen, Cuda] Add overload for fp8x4 e5m2 <-> half4 conversion (#16787)
new aae89ab2 [Relax] Implement operators to inspec DLTensor::strides and offset (#16721)
new 0d837b6b [SME] Add support for inserting processor state annotations (#16761)
new 955145d1 [Target] Use LLVM target parser for determining Arm(R) A-Profile Architecture features (#16425)
new 962639cc [Relax] Allow R.Prim('bool') in relax::If and assert_op (#16642)
new b7f07aae [Runtime] Add "TVM_DLL" to NVTX header (#16809)
new ff96ed2b [Runtime] Introduce MSCCLPP with NCCL equivalent interface (#16804)
new 8d972930 [Runtime][LLVM] Fix errors during loading of target tags (#16808)
new 1aa9622e [Cmake] Allow using custom CCCL path for thrust (#16816)
new 5a3add0f [Codegen] Add check to disable invalid reinterpret (#16786)
new a225fa36 [LLVM] Fix compilation failure due to minor change (#16812)
new cbd7fc00 [KVCache] Introducing auxiliary data manager (#16824)
new 6f24da2e [TIR] Ramp and Broadcast lanes fixed to int32 dtype (#16795)
new 15ace454 [SME] Target parser support for SME (#16794)
new c8b831d2 [Disco] Support setting workers' CPU affinity (#16807)
new 28a21897 [TIR] Fix segfaults from ordering of Let/Assert in MakePackedAPI (#16543)
new 24b74b00 [Meta-Schedule][OpenCL] Enable MS tuning for Android OpenCL (#16846)
new 713fcc6b [TVMScript] Produce empty DictAttrs when R.func_attrs is absent (#16844)
new b11b4e52 [IR] Provide well-formed intermediate in ApplyPassToFunction (#16843)
new 3ff1dc0e [SVE] Support scalable vectors in LoopVectorizer (#16782)
new 8aaf229f [VULKAN] Fix CLZ support for Vulkan (#16858)
new 8229a426 [TVMScript] Add parser and printer support for e4m3/e5m2 fp8 (#16864)
new 9ab465c2 [Codegen, CUDA] Add handling of fp8 broadcast / const (#16865)
new 62ee10bf [BugFix][Target] Added null check to fix segfault at ->defined() in cpu.cc DetectSystemTriple() (#16766)
new 74ab7a38 [OpenCL] Add OpenCL device for automatic target detection (#16854)
new 15b0c5ea [release] Update version to 0.16.0 on main branch
new 4653b726 [release] Update version to 0.17.dev0 on main branch
new 8614b088 [TIR] Make T.reinterpret nop when dtype is the same (#16879)
new 2073b221 [Relax] Stabilize relax pass mutation order (#16883)
new e7e19d3f [SVE] Support splitting by vscale in `tir::split` and `te::split` (#16862)
new 45764592 [RUNTIME][VULKAN] Support total_global_memory (#16890)
new 611fed80 [TVMScript] Optionally use `ruff format` instead of `black` (#16876)
new 54c247a0 [Target] Don't register AArch64 target tags without LLVM compiler support (#16897)
new e7fe0aef [Bugfix] CudaDeviceAPI::GetAttr may check kExist when GPUs absent (#16903)
new 357881f3 [CMAKE] Misc improvment of Util (#16900)
new dfeba5f4 [Upd] Fixed lld search in rocm (#16907)
new 8feec0e1 [SVE] Check for SVE target in VectorizeLoop (#16893)
new f199ee68 [CMAKE] Make LOG_BEFORE_THROW explicit (#16914)
new 74b3c151 [SVE][TOPI] Add conv2d NHWC hybrid SVE schedule for `arm_cpu` (#16899)
new 5e5471c6 [TVMScript] Support `T.launch_thread` with i64 dtype (#16916)
new d52b6dcc [Fix] Fix SSA conversion for SizeVar retention (#16924)
new 6616cacf [Runtime] Allow offset to be specified in NDArray::CreateView (#16938)
new 7ba650ce [TIR] Enhance CLZ intrinsic support (#16952)
new f8974a14 [SVE] Add get_active_lane_mask builtin (#16965)
new 88dfd077 [LLVM] Stringref API deprecation fixes (#16968)
new 3e232255 [TIR] Support narrow dtype for let binding (#16947)
new b1fcf42f [SVE] Add codegen support for `vscale_range()` function attribute (#16962)
new e267e96f [UnitTest] Use pytest's scope='session' for tvm.testing.parameter (#16930)
new 89667a8b [Cuda] Skip FreeDataSpace when CUDA driver is in inconsistent state (#16980)
new ec8caf03 [QoL][IR] Provide std::hash and std::equal_to for IR Variable types (#16909)
new 4e69f4b4 [Relax][Transform] Handle identical PrimFunc with distinct VDevice (#16959)
new f7f9e201 [SME] Introduce scalable fp32 dense schedule (#16921)
new cf0551ba [Runtime] Allow query of available device memory through DeviceAPI (#16994)
new fb1bf8bb [SVE] Use only powers of two as possible vscale values (#17001)
new 1675de9c [TOPI][Testing] Enable conv2d NHWC fp16 topi testing for `arm_cpu` (#17007)
new bbf15c28 [USMP] add missing const specifier for global_const_workspace (#16999)
new ba852a2f [Metal] Support metal device profiling (#17025)
new 85820b81 Support multinomial_from_uniform dispatch (#17010)
new afba8b77 [TIR] Fix Shuffle rewrite (#17030)
new ec4bd164 [SVE] Add support for representing and creating buffer-level predicates (#16966)
new 1ac6afb6 [SME] Add scalable fp16->fp32 dense schedule (#16981)
new ef23e09c [SME][TOPI] Add conv2d NHWC SME fp32 schedule (#17003)
new 6a3a8bfb [Runtime] Use preferred host memory (pinned memory) in KV cache (#17036)
new e9a66155 [TIR] Fix Bug in VectorizeLoop (#17039)
new f170a472 [Runtime][ROCm] Enable ROCm host memory support (#17037)
new d485ce90 [Runtime] Compatibility with dmlc::Stream API changes (#16998)
new 96da2b3d [CODEGEN] Vector-Codegen support for llvm-pure-intrin (#16985)
new 1a9cc657 [FP8][Codegen] Add make_fp8 vector constructors (#17065)
new aa49ada9 [WebGPU] Translate `int8x4` into `u32` (#17071)
new 5eecf27c [Metal] Enable Debug Label (#17059)
new ffd5d7f3 [Arith][SVE] Add rewrite rules for indices split by scalable expressions (#17046)
new aaeb5c16 [SME] Extract gemm block correctly when fused with bias (#17076)
new a7339443 [CMake] Show NVCC include directories in compile_commands.json (#17079)
new 4f57b767 [TVMScript][Relax] Preserve tir.SizeVar through TVMScript round-trip (#17083)
new c89c6281 [SME] Utilize predication in fp32 matmul and conv2d schedules (#17054)
new 21ec6714 [UnitTests] Use tvm.ir.assert_structural_equal whenever possible (#17092)
new 2603f203 [TIR][RPC] Allow RPC calls to compiled PrimFuncs with no arguments (#17098)
new abf38c9a [Dlight] Use 16x32 spatial x reduction thread extents in GEMV scheduling (#17082)
new 1009a7d4 [TVMScript] Better Type Annotation for TIR OP (#17107)
new bdf9498c [TIR][DLight] Enable SimdGroup op for Metal (#17112)
new dd262903 [WebGPU] Add `tir.dp4a` (#17124)
new 7fd96cac [Hexagon] Add support for v75 (#17123)
new 03c90b9f [WebGPU] Implement `tir.dp4a` with WGSL built-in function `dot4I8Packed` (#16976)
new c866a9a2 [TOPI] Add dense schedule for fp16 and fp32 using gemm (#17091)
new 8ce56bb8 [Backend][ROCm] Fix error when building TVM with LLVM 19 (#17141)
new 0abbdba2 [Utils] Define line-length for "ruff format" (#17125)
new 45d65452 [QoL][IR] Provide default constructor for NameSupply/GlobalVarSupply (#17135)
new b825c746 [release] Update version to 0.17.0 on main branch
new b7acdaee [release] Update version to 0.18.dev0 on main branch
new 84205dda [Relax] Integrate cuDNN attention (#17157)
new 59ecf25f Remove and replace deprecated `distutils.util.strtobool()` (#17185)
new 287f82bb [TIR][Analyzer] Simplify `x==x` expressions for all dtypes (#17158)
new f146ef73 Pass to eliminate redundant branch and overcompute (#17170)
new 3d5a34a7 [Disco] Implement SocketSession (#17182)
new 7628e2dc [LLVM] Fix for getHostCPUFeatures API change (#17199)
new dcf08d36 [TIR] Validate tir::Buffer axis_separators on construction (#17219)
new 2b2f918d [FFI][RUNTIME] Introduce runtime boxed types for int/float/bool (#16183)
new 7863278e [Relax] Implement R.ensure_zero_offset and update memory planning for R.view (#17145)
new d9ff1398 Revert "[FFI][RUNTIME] Introduce runtime boxed types for int/float/bool" (#17252)
new 5a43aac9 [ROCm] Support ROCm 6 (#17256)
new d2fbc0c2 [FFI] Re-introduce the boxed primitive values (#17257)
new a5b24e85 [CODEGEN][OPENCL] Fix opencl codegen for few ops (#17273)
new a92ed4e1 [WINDOWS] Compiler options for non x86 targets (#17260)
new 88d926bf [Codegen] Emit `tir::Let` as var assignment explicitly (#17278)
new b11d46d2 [FFI][Runtime] Use TVMValue::v_int64 to represent boolean values (#17240)
new 96084cfd [ROCm] hipBLAS integration (#17290)
new 2c7222c0 [Docs] Introduce Relax API and move legacy part to standalone page (#17286)
new 0733a85f [Rocm] Fix non-standard rocm path (#17295)
new d2edd027 [Codegen][WebGPU] LetNode common subexpr override (#17302)
new f1650a34 [Disco] Add NVSHMEM support (#17317)
new 79e20b07 [Target] Refine equality check on TargetKind instances (#17321)
new 62a9cffc [Relax] Update GlobalVar name in AttachGlobalSymbol (#17202)
new cd593f29 [LLVM][RUNTIME] Fix RISC-V CodeModel propagation to ORCJIT runtime executor (#17347)
new faf0a27a [IR] Expose ReplaceGlobalVars utility in the Python API (#17361)
new 7da0b746 [FIX] fix bug when normalize iter with different lower bounds (#17360)
new 249b94a7 [TVMScript] Avoid segfault from invalid TVMScript (#17373)
new 2e8ebc0d [Fix][LLVM] Fix getHostCPUFeatures LLVM version cutoff (#17403)
new d345de65 [CI] Update image tag to 20240917-153130-9f281758 (#17397)
new f41a48af [WASM] Implement concat embeddings (#17404)
new 45bf409c [TIR, TVMScript] Add TIR - Triton integration (#17395)
new ee56c531 [BYOC][NNAPI] Add NNAPI backend for BYOC (#17385)
new 5b512329 [TIR][NarrowDataType] Bufferload's index should not inherit bits constraint of value (#17411)
new fffffd79 [CI][Windows] Workaround for error in FindLLVM (#17409)
new 0e740e66 [Runtime] Add property Module.is_device_module (#17407)
new bd112feb [CMake] Add NCCL/RCCL header directory to include path (#17422)
new 9cf67914 [NVSHMEM] Enable nvshmem memory allocation (#17415)
new 1b3fb255 [TVMScript][TIR] Add source kernel intetration via call_kernel (#17434)
new f0d1a3bd [TVMScript] Enable T.macro decorateing class method (#17435)
new a70fc852 [TIR] Add `is_vector` Method to DataType class and update usages across Codebase (#17443)
new a5b2f81f [release] Update version to 0.18.0 on main branch
new 183d24ac [release] Update version to 0.19.dev0 on main branch
new 08b3143c [TIR][Schedule] Add annotate_buffer_access primitive (#17423)
new 639dbc83 [Device][OpenCL] add CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST to … (#17472)
new db845b29 [TE][CreatePrimFunc] Fix loop carried dependency case with nested block levels (#17474)
new 4a17bbab [OPENCL][ADRENO] Introduce Qualcomm extension support (#17519)
new 7f6b5e75 [FIX][topi.scatter_nd] fixed shape equality assert by using analyzer to prove equality (#17537)
new 7208bbdf [REFACTOR] Phase out VTA (#17542)
new e8361465 [CI] Upgrade CI image to `20241105-030952-3e386fd3` (#17451)
new c5f2fb07 [LLVM][RUNTIME] Make ORCJIT LLVM executor the default one (#17538)
new 0a84a6fe [LLVM] Make compilable with LLVM-20 (#17547)
new 18b5fd13 [Refactor] Phase out microTVM (#17554)
new 5d4e559e [Runtime][Dist] Implementation of KV cache transfer (#17557)
new 8239ebac [release] Update version to 0.19.0 on main branch
new 0a600516 [release] Update version to 0.20.dev0 on main branch
new cb26f145 [RUNTIME][OPENCL] Bugfix
new 1294790e [RELAX][PASS] Convert layout pass and ops enhanced to support sub indexing (#17568)
new f6c3cae2 enforcement on loop partition control
new 8527e0a3 [ADRENO][WINDOWS] Windows build dependencies for Adreno target
new 5600d223 [KVCache] Add KV Cache for CPU Runtime (#17615)
new 3e3691f9 [Codegen, CUDA] Add FP8 Tensor Core Codegen (#16950)
new 9b52347f Handle vector width (VLEN) for RISCV arches
new 6fc58357 [RUNTIME][CLML] Profiling options enabled for CLML (BYOC via JSON Runtime)
new 5a2b7747 [CUDA] Remove htanh from unsupported math ops for CUDA 12.8 (#17639)
new 9aca7455 [PYTHON] Build cython by default (#17637)
new 86b9bd2b [OPENCL][TEXTURE] Improved texture memory planning (#17571)
new f1c212ac [REFACTOR] Phase out relay python components (#17656)
new bb15a7a6 [REFACTOR] Phase out te.schedule python components (#17658)
new 1a1d827a [REFACTOR] Phase out relay c++ components (#17660)
new 7c0853c2 [REFACTOR] Phase out te.Schedule c++ components (#17662)
new afa7b270 [Refactor] Phrase out python dependency `decorator` (#17661)
new 386820d2 [RELAX][BYOC] OpenCLML offload support for Relax (#17654)
new 62639fca Pick up vector length from 'zvlXXXb' (RVV) mattr for riscv (#17641)
new d56ab252 [REFACTOR] move build flow from C++ to Python (#17665)
new 33a150b9 [REFACTOR] Allow target dependent default tir pipeline dispatch in tir.build() (#17669)
new f5f4bfe4 [REFACTOR] Followup cleanup of relay phase out (#17681)
new 127474fa [REFACTOR] Cleanup legacy TE-based passes (#17685)
new 6e814680 [Codegen] FP4 support (#17630)
new dba8ea81 [Refactor] Remove legacy TE schedule tag (#17701)
new 1d18b214 Fix typos in multiple files (#17703)
new 90208ab9 [CUDA] FP4 cast and reinterpret support (#17708)
new 4f49fd4a [DataType] Rename FP8 dtypes to standard names (#17712)
new ce939a6a [Refactor] Introduce base Executable class and `tvm.compile` interface (#17710)
new a1daf617 Fix the get_target_compute_version for sm >= 100 (#17716)
new 59644a52 [FFI] Phase out ctypes fallback in favor of cython (#17714)
new 500e57b8 [Refactor] Migrate build API to `tvm.compile` (#17718)
new 9a031d11 [DataType] BF16 Support (#17670)
new 1ae07882 Fix typos in comments and strings (#17736)
new 9ab9e6f0 [IR] Compact Functor vtable (#17731)
new b9e3de99 [BF16] Support ndarray.asnumpy() to bfloat16 tensor natively using ml_dtypes (#17739)
new 1bc60191 [Codegen][CUDA] Fix codegen of cast among vector bfloat16, fp8 and fp4 (#17741)
new e64d6af7 [Refactor] Clean up Relay references in the codebase (#17733)
new 8e98a0ed [Codegen] Support codegen for vectorized tir.ShuffleNode (#17748)
new 8e83c956 [REFACTOR] Phase out StackVM (#17784)
new cf100686 [REFACTOR][TIR] remove legacy tir::any (#17783)
new a2b8de6a [NFC] Fix `explict` typo (#17811)
new 002f0ab7 [release] Update version to 0.20.0 on main branch
new 3d91ff73 [release] Update version to 0.21.dev0 on main branch
new f87bca8f [Install] Fix error during python/tvm installation (#17808)
new f4353fa5 [Relax][PyTorch] Add Logaddexp op support for exported program (#17803)
new 46f77f33 [Triton] Support latest `triton.compile` interface (#17913)
new 9ef4c21a [WebGPU][CodeGen] Override PrintVecElemLoad and Store for WebGPU (#17917)
new 7163e06b [REFACTOR] Introduce and modernize FFI system (#17920)
new e8f1a2c7 [Relax][PyTorch] Add div.Tensor_mode and trunc Op Support for Exported Program and FX graph (#17924)
new af9ab7bf [REFACTOR][FFI] Cleanup PackedFunc related redirection (#17923)
new 6526297c [REFACTOR][FFI] Cleanup container redirections (#17929)
new b1aa2a13 [REFACTOR][FFI][RPC] Migrate RPC to use the latest FFI ABI (#17931)
new 558a3490 Add registion for the operator asin and acos in llvm (#17945)
new 422747e8 [FFI][LLVM] Fix compilation errors with clang20 (#17954)
new 6bce20df [LLVM] Fix JIT unknown reloc issue for case of RISCV
new a7efbfb8 [LLVM][Codegen] Enable SVE/VLA for RISCV targets
new da7487a6 [FFI][REFACTOR] Update to distinguish as and cast (#17979)
new 84f2a8a1 Add registion for the operator asinh, acosh, atanh in llvm (#17969)
new a757e1f9 [Vulkan] Add TIR unary trigonometric/hyperbolic intrinsic definitions (#18005)
new 3396ccd1 [REFACTOR][FFI] Phase out legacy C API (#18010)
new 1817cb86 [REFACTOR][PYTHON] Phase out tvm._ffi and Limited API support (#18020)
new bf2eb2e1 [REFACTOR][FFI] Cleanup PackedFunc redirections (#18022)
new e4643265 [Python] Fix library lookup path for pip installed packages (#18026)
new 505bf162 [ARITH] Fix canonical simplify for LE with incorrect range assumptions (#18025)
new a491910c [CUDA] Fix thrust with latest FFI refactor (#18024)
new 71c2abe1 [Codegen] Resolve issue #17965 where the same model produces different outputs on the LLVM (CPU) and CUDA (GPU) backends (#17985)
new 8292919e [ARITH] Canonicalize mul-coefficient to rhs (#18031)
new 3acca66d [BugFix][CUDA] Fix: Update settings for rerun on Increase FloatImm precision when printing 64 bit values in CUDA codegen (#18035)
new 7b546afa [Dtype] Low-precision Blackwell Datatype Support (#18027)
new c7fb79d2 [Metal] Fix `GetFunction` of metal runtime (#18034)
new 5f14d0be [REFACTOR][FFI] Update symbol name for library module (#18042)
new 5197e523 [REFACTOR] Phase out the relax tuning_api (#18043)
new 6183707b [3rdparty] Phasing out FlashInfer AOT from 3rdparty (#18046)
new 2bef3872 [Refactor] Rename `relax_vm` to `vm` (#18049)
new 2f18643f [FFI] Enhance FFI Object exception safety during init (#18050)
new 99d7c5d0 [TIR] Phase out ProducerStore, ProducerRealize and Prefetch (#18057)
new b0e2fdd2 [TEST] Move temp files into tempdir (#18058)
new 02c9c832 [FFI][REFACTOR] Update registry to have complete meta-data (#18062)
new d934d601 Add Python functor support for TIR expressions and statements (#18060)
new 72750b42 [TIR] Extend address_of to support Buffer objects (#18068)
new 0f34f41d [ARITH] Add IsBound method to ConstIntBoundAnalyzer (#18067)
new b42f81ea [REFACTOR] Phase out the RelaxExpr.checked_type in favor of struct_info (#18078)
new 4038f35a [REFACTOR] Phase out LegacyReprPrinter and improve CommonSubExprElim (#18080)
new ee80b353 [Script] Add support for merging block annotations (#18079)
new 5c1e7d25 [SCRIPT] Bump Python minimum version to 3.9 and update AST compatibility (#18086)
new 970fd476 [Script] Enhance alloc buffer handling in nested frames (#18088)
new 563d9c77 [FFI] Provide Field Visit bridge so we can do gradual transition (#18091)
new dbdbde3a [NVSHMEM] Extend CUDA backend to compile and link TIR modules with NVSHMEM (#18093)
new df3f0d70 [FFI][REFACTOR] Migrate attrs to use new reflection (#18095)
new 8e3f3bbf [REFACTOR] Transition VisitAttrs to new reflection mechanism in tir/ir_builder/meta_schedule (#18096)
new b64f61b0 [REFACTOR] Transition VisitAttrs to new reflection mechanism (#18098)
new 73196124 [Runtime] CutensorMap support (#18097)
new a9604c24 [REFACTOR] Formalize namespace for all objects (#18101)
new 65daddb2 fix: guard tensormap with cuda version check (#18107)
new 1c01e010 [REFACTOR][FFI] Phase out old VisitAttrs mechanism (#18106)
new e0a084a8 Add LLVM Legalization for tir.erf (#18104)
new 84936f9f [FFI] Cleanup visit_attrs attribute after refactor (#18112)
new 81963d0b [CMake] Refine C++/CUDA standard settings in CMakeLists.txt (#18113)
new be94a848 [FFI] Replace `__attribute__` with C++ standard attributes (#18114)
new 8313ebdb [release] Update version to 0.21.0 on main branch
new 6c6f02b1 [release] Update version to 0.22.dev0 on main branch
new 09174bc6 [Codegen] Update LLVM version requirement for `insertDeclare` (#18123)
new 30583187 [Refactor] Build cython with isolate environment (#18124)
new f4627f6c Phase out StackVM runtime support (#18125)
new 37daebdc Revert "[Refactor] Build cython with isolate environment" (#18127)
new c8dc5880 [Target] Support CUDA device function calls (#18055)
new 4be9b52d [MISC] Fix compilation warnings of unnecessary `std::move()` calls (#18130)
new 86dcf1a5 [REFACTOR] Migrate TVM_FFI_REGISTER_GLOBAL to new reflection style (#18142)
new 8e5e307e [CodeGen][CUDA] Add sinhf CUDA Math API for CodeGen (#18144)
new 25ca4ec5 [TIR] Add `T.thread_return()` for early thread exit in CUDA kernels (#18134)
new fc7a8d79 [FFI][REFACTOR] Modularize refelection (#18147)
new a0dd2562 [FFI][REFACTOR] Phase out TVM_FFI_REGISTER_GLOBAL in favor of GlobalDef (#18148)
new d13301c9 [TIR] Decouple DeepEqual from StructuralEqual (#18151)
new a56ceacb [TIR] Fix trivial index map [] -> [0] (#18154)
new 533bfe3e [FFI][REFACTOR] Migrate StructuralEqual/Hash to new reflection (#18166)
new b303472a [REFACTOR][FFI] Phase out SEqualReduce/SHashReduce (#18172)
new fd543178 [FFI][REFACTOR] Cleanup to align to latest ffi (#18183)
new 90685242 [FFI][REFACTOR] Hide StringObj/BytesObj into details (#18184)
new d1b9bf82 [FFI] Introduce small string/bytes (#18185)
new 0572da97 [FFI][REFACTOR] Migrate the Save/Load JSON to the new reflection (#18188)
new ffafaef7 [FFI][REFACTOR] Phase out getattr based attribute handling (#18189)
new 1935ed72 [FFI] Phase out ObjectPath in favor of AccessPath (#18192)
new a0b21698 [REFACTOR] Update data type rewriter to enable recursive rewrite in Any (#18197)
new 3953f6cb [TIR] Fix host/device function check for build (#18199)
new 08e91961 [FFI][REFACTOR] Move Downcast out of ffi for now (#18198)
new 3c64e427 [LLVM] Fixes up to the latest LLVM21 (#18204)
new 69d435f3 [FFI][REFATOR] Cleanup entry function to redirect (#18205)
new 1b999434 [CODEGEN][REFACTOR] tir.call_llvm_intrin to remove nargs (#18206)
new 4499ab0f [FFI] Formalize ffi.Module (#18213)
new bd7bca8d [FFI][REFACTOR] Establish ffi.Module in python (#18214)
new 5581eab0 [FFI][REFACTOR] Establish Stream Context in ffi (#18216)
new b9adcb47 [FFI][REFACTOR] Cleanup API locations (#18218)
new 491e0672 [Fix] Resolve deadlock in PopenPoolExecutor and LocalBuilder (#18219)
new f4587566 [NVSHMEM] Fix compatibility with CUDA code without nvshmem use (#18222)
new 9861c354 [FFI][REFACTOR] Establish tvm_ffi python module (#18226)
new 54e95ee3 [LLVM][Fix] Do not emit debuginfo on vscale or other unknown types (#18232)
new 195fdc5d [Relax] Add Python function support and BasePyModule for PyTorch integration (#18229)
new 5b8dba4a [Fix] Update FlashInfer JIT header lookup (#18244)
new 8e4f18a5 [LLVM][MSWIN][CI] Fix LLVM module build with latest CI update (#18245)
new dec5f732 [Build] Migrate Python packaging to pyproject.toml with scikit-build-core (#18239)
new 0c130882 [Python] Complete Python packaging with scikit-build-core (#18251)
new 4134e189 [FFI] fix two seemingly migration issue (#18258)
new 48565342 [FFI][ABI] Introduce weak rc support (#18259)
new 0a203d74 [FFI] Construct NDArray.strides by default (#18272)
new 53925dfd [FFI][ABI] Append symbol prefix for ffi exported functions (#18273)
new f02f986e [FFI][REFACTOR][ABI] Rename NDArray to Tensor (#18275)
new ed8a5768 [FFI][REFACTOR] Cleanup tvm_ffi python API and types (#18277)
new 6a0db4a7 [LLVM][METASCHEDULE] Add RISCV V-extension v1.0 kernels to metaschedule (#18243)
new 1dedb7b3 [FFI][REFACTOR] Cleanup namespace (#18280)
new 1b90c5b4 [FFI] Relax default alignment and continguous requirement (#18282)
new f39bc543 [Fix][Metal] Fix type for device array in Metal API (#18283)
new 5130a4ec [FFI][REFACTOR] Introduce UnsafeInit and enhance ObjectRef null safety (#18284)
new eb89e9c4 [Metal] Fix MetalModuleCreate (#18290)
new ba2ced89 [FFI][REFACTOR] Streamline Object Declare Macros (#18289)
new 6e63bc41 [FFI][ABI] Introduce generic stream exchange protocol (#18295)
new c01e7c46 [Fix] Add libxml2 dependency to fix Windows CI build failure (#18296)
new ac82b620 [CUDA] Support NVTX in CUDA 13 (#18300)
new bfc47a0d Clear ext_lib_dll_names for macOS platform (#18304)
new 5d337793 [FFI][ABI][REFACTOR] Enhance DLPack Exchange Speed and Behavior (#18306)
new 3200fd24 [FFI][REFACTOR] Update TVM_FFI_STATIC_INIT_BLOCK to fn style (#18312)
new daef9444 [REFACTOR][FFI] Split tvm-ffi into a separate repo (#18314)
new 4f4384dc [TVMScript] Support continue and break in tvmscript (#17804)
new f7b51331 [TIR][CUDA] Preserve float precision in codegen with hexfloat output (#18320)
new 19138bdf [TIR] Add support for conditional expressions in TVMScript (#18323)
new 64627192 [CMake][Web] Install `web/` directory in cmake for Python package (#18327)
new 73d78332 Fix conflict parameter name promote_dtye in FP8ComputeLegalize (#18334)
new 97f3765d [FFI][ABI] Bump version ffi to latest (#18332)
new 34558041 [TIR] Support sequence comparisons in TVMScript (#18341)
new 21c9fdc6 [FFI][ABI] Bump tvm-ffi version to reflect RC ABI Update (#18345)
new 5317c962 [Python] Add library lookup path for tvm installed as a pakcage (#18348)
new 15bb34c1 [FFI][ABI] Bump tvm-ffi to latest (#18349)
new de697228 [FFI][ABI] Bump tvm-ffi to latest (#18354)
new 8678b634 [FFI] Bump tvm-ffi dependency (#18370)
new c41bbe89 Upgrade to CUTLASS 4.2.1 (#18372)
new 105aafe5 [Analyzer] Enhance ConstIntBoundAnalyzer and IntervalSet with modular set analysis (#18330)
new 01c8e1dd [TIR] Refactor division simplification in RewriteSimplifier (#18319)
new 9cbcaa49 [FFI] Bump tvm-ffi to 0.1.0rc2 (#18376)
new 15cb241a [release] Update version to 0.22.0 on main branch
new 54ccc708 [release] Update version to 0.23.dev0 on main branch
new 206e138e fix the 8-bit vector loads/stores problem, which will solve the problem raised in the codegen test for cuda (#18398)
new 3fa603f0 Support integer types in exp TIR expression operator (#18390)
new c533901c [FFI] Bump tvm-ffi to latest (#18411)
new a4cd26f0 [TEST][CODEGEN] Fix the test scripts tries to tell numpy a dtype name that it cannot recognise (#18430)
new 2e24c5a4 [DataType] Update to use explicit Bool Type Aligning with DLPack (#18453)
new 2e57c697 [TIR] Add step attribute to ForNode (Initial codes) (#18421)
new 2f29e164 [RELAX][PASS] Annotate Custom Scope layout pass for Adreno GPU (#17599)
new e59d1a20 [TIR]: Fix VerifyStream::Verify causes dereferencing an invalid pointer (#18479)
new 794d325b [TVMScript] Add block name suffix management for TIR macros (#18465)
new 04133789 [TVMScript] Add test for TIR macro block name suffix handling (#18504)
new d780bdd1 [MISC] Fix compilation warnings (#18509)
new 6708dd69 [MISC] Remove unused TVMC configs (#18512)
new 3ee531fa [Pass] Add DumpIR pass instrument to save IR snapshots (#18511)
new 20afe51d [TIR] Fix tir.LowerIntrin check failed additional_info.size() == new_size (#18514)
new a47a67ea [Relax][PyTorch] Unify tests using shared tvm.testing.assert_allclose (#18522)
new 8780aeff [ARITH] Fix InternalError: Check failed: (eval_vec_) is false (#18536)
new d2cdd986 Revert "[ARITH] Fix InternalError: Check failed: (eval_vec_) is false" (#18542)
new 46b377b2 [TIR][Schedule] Fix bug on bfloat16 conversion (#18556)
new b27aea2e [LLVM][Codegen] Avoid segfault when `arith::GetVScaleValues` returns empty vector (#18586)
new 11b6927a Fix ACOS precision issue for boundary values (x=±1.0) (#18582)
new e74c3536 [BugFix][OpenCL] Guard QCOM perf hint behind USE_OPENCL_EXTN_QCOM to avoid undefined symbol on non-QCOM runtimes (#18589)
new efb34b62 [CUDA][FFI] Extend kernel launch config to support Programmatic Dependent Launch and cuLaunchCooperativeKernel (#18604)
new f3e674b0 [CUDA] Fix cuModuleUnload crash during interpreter shutdown (#18624)
new d59cf09a [Compile] accelerate compilation speed using NVRTC (#18519)
new df88b01f [ADRENO][TEXTURE] Texture based lowering (#18523)
new 7afe8c9e Put options before objects when compiling (#18656)
new aa463d3e [FFI] bump to latest version (#18654)
new b10a4169 fix: MSVC pragma (#18674)
new 809b96c7 [NVRTC] Add NVSHMEM support to NVRTC compilation path (#18681)
new 4a9b9f24 [release] Update version to 0.23.0 on main branch
new 5ba94104 [release] Update version to 0.24.dev0 on main branch
new 14d82519 [REFACTOR][TIR] Rename tir.Block to SBlock (#18689)
new e2e65e87 [BugFix][TIR] Fix incorrect optimization when lowering floordiv and f… (#18694)
new 720d9a9a [TIR] Further robustify floordiv/mod intrin lowering to prevent overflow (#18699)
new dcf536cd [LLVM] Fix insertDbgValueIntrinsic for Metal backend (#18706)
new c174c551 [REFACTOR][TEST] Replace CompareBeforeAfter for pytest compact (#18711)
new e9241353 [REFACTOR][S-TIR] Initialize the s_tir module (#18712)
new 70981fed [SPIRV] Fix forloop codegen in vulkan (#18715)
new b1f2116b [REFACTOR] Migrate old tir.ir_builder to tvmscript or builder (#18716)
new 4ba3f9f5 [REFACTOR][TEST] Migrate all codegen test to tvmscript (#18719)
new b632705c [REFACTOR][S-TIR] Lift transform passes to s_tir namespace (#18722)
new e902a8b0 [REFACTOR][S-TIR] Migrate tir/schedule to s_tir (#18728)
new c3cf8b5d [REFACTOR][S-TIR] Migrate meta_schedule into s_tir namespace (#18735)
new fbf51877 [REFACTOR][S-TIR] Lift dlight into s_tir namespace (#18734)
new 35697cff [chore][TIR] reorganize src/tir/transforms to src/tir/transform (#18738)
new ff09fa1e fix: correct typo 'occuring' to 'occurring' (#18740)
new e7304d24 fix: skip dsymutil for static tvm_runtime on Apple platforms (#18744)
new d7896f10 fix: correct typos 'recieve' and 'occurence' (#18739)
new 478bca5c [REFACTOR][S-TIR] Move remaining data structures to s_tir (#18743)
new 70f30819 [CI] Remove i386 and Hexagon from CI pipeline (1) (#18737)
new 7ebe8ce8 [REFATOR][TIR] Phase out AllocConst (#18761)
new eb50e22d [chore] Cleanup stale dependencies (#18760)
new b51ca10c [REFACTOR] Remove picojson dependency, replace with tvm::ffi::json API (#18759)
new a8d699ba [REFACTOR][TIR] Phaseout BufferRealize (#18763)
new 95174817 [REFACTOR][S-TIR] Migrate more transform to s_tir (#18771)
new e61946e2 [LLVM][Codegen] Cast NaN to bool gives true (#18772)
new fac9acef [REFACTOR][S-TIR] More migrations to s-tir (#18776)
new d1c1ba90 [REFACTOR] Phase out dmlc dep (#18779)
new 843419a5 [chore] cleanup unsed legacy backtrac code in logging (#18781)
new c704cc9a [REFACTOR][RUNTIME] Transition metadata into ffi (#18784)
new a1556a25 [REFACTOR][TARGET] Phase out legacy target string in favor of json (#18785)
new 58d5a748 [REFACTOR][TARGET] Cleanup target config (#18788)
new a735bd3d [REFACTOR][TARGET] Further cleanup target python api (#18793)
new 6640a0c9 [DOC] Unify GitHub naming (#18794)
new 9479ff66 [DOC] Unify CUDA naming (#18797)
new 4904c0a9 [DOC] Fix docstring, unify CMake, nvidia-docker deprecation (#18799)
new 7b852943 [FFI] Bring up latest tvm-ffi (#18802)
new 6e4463c8 [REFACTOR] Migrate CHECK macros to tvm-ffi ones (#18803)
new b2a59351 [REFACTOR][TEST] Remove unused te imports from test files (#18804)
new 8462ca39 [REFACTOR][TEST] Migrate tir-transform tests from TE to TVMScript (#18805)
new b030b0b9 [LINT] Modernize lint to use pre-commit hooks (#18807)
new c7f5e7f3 [CI] Add GitHub Actions lint workflow (#18809)
new e3a4203e [DRAFT][DO NOT MERGE] Bump tvm-ffi to v0.1.9 (#18801)
new 72e8cd4a [REFACTOR][LINT] Modernize ruff config (#18810)
new 892ce32f [Refactor][Metal] Update ICHECK to TVM_FFI_ICHECK in Metal runtime (#18811)
new 901bf81a [REFACTOR][RUNTIME] Phase out legacy contrib runtime backends (#18813)
new 66796ccf [REFACTOR][S-TIR] Lift STIR-only attributes out of tir::attr namespace (#18816)
new e020066d [REFACTOR][METAL] Update CHECK_LE to TVM_FFI_ICHECK_LE in Metal runtime (#18819)
new de7022cf [TARGET] Specify correct `mcpu` for Metal target tags (#18822)
new f852c8c7 [LLVM] Fix build failures when building with llvm>=22 (#18818)
new 6200ad51 fix: replace 6 bare except clauses with except Exception (#18821)
new 7dd5be28 [REFACTOR][NODE] Remove node redirect headers (#18829)
new 32c1dee7 [ROCm] Fix some ROCm codegen bugs (#15518)
new d7eaa661 [IR][TIR] Remove body from AssertStmt (#18832)
new 3512635b [LINT][PYTHON] Modernize annotations with ruff UP rules (#18830)
new 0d993236 [REFACTOR] Further cleanup node redirections (#18844)
new c1cae982 [REFACTOR] Remove unused mscclpp contrib module (#18852)
new 0f76326b [TIR][FEAT] Require DeclBuffer before use in verify_well_formed (#18843)
new 2ce1b573 [LLVM] Bump minimum LLVM version to 15 (#18853)
new 7b4a003c [REFACTOR][CONTRIB] Remove MSC contrib module (#18845)
new dcf5e26b [TVMScript] Fix PEP 563 closure variable resolution (#18856)
new a56f687f fix: Complete ICHECK update across codebase (#18858)
new e5ccc62c [TIR][Refactor] Enhance error reporting with structured AssertStmt and TVMFFIABIBuilder (#18857)
new a801dce8 [REFACTOR][TIR] Cleanup AttrStmt attributes (#18862)
new 15c29f60 [REFACTOR][TIR] Introduce AllocBuffer and phase out Allocate+DeclBuffer (#18865)
new 6f358d30 [TIR] Add VisitBufferDef/VisitBufferUse to base StmtVisitor/StmtMutator (#18873)
new eafe8d68 [REFACTOR][TIR] Rename LetStmt to Bind and flatten to sequential semantics (#18874)
new 11333f9d [REFACTOR][TIR] Remove body from AllocBuffer and DeclBuffer (#18876)
new ee799116 [TARGET] Fix round-trip reconstruction of targets with canonicalizer-generated `feature.*` attrs (#18883)
new ac9dab16 [Metal] Batched command dispatch and staging buffer pool (#18877)
new 17500618 [TIR][REFACTOR] Revamp Common Subexpression Elimination (#18886)
new 7533b4fc [TVMScript] Normalize T.Bind to T.bind for statement builder convention (#18889)
new 62ce227f [TIR] Reject non-floating inputs for trig unary ops (#18879)
new 6f501384 [TVMScript] Remove T.Bind backward-compat alias (#18891)
new a3e410f1 [FIX][LLVM] Use isCPUStringValid for mcpu validation instead of enumerating processor descriptions (#18884)
new 9abe91a0 [Target][LLVM] Fix -mcpu validation compatibility across LLVM versions (#18909)
new be34fbf3 [Refactor] Bring up tirx namespace (#18913)
new 63909835 [Vulkan] Avoid explicit layout decoration on non-interface allocations (#18914)
new 50638069 [DOC] Fix inconsistent code comments (#18939)
new 765475eb [FFI] Bump tvm-ffi to 63224e3 and fix regressions (#18938)
new 9b76ef0a [WebGPU] Reserve additional keywords to avoid WGSL identifier collisions (#18960)
new 17bb4182 [Fix] Replace str(target.kind) with target.kind.name for Target objects (#18959)
new 82f5c29f Bump tvm-ffi to 1fed0a (#18967)
new 3ac73e86 [WebGPU] Add gating logic for subgroup shuffle primitives (#18823)
new 7546fa33 [BugFix][ONNX] Fix Round op to use ties-to-even (#19367)
new ebfbd423 [Docs] Add API reference documentation for tvm.script module (#19366)
new fcd0bc21 [BugFix] Align `tir.round` to ties-to-even across all backends (#19368)
new 29eda48b [Docs] Add Python API reference for tvm submodule docs (#19379)
new 78d1e5eb [BugFix][TIRx] Fix VerifyMemory crash for PrimFuncs without target attribute (#19382)
new d611bd19 [BugFix][TIRx] Fix bad-optional-access in BF16/FP8 legalize passes for target-less PrimFuncs (#19383)
new def23faf [Docs] Add tvm.s_tir.tensor_intrin API reference and remove empty legacy tvm/tir directory (#19386)
new d3651719 [Docs] Fix outdated source install and API reference docs (#19409)
new 8272596b fix: use `is None` instead of `== None` in test files (PEP 8 E711) (#19393)
new 3383e866 [Backend][Relax] Add NPU BYOC backend example (#19425)
new f2b6038c [BugFix][LLVM] Fix `insertDeclare` API mismatch for ROCm-bundled LLVM 20 (#19390)
new 9d28739c [FIX] Skip metal target tag registration for unsupported LLVM CPUs (#19427)
new 467a4803 [ARITH] Expose allow_override parameter in Python Analyzer.bind() (#19417)
new 7ea749ad [REFACTOR] Phase out include/tvm/runtime/module.h (#19441)
new cf882cb4 [REFACTOR] Remove tvm.runtime.packed_func and container shims; route via tvm_ffi (#19442)
new f08031fc [REFACTOR] Remove runtime/object.py shim and route Object via tvm_ffi (#19440)
new 2818bffc [CMAKE][REFACTOR] Split libtvm.so into libtvm_runtime.so and libtvm_compiler.so (#19444)
new bb3aa190 [REFACTOR] Isolate backend module creation via ffi.Module.create.<kind> registry (#19447)
new ae099152 [TIR] Update symbolic index term order in loop fusion (#18406)
new 82fb8578 [REFACTOR][CODEGEN] Phase out tvm_global_barrier_state and tvm_prepare_global_barrier (#19454)
new 8914e69a [REFACTOR] Phase out unreachable contrib/rust_extension.cc (#19458)
new dfaec8f6 [REFACTOR] Move source_utils.h into runtime/opencl (#19456)
new ded7021f [REFACTOR][NODE] Migrate ReprPrinter to tvm-ffi __ffi_repr__ mechanism (#19461)
new fa4b8407 [REFACTOR] Phase out src/support/ffi_testing.cc (#19459)
new 2668eff7 [REFACTOR][S-TIR] Minimize src/support/ by relocating s_tir-private headers (#19460)
new 02199a29 [REFACTOR][RUNTIME] Macro cleanup — TVM_DLL alignment, [[maybe_unused]], logging.h legacy macros (#19457)
new 02eabd53 [REFACTOR][RUNTIME] Phase out profiling.h heavy types, rename to timer.h (#19455)
new 59bfe420 [REFACTOR][IR] Migrate include/tvm/node into include/tvm/ir (#19463)
new 3238370b [REFACTOR][RUNTIME] Phase out include/tvm/runtime/threading_backend.h (#19469)
new 483ad95a [REFACTOR][RUNTIME] Phase out include/tvm/runtime/builtin_fp16.h (#19472)
new 325ede15 [REFACTOR][RUNTIME][CODEGEN] Backend specific target and runtime to enable cross-compile fallback (#19465)
new 671d82d1 [REFACTOR][IR] Move tvm/support/with.h → tvm/ir/with_context.h (#19474)
new 6dcb7d07 [REFACTOR][RUNTIME] Phase out include/tvm/runtime/object.h (#19476)
new a03309eb [REFACTOR][SCRIPT] TVMScript dialect-friendly refactor: per-dialect restructure + dialect registry (#19479)
new 565bf721 [REFACTOR] Delete src/support/libinfo.cc; replace with runtime FFI-registry env query (#19477)
new ead507b6 [FFI][ABI] Bump tvm-ffi to 0.1.11rc2 (#19484)
new 03f31dfd [REFACTOR][FFI] Cleanup ffi indirections in tvm headers + switch logging.h to ffi/error.h where only ICHECK/THROW are used (#19483)
new 90c54760 [Metal] Include logging headers for metal (#19493)
new 92d37136 [release] Update version to 0.24.0 on main branch
new c7adf9e0 [release] Update version to 0.25.dev0 on main branch
new 2339fbc2 [BUGFIX][TIR] Skip bool-typed expressions in CSE (#19502)
new 627d202b [REFACTOR][IR] Remove dead AttrFunctor template (#19528)
new 660c8b34 [TIR] Add cooperative_tensor builtins and metal.cooperative_tensor storage scope (#19423)
new 5a967ad3 [Fix][CI]: remove astral-sh/setup-uv from lint workflow (#19554)
new bcb95693 [TIRx] Bringup TIRx Infrastructure (#19581)
new 754c9bee [BugFix][Target][LLVM] Use libm for asin/acos instead of buggy inline Taylor (#19567)
new 8c5966a1 [RFC][CodeGen][CUDA]: Gate fast math intrinsic lowering behind target option (#19565)
new 014b3e4a [TVMScript] Handle undefined functions when dumping IRModule (#19583)
new 529ca73e [BugFix][Target][LLVM] Route sinh/cosh/atan/asinh/erf through libm extern (#19568)
new 0039fb7d [BUILD] Modularize device runtime into per-backend DSOs (#19594)
new 69d0373a [CodeGen][CUDA] Move fast math intrinsic lowering option to PassContext (#19596)
new e2810a9a [IR] Add annotations to Call nodes (#19597)
new 3e32b258 [REFACTOR][RELAX] Fold CalleeCollector into relax DeadCodeElimination (#19603)
new e297d50d Fix PytestUnknownMarkWarning: Unknown pytest.mark.adreno_clml (#19602)
new bf3dd0d9 [REFACTOR][IR] Cleanup attrs.h: drop NullValue, AttrsNodeReflAdapter, legacy BaseAttrsNode methods (#19607)
new fcbc281b [REFACTOR] Move src/ir/script_printer.cc to src/script/printer/ (#19611)
new 7ccbdb46 [REFACTOR][IR] Phase out src/ir/structural_{hash,equal}.cc to tvm-ffi (#19613)
new d76e786e [REFACTOR][IR] Inline ApplyPassToFunction into relax decompose_ops, delete the util (#19612)
new 3977eb51 [REFACTOR][TIR][ARITH] Phase out ControlFlowGraph, NarrowPredicateExpression, and rename Simplify to StmtSimplify (#19604)
new 20f91ea8 [REFACTOR][IR] Phase out class Integer and class Bool in Attrs and PassConfig (#19614)
new 71c348d4 [CMAKE][RUNTIME] Link tvm_rpc with all backend runtime libraries (#19617)
new 216dafee [REFACTOR][IR] attrs.h follow-up cleanup: drop legacy vtable / rename / phase out AttrFieldInfo (#19615)
new b425d266 [REFACTOR][TIR] Tie AnnotateDeviceRegions/SplitHostDevice/LowerDeviceKernelLaunch together (#19605)
new 1277a15c [IR] Rename Call annotations to attrs (#19618)
new f533c596 [REFACTOR][RUNTIME] Phase out tvm::runtime::regex_match (#19620)
new 59f12d20 [REFACTOR][RUNTIME] Relocate nvtx.h to tvm/support/cuda and make it header-only (#19621)
new 689eb0a7 [REFACTOR][PYTHON] Lift compiler/CLI/process modules from tvm.contrib to tvm.support (#19624)
new 08923e41 [REFACTOR][IR][FFI] Bump tvm-ffi (+ SEqHashDef migration) and phase out tvm/ir/repr.h (#19627)
new d788f8e3 [REFACTOR][IR] Inline ReplaceGlobalVars into AttachGlobalSymbol (#19625)
new d870b9d4 [BugFix][Vulkan][CodeGen] Change OpControlBarrier to AcquireRelease (#19619)
new ad04d10d [REFACTOR][RUNTIME] Structural reorganization: locality moves for thread_map, texture, minrpc, disco, contrib (#19628)
new 4791dbe4 [REFACTOR][SCRIPT] tvmscript streamline: lift printer.h, restore one-way dep, migrate dialect config to extra_config (#19631)
new dad7c4bc [REFACTOR][ARITH] Phase out arith/scalable_expression; arith no longer proves over scalable vectors (#19638)
new 36f889c1 [REFACTOR][IR] Delete class Bool and class Integer boxed-type wrappers (#19636)
new 17485f75 [Relax][IR] Skip in-place multiply when two operands are views of the same tensor (#19644)
new 4ad2eadc [REFACTOR][PYTHON] Revisit lifted support modules from tvm.contrib (#19653)
new 7ed3ead8 [CI] Add cibw-based wheel publishing to PyPI (#19656)
new 1d50f309 [TIRx] Post-bringup op-dispatch / codegen / TVMScript follow-ups (#19657)
new 6b99ade8 [CI] Wheel publishing follow-ups (#19659)
new f3144475 [REFACTOR][TIRX] Consolidate split host device stages (#19663)
new 51675451 [FFI][IR] Route JSON serialization through tvm-ffi (#19662)
new 7bc129b4 [CI] Derive the version from Git tags via setuptools_scm (#19665)
new 17fa7e81 [CI] Reformat the macOS repair-wheel-command as a multiline script (#19664)
new b214e153 [FFI][REFACTOR] Direct structural APIs to tvm-ffi (#19661)
new 52bfb6c3 [Arith] Memoize IntervalSet variable relaxation to avoid exponential blowup (#19670)
new c221572e [Arith] Gate canonical-simplify LT Case 2 on extra scale == +1 (#19669)
new 9f16ae08 [TIRx] Update scoped ops and CUDA launch bounds (#19677)
new 119f5f61 [Bump] tvm-ffi to 59da4c0 (#19681)
new 49ab0730 [Arith] Make Analyzer a tvm-ffi Object (#19675)
new 866a4e4f [CI] Target apache-tvm for PyPI wheel publishing (#19686)
new ea607737 [Python] Bump apache-tvm-ffi floor to >=0.1.12 (#19710)
new 30c62263 [Tests] Skip test modules cleanly when optional deps are missing (#19704)
new 494e5847 [Codegen][LLVM] Accept splat form in VLA broadcast test (#19716)
new feba3bfc [REFACTOR][PYTHON] Slim tvm.libinfo to info-only helpers (#19719)
new 5b6d973d [Codegen][NVPTX] Skip runtime execution in Vulkan codegen tests (#19717)
new f427a6a7 [REFACTOR][PYTHON] Remove tvm.ffi shim; import tvm_ffi directly (#19721)
new 211b4b6b [REFACTOR][IR] Phase out diagnostic.h for visit-context-aware pass errors (#19722)
new a6822b97 [Python] Refactor pyproject.toml dependencies (#19723)
new 0e8962f7 [TIRx] Preserve Triton call_kernel compile options (#19728)
new 0a69d8d5 [PYTHON] Autoload backends; simplify library loading; remove TVMError for native errors (#19727)
new 3826f6b9 [Script][Tests] Fix dialect redirect module re-execution and stray category-less tirx.intrin_test op (#19731)
new e849de33 [TIRx] Use canonical PTX async script API in s_tir test (#19739)
new 6d1765a6 [Tests] Fix flaky popen pool executor test (#19746)
new fdf31a71 [Runtime][Disco] Fix session attribute storage, NVSHMEM build, and test gating (#19736)
new f3e6499a [Codegen][LLVM][Tests] Gate +v9a vscale_range expectation on LLVM version (#19744)
new 53f935f3 [Tests][LLVM] Gate stepvector intrinsic rename on LLVM 20 (#19745)
new 961f4f78 [S-TIR][Tests] Mark test_cp_async_in_if_then_else as xfail (#19751)
new d4eea658 [TIRX][Tests] Fix LLVM version gate for vectorized lround (#19753)
new c1acb6c2 [S-TIR][CUDA] Fix legacy predicated cp.async zero fill (#19741)
new a60343e8 [Tests][AArch64] Make SVE codegen assertions robust across LLVM versions (#19752)
new e9dc1338 [TIRx] Post-bringup follow-ups: op-dispatch, namespaces, launch bounds, gemm-async, backend reorg (#19757)
new d029f7b1 [REFACTOR][VM] Move CUDA graph VM builtin back under VM runtime (#19758)
new 62d22a6c [REFACTOR][DataType] Phase out target custom datatype support (#19760)
new 9363b07b [REFACTOR][TARGET] Cleanup backend target registration (#19759)
new 763b1cee [REFACTOR][CUDA] Phase out l2 cache flush preproc test (#19768)
new 7a209ada [CMAKE] Upgrade TVM build baseline to C++20 (#19734)
new e84fc9d0 [REFACTOR][CUDA] Phase out cuda_common.h (#19770)
new 3ad8a681 [REFACTOR][PYTHON] Consolidate backend autoload infra (#19769)
new 7e4e4eb9 [REFACTOR][IR] Cleanup IR naming utilities (#19781)
new 28527aa0 [CUDA] Narrow the cuda extra from cuda-python to cuda-bindings (#19784)
new 6c5315fb [Tests] Modernize test gating (#19777)
new 9bb23850 [TIRX][CUDA] Framework support for FA4, CLC intrinsics, and nvfp4 tcgen05 GEMM (#19785)
new e8a76257 [Tests] Replace remaining requires_* helpers with standard pytest (#19787)
new 489c1bdc [TIRx][RISC-V] Use scalable RVV loops for fixed vectorize (#19776)
new a3c4d441 [Docs] Modernize test-gating documentation (#19788)
new 94283a5d [REFACTOR] Phase out unused queue and rang license entries (#19794)
new b0ae3d4c [REFACTOR][HEXAGON] Phase out Hexagon app and test wrappers (#19796)
new e6d264e2 [CI] Pin GitHub Actions to SHA for ASF INFRA compliance (#19793)
new efaf4c1d [REFACTOR][IR] Simplify CallingConv attribute access (#19799)
new 13accdb0 [CI] Remove Jenkins PR linter step (#19798)
new bc55f028 [Tests][Refactor] Remove unused testing helpers (#19800)
new 62c0e15e [REFACTOR][TIRX] Add IntImm common scalar ctor and streamline MakeConst (#19797)
new e4ff5da6 [Tests] Migrate tvm.testing.parameters() to pytest.mark.parametrize (#19803)
new 45c0ce6c [Tests] Remove the now-unused tvm.testing.parameters() helper (#19807)
new b6fa75c6 [Tests] Drop tautological env-probe implication tests (#19811)
new 95286526 [FIX][TIRX] Fix dangling Op static reference warning (#19806)
new a8f34a46 [BUILD] Hide static linked library symbols in shared libs (#19817)
new 392f69f1 [Tests] Inline thin gating helpers in the pytest plugin and tvm.testing.env (#19819)
new 6424bb26 [ARITH] Add optional Z3-backed proving to Analyzer (#19667)
new 3954aee1 [Tests] Migrate off tvm.testing.parametrize_targets to native pytest (#19826)
new 32f58472 [FFI][ABI] Bump tvm-ffi to latest (#19831)
new 4bf5ec51 [Arith] Let IRMutatorWithAnalyzer take a const Analyzer& (#19829)
new fd5ccbab [Tests] Remove dead helpers and unused probes from tvm.testing (#19821)
new c4483b51 [Arith] Restrict floormod coefficient reduction to keep DetectIterMapstable (#19832)
new 67f680fd [Arith] Add Analyzer::Clone for deep-copying analyzer state (#19836)
new e574850f [BUILD] Bump tvm-ffi after RuntimeTypeIndex optimization (#19834)
new 2dc3a93f [TIRx] Phase out flat device-intrinsic op aliases (#19838)
new 9ae0b0ed [BUILD] Sync fallback version strings to 0.26 dev cycle (#19845)
new 408012cf [REFACTOR][IR] Unify StructInfo and Type (#19853)
new e4700850 [Docs] Add TIRx documentation section (#19855)
new f5eb0a87 [Metal] Enable Metal 4 shader compilation (#19595)
new d1faf7d3 [REFACTOR][RELAX] Phase out Relax PrimType (#19858)
new c80e6822 [REFACTOR][IR] Phase out Downcast usages (#19857)
new 01f9d2fb [Docs][CI] Switch docs theme and bump images to 20260619-214849-4174cdf5 (#19828)
new 0b3ce089 [REFACTOR][IR] Unify PrimExpr type mechanism to PrimType instead of DataType (#19875)
new d00ae3fc [REFACTOR][IR] Clean up PrimType follow-ups (#19884)
new 1f3804a9 [CI][CMAKE] Install CUDA driver stub for libtvm_runtime_cuda (#19886)
new f8f7c41a [ARITH] Use IntImm in canonical scalar hot paths (#19885)
new dba6356e [REFACTOR][RELAX] Rename Relax base type to AnyType (#19889)
new 62da11d9 [TIRx] Replace vars in buffer strides and elem_offset (#19871)
new ac151e56 [TIRx][LLVM] Support scalable Ramp lowering (#19866)
new e42b4b27 [REFACTOR][Relax] Phase out PrimValue and Relax expression wrappers (#19891)
new dafe7550 [TIRx] Bundle CUDA tile primitive and op dispatch updates (#19896)
new 7d716f49 [FFI] Bump tvm-ffi to latest June 28 (#19903)
new ff9c6b4b [Target][RISC-V] Use riscv_cpu device key for RISC-V target tags (#19915)
new 956c4276 [TVMScript] Render invisible paths in structural diagnostics (#19916)
new 13f1c447 [TIRx] Add a dedicated boolean buffer lowering pass (#19873)
new 56af907d [REFACTOR][IR] Unify PrimExpr with Expr typed view (#19910)
new ae6b3d41 [TIRX] Remove SizeVar in favor of contextual constraints (#19930)
new f5ee537d [TIRx] Generalize expression functor signatures (#19931)
new 35044ea9 [TIR] Construct proven scalar integer constants directly (#19934)
new 90826a75 [IR][Relax] Include expression types in structural identity (#19933)
new c336d91a [FFI] Use thread-safe packed function initialization (#19939)
new af5d0e49 [TEST] Serialize local GPU execution under pytest-xdist (#19942)
new 461105e0 [REFACTOR][SCRIPT] Keep dependent shape recursion in docsifier (#19940)
new 6e38c240 Refactor Tensor arithmetic dispatch away from tirx.generic (#19943)
new ff1b0afc [TIRx] Phase out duplicate Var type_annotation (#19944)
new 610946b8 [Cleanup] Remove macOS Clang warnings (#19954)
new 437db449 [ARITH][TIR] Track positive loop extents in analyzer visitors (#19927)
new de3e5590 [CI] Repair Python test cleanup regressions (#19955)
new 67adde7e [FFI] Bump tvm-ffi for stable Optional layout (#19956)
new 71e49935 [ARITH] Scope interval constraints to mapped variables (#19963)
new 0b49be2d [TIRx] Reuse pass-through input names for inverse index map vars (#19906)
new 01fcd82c [Metal] Let compile callback declare payload format via (payload, fmt) (#19924)
new 814b1ae5 [Fix][Python] Use standard scikit-build directory (#19990)
new eeb2da38 [Arith] Fix const-int-bound modular-set tightening for Mod/FloorMod (#19978)
new 2add1880 [CI] Bump CI at the Ubuntu 24.04 images and re-enable USE_Z3 (#19911)
new 07ce17cc [Tests][TIRx] Localize hardware test gates (#19985)
new 44a48442 [RUNTIME][PYTHON] Add explicit Target device conversion (#20005)
new 251c4835 [IR][Relax][TIRx] Unify Var identity (#20004)
new 01c4107d [Tests] Reduce runtime of slow Python tests (#20006)
new bd7871f3 [REFACTOR][IR] Use CamelCase Var copy helpers (#20008)
new 9c1ced59 [REFACTOR] Remove redundant defensive code guaranteed by IR invariants (#20011)
new 32e7862d [REFACTOR][TIR] Phase out redundant TIRx attr names (#20017)
new 4eaf372f [IR] Rename Var name_hint field to name (#20016)
new 856d9d11 [TIRx] Introduce first-class Return statement (#20018)
new 9501cd43 [REFACTOR][TIR] Remove buffer type and axis separators (#20019)
new 983ae29a [REFACTOR][TIRx] Keep AttrStmt node values unboxed (#20030)
new 559ab82b [CI] Bump tvm-ffi with compatible Python wrappers (#20032)
new 539b2618 [Vulkan] Fix SPIR-V 1.4+ entry-point interfaces (#20028)
new a68c882a [TIRx] Improve BufferStore cast warning context (#20038)
new 594b5709 [CI] Verify packed uint1 tvm-ffi revision (#20041)
new c621ed02 [Fix][TIRx] Ignore statement spans in structural identity (#20043)
new 739c6c6e [Fix][LLVM] Keep packed init callbacks local on Mach-O (#20052)
new fd3e6e9f [Fix][TIRx] Handle vector access pointer addresses in C codegen (#20058)
new b8851081 [FIX][TIRx] Use cluster arrivals for remote mbarrier views (#20074)
new 388e6c5a [TVMSCRIPT][TIRx] Preserve parser source spans in IR (#20073)
new de25caf3 [FIX][TIRx] Make TilePrimitiveCall serializable (#20071)
new e1e9087e [FIX][TIRx] Preserve pointer expression types (#20070)
new 7e4eb3be [FIX][TIRx] Remap buffers consistently in ConvertSSA (#20069)
new f3d1ae78 [FIX][TIRx][CUDA] Fix tcgen05 register fragment layouts (#20068)
new 7cb7f2f0 [FIX][TIRx] Constant-fold copy slice extents (#20067)
new bca48955 [FEATURE][TIRx][CUDA] Support TMEM datapath B (#20075)
new bec8d1b5 [TIRX] Represent buffers as typed variables (#20079)
new 4ec8f6d7 [TIRx] tcgen05 dispatch paths, buffer dim-surgery views, FlashMLA lowering, and typed-buffer migration fixes (#20080)
new 3da6b47b [TIRx] Flatten cuda/trn backend operator folder (#20081)
new b3334b0b [FFI] Bump tvm-ffi to latest Aug 3 (#20083)
new 7d7c55ee [BUILD] Migrate the Z3 dependency to mlc-z3-static (#20084)
new ee6443c9 [FIX][TIRx] Use physical order for Buffer.local views (#20076)
new e1f6cd35 feat(lower-tirx): align NVIDIA IKET profiling with the official ABI (#20085)
new f0b6b162 [FFI] Bump tvm-ffi to 0.1.13.post2 (#20088)
new 5d21bff5 tirx: represent buffer parameters with BufferType (#20086)
new 67c532ee [Fix][Arith] Isolate Z3 contexts and make memoization deterministic (#20097)
new ebb353e0 [Fix][TIRx] Fix MSVC build of IndexDataTypeNormalizer (#20098)
new 700c9a3b [Python] Bump apache-tvm-ffi floor to >=0.1.13.post2 (#20094)
new 51c083ea [FIX][TIRx] Remap typed buffer expressions during specialization (#20090)
new 67c08ce7 [FIX][CUDA] Select NVRTC architecture for output format (#20100)
new a046da47 [TIRx][CUDA] Add a table-driven PTX dialect and retire tirx.ptx.* (#20103)
new 51780d8d [BugFix][Metal] Preserve pointer address spaces for byte offsets (#20101)
new c03b2b62 [TIRx][CUDA] uint32 index dtypes, directive fixes, and PTX ISA coverage (#20110)
new 28987378 [SCRIPT] Support PEP 695 symbolic variables in Relax and TIR (#20107)
new e5d3655c [Fix][WebGPU] Preserve read-only buffer access modes (#20113)
new 57ef4986 [TIRX] Split backend.cuda.intrinsics, fold tcgen05 descriptors, and fix two PTX dialect gaps (#20120)
new 12d64bda [TIRx][CUDA] Replace source helpers with typed PTX forms (#20140)
new 845e459a [TIRx][CUDA] Version-gate CUDA 12.8 tensor-map enums and fix registry-test lock leak (#20154)
new 2ae7142b [TIRx][CUDA] Add PTX address expressions with immediate byte offsets (#20153)
new 2947e9b1 [Fix][WebGPU] Validate and bound symbolic stack allocations (#20132)
new 35dbfd14 [TIRx][CUDA] Add register and cluster launch controls (#20159)
new 37b0da57 [IR][TIRX] Add first-class tuple expressions (#20168)
new 6441952f [TIRx][CUDA] Allow newer CUTLASS packages for IKET (#20164)
new 190aa257 [TIRx][CUDA] Fix single-CTA clusterCtaIdx resolution and accept packed sub-byte tensor-map dtypes (#20172)
new a8ef19e3 feat(lower-tirx): support PTX movmatrix (#20171)
new cebe852d [TIRx][CUDA] Preserve explicit single-CTA cluster launches (#20180)
new 3a2b45e3 [Fix][Arith] Preserve nested floormod semantics (#20181)
new 6503bb73 [Codegen][LLVM] Add LLVM 23 compatibility (#20189)
new f40f77be fix(tirx): stabilize multi-GPU correctness tests (#20213)
new 69c8a28a [Perf][Arith] Materialize Z3 solvers lazily on first query (#20215)
new ca408e94 [Fix][Support] Use sbsa-linux CUDA include dir on ARM64 Linux (#20222)
new 492f4193 [TIRx][CUDA] Support exact required block dimensions (#20223)
new b27c75a1 [TIRx][CUDA] Align the PTX dialect with PTX ISA 9.2 (#20224)
new 3450a2bb [TIRx][CUDA] Allow launch bounds with required block size (#20226)
new dd3caa1c [Fix][Arith] Give each materialized Z3 solver a private context (#20221)
new 28881c15 [REFACTOR][TE] Represent tensor loads with opaque callees (#20225)
new 510fd27d [CUDA][TIRx] Preserve device state during cleanup and skip invalid Top-K references (#20233)
new faec3587 [Fix][TIRx] Preserve index semantics when narrowing to int32 (#20129)
new d4279f17 [REFACTOR][TIR] Split masked buffer access into special calls (#20244)
new fe1ed1f1 [REFACTOR][IR] Introduce TensorLoad in core IR (#20247)
new 848c3f7d [REFACTOR][IR] Unify expression subscription realization (#20246)
new dfbe594b [BugFix] Align default (C) tirx.round lowering to ties-to-even (#20131)
new fde79352 [REFACTOR][IR] Consolidate expression operator overloading into the base layer (#20248)
new 762fb81b [FIX][IR] Complete lazy subscript realization (#20251)
new c48d4179 [TIRx][CUDA] Preserve local mbarrier predicate and count (#20250)
new 611a68af [REFACTOR][IR] Lift primitive expressions into core IR (#20249)
new 554f2ea5 [Test] Run round ties-to-even test on every backend that implements it (#20252)
new da1825fe [REFACTOR][IR] Make expression subscription eager and remove SubscriptProxy (#20257)
new cdc0b915 [REFACTOR][TIRx] Make BufferRegion a typed expression (#20256)
new 9478e599 [BugFix][Arith] Reject padded IterMapSimplify fallback (#20169)
new a055783b [CUDA][TIRx] PTX ISA 9.4 / CUDA 13.4 support for SM103a and SM107a (Rubin) (#20261)
new 7c22df25 [CUDA] Add NVIDIA Jetson AGX Thor target tag (#20259)
new e107af7f [Fix][Metal] Bound symbolic stack allocations (#20236)
new 670de86c [CUDA][TIRx] Add collector-qualified tcgen05.mma block_scale forms and bind tcgen05.ld.red redval as output (#20266)
new f5a4515a [TIRx][Test] Gate tcgen05.mma collector certification on nvcc >= 13.4 (#20270)
new 32d91fde [CUDA][TIRx] Allow collector-A-only SM107 block-scale MMA and open cp.async wait_group immediates (#20271)
new 7d3be744 [TIRx][Test] Gate collector-A-only block-scale MMA test on CUDA 13.4 (#20276)
new aa533d21 [REFACTOR][IR] Add structural hooks for Expr and Stmt (#20275)
new 5bd324e1 [Test] Pin CUDA round ties-to-even on exact midpoints (#20274)
new 415eb992 [Fix][LLVM] Preserve 64-bit AllocBuffer extents (#20141)
new 69410996 [TIR] Ignore None-valued pragma annotations (#20265)
new 5abe220c [FFI] Upgrade to latest tvm-ffi (#20294)
new c8255c65 [FFI] Bump tvm-ffi for StructuralMap policy (#20299)
new c0461484 [REFACTOR][ARITH] Use StructuralWalk and Map in arith (#20300)
new 46b47a95 [REFACTOR][TIR] Remove IRTransform in favour of tvm_ffi.structural_map (#20304)
new ba40865c [REFACTOR][IR] Add structural hooks to remaining Type and Relax Expr nodes (#20302)
new 3315f0a6 [REFACTOR][TIR] Use StructuralWalk in place of PostOrderVisit (#20308)
new 138c6a44 [REFACTOR][TIR] Inline StructuralWalk at variable-use checks (#20306)
new e9350696 [Fix][Codegen] Avoid extraneous parentheses in if_then_else generated code (#20285)
new f71e1b40 [REFACTOR][Python] Delete the TIR Py* functor trampoline (#20309)
new e150a0a3 [REFACTOR][IR] Rename the uniform dispatch table to ObjectFunctor (#20318)
new d1d7af46 [REFACTOR][TIR] Use StructuralMap in place of Substitute (#20317)
new 7092ccba [REFACTOR][IR] Colocate type hooks and registrations (#20325)
new 0316e136 [REFACTOR][IR] New Functor/Visitor/Mutator Infra at Base Layer (#20327)
new ab029fd2 [FIX][TIRx][CUDA] Support SM100 weight-stationary B collectors (#20329)
new 7c055df5 [REFACTOR][IR] Unify structural mutation modes and native traversal entrypoints (#20338)
new e164b218 [REFACTOR] Default mutators to exceptions and migrate arithmetic passes (#20339)
new f7281ff0 [CLEANUP][IR] Simplify exception-first traversal (#20347)
new c3e80df3 [REFACTOR][IR] Share checked PrimVar view across dialects (#20348)
new c45b8e1b [TIRx][CUDA] Add the declared synchronization-word wait (#20353)
new 746ffa43 [REFACTOR][TIRx] Migrate visitors to shared expression traversal (#20350)
new 070554b2 [REFACTOR][Arith] Evaluate iterator domains through Var maps (#20354)
new b9ad5844 [Refactor][Arith] Move conditional bounds into S-TIR (#20355)
new e137874f [Arith] Remove vscale-specific simplification and analysis (#20357)
new 746d2463 [IR][TE] Share expression effects and register tensor loads (#20359)
new 13cf3038 [REFACTOR][RELAX] Own global device metadata in Relax (#20363)
new 945e935d [REFACTOR][TIRX] Share generic expression functor dispatch (#20358)
new c626a6b2 [Refactor][IR] Move ExprDeepEqual into shared primitive expressions (#20356)
new bae34862 [IR] Make function attribute updates generic via reflected shallow copy (#20366)
new 6846be13 [REFACTOR][TIRX] Use single-inheritance typed StmtExprMutator (#20365)
new fbbe345c [REFACTOR][IR] Share primitive helpers and Python expressions (#20364)
new 5e544f76 [CLEANUP][IR][Arith] Move CLZ to shared prim and remove dialect dependencies (#20367)
new ddceec28 [REFACTOR][IR] Move dialect and codegen registrations to their owners (#20368)
new 4986fad3 [REFACTOR][IR] Share tensor region expressions across dialects (#20369)
new 086316b6 [REFACTOR][TIRX] Migrate StmtFunctor dispatch and organize analyzer helpers (#20370)
new 5a367b06 [IR][Arith] Use BigInt-backed integer immediates and wide coefficients (#20371)
new ab7f7bec [CLEANUP][IR] Remove redundant functor helpers and CLZ float handling (#20379)
new 7c4f1dea [Arith] Use native GCD for fitting BigInt operands (#20380)
new e84d7f9e Move S-TIR specific node and TensorIntrin out of TIRX (#20378)
new 2e17c2a3 [REFACTOR][IR] Move declared call results into TIRX builders (#20382)
new 781efa54 [REFACTOR] Rename shared symbolic analysis namespace to sym (#20381)
new 01bc77db [REFACTOR][IR] Unify constants with GenericConst and shared StringImm (#20386)
new 5e39bcc4 [REFACTOR][IR] Promote primitive bitwise and shift operations to nodes (#20392)
new 427fb300 [FIX][TIRx] Avoid stale constraints from mutable memory predicates (#20393)
new 0645aad0 [TIRx][CUDA] Preserve kernel launch calls and add CUDA host source bundling (#20395)
new 7d138d86 [Fix][Metal][WebGPU] Preserve variable bindings when resolving allocation bounds (#20337)
new 408a06d8 [REFACTOR][TIRx] Group buffer APIs and remove generic composition (#20402)
new 288d84c5 [Fix][S-TIR] Add a block-aware ForceNarrowIndexToInt32 (#20409)
new 4e51cc43 [REFACTOR][TVMSCRIPT] Introduce a new transpiler based parser (#20423)
new c4ce1347 [REFACTOR][Script] Separate declaration and result assembly (#20436)
new 0a066ef3 [REFACTOR][TVMScript] Consolidate Python IR builder packages (#20433)
new 7e460aa7 [PERF][TVMSCRIPT] Use lightweight module decorator detection (#20435)
new 44ecf982 [REFACTOR][TVMScript] Restore dialect-owned IR builder packages (#20440)
new 0bf469a6 [REFACTOR][TVMScript] Resolve global-info arguments in builders (#20439)
new 6a16851b [REFACTOR][Script] Give S-TIR its own construction namespace (#20437)
new 4cadcbf6 [Script] Introduce explicit dynamic symbols (#20438)
new a49e5f7f [REFACTOR][TVMScript] Align C++ builder and printer ownership (#20443)
new e4d25697 [REFACTOR][TVMScript] Simplify annotation capture and transpiler contexts (#20447)
new 28e1c9f4 [Script] Make transpiler call helper keywords explicit (#20448)
new 3a377f4f [REFACTOR][TVMScript] Fix syntax roots and simplify annotation scopes (#20446)
new 6fd6e584 [TVMScript] Fill AST locations at compilation and simplify span inputs (#20450)
new bb65f4b2 [REFACTOR] Remove obsolete APIs and compatibility wrappers (#20451)
new e7ea436b [REFACTOR][Script] Separate builder protocols and concrete operations (#20444)
new d653fef5 [REFACTOR][Script] Simplify parser registries and protocol contracts (#20454)
new 3b81e106 [REFACTOR][Script] Simplify annotation scopes and signature variables (#20456)
new f92c8b65 [REFACTOR][Script] Replace handle match-buffer bindings with Buffer signatures (#20460)
new d73e5c4e [FIX][TIRx] Preserve boolean bitwise not semantics in C codegen (#20461)
new 3d02e80a [VERSION] Start the v0.28 development cycle (#20459)
new 942db4c2 [TEST][Sym] Cover large masks in modular-set analysis (#20458)
new e24f1b5d [TEST][Script] Organize dialect tests and printer highlighting (#20455)
new 6380faa9 [IR][TVMScript] Share DataTypeImm values across script dialects (#20462)
new 4b924297 [REFACTOR][TIR] Remove obsolete TIRx builtins (#20463)
new 37e040eb [REFACTOR][Relax] Remove compiled VM TIR path and AnyList intrinsics (#20464)
new 1df94387 [Target] Replace TargetTag with singleton TargetTagRegistry (#20468)
new a28384d6 Use dedicated TargetKind registry and fluent definitions (#20469)
new d3a87653 Migrate TIRx Axis to native tvm-ffi enum (#20470)
new fac70040 Simplify instruction kind and script repr registration (#20472)
new 0a27bdb5 [REFACTOR][IR] Introduce OpDef and a dedicated Op registry (#20473)
new 481badbc [Runtime][Vulkan] Add timer support for the Vulkan backend (#20471)
new c36a622d [TIRx][CUDA] Remove IKET dependency version restrictions (#20477)
new 9322c86a [LLVM] Use external tvm-ffi ORC JIT for LLVMModule execution (#20292)
new a1d89fcc [Fix][NVPTX] Cast thread index to the loop variable dtype (#20476)
new ff36e6dc [FEATURE][IR] Add typed OpDef signature registration (#20478)
new 3d45dda1 Add context-free Call reinference and binding type propagation (#20480)
new 8d71cedd Update FromNative call sites for latest TVM FFI (#20483)
new 3bf3f2b2 [REFACTOR][TIR] Remove obsolete AttrStmt handling (#20486)
new 2bec02de [FIX][TIRx][CUDA] Support low-precision, tensor-map and cluster kernels in CUDA-host bundles (#20490)
new 71639a97 [REFACTOR][TIRx] Represent buffer definitions as operation bindings (#20482)
new 1f88684c [FIX][TIRx] Preserve renewal domains and allocation-bound lifetimes (#20502)
new 191a2a20 [REFACTOR][Target] Move ConfigSchema into target headers (#20509)
new e4549143 [REFACTOR][SCRIPT] Introduce NativeFunction backed Printer Mechanism (#20516)
new b2aa1c94 [REFACTOR][S-TIR] Own printer hooks and retire legacy predicated loads (#20517)
new 9fcbc010 [REFACTOR][IR] Localize primitive checks and containment queries (#20518)
new c8f124f0 [REFACTOR][IR] Add scalar integer expression signatures (#20521)
new 0702c5b2 [REFACTOR][TIR] Attach fragment metadata to allocation calls (#20520)
new e0c29ef6 [REFACTOR][SCRIPT] Share normal IR constructor contracts (#20522)
new ddc264c9 [REFACTOR][TIRx] Use tensor names for types and allocation APIs (#20519)
new e2c9764f [FIX][IR] Share typed expression mismatch diagnostics (#20523)
new 31f531d7 [Backend][WebGPU] Fix off-by-one in the grid-packing guard (#20424)
new 5e048eb2 [Tests][WebGPU] Update grid-pack test TIRx syntax (#20538)
new 07e5393c [REFACTOR][IR] Make expression and statement references non-nullable (#20528)
new f86e61bc [FIX][Script] Preserve device identity and unify rendering configuration (#20543)
new 7a14e24e [REFACTOR][IR] Initialize Python Op APIs from registered namespaces (#20539)
new 6ecba169 [REFACTOR][IR] Represent missing type information with MissingType (#20542)
new 34a9052a [REFACTOR][TIRx] Promote LambdaExpr to Expr (#20546)
new 0c96582a [REFACTOR][TIRx] Make CPU parallel scheduling and barriers explicit (#20549)
new 235e3028 [REFACTOR][TIRx] Use function targets in VectorizeLoop (#20550)
new abd3ee0a [REFACTOR][s_tir] Keep partition hints on their owning loops (#20551)
new 996fffc9 [REFACTOR][TIRx] Use tensor names for typed variable views (#20548)
new b3f39409 [FIX][TIRx][CUDA] Support IKET 4.8 injection and trace artifacts (#20554)
new 06e3f7ab [REFACTOR][TIRx] Add RegionStmt and migrate thread launches (#20555)
new 5b68da10 [REFACTOR][IR] Generalize staging lambdas and explicit thread reductions (#20552)
new 17702eb6 [REFACTOR][TIRx] Keep unroll policy on loops and retire source imports (#20556)
new f225dacb [REFACTOR][TIRx] Make alignment assumptions explicit and retire legacy bounds checks (#20557)
new b57a8c56 [REFACTOR][TIRx] Declare dynamic shared memory with a CUDA leaf op (#20563)
new 1ab1d3a0 [REFACTOR][TIRx] Collect root statements without seq_scope (#20564)
new 484545a2 [TIRx] Represent device boundaries with region operations (#20566)
new 1067bf72 [REFACTOR][TRN] Use RegionStmt for tensorized NKI instructions (#20560)
new dbc2f686 [REFACTOR][LLVM] Express AArch64 SME state as function attributes (#20568)
new 838d32a6 [REFACTOR][TIRx] Use regions for CPU and runtime context scopes (#20567)
new e692ae19 [REFACTOR][S-TIR] Represent async and manual synchronization explicitly (#20562)
new 0f6816be [TIRx][CUDA] Configure kernel constraints with CUDA leaf ops (#20565)
new c0bf9414 [REFACTOR][TIRx] Remove obsolete AttrStmt infrastructure (#20573)
new 65efd8b2 [FIX][LLVM] Preserve physical-root alignment on outlined aliases (#20577)
new 5d3e9dce [REFACTOR][TIRx] Simplify argument and unroll policy plumbing (#20579)
new ae24290d [REFACTOR][TIRx] Define region body parameters on operations (#20575)
new d7ac3bb7 [REFACTOR][TIRx] Store tile operands and configuration as expressions (#20576)
new eb0cbb2b [REFACTOR][IR] Normalize constant predicate names and grouping (#20581)
new 758b9c4a [REFACTOR][IR] Consolidate pass instrumentation and call effect headers (#20580)
new 35d6e919 Move iteration axes to S-TIR and lower TE opaque values (#20574)
new 215eb188 [REFACTOR][TIRx] Emit tensor declarations without a dedicated frame (#20587)
new 07d236bd [REFACTOR][TIRx] Rename BufferStore to TensorStore (#20590)
new 82f51cf5 [REFACTOR][IR] Colocate and inline expression FFI traits (#20585)
new f140a080 [REFACTOR][TIRx] Rename PrimFunc to Function (#20586)
new 5928789c [REFACTOR][CUDA] Store tcgen05 descriptor options in call attributes (#20596)
new 71d2f63c [TIRx][Relax] Preserve native signatures at explicit call boundaries (#20598)
new 7112177b [REFACTOR][IR] Unify Call construction and TVMScript printing (#20578)
new 4ea10dad [REFACTOR][IR] Canonicalize executable scope bodies as SeqStmt (#20605)
new a0fd4e35 [REFACTOR][Relax] Prefer tuple literals in script value contexts (#20604)
new 215876d5 [REFACTOR][IR] Align native and Python operator family ownership (#20603)
new 2c80c777 [REFACTOR][TIRx] Use structural definition renewal in core transforms (#20601)
new 992b914c [REFACTOR][IR] Promote TensorRegionType to shared IR (#20600)
new 1f7a31b7 [REFACTOR][TIR] Store loop thread binding in annotations (#20606)
new f0361cd9 [REFACTOR][TIR] Replace type annotation markers with explicit types (#20602)
new 1b41d84e [REFACTOR][Python] Align namespace helpers with their implementation owners (#20599)
new 1dda728e fix(lower-tirx): restore CUDA lowering with native IR builders (#20620)
new 19bf5b89 [REFACTOR][TIRx] Organize operator families by canonical ownership (#20619)
new 579ae7b3 [REFACTOR][TIRx] Simplify shared headers, analysis, and pointer helpers (#20621)
new a699a4ce [REFACTOR] Simplify canonical script operation adapters (#20623)
new 5106c73e [TIRx] Own expression methods and properties on TensorType (#20622)
new d9e2f704 [REFACTOR][IR] Share statement definitions across dialects (#20624)
new cbdcc7d5 [REFACTOR][TIRx] Consolidate analysis and split-pattern normalization (#20629)
new 72e5c61d [REFACTOR][IR] Align operator and shared script-builder ownership (#20628)
new 46dff34f refactor(op)!: replace tile statements with tensor instruction calls (#20632)
new 945c4012 [REFACTOR][IR] Simplify transformation utilities and localize region hooks (#20627)
new 1fa76d27 [REFACTOR][CUDA] Retire legacy WMMA tensorization and emission (#20631)
new eaa4d843 [REFACTOR][TIRx] Move tensor placement to producing operations (#20634)
new c18d971a [REFACTOR][TIRx] Simplify the transform API (#20635)
new e31969cc [TIRx] Canonicalize CUDA and vector operator identities (#20630)
new 65bae494 [REFACTOR][Script] Relocate shared and dialect printer registrations (#20638)
new 4dd2ef02 [REFACTOR][TIRx] Retire legacy pointer access conveniences (#20637)
new 813ec10e refactor(lower-tirx)!: separate CUDA launch configuration from index bindings (#20639)
new 89890f1e [REFACTOR][IR] Standardize metadata key ownership (#20633)
new 84b7dc29 [REFACTOR][IR] Replace source spans with non-nullable Location (#20642)
new cd745c3b [REFACTOR][TIRx] Reduce conditional hoisting to HoistIf (#20636)
new 3582fb97 [REFACTOR][Script] Simplify region and call printing (#20640)
new a17697b3 refactor(infra)!: unify CUDA backend configuration (#20645)
new 4c2e5e99 [REFACTOR] Make remaining object reference handles non-nullable (#20646)
new 9240ba06 [REFACTOR][Script] Isolate printer ownership and pointer type construction (#20647)
new 40df81f8 refactor(infra)!: pass backend configuration through Target (#20651)
new 7132dddc [TIRx][S-TIR] Complete tensor terminology migration (#20648)
new 62cf34a1 [FIX][Codegen] Bind tensor views with their element pointer type (#20657)
new 771b462f [Runtime] Expose device selection through the backend C API (#20661)
new c9ae2ca2 [REFACTOR][TIRx] Carry tensor allocation types in type arguments (#20659)
new b626ad27 refactor(op)!: isolate TIRx tile and backend layout namespaces (#20663)
new 75773c9b [REFACTOR][TIR] Unify loop builders and isolate S-TIR construction (#20660)
new 7a3c4e3b refactor(op)!: consolidate TIRx helper ownership (#20668)
new 2ba52f4a [REFACTOR][RPC] Represent remote devices and tensors explicitly (#20667)
new adbe2ae0 [REFACTOR][IR] Distinguish AST nodes from object implementations (#20665)
new f1b2c58d [REFACTOR][Runtime] Return owning tensors from DeviceAPI (#20669)
new 25683eb7 [FFI] Update tvm-ffi and native Any hooks (#20664)
new 79b22c51 refactor(op-dispatch)!: dispatch tile ops through Op attributes (#20671)
new 204abd24 [TVMScript] Simplify printing through canonical Op exposure (#20672)
new 2b872649 [Refactor][Runtime] Unify tensor pools and VM ownership (#20670)
new 72456d40 [TEST] Simplify and organize native C++ tests (#20676)
new 842f6994 [REFACTOR] Clarify core ownership and native compilation interfaces (#20678)
new d54edca2 [REFACTOR][Runtime] Extract launch parameter decoding (#20680)
new 14a1c255 [REFACTOR][Runtime] Clarify file helpers and VM parameter ownership (#20679)
new f983d7be [REFACTOR] Expose analyzer-aware statement functors (#20681)
new 4e4503a9 [REFACTOR] Use local verifier scopes and exception visit context (#20684)
new e2e2b9fa [REFACTOR][Runtime] Use CamelCase for launch dimension methods (#20682)
new dd8fc26d [REFACTOR][S-TIR] Remove test-only force index narrowing (#20685)
new 990b55b4 [REFACTOR] Localize and simplify internal TIRx helpers (#20683)
new 22e7c49e [REFACTOR][Support] Expose compiler GPU thread-tag parsing (#20689)
new c9c1cb34 [REFACTOR][TIRx] Keep device-scope decoration in TIRx (#20691)
new 3f191d6c [REFACTOR] Clarify shared support header ownership (#20693)
new 08b5c06e [REFACTOR][Sym] Simplify symbolic analysis dependencies (#20694)
new 221d0193 [REFACTOR][TIRx][S-TIR] Localize SSA conversion and simplify lexical remapping (#20695)
new 5a345b0f [REFACTOR][Script] Print reflected types and expose canonical builder aliases (#20690)
new e3492cea [Fix][Metal] Update Timer construction after the non-nullable handle change (#20698)
new 0f5ede3b [REFACTOR][Python] Place pass and testing helpers with their owning modules (#20692)
new f49e78ad [REFACTOR][Runtime] Introduce canonical memory scopes (#20686)
new 1cd5505a refactor(op-dispatch): replace adaptive CUDA tile dispatch with explicit patterns (#20687)
new 2d5f6620 [REFACTOR] Remove private TIRx dependencies from parent packages (#20703)
new 07b2f23a refactor(layout): remove unused TIRx layout helpers (#20706)
new de7b5cdd [REFACTOR][IR] Simplify type scopes and registered annotations (#20707)
new 706e4218 refactor(op-dispatch): infer CUDA tile descriptors and document contracts (#20708)
new fd1d3c95 [REFACTOR][TIRX] Simplify TensorVar and tensor validation hooks (#20709)
new 86d5f5d1 [TVMScript] Default symbolic dimensions to int32 (#20710)
new 3334ac11 [REFACTOR] Unify unsigned-index context and remove unused helpers (#20711)
new 6229419c [REFACTOR][SYM] Retire optional simplifier extensions (#20712)
new 1158fdd7 [REFACTOR][IR] Standardize numeric casts on value-first order (#20713)
new 25ac46a7 [BUGFIX] Fix runtime correctness and backend SDK dependencies (#20715)
new d1b604cf [REFACTOR][TEST] Consolidate runtime tests and isolate RPC (#20716)
new df9f5e22 [REFACTOR] Localize lowering helpers and consolidate TIRx tests (#20719)
new ee096158 [REFACTOR][IR] Adopt typed attribute keys (#20717)
new fa73e0fa [REFACTOR][IR] Consolidate builder location resolution and attachment (#20723)
new e9f3df11 [TIRx] Add scalar builder initialization and assignment (#20724)
new ecf4893b [REFACTOR][PYTHON] Use the native FFI object protocol (#20726)
new 2c5c7d24 [FIX] Repair shared C++ exports, OpenCL interfaces and compiler loading (#20722)
new e760a09d [REFACTOR][CODEGEN] Separate target configuration from code generation (#20718)
new 8f8d5dcc [Runtime] Register backend memory scopes with EnumDef (#20725)
new 93c70bbc [FEAT][Script] Emit script-facing void operators through IRBuilder (#20729)
new 9a0cb7cd [CMake] Organize optional modules and build both runtime libraries (#20728)
new 4f150bf5 feat(tvmscript): add scoped Python line tracing for IRBuilder (#20731)
new c1008c49 refactor(op-dispatch): unify thread scopes as enum tags (#20732)
new e69f4baa [REFACTOR][TIR] Retire legacy CUDA tensorization and warp memory lowering (#20734)
new dd887010 [REFACTOR][HEXAGON] Retire bundled runtime and retain compiler support (#20733)
new 59b32b3b [REFACTOR][CI] Share native Jenkins pipelines and organize CI helpers (#20735)
new 37dd2d2c [REFACTOR] Bringup tirx in standalone folder (#20742)
new bf75d053 [TEST] Use subsystem-relative names for standalone TIRx tests (#20747)
new 3092dae2 fix(infra): update tir-test for the in-tree TIRx split (#20748)
new ceebf227 [REFACTOR] Simplify standalone TIRx CMake (#20749)
new 18b5ae7f [REFACTOR] Simplify TIRx CMake and package installation (#20751)
new 785ed294 [CI] Build and consume source wheel artifacts across Jenkins platforms (#20750)
new 3539d418 [BUILD] Enable LLVM and automatic CUDA in standalone TIRx (#20755)
new 1399038b [REFACTOR][TIRx] Align public APIs and package boundaries (#20759)
new f23ac95b [FIX][Sym] Reject non-positive divisors in iter map floordiv/floormod (#20756)
new 7c364a20 [REFACTOR] Separate TIRx compiler and runtime deployment APIs (#20763)
new 2807c4a4 [TIRx] Clarify overload sets, leaf ownership, and terminal throws (#20765)
new 3aa9aa58 [TIRx] Simplify Python APIs and configuration discovery (#20766)
new 676d08ef [REFACTOR][TIRx] Return statements from tile dispatch (#20767)
new 0e7a7632 [REFACTOR][IR] Align explicit constructors and finish TIRx cleanup (#20768)
new 31e7a2f6 [REFACTOR] Clean up tensor helpers and parent library visibility (#20770)
new c3976d2a [REFACTOR][Python] Use TVM-FFI APIs directly (#20769)
new 2ca08b76 [TIRx] Remove obsolete builtin lowering bypass (#20771)
new 76cd6625 [REFACTOR] Keep attribute contracts with their owning interfaces (#20772)
new 6b606836 [REFACTOR][TIRx] Simplify Python APIs and source docstrings (#20777)
new 713d5866 [REFACTOR][TIRx] Expose dispatch and tensor layout lowering passes (#20775)
new dd5aa9c8 [REFACTOR][TIRx] Remove redundant helpers and construct tensor variables directly (#20776)
new 93a6d7d6 [REFACTOR][Script] Simplify printer configuration and display options (#20778)
new 69bcfd4c [FIX][TIRx] Preserve loops containing break or continue during unrolling (#20783)
new eda60dfe [TIRx] Infer variables from linear packed shapes (#20782)
new a2102e16 [TIRx] Store tensor address geometry in layouts (#20786)
new 01b408e1 [TIRx] Preserve parameter strides and physical view extents (#20788)
new b7280fbd [REFACTOR][TIRx] Replace legacy specialization with structural mapping (#20787)
new 11667fa9 [TEST][TIRx] Complete standalone core test migration (#20789)
new e689b275 Support standard optional JIT annotations and NoneType parameters (#20794)
new 7844dd5e [REFACTOR][IR] Unify raising well-formedness checks (#20793)
new 1d1a56b5 [REFACTOR][TIRx] Remove Clang warning overrides (#20798)
new c703cc21 [REFACTOR][TIRx] Use explicit loop bounds and steps (#20796)
new a44cbc5c [REFACTOR][IR] Colocate typed attribute contracts (#20795)
new 4e909f70 [REFACTOR] Separate TIRX test helpers from parent integrations (#20792)
new 72da5495 [DOCS] Clarify TIRx public APIs and executable pass examples (#20797)
new 75855313 [REFACTOR][TIRx] Consolidate bindings and emitted allocation results (#20799)
new 667058e8 [DOCS] Clarify TIRx assignment and allocation receipts (#20800)
new 229aec20 [REFACTOR][IR] Localize attribute ownership and fix documentation (#20801)
new ce11dfe1 [REFACTOR] Make standalone TIRx the repository root
new 3f9e913c [META] Configure standalone TIRx repository metadata
new 46238b13 [META] Add repository ignore rules and release keys
new 0dbb1fb5 [LINT] Add standalone TIRx lint configuration
new 9e1ffc5b [DOCS] Add standalone TIRx Python API reference
new 1a4a3ecf [CI] Add standalone TIRx build, wheel, and docs pipelines
The 3855 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.