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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/01/20 13:17:31 UTC
[GitHub] [incubator-nuttx] no1wudi opened a new pull request #5291: Rv
no1wudi opened a new pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291
## Summary
We can move some common irq number definitions from chip specific code to common place since they are same on all risc-v chips, and make it possible to share more irq relative logic like timerisr/irq_dispatch accross risc-v socs.
## Impact
None, rename only.
## Testing
CI and qemu-rv32/rv64
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[GitHub] [incubator-nuttx] pkarashchenko commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
pkarashchenko commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788847145
##########
File path: arch/risc-v/src/qemu-rv/qemu_rv_irq.c
##########
@@ -108,17 +108,17 @@ void up_disable_irq(int irq)
int extirq;
uint32_t oldstat;
- if (irq == QEMU_RV_IRQ_MTIMER)
+ if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
asm volatile("csrrc %0, mie, %1"
: "=r"(oldstat)
: "r"(MIE_MTIE));
}
- else if (irq > QEMU_RV_IRQ_MEXT)
+ else if (irq > RISCV_IRQ_MEXT)
Review comment:
I just see `if (RISCV_IRQ_MEXT <= irq)` in `arch/risc-v/src/qemu-rv/qemu_rv_irq_dispatch.c` so wonder why we have such difference
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[GitHub] [incubator-nuttx] pkarashchenko commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
pkarashchenko commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788942425
##########
File path: arch/risc-v/src/qemu-rv/qemu_rv_irq.c
##########
@@ -108,17 +108,17 @@ void up_disable_irq(int irq)
int extirq;
uint32_t oldstat;
- if (irq == QEMU_RV_IRQ_MTIMER)
+ if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
asm volatile("csrrc %0, mie, %1"
: "=r"(oldstat)
: "r"(MIE_MTIE));
}
- else if (irq > QEMU_RV_IRQ_MEXT)
+ else if (irq > RISCV_IRQ_MEXT)
Review comment:
Ok
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[GitHub] [incubator-nuttx] pkarashchenko commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
pkarashchenko commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788756984
##########
File path: arch/risc-v/src/qemu-rv/qemu_rv_irq.c
##########
@@ -108,17 +108,17 @@ void up_disable_irq(int irq)
int extirq;
uint32_t oldstat;
- if (irq == QEMU_RV_IRQ_MTIMER)
+ if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
asm volatile("csrrc %0, mie, %1"
: "=r"(oldstat)
: "r"(MIE_MTIE));
}
- else if (irq > QEMU_RV_IRQ_MEXT)
+ else if (irq > RISCV_IRQ_MEXT)
Review comment:
shouldn't we have `irq >= RISCV_IRQ_MEXT` here?
##########
File path: arch/risc-v/src/qemu-rv/qemu_rv_irq.c
##########
@@ -147,17 +147,17 @@ void up_enable_irq(int irq)
int extirq;
uint32_t oldstat;
- if (irq == QEMU_RV_IRQ_MTIMER)
+ if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & set machine timer interrupt enable in mie */
asm volatile("csrrs %0, mie, %1"
: "=r"(oldstat)
: "r"(MIE_MTIE));
}
- else if (irq > QEMU_RV_IRQ_MEXT)
+ else if (irq > RISCV_IRQ_MEXT)
Review comment:
shouldn't we have `irq >= RISCV_IRQ_MEXT` here?
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[GitHub] [incubator-nuttx] xiaoxiang781216 merged pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 merged pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291
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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788768833
##########
File path: arch/risc-v/include/qemu-rv/irq.h
##########
@@ -33,30 +33,7 @@
/* Map RISC-V exception code to NuttX IRQ */
-/* IRQ 0-15 : (exception:interrupt=0) */
-
-#define QEMU_RV_IRQ_IAMISALIGNED (0) /* Instruction Address Misaligned */
Review comment:
should we remove other chip definition too
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[GitHub] [incubator-nuttx] no1wudi commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
no1wudi commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788781658
##########
File path: arch/risc-v/src/qemu-rv/qemu_rv_irq.c
##########
@@ -108,17 +108,17 @@ void up_disable_irq(int irq)
int extirq;
uint32_t oldstat;
- if (irq == QEMU_RV_IRQ_MTIMER)
+ if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
asm volatile("csrrc %0, mie, %1"
: "=r"(oldstat)
: "r"(MIE_MTIE));
}
- else if (irq > QEMU_RV_IRQ_MEXT)
+ else if (irq > RISCV_IRQ_MEXT)
Review comment:
No need for that since `RISCV_IRQ_MEXT` would not be enabled.
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[GitHub] [incubator-nuttx] no1wudi commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
no1wudi commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788779164
##########
File path: arch/risc-v/include/qemu-rv/irq.h
##########
@@ -33,30 +33,7 @@
/* Map RISC-V exception code to NuttX IRQ */
-/* IRQ 0-15 : (exception:interrupt=0) */
-
-#define QEMU_RV_IRQ_IAMISALIGNED (0) /* Instruction Address Misaligned */
Review comment:
Yes, I'll submit it later
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[GitHub] [incubator-nuttx] no1wudi commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
no1wudi commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788781658
##########
File path: arch/risc-v/src/qemu-rv/qemu_rv_irq.c
##########
@@ -108,17 +108,17 @@ void up_disable_irq(int irq)
int extirq;
uint32_t oldstat;
- if (irq == QEMU_RV_IRQ_MTIMER)
+ if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
asm volatile("csrrc %0, mie, %1"
: "=r"(oldstat)
: "r"(MIE_MTIE));
}
- else if (irq > QEMU_RV_IRQ_MEXT)
+ else if (irq > RISCV_IRQ_MEXT)
Review comment:
No need for that since RISCV_IRQ_MEXT would not be enabled.
--
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[GitHub] [incubator-nuttx] pkarashchenko commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
pkarashchenko commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788847145
##########
File path: arch/risc-v/src/qemu-rv/qemu_rv_irq.c
##########
@@ -108,17 +108,17 @@ void up_disable_irq(int irq)
int extirq;
uint32_t oldstat;
- if (irq == QEMU_RV_IRQ_MTIMER)
+ if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
asm volatile("csrrc %0, mie, %1"
: "=r"(oldstat)
: "r"(MIE_MTIE));
}
- else if (irq > QEMU_RV_IRQ_MEXT)
+ else if (irq > RISCV_IRQ_MEXT)
Review comment:
I just see `if (RISCV_IRQ_MEXT <= irq)` in `arch/risc-v/src/qemu-rv/qemu_rv_irq_dispatch.c` so wonder why we have such difference. The same in `arch/risc-v/src/k210/k210_irq_dispatch.c`
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[GitHub] [incubator-nuttx] no1wudi commented on a change in pull request #5291: arch/risc-v: Unify common irq code
Posted by GitBox <gi...@apache.org>.
no1wudi commented on a change in pull request #5291:
URL: https://github.com/apache/incubator-nuttx/pull/5291#discussion_r788871649
##########
File path: arch/risc-v/src/qemu-rv/qemu_rv_irq.c
##########
@@ -108,17 +108,17 @@ void up_disable_irq(int irq)
int extirq;
uint32_t oldstat;
- if (irq == QEMU_RV_IRQ_MTIMER)
+ if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
asm volatile("csrrc %0, mie, %1"
: "=r"(oldstat)
: "r"(MIE_MTIE));
}
- else if (irq > QEMU_RV_IRQ_MEXT)
+ else if (irq > RISCV_IRQ_MEXT)
Review comment:
Maybe we can refine this behavior in future, but it's better to keep origin code in this PR.
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