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Posted to commits@nuttx.apache.org by ac...@apache.org on 2020/05/01 19:55:41 UTC
[incubator-nuttx] branch master updated (2476aad -> 673640b)
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 2476aad sim: Fix librt can't find on macOS
new b0dbdd7 arch/arm, board/arm: Rename all up_ramvec_* functions to arm_ramvec_*
new 673640b Run all .c and .h modified by this PR through nxstyle
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/armv6-m/arm_dumpnvic.c | 4 +-
arch/arm/src/armv6-m/nvic.h | 48 +++----
arch/arm/src/armv7-m/arm_ramvec_attach.c | 4 +-
arch/arm/src/armv7-m/arm_ramvec_initialize.c | 6 +-
arch/arm/src/armv7-m/ram_vectors.h | 8 +-
arch/arm/src/cxd56xx/cxd56_irq.c | 2 +-
arch/arm/src/efm32/efm32_irq.c | 84 ++++++-----
arch/arm/src/imxrt/imxrt_irq.c | 125 +++++++++--------
arch/arm/src/kinetis/kinetis_irq.c | 110 ++++++++-------
arch/arm/src/lc823450/lc823450_irq.c | 88 +++++++-----
arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c | 83 ++++++-----
arch/arm/src/lpc43xx/lpc43_irq.c | 77 +++++-----
arch/arm/src/lpc54xx/lpc54_irq.c | 77 +++++-----
arch/arm/src/max326xx/common/max326_irq.c | 80 ++++++-----
arch/arm/src/nrf52/nrf52_irq.c | 2 +-
arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c | 119 +++++++++-------
arch/arm/src/sam34/sam_irq.c | 86 ++++++------
arch/arm/src/samd5e5/sam_irq.c | 113 ++++++++-------
arch/arm/src/samv7/sam_irq.c | 86 ++++++------
arch/arm/src/stm32/stm32_irq.c | 97 ++++++-------
arch/arm/src/stm32f7/stm32_irq.c | 102 +++++++-------
arch/arm/src/stm32h7/stm32_irq.c | 156 +++++++++++----------
arch/arm/src/stm32l4/stm32l4_irq.c | 91 ++++++------
arch/arm/src/tiva/common/tiva_irq.c | 132 +++++++++--------
arch/arm/src/xmc4/xmc4_irq.c | 110 ++++++++-------
boards/arm/stm32/nucleo-f302r8/src/stm32_highpri.c | 8 +-
boards/arm/stm32/nucleo-f334r8/src/stm32_highpri.c | 8 +-
boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c | 26 ++--
boards/arm/stm32/stm32f334-disco/src/stm32_smps.c | 4 +-
.../arm/stm32/stm32f429i-disco/src/stm32_highpri.c | 8 +-
.../stm32/viewtool-stm32f107/src/stm32_highpri.c | 54 +++----
boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c | 20 +--
32 files changed, 1026 insertions(+), 992 deletions(-)
[incubator-nuttx] 02/02: Run all .c and .h modified by this PR
through nxstyle
Posted by ac...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 673640b313a5d9050d9c643302810edc3901012a
Author: Gregory Nutt <gn...@nuttx.org>
AuthorDate: Fri May 1 12:45:47 2020 -0600
Run all .c and .h modified by this PR through nxstyle
The are remaining nxstyle complaints due to the use of mixed case identifiers in arch/arm/src/lc823450/lc823450_irq.c This, cannot be easily fixed since it depends on register definitions in header files that have implications to section other lc823450 files.
---
arch/arm/src/armv6-m/nvic.h | 42 ++----
arch/arm/src/efm32/efm32_irq.c | 82 ++++++-----
arch/arm/src/imxrt/imxrt_irq.c | 123 ++++++++--------
arch/arm/src/kinetis/kinetis_irq.c | 108 ++++++++-------
arch/arm/src/lc823450/lc823450_irq.c | 86 +++++++-----
arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c | 79 +++++------
arch/arm/src/lpc43xx/lpc43_irq.c | 75 +++++-----
arch/arm/src/lpc54xx/lpc54_irq.c | 75 +++++-----
arch/arm/src/max326xx/common/max326_irq.c | 78 +++++------
arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c | 117 +++++++++-------
arch/arm/src/sam34/sam_irq.c | 84 +++++------
arch/arm/src/samd5e5/sam_irq.c | 111 ++++++++-------
arch/arm/src/samv7/sam_irq.c | 84 +++++------
arch/arm/src/stm32/stm32_irq.c | 95 ++++++-------
arch/arm/src/stm32f7/stm32_irq.c | 100 ++++++-------
arch/arm/src/stm32h7/stm32_irq.c | 154 +++++++++++----------
arch/arm/src/stm32l4/stm32l4_irq.c | 89 ++++++------
arch/arm/src/tiva/common/tiva_irq.c | 130 +++++++++--------
arch/arm/src/xmc4/xmc4_irq.c | 108 ++++++++-------
boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c | 18 +--
.../stm32/viewtool-stm32f107/src/stm32_highpri.c | 52 +++----
boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c | 16 +--
22 files changed, 970 insertions(+), 936 deletions(-)
diff --git a/arch/arm/src/armv6-m/nvic.h b/arch/arm/src/armv6-m/nvic.h
index bbe792e..2755353 100644
--- a/arch/arm/src/armv6-m/nvic.h
+++ b/arch/arm/src/armv6-m/nvic.h
@@ -1,35 +1,20 @@
/****************************************************************************************************
* arch/arm/src/armv6-m/nvic.h
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************************************/
@@ -57,6 +42,7 @@
#define ARMV6M_NVIC2_BASE 0xe000ef00 /* 0xe000ef00-0xe000ef03 Nested Vectored Interrupt Controller */
/* NVIC register offsets ****************************************************************************/
+
/* NVIC register offsets (all relative to ARMV6M_NVIC1_BASE) */
#define ARMV6M_NVIC_ISER_OFFSET 0x0000 /* Interrupt set-enable register */
@@ -91,6 +77,7 @@
#define ARMV6M_SYSTICK_CALIB_OFFSET 0x000c /* SysTick calibration value register */
/* Register addresses *******************************************************************************/
+
/* NVIC register addresses */
#define ARMV6M_NVIC_ISER (ARMV6M_NVIC1_BASE+ARMV6M_NVIC_ISER_OFFSET)
@@ -342,6 +329,7 @@
#define SYSTICK_CSR_CLKSOURCE (1 << 2) /* Bit 2: Selects the SysTick timer clock source */
#define SYSTICK_CSR_COUNTFLAG (1 << 16) /* Bit 16: Returns 1 if timer counted to 0 since
* the last read of this register */
+
/* SysTick reload value register */
#define SYSTICK_RVR_MASK (0x0fffffff) /* Bits 0-23 */
diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c
index 5caeb10..ce929f6 100644
--- a/arch/arm/src/efm32/efm32_irq.c
+++ b/arch/arm/src/efm32/efm32_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/efm32/efm32_irq.c
*
- * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -116,29 +101,42 @@ static void efm32_dumpnvic(const char *msg, int irq)
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
#if EFM32_IRQ_NVECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
#if EFM32_IRQ_NVECTORS >= (EFM32_IRQ_INTERRUPTS + 48)
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
#if EFM32_IRQ_NVECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
irqinfo(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
@@ -376,10 +374,10 @@ void up_irqinitialize(void)
irq_attach(EFM32_IRQ_SVCALL, arm_svcall, NULL);
irq_attach(EFM32_IRQ_HARDFAULT, arm_hardfault, NULL);
+#ifdef CONFIG_ARMV7M_USEBASEPRI
/* Set the priority of the SVCall interrupt */
-#ifdef CONFIG_ARMV7M_USEBASEPRI
- efm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+ efm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
#endif
/* If the MPU is enabled, then attach and enable the Memory Management
diff --git a/arch/arm/src/imxrt/imxrt_irq.c b/arch/arm/src/imxrt/imxrt_irq.c
index 5647f88..11fd69b 100644
--- a/arch/arm/src/imxrt/imxrt_irq.c
+++ b/arch/arm/src/imxrt/imxrt_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/imxrt/imxrt_irq.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -121,68 +106,96 @@ static void imxrt_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
- getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ64_95_ENABLE),
+ getreg32(NVIC_IRQ96_127_ENABLE));
#if IMXRT_IRQ_NEXTINT > 128
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ128_159_ENABLE), getreg32(NVIC_IRQ160_191_ENABLE),
- getreg32(NVIC_IRQ192_223_ENABLE), getreg32(NVIC_IRQ224_239_ENABLE));
+ getreg32(NVIC_IRQ128_159_ENABLE),
+ getreg32(NVIC_IRQ160_191_ENABLE),
+ getreg32(NVIC_IRQ192_223_ENABLE),
+ getreg32(NVIC_IRQ224_239_ENABLE));
#endif
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
#if IMXRT_IRQ_NEXTINT > 16
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 32
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 48
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 64
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 80
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
- getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+ getreg32(NVIC_IRQ80_83_PRIORITY),
+ getreg32(NVIC_IRQ84_87_PRIORITY),
+ getreg32(NVIC_IRQ88_91_PRIORITY),
+ getreg32(NVIC_IRQ92_95_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 96
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
- getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+ getreg32(NVIC_IRQ96_99_PRIORITY),
+ getreg32(NVIC_IRQ100_103_PRIORITY),
+ getreg32(NVIC_IRQ104_107_PRIORITY),
+ getreg32(NVIC_IRQ108_111_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 112
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY),
- getreg32(NVIC_IRQ120_123_PRIORITY), getreg32(NVIC_IRQ124_127_PRIORITY));
+ getreg32(NVIC_IRQ112_115_PRIORITY),
+ getreg32(NVIC_IRQ116_119_PRIORITY),
+ getreg32(NVIC_IRQ120_123_PRIORITY),
+ getreg32(NVIC_IRQ124_127_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 128
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ128_131_PRIORITY), getreg32(NVIC_IRQ132_135_PRIORITY),
- getreg32(NVIC_IRQ136_139_PRIORITY), getreg32(NVIC_IRQ140_143_PRIORITY));
+ getreg32(NVIC_IRQ128_131_PRIORITY),
+ getreg32(NVIC_IRQ132_135_PRIORITY),
+ getreg32(NVIC_IRQ136_139_PRIORITY),
+ getreg32(NVIC_IRQ140_143_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 144
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ144_147_PRIORITY), getreg32(NVIC_IRQ148_151_PRIORITY),
- getreg32(NVIC_IRQ152_155_PRIORITY), getreg32(NVIC_IRQ156_159_PRIORITY));
+ getreg32(NVIC_IRQ144_147_PRIORITY),
+ getreg32(NVIC_IRQ148_151_PRIORITY),
+ getreg32(NVIC_IRQ152_155_PRIORITY),
+ getreg32(NVIC_IRQ156_159_PRIORITY));
#endif
#if IMXRT_IRQ_NEXTINT > 160
# warning Missing logic
diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c
index bfcb840..2f840a2 100644
--- a/arch/arm/src/kinetis/kinetis_irq.c
+++ b/arch/arm/src/kinetis/kinetis_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_irq.c
*
- * Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -117,40 +102,61 @@ static void kinetis_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
- getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ64_95_ENABLE),
+ getreg32(NVIC_IRQ96_127_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
- getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+ getreg32(NVIC_IRQ80_83_PRIORITY),
+ getreg32(NVIC_IRQ84_87_PRIORITY),
+ getreg32(NVIC_IRQ88_91_PRIORITY),
+ getreg32(NVIC_IRQ92_95_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
- getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+ getreg32(NVIC_IRQ96_99_PRIORITY),
+ getreg32(NVIC_IRQ100_103_PRIORITY),
+ getreg32(NVIC_IRQ104_107_PRIORITY),
+ getreg32(NVIC_IRQ108_111_PRIORITY));
#if KINETIS_IRQ_NVECTORS > 111
irqinfo(" %08x %08x\n",
- getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
+ getreg32(NVIC_IRQ112_115_PRIORITY),
+ getreg32(NVIC_IRQ116_119_PRIORITY));
#endif
leave_critical_section(flags);
@@ -261,17 +267,17 @@ static int kinetis_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
if (irq >= KINETIS_IRQ_FIRST)
{
- if (irq < (KINETIS_IRQ_FIRST+32))
+ if (irq < (KINETIS_IRQ_FIRST + 32))
{
*regaddr = (NVIC_IRQ0_31_ENABLE + offset);
*bit = 1 << (irq - KINETIS_IRQ_FIRST);
}
- else if (irq < (KINETIS_IRQ_FIRST+64))
+ else if (irq < (KINETIS_IRQ_FIRST + 64))
{
*regaddr = (NVIC_IRQ32_63_ENABLE + offset);
*bit = 1 << (irq - KINETIS_IRQ_FIRST - 32);
}
- else if (irq < (KINETIS_IRQ_FIRST+96))
+ else if (irq < (KINETIS_IRQ_FIRST + 96))
{
*regaddr = (NVIC_IRQ64_95_ENABLE + offset);
*bit = 1 << (irq - KINETIS_IRQ_FIRST - 64);
diff --git a/arch/arm/src/lc823450/lc823450_irq.c b/arch/arm/src/lc823450/lc823450_irq.c
index 07d5e45..631a192 100644
--- a/arch/arm/src/lc823450/lc823450_irq.c
+++ b/arch/arm/src/lc823450/lc823450_irq.c
@@ -155,28 +155,41 @@ static void lc823450_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
irqinfo(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
leave_critical_section(flags);
@@ -186,8 +199,9 @@ static void lc823450_dumpnvic(const char *msg, int irq)
#endif
/****************************************************************************
- * Name: lc823450_nmi, lc823450_busfault, lc823450_usagefault, lc823450_pendsv,
- * lc823450_dbgmonitor, lc823450_pendsv, lc823450_reserved
+ * Name: lc823450_nmi, lc823450_busfault, lc823450_usagefault,
+ * lc823450_pendsv, lc823450_dbgmonitor, lc823450_pendsv,
+ * lc823450_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@@ -269,13 +283,13 @@ static inline void lc823450_prioritize_syscall(int priority)
}
#endif
-/***********************************************************************
+/****************************************************************************
* Name: lc823450_extint_clr
*
* Description:
* clear irq factor
*
- ***********************************************************************/
+ ****************************************************************************/
static void lc823450_extint_clr(int irq)
{
@@ -296,13 +310,13 @@ static void lc823450_extint_clr(int irq)
return;
}
-/***********************************************************************
+/****************************************************************************
* Name: lc823450_extint_isr
*
* Description:
* Handle external interrupt.
*
- ***********************************************************************/
+ ****************************************************************************/
static int lc823450_extint_isr(int irq, FAR void *context, FAR void *arg)
{
@@ -328,7 +342,7 @@ static int lc823450_extint_isr(int irq, FAR void *context, FAR void *arg)
/* Re-deliver the IRQ */
- for ( ; pending != 0; irq++, pending >>= 1)
+ for (; pending != 0; irq++, pending >>= 1)
{
if ((pending & 1) != 0)
{
@@ -339,13 +353,13 @@ static int lc823450_extint_isr(int irq, FAR void *context, FAR void *arg)
return OK;
}
-/***********************************************************************
+/****************************************************************************
* Name: lc823425_extint_initialize
*
* Description:
* Initialize external interrupt.
*
- ***********************************************************************/
+ ****************************************************************************/
static void lc823450_extint_initialize(void)
{
@@ -428,10 +442,10 @@ static int lc823450_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
else
{
- *regaddr = NVIC_SYSHCON;
- if (irq == LC823450_IRQ_MEMFAULT)
+ *regaddr = NVIC_SYSHCON;
+ if (irq == LC823450_IRQ_MEMFAULT)
{
- *bit = NVIC_SYSHCON_MEMFAULTENA;
+ *bit = NVIC_SYSHCON_MEMFAULTENA;
}
else if (irq == LC823450_IRQ_BUSFAULT)
{
@@ -476,17 +490,18 @@ void up_irqinitialize(void)
/* Colorize the interrupt stack for debug purposes */
#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
- {
- size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
- arm_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
- intstack_size);
- }
+ {
+ size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
+ arm_stack_color((FAR void *)((uintptr_t)&g_intstackbase -
+ intstack_size), intstack_size);
+ }
#endif
/* The standard location for the vector table is at the beginning of FLASH
- * at address 0x0800:0000. If we are using the STMicro DFU bootloader, then
- * the vector table will be offset to a different location in FLASH and we
- * will need to set the NVIC vector location to this alternative location.
+ * at address 0x0800:0000. If we are using the STMicro DFU bootloader,
+ * then the vector table will be offset to a different location in FLASH
+ * and we will need to set the NVIC vector location to this alternative
+ * location.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
@@ -543,7 +558,7 @@ void up_irqinitialize(void)
/* up_prioritize_irq(LC823450_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
#endif
#ifdef CONFIG_ARMV7M_USEBASEPRI
- lc823450_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+ lc823450_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
#endif
/* If the MPU is enabled, then attach and enable the Memory Management
@@ -739,7 +754,6 @@ void arm_ack_irq(int irq)
DEBUGASSERT(false);
}
#endif
-
}
/****************************************************************************
@@ -786,7 +800,6 @@ int up_prioritize_irq(int irq, int priority)
regval |= (priority << shift);
putreg32(regval, regaddr);
- /* lc823450_dumpnvic("prioritize", irq); */
return OK;
}
#endif
@@ -869,6 +882,7 @@ int lc823450_irq_register(int irq, struct lc823450_irq_ops *ops)
{
return -1;
}
+
return OK;
}
#endif /* CONFIG_LC823450_VIRQ */
diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c
index 50c0174..8b6484d 100644
--- a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c
+++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/lpc17/lpc17_40_irq.c
*
- * Copyright (C) 2010-2011, 2013-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -58,6 +43,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
+
/* Get a 32-bit version of the default priority */
#define DEFPRIORITY32 \
@@ -114,23 +100,33 @@ static void lpc17_40_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
leave_critical_section(flags);
}
@@ -139,8 +135,9 @@ static void lpc17_40_dumpnvic(const char *msg, int irq)
#endif
/****************************************************************************
- * Name: lpc17_40_nmi, lpc17_40_busfault, lpc17_40_usagefault, lpc17_40_pendsv,
- * lpc17_40_dbgmonitor, lpc17_40_pendsv, lpc17_40_reserved
+ * Name: lpc17_40_nmi, lpc17_40_busfault, lpc17_40_usagefault,
+ * lpc17_40_pendsv, lpc17_40_dbgmonitor, lpc17_40_pendsv,
+ * lpc17_40_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@@ -240,7 +237,7 @@ static int lpc17_40_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
if (irq >= LPC17_40_IRQ_EXTINT)
{
- if (irq < (LPC17_40_IRQ_EXTINT+32))
+ if (irq < (LPC17_40_IRQ_EXTINT + 32))
{
*regaddr = (NVIC_IRQ0_31_ENABLE + offset);
*bit = 1 << (irq - LPC17_40_IRQ_EXTINT);
@@ -381,7 +378,7 @@ void up_irqinitialize(void)
/* up_prioritize_irq(LPC17_40_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
#endif
#ifdef CONFIG_ARMV7M_USEBASEPRI
- lpc17_40_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+ lpc17_40_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
#endif
/* If the MPU is enabled, then attach and enable the Memory Management
diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c
index fcb9180..cb581f6 100644
--- a/arch/arm/src/lpc43xx/lpc43_irq.c
+++ b/arch/arm/src/lpc43xx/lpc43_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/lpc43/lpc43_irq.c
*
- * Copyright (C) 2012-2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -115,26 +100,38 @@ static void lpc43_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY));
leave_critical_section(flags);
diff --git a/arch/arm/src/lpc54xx/lpc54_irq.c b/arch/arm/src/lpc54xx/lpc54_irq.c
index d835e778..c71e53e 100644
--- a/arch/arm/src/lpc54xx/lpc54_irq.c
+++ b/arch/arm/src/lpc54xx/lpc54_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/lpc54xx/lpc54_irq.c
*
- * Copyright (C) 2017 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -114,26 +99,38 @@ static void lpc54_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY));
leave_critical_section(flags);
diff --git a/arch/arm/src/max326xx/common/max326_irq.c b/arch/arm/src/max326xx/common/max326_irq.c
index 6ef9162..09dfe1e 100644
--- a/arch/arm/src/max326xx/common/max326_irq.c
+++ b/arch/arm/src/max326xx/common/max326_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/max326xx/common/max326_irq.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -114,27 +99,40 @@ static void max326_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
leave_critical_section(flags);
}
diff --git a/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c b/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c
index 527f072..b273497 100644
--- a/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c
+++ b/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c
*
- * Copyright (C) 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -114,48 +99,74 @@ static void s32k14x_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
- getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ64_95_ENABLE),
+ getreg32(NVIC_IRQ96_127_ENABLE));
irqinfo(" %08x\n",
getreg32(NVIC_IRQ128_159_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
- getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+ getreg32(NVIC_IRQ80_83_PRIORITY),
+ getreg32(NVIC_IRQ84_87_PRIORITY),
+ getreg32(NVIC_IRQ88_91_PRIORITY),
+ getreg32(NVIC_IRQ92_95_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
- getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+ getreg32(NVIC_IRQ96_99_PRIORITY),
+ getreg32(NVIC_IRQ100_103_PRIORITY),
+ getreg32(NVIC_IRQ104_107_PRIORITY),
+ getreg32(NVIC_IRQ108_111_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY),
- getreg32(NVIC_IRQ120_123_PRIORITY), getreg32(NVIC_IRQ124_127_PRIORITY));
+ getreg32(NVIC_IRQ112_115_PRIORITY),
+ getreg32(NVIC_IRQ116_119_PRIORITY),
+ getreg32(NVIC_IRQ120_123_PRIORITY),
+ getreg32(NVIC_IRQ124_127_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ128_131_PRIORITY), getreg32(NVIC_IRQ132_135_PRIORITY),
- getreg32(NVIC_IRQ136_139_PRIORITY), getreg32(NVIC_IRQ140_143_PRIORITY));
+ getreg32(NVIC_IRQ128_131_PRIORITY),
+ getreg32(NVIC_IRQ132_135_PRIORITY),
+ getreg32(NVIC_IRQ136_139_PRIORITY),
+ getreg32(NVIC_IRQ140_143_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ144_147_PRIORITY), getreg32(NVIC_IRQ148_151_PRIORITY),
- getreg32(NVIC_IRQ152_155_PRIORITY), getreg32(NVIC_IRQ156_159_PRIORITY));
+ getreg32(NVIC_IRQ144_147_PRIORITY),
+ getreg32(NVIC_IRQ148_151_PRIORITY),
+ getreg32(NVIC_IRQ152_155_PRIORITY),
+ getreg32(NVIC_IRQ156_159_PRIORITY));
leave_critical_section(flags);
}
diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c
index 5534829..0a67e3f 100644
--- a/arch/arm/src/sam34/sam_irq.c
+++ b/arch/arm/src/sam34/sam_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/sam34/sam_irq.c
*
- * Copyright (C) 2009, 2011, 2013-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -124,38 +109,53 @@ static void sam_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
#if SAM_IRQ_NEXTINT > 15
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 31
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 47
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 63
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 79
# warning Missing logic
diff --git a/arch/arm/src/samd5e5/sam_irq.c b/arch/arm/src/samd5e5/sam_irq.c
index 71b69b3..23f5dcc 100644
--- a/arch/arm/src/samd5e5/sam_irq.c
+++ b/arch/arm/src/samd5e5/sam_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/samd5e5/sam_irq.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -124,16 +109,21 @@ static void sam_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
#if SAM_IRQ_NEXTINT > 95
irqinfo(" : %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_127_ENABLE), getreg32(NVIC_IRQ128_159_ENABLE),
+ getreg32(NVIC_IRQ96_127_ENABLE),
+ getreg32(NVIC_IRQ128_159_ENABLE),
getreg32(NVIC_IRQ160_191_ENABLE));
#endif
#if SAM_IRQ_NEXTINT > 191
@@ -141,50 +131,69 @@ static void sam_dumpnvic(const char *msg, int irq)
#endif
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
#if SAM_IRQ_NEXTINT > 15
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 31
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 47
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 63
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 79
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
- getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+ getreg32(NVIC_IRQ80_83_PRIORITY),
+ getreg32(NVIC_IRQ84_87_PRIORITY),
+ getreg32(NVIC_IRQ88_91_PRIORITY),
+ getreg32(NVIC_IRQ92_95_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 95
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
- getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+ getreg32(NVIC_IRQ96_99_PRIORITY),
+ getreg32(NVIC_IRQ100_103_PRIORITY),
+ getreg32(NVIC_IRQ104_107_PRIORITY),
+ getreg32(NVIC_IRQ108_111_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 111
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY),
- getreg32(NVIC_IRQ120_123_PRIORITY), getreg32(NVIC_IRQ124_127_PRIORITY));
+ getreg32(NVIC_IRQ112_115_PRIORITY),
+ getreg32(NVIC_IRQ116_119_PRIORITY),
+ getreg32(NVIC_IRQ120_123_PRIORITY),
+ getreg32(NVIC_IRQ124_127_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 127
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ128_131_PRIORITY), getreg32(NVIC_IRQ132_135_PRIORITY),
- getreg32(NVIC_IRQ136_139_PRIORITY), getreg32(NVIC_IRQ140_143_PRIORITY));
+ getreg32(NVIC_IRQ128_131_PRIORITY),
+ getreg32(NVIC_IRQ132_135_PRIORITY),
+ getreg32(NVIC_IRQ136_139_PRIORITY),
+ getreg32(NVIC_IRQ140_143_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 143
# warning Missing logic
diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c
index ad4608f..2e75cfb 100644
--- a/arch/arm/src/samv7/sam_irq.c
+++ b/arch/arm/src/samv7/sam_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/samv7/sam_irq.c
*
- * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -120,38 +105,53 @@ static void sam_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
#if SAM_IRQ_NEXTINT > 15
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 31
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 47
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 63
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY)
+ getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 79
# warning Missing logic
diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c
index 2236454..8ee0506 100644
--- a/arch/arm/src/stm32/stm32_irq.c
+++ b/arch/arm/src/stm32/stm32_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/stm32/stm32_irq.c
*
- * Copyright (C) 2009-2017 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -86,9 +71,9 @@
volatile uint32_t *g_current_regs[1];
- /* This is the address of the exception vector table (determined by the
- * linker script).
- */
+/* This is the address of the exception vector table (determined by the
+ * linker script).
+ */
#if defined(__ICCARM__)
/* _vectors replaced on __vector_table for IAR C-SPY Simulator */
@@ -121,28 +106,41 @@ static void stm32_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
irqinfo(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
@@ -314,9 +312,10 @@ void up_irqinitialize(void)
}
/* The standard location for the vector table is at the beginning of FLASH
- * at address 0x0800:0000. If we are using the STMicro DFU bootloader, then
- * the vector table will be offset to a different location in FLASH and we
- * will need to set the NVIC vector location to this alternative location.
+ * at address 0x0800:0000. If we are using the STMicro DFU bootloader,
+ * then the vector table will be offset to a different location in FLASH
+ * and we will need to set the NVIC vector location to this alternative
+ * location.
*/
#if defined(__ICCARM__)
@@ -453,8 +452,6 @@ void up_disable_irq(int irq)
putreg32(regval, regaddr);
}
}
-
- // stm32_dumpnvic("disable", irq);
}
/****************************************************************************
@@ -490,8 +487,6 @@ void up_enable_irq(int irq)
putreg32(regval, regaddr);
}
}
-
- // stm32_dumpnvic("enable", irq);
}
/****************************************************************************
diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c
index a5fbb9f..e15997a 100644
--- a/arch/arm/src/stm32f7/stm32_irq.c
+++ b/arch/arm/src/stm32f7/stm32_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/stm32f7/stm32_irq.c
*
- * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -121,48 +106,67 @@ static void stm32_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
#if STM32_IRQ_NEXTINTS > 15
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 31
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 47
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 63
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 79
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
- getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+ getreg32(NVIC_IRQ80_83_PRIORITY),
+ getreg32(NVIC_IRQ84_87_PRIORITY),
+ getreg32(NVIC_IRQ88_91_PRIORITY),
+ getreg32(NVIC_IRQ92_95_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 95
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
- getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+ getreg32(NVIC_IRQ96_99_PRIORITY),
+ getreg32(NVIC_IRQ100_103_PRIORITY),
+ getreg32(NVIC_IRQ104_107_PRIORITY),
+ getreg32(NVIC_IRQ108_111_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 111
# warning Missing logic
@@ -175,8 +179,8 @@ static void stm32_dumpnvic(const char *msg, int irq)
#endif
/****************************************************************************
- * Name: stm32_nmi, stm32_busfault, stm32_usagefault, stm32_pendsv, stm32_dbgmonitor,
- * stm32_pendsv, stm32_reserved
+ * Name: stm32_nmi, stm32_busfault, stm32_usagefault, stm32_pendsv,
+ * stm32_dbgmonitor, stm32_pendsv, stm32_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
diff --git a/arch/arm/src/stm32h7/stm32_irq.c b/arch/arm/src/stm32h7/stm32_irq.c
index 290a714..6ba43c6 100644
--- a/arch/arm/src/stm32h7/stm32_irq.c
+++ b/arch/arm/src/stm32h7/stm32_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/stm32h7/stm32_irq.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -117,54 +102,73 @@ static void stm32_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
#if STM32_IRQ_NEXTINTS > 15
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 31
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 47
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 63
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 79
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
- getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+ getreg32(NVIC_IRQ80_83_PRIORITY),
+ getreg32(NVIC_IRQ84_87_PRIORITY),
+ getreg32(NVIC_IRQ88_91_PRIORITY),
+ getreg32(NVIC_IRQ92_95_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 95
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
- getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+ getreg32(NVIC_IRQ96_99_PRIORITY),
+ getreg32(NVIC_IRQ100_103_PRIORITY),
+ getreg32(NVIC_IRQ104_107_PRIORITY),
+ getreg32(NVIC_IRQ108_111_PRIORITY));
#endif
#if STM32_IRQ_NEXTINTS > 111
# warning Missing logic
#endif
-// TODO: Make sure this covers all interrupts that are available.
+ /* TODO: Make sure this covers all interrupts that are available. */
leave_critical_section(flags);
}
@@ -173,8 +177,8 @@ static void stm32_dumpnvic(const char *msg, int irq)
#endif
/****************************************************************************
- * Name: stm32_nmi, stm32_busfault, stm32_usagefault, stm32_pendsv, stm32_dbgmonitor,
- * stm32_pendsv, stm32_reserved
+ * Name: stm32_nmi, stm32_busfault, stm32_usagefault, stm32_pendsv,
+ * stm32_dbgmonitor, stm32_pendsv, stm32_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@@ -335,32 +339,32 @@ static int stm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
}
else
#elif STM32_IRQ_NEXTINTS <= 160
- if (extint < 32)
- {
- *regaddr = (NVIC_IRQ0_31_ENABLE + offset);
- *bit = 1 << extint;
- }
- else if (extint < 64)
- {
- *regaddr = (NVIC_IRQ32_63_ENABLE + offset);
- *bit = 1 << (extint - 32);
- }
- else if (extint < 96)
- {
- *regaddr = (NVIC_IRQ64_95_ENABLE + offset);
- *bit = 1 << (extint - 64);
- }
- else if (extint < 128)
- {
- *regaddr = (NVIC_IRQ96_127_ENABLE + offset);
- *bit = 1 << (extint - 96);
- }
- else if (extint < STM32_IRQ_NEXTINTS)
- {
- *regaddr = (NVIC_IRQ128_159_ENABLE + offset);
- *bit = 1 << (extint - 128);
- }
- else
+ if (extint < 32)
+ {
+ *regaddr = (NVIC_IRQ0_31_ENABLE + offset);
+ *bit = 1 << extint;
+ }
+ else if (extint < 64)
+ {
+ *regaddr = (NVIC_IRQ32_63_ENABLE + offset);
+ *bit = 1 << (extint - 32);
+ }
+ else if (extint < 96)
+ {
+ *regaddr = (NVIC_IRQ64_95_ENABLE + offset);
+ *bit = 1 << (extint - 64);
+ }
+ else if (extint < 128)
+ {
+ *regaddr = (NVIC_IRQ96_127_ENABLE + offset);
+ *bit = 1 << (extint - 96);
+ }
+ else if (extint < STM32_IRQ_NEXTINTS)
+ {
+ *regaddr = (NVIC_IRQ128_159_ENABLE + offset);
+ *bit = 1 << (extint - 128);
+ }
+ else
#else
# warning Missing logic
#endif
diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c
index ffa3fca..cf79a57 100644
--- a/arch/arm/src/stm32l4/stm32l4_irq.c
+++ b/arch/arm/src/stm32l4/stm32l4_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/stm32l4/stm32l4_irq.c
*
- * Copyright (C) 2009-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -113,28 +98,41 @@ static void stm32l4_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
irqinfo(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
@@ -306,9 +304,10 @@ void up_irqinitialize(void)
}
/* The standard location for the vector table is at the beginning of FLASH
- * at address 0x0800:0000. If we are using the STMicro DFU bootloader, then
- * the vector table will be offset to a different location in FLASH and we
- * will need to set the NVIC vector location to this alternative location.
+ * at address 0x0800:0000. If we are using the STMicro DFU bootloader,
+ * then the vector table will be offset to a different location in FLASH
+ * and we will need to set the NVIC vector location to this alternative
+ * location.
*/
putreg32((uint32_t)_vectors, NVIC_VECTAB);
@@ -435,8 +434,6 @@ void up_disable_irq(int irq)
putreg32(regval, regaddr);
}
}
-
- // stm32l4_dumpnvic("disable", irq);
}
/****************************************************************************
@@ -472,8 +469,6 @@ void up_enable_irq(int irq)
putreg32(regval, regaddr);
}
}
-
- // stm32l4_dumpnvic("enable", irq);
}
/****************************************************************************
diff --git a/arch/arm/src/tiva/common/tiva_irq.c b/arch/arm/src/tiva/common/tiva_irq.c
index dcfe619..4abbf99 100644
--- a/arch/arm/src/tiva/common/tiva_irq.c
+++ b/arch/arm/src/tiva/common/tiva_irq.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_irq.c
*
- * Copyright (C) 2009, 2011, 2013-2014, 2018 Gregory Nutt. All rights
- * reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -119,26 +103,35 @@ static void tiva_dumpnvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
#if TIVA_IRQ_NEXTINT < 64
irqinfo(" IRQ ENABLE: %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE));
#elif TIVA_IRQ_NEXTINT < 96
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
#elif TIVA_IRQ_NEXTINT < 128
irqinfo(" IRQ ENABLE: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
- getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ64_95_ENABLE),
+ getreg32(NVIC_IRQ96_127_ENABLE));
#elif TIVA_IRQ_NEXTINT < 160
irqinfo(" IRQ ENABLE: %08x %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
- getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE),
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ64_95_ENABLE),
+ getreg32(NVIC_IRQ96_127_ENABLE),
getreg32(NVIC_IRQ128_159_ENABLE));
#endif
#if TIVA_IRQ_NEXTINT > 159
@@ -146,51 +139,72 @@ static void tiva_dumpnvic(const char *msg, int irq)
#endif
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
#if TIVA_IRQ_NEXTINT > 47
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if TIVA_IRQ_NEXTINT > 63
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if TIVA_IRQ_NEXTINT > 79
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
- getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+ getreg32(NVIC_IRQ80_83_PRIORITY),
+ getreg32(NVIC_IRQ84_87_PRIORITY),
+ getreg32(NVIC_IRQ88_91_PRIORITY),
+ getreg32(NVIC_IRQ92_95_PRIORITY));
#endif
#if TIVA_IRQ_NEXTINT > 95
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
- getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+ getreg32(NVIC_IRQ96_99_PRIORITY),
+ getreg32(NVIC_IRQ100_103_PRIORITY),
+ getreg32(NVIC_IRQ104_107_PRIORITY),
+ getreg32(NVIC_IRQ108_111_PRIORITY));
#endif
#if TIVA_IRQ_NEXTINT > 111
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY),
- getreg32(NVIC_IRQ120_123_PRIORITY), getreg32(NVIC_IRQ124_127_PRIORITY));
+ getreg32(NVIC_IRQ112_115_PRIORITY),
+ getreg32(NVIC_IRQ116_119_PRIORITY),
+ getreg32(NVIC_IRQ120_123_PRIORITY),
+ getreg32(NVIC_IRQ124_127_PRIORITY));
#endif
#if TIVA_IRQ_NEXTINT > 127
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ128_131_PRIORITY), getreg32(NVIC_IRQ132_135_PRIORITY),
- getreg32(NVIC_IRQ136_139_PRIORITY), getreg32(NVIC_IRQ140_143_PRIORITY));
+ getreg32(NVIC_IRQ128_131_PRIORITY),
+ getreg32(NVIC_IRQ132_135_PRIORITY),
+ getreg32(NVIC_IRQ136_139_PRIORITY),
+ getreg32(NVIC_IRQ140_143_PRIORITY));
#endif
#if TIVA_IRQ_NEXTINT > 143
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ144_147_PRIORITY), getreg32(NVIC_IRQ148_151_PRIORITY),
- getreg32(NVIC_IRQ152_155_PRIORITY), getreg32(NVIC_IRQ156_159_PRIORITY));
+ getreg32(NVIC_IRQ144_147_PRIORITY),
+ getreg32(NVIC_IRQ148_151_PRIORITY),
+ getreg32(NVIC_IRQ152_155_PRIORITY),
+ getreg32(NVIC_IRQ156_159_PRIORITY));
#endif
#if TIVA_IRQ_NEXTINT > 159
# warning Missing output
diff --git a/arch/arm/src/xmc4/xmc4_irq.c b/arch/arm/src/xmc4/xmc4_irq.c
index 8f66232..74868c4 100644
--- a/arch/arm/src/xmc4/xmc4_irq.c
+++ b/arch/arm/src/xmc4/xmc4_irq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/xmc4/xmc4_irq.c
*
- * Copyright (C) 2017 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -116,40 +101,61 @@ static void xmc4_dump_nvic(const char *msg, int irq)
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
- getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
- getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
+ irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
+ "SYSTICK: %08x\n",
+ getreg32(NVIC_SYSHCON_MEMFAULTENA),
+ getreg32(NVIC_SYSHCON_BUSFAULTENA),
+ getreg32(NVIC_SYSHCON_USGFAULTENA),
+ getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
- getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
+ getreg32(NVIC_IRQ0_31_ENABLE),
+ getreg32(NVIC_IRQ32_63_ENABLE),
+ getreg32(NVIC_IRQ64_95_ENABLE),
+ getreg32(NVIC_IRQ96_127_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
- getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
+ getreg32(NVIC_SYSH4_7_PRIORITY),
+ getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
- getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
+ getreg32(NVIC_IRQ0_3_PRIORITY),
+ getreg32(NVIC_IRQ4_7_PRIORITY),
+ getreg32(NVIC_IRQ8_11_PRIORITY),
+ getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
- getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
+ getreg32(NVIC_IRQ16_19_PRIORITY),
+ getreg32(NVIC_IRQ20_23_PRIORITY),
+ getreg32(NVIC_IRQ24_27_PRIORITY),
+ getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
- getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
+ getreg32(NVIC_IRQ32_35_PRIORITY),
+ getreg32(NVIC_IRQ36_39_PRIORITY),
+ getreg32(NVIC_IRQ40_43_PRIORITY),
+ getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
- getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
+ getreg32(NVIC_IRQ48_51_PRIORITY),
+ getreg32(NVIC_IRQ52_55_PRIORITY),
+ getreg32(NVIC_IRQ56_59_PRIORITY),
+ getreg32(NVIC_IRQ60_63_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
- getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
+ getreg32(NVIC_IRQ64_67_PRIORITY),
+ getreg32(NVIC_IRQ68_71_PRIORITY),
+ getreg32(NVIC_IRQ72_75_PRIORITY),
+ getreg32(NVIC_IRQ76_79_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
- getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
+ getreg32(NVIC_IRQ80_83_PRIORITY),
+ getreg32(NVIC_IRQ84_87_PRIORITY),
+ getreg32(NVIC_IRQ88_91_PRIORITY),
+ getreg32(NVIC_IRQ92_95_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
- getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
- getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
+ getreg32(NVIC_IRQ96_99_PRIORITY),
+ getreg32(NVIC_IRQ100_103_PRIORITY),
+ getreg32(NVIC_IRQ104_107_PRIORITY),
+ getreg32(NVIC_IRQ108_111_PRIORITY));
#if XMC4_IRQ_NVECTORS > 111
irqinfo(" %08x %08x\n",
- getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
+ getreg32(NVIC_IRQ112_115_PRIORITY),
+ getreg32(NVIC_IRQ116_119_PRIORITY));
#endif
leave_critical_section(flags);
@@ -260,17 +266,17 @@ static int xmc4_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
if (irq >= XMC4_IRQ_FIRST)
{
- if (irq < (XMC4_IRQ_FIRST+32))
+ if (irq < (XMC4_IRQ_FIRST + 32))
{
*regaddr = (NVIC_IRQ0_31_ENABLE + offset);
*bit = 1 << (irq - XMC4_IRQ_FIRST);
}
- else if (irq < (XMC4_IRQ_FIRST+64))
+ else if (irq < (XMC4_IRQ_FIRST + 64))
{
*regaddr = (NVIC_IRQ32_63_ENABLE + offset);
*bit = 1 << (irq - XMC4_IRQ_FIRST - 32);
}
- else if (irq < (XMC4_IRQ_FIRST+96))
+ else if (irq < (XMC4_IRQ_FIRST + 96))
{
*regaddr = (NVIC_IRQ64_95_ENABLE + offset);
*bit = 1 << (irq - XMC4_IRQ_FIRST - 64);
diff --git a/boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c b/boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c
index f2f3305..935719f 100644
--- a/boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c
+++ b/boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c
@@ -216,16 +216,16 @@ struct spwm_s
#ifdef CONFIG_NUCLEOF334R8_SPWM_USE_TIM1
FAR struct stm32_tim_dev_s *tim;
#endif
- float waveform[SAMPLES_NUM]; /* Waveform samples */
- float phase_step; /* Waveform phase step */
- float waveform_freq; /* Waveform frequency */
- uint16_t cmp[SAMPLES_NUM]; /* PWM TIM compare table */
- uint16_t per; /* PWM TIM period */
- uint16_t samples; /* Modulation waveform samples num */
- uint16_t phase_shift[PHASES_NUM]; /* Phase offset */
+ float waveform[SAMPLES_NUM]; /* Waveform samples */
+ float phase_step; /* Waveform phase step */
+ float waveform_freq; /* Waveform frequency */
+ uint16_t cmp[SAMPLES_NUM]; /* PWM TIM compare table */
+ uint16_t per; /* PWM TIM period */
+ uint16_t samples; /* Modulation waveform samples num */
+ uint16_t phase_shift[PHASES_NUM]; /* Phase offset */
volatile uint16_t sample_now[PHASES_NUM]; /* Current sample number for
* phase */
- uint8_t phases; /* Number of PWM phases */
+ uint8_t phases; /* Number of PWM phases */
};
/****************************************************************************
@@ -763,7 +763,7 @@ static int spwm_tim6_setup(FAR struct spwm_s *spwm)
freq = spwm->samples * spwm->waveform_freq;
per = BOARD_TIM6_FREQUENCY / freq;
- if (per > 0xFFFF)
+ if (per > 0xffff)
{
printf("ERROR: can not achieve TIM6 frequency\n");
ret = -1;
diff --git a/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c b/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c
index 0ff7507..06b0083 100644
--- a/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c
+++ b/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c
@@ -1,35 +1,20 @@
/****************************************************************************
* boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c
*
- * Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
@@ -62,6 +47,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
+
/* Configuration ************************************************************/
#ifndef CONFIG_ARCH_CHIP_STM32F103VC
@@ -195,14 +181,15 @@ int highpri_main(int argc, char *argv[])
STM32_TIM_SETPERIOD(dev, CONFIG_VIEWTOOL_TIM6_PERIOD);
printf("TIM6 period=%d cyles; interrupt rate=%d Hz\n",
CONFIG_VIEWTOOL_TIM6_PERIOD,
- CONFIG_VIEWTOOL_TIM6_FREQUENCY/CONFIG_VIEWTOOL_TIM6_PERIOD);
+ CONFIG_VIEWTOOL_TIM6_FREQUENCY / CONFIG_VIEWTOOL_TIM6_PERIOD);
/* Attach TIM6 ram vector */
ret = arm_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n", ret);
+ fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
+ ret);
return EXIT_FAILURE;
}
@@ -211,7 +198,8 @@ int highpri_main(int argc, char *argv[])
ret = up_prioritize_irq(STM32_IRQ_TIM6, NVIC_SYSH_HIGH_PRIORITY);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: up_prioritize_irq failed: %d\n", ret);
+ fprintf(stderr, "highpri_main: ERROR: up_prioritize_irq failed: %d\n",
+ ret);
return EXIT_FAILURE;
}
@@ -223,7 +211,7 @@ int highpri_main(int argc, char *argv[])
/* Monitor interrupts */
seconds = 0;
- for (;;)
+ for (; ; )
{
/* Flush stdout and wait a bit */
@@ -259,7 +247,7 @@ int highpri_main(int argc, char *argv[])
{
printf(" basepri[%02x]: %lld (%d%%)\n",
i << 4, basepri[i],
- (int)((100* basepri[i] + (total / 2)) / total));
+ (int)((100 * basepri[i] + (total / 2)) / total));
}
}
}
diff --git a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c
index 3da6e14..a48e823 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c
+++ b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c
@@ -154,16 +154,16 @@ struct spwm_s
#ifdef CONFIG_NUCLEOL432KC_SPWM_USE_TIM1
FAR struct stm32l4_tim_dev_s *tim;
#endif
- float waveform[SAMPLES_NUM]; /* Waveform samples */
- float phase_step; /* Waveform phase step */
- float waveform_freq; /* Waveform frequency */
- uint16_t cmp[SAMPLES_NUM]; /* PWM TIM compare table */
- uint16_t per; /* PWM TIM period */
- uint16_t samples; /* Modulation waveform samples num */
- uint16_t phase_shift[PHASES_NUM]; /* Phase offset */
+ float waveform[SAMPLES_NUM]; /* Waveform samples */
+ float phase_step; /* Waveform phase step */
+ float waveform_freq; /* Waveform frequency */
+ uint16_t cmp[SAMPLES_NUM]; /* PWM TIM compare table */
+ uint16_t per; /* PWM TIM period */
+ uint16_t samples; /* Modulation waveform samples num */
+ uint16_t phase_shift[PHASES_NUM]; /* Phase offset */
volatile uint16_t sample_now[PHASES_NUM]; /* Current sample number for
* phase */
- uint8_t phases; /* Number of PWM phases */
+ uint8_t phases; /* Number of PWM phases */
};
/****************************************************************************
[incubator-nuttx] 01/02: arch/arm,
board/arm: Rename all up_ramvec_* functions to arm_ramvec_*
Posted by ac...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit b0dbdd7c106bcdbb1c497fdfed812d531946bfaf
Author: Gregory Nutt <gn...@nuttx.org>
AuthorDate: Fri May 1 11:41:16 2020 -0600
arch/arm, board/arm: Rename all up_ramvec_* functions to arm_ramvec_*
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.
This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch().
Impact
There should be no impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
---
arch/arm/src/armv6-m/arm_dumpnvic.c | 4 ++--
arch/arm/src/armv6-m/nvic.h | 6 +++---
arch/arm/src/armv7-m/arm_ramvec_attach.c | 4 ++--
arch/arm/src/armv7-m/arm_ramvec_initialize.c | 6 +++---
arch/arm/src/armv7-m/ram_vectors.h | 8 ++++----
arch/arm/src/cxd56xx/cxd56_irq.c | 2 +-
arch/arm/src/efm32/efm32_irq.c | 2 +-
arch/arm/src/imxrt/imxrt_irq.c | 2 +-
arch/arm/src/kinetis/kinetis_irq.c | 2 +-
arch/arm/src/lc823450/lc823450_irq.c | 2 +-
arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c | 4 ++--
arch/arm/src/lpc43xx/lpc43_irq.c | 2 +-
arch/arm/src/lpc54xx/lpc54_irq.c | 2 +-
arch/arm/src/max326xx/common/max326_irq.c | 2 +-
arch/arm/src/nrf52/nrf52_irq.c | 2 +-
arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c | 2 +-
arch/arm/src/sam34/sam_irq.c | 2 +-
arch/arm/src/samd5e5/sam_irq.c | 2 +-
arch/arm/src/samv7/sam_irq.c | 2 +-
arch/arm/src/stm32/stm32_irq.c | 2 +-
arch/arm/src/stm32f7/stm32_irq.c | 2 +-
arch/arm/src/stm32h7/stm32_irq.c | 2 +-
arch/arm/src/stm32l4/stm32l4_irq.c | 2 +-
arch/arm/src/tiva/common/tiva_irq.c | 2 +-
arch/arm/src/xmc4/xmc4_irq.c | 2 +-
boards/arm/stm32/nucleo-f302r8/src/stm32_highpri.c | 8 ++++----
boards/arm/stm32/nucleo-f334r8/src/stm32_highpri.c | 8 ++++----
boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c | 8 ++++----
boards/arm/stm32/stm32f334-disco/src/stm32_smps.c | 4 ++--
boards/arm/stm32/stm32f429i-disco/src/stm32_highpri.c | 8 ++++----
boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c | 4 ++--
boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c | 4 ++--
32 files changed, 57 insertions(+), 57 deletions(-)
diff --git a/arch/arm/src/armv6-m/arm_dumpnvic.c b/arch/arm/src/armv6-m/arm_dumpnvic.c
index 6bdd83f..febdf7c 100644
--- a/arch/arm/src/armv6-m/arm_dumpnvic.c
+++ b/arch/arm/src/armv6-m/arm_dumpnvic.c
@@ -55,14 +55,14 @@
****************************************************************************/
/****************************************************************************
- * Function: up_dumpnvic
+ * Function: arm_dumpnvic
*
* Description:
* Dump all NVIC and SYSCON registers along with a user message.
*
****************************************************************************/
-void up_dumpnvic(FAR const char *msg)
+void arm_dumpnvic(FAR const char *msg)
{
#ifdef CONFIG_DEBUG_INFO
irqstate_t flags;
diff --git a/arch/arm/src/armv6-m/nvic.h b/arch/arm/src/armv6-m/nvic.h
index b6f4391..bbe792e 100644
--- a/arch/arm/src/armv6-m/nvic.h
+++ b/arch/arm/src/armv6-m/nvic.h
@@ -380,7 +380,7 @@ extern "C"
****************************************************************************************************/
/****************************************************************************************************
- * Function: up_dumpnvic
+ * Function: arm_dumpnvic
*
* Description:
* Dump all NVIC and SYSCON registers along with a user message.
@@ -388,9 +388,9 @@ extern "C"
****************************************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
-void up_dumpnvic(FAR const char *msg);
+void arm_dumpnvic(FAR const char *msg);
#else
-# define up_dumpnvic(m)
+# define arm_dumpnvic(m)
#endif
#undef EXTERN
diff --git a/arch/arm/src/armv7-m/arm_ramvec_attach.c b/arch/arm/src/armv7-m/arm_ramvec_attach.c
index a2caaab..157a30e 100644
--- a/arch/arm/src/armv7-m/arm_ramvec_attach.c
+++ b/arch/arm/src/armv7-m/arm_ramvec_attach.c
@@ -43,7 +43,7 @@
void exception_common(void);
/****************************************************************************
- * Name: up_ramvec_attach
+ * Name: arm_ramvec_attach
*
* Description:
* Configure the ram vector table so that IRQ number 'irq' will be
@@ -51,7 +51,7 @@ void exception_common(void);
*
****************************************************************************/
-int up_ramvec_attach(int irq, up_vector_t vector)
+int arm_ramvec_attach(int irq, up_vector_t vector)
{
int ret = -EINVAL;
diff --git a/arch/arm/src/armv7-m/arm_ramvec_initialize.c b/arch/arm/src/armv7-m/arm_ramvec_initialize.c
index f9c6f17..592732b 100644
--- a/arch/arm/src/armv7-m/arm_ramvec_initialize.c
+++ b/arch/arm/src/armv7-m/arm_ramvec_initialize.c
@@ -86,7 +86,7 @@
****************************************************************************/
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
- * ARM-specific implementations of up_ramvec_initialize(), irq_attach(), and
+ * ARM-specific implementations of arm_ramvec_initialize(), irq_attach(), and
* irq_dispatch. In this case, it is also assumed that the ARM vector
* table resides in RAM, has the name g_ram_vectors, and has been
* properly positioned and aligned in memory by the linker script.
@@ -105,14 +105,14 @@ up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
****************************************************************************/
/****************************************************************************
- * Name: up_ramvec_initialize
+ * Name: arm_ramvec_initialize
*
* Description:
* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
*
****************************************************************************/
-void up_ramvec_initialize(void)
+void arm_ramvec_initialize(void)
{
const up_vector_t *src;
up_vector_t *dest;
diff --git a/arch/arm/src/armv7-m/ram_vectors.h b/arch/arm/src/armv7-m/ram_vectors.h
index b92edb1..b329d1e 100644
--- a/arch/arm/src/armv7-m/ram_vectors.h
+++ b/arch/arm/src/armv7-m/ram_vectors.h
@@ -69,14 +69,14 @@ extern up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
****************************************************************************/
/****************************************************************************
- * Name: up_ramvec_initialize
+ * Name: arm_ramvec_initialize
*
* Description:
* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
*
****************************************************************************/
-void up_ramvec_initialize(void);
+void arm_ramvec_initialize(void);
/****************************************************************************
* Name: exception_common
@@ -89,7 +89,7 @@ void up_ramvec_initialize(void);
void exception_common(void);
/****************************************************************************
- * Name: up_ramvec_attach
+ * Name: arm_ramvec_attach
*
* Description:
* Configure the ram vector table so that IRQ number 'irq' will be
@@ -97,7 +97,7 @@ void exception_common(void);
*
****************************************************************************/
-int up_ramvec_attach(int irq, up_vector_t vector);
+int arm_ramvec_attach(int irq, up_vector_t vector);
#endif /* CONFIG_ARCH_RAMVECTORS */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */
diff --git a/arch/arm/src/cxd56xx/cxd56_irq.c b/arch/arm/src/cxd56xx/cxd56_irq.c
index e776c23..8a562f6 100644
--- a/arch/arm/src/cxd56xx/cxd56_irq.c
+++ b/arch/arm/src/cxd56xx/cxd56_irq.c
@@ -319,7 +319,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c
index f85c63d..5caeb10 100644
--- a/arch/arm/src/efm32/efm32_irq.c
+++ b/arch/arm/src/efm32/efm32_irq.c
@@ -334,7 +334,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/imxrt/imxrt_irq.c b/arch/arm/src/imxrt/imxrt_irq.c
index 4dbd7e9..5647f88 100644
--- a/arch/arm/src/imxrt/imxrt_irq.c
+++ b/arch/arm/src/imxrt/imxrt_irq.c
@@ -429,7 +429,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c
index ccca756..bfcb840 100644
--- a/arch/arm/src/kinetis/kinetis_irq.c
+++ b/arch/arm/src/kinetis/kinetis_irq.c
@@ -369,7 +369,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/lc823450/lc823450_irq.c b/arch/arm/src/lc823450/lc823450_irq.c
index 5f0c23e..07d5e45 100644
--- a/arch/arm/src/lc823450/lc823450_irq.c
+++ b/arch/arm/src/lc823450/lc823450_irq.c
@@ -493,7 +493,7 @@ void up_irqinitialize(void)
*/
#if defined(CONFIG_ARCH_RAMVECTORS)
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#elif defined(CONFIG_LC823450_DFU)
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#endif
diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c
index fd27e4b..50c0174 100644
--- a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c
+++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c
@@ -337,12 +337,12 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*
* But even in this case NVIC_VECTAB has to point to the initial table
- * because up_ramvec_initialize() initializes RAM table from table
+ * because arm_ramvec_initialize() initializes RAM table from table
* pointed by NVIC_VECTAB register.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c
index 91a0380..fcb9180 100644
--- a/arch/arm/src/lpc43xx/lpc43_irq.c
+++ b/arch/arm/src/lpc43xx/lpc43_irq.c
@@ -326,7 +326,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/lpc54xx/lpc54_irq.c b/arch/arm/src/lpc54xx/lpc54_irq.c
index 99c3018..d835e778 100644
--- a/arch/arm/src/lpc54xx/lpc54_irq.c
+++ b/arch/arm/src/lpc54xx/lpc54_irq.c
@@ -325,7 +325,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/max326xx/common/max326_irq.c b/arch/arm/src/max326xx/common/max326_irq.c
index ea08cb6..6ef9162 100644
--- a/arch/arm/src/max326xx/common/max326_irq.c
+++ b/arch/arm/src/max326xx/common/max326_irq.c
@@ -324,7 +324,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/nrf52/nrf52_irq.c b/arch/arm/src/nrf52/nrf52_irq.c
index f2a42d9..4335e52 100644
--- a/arch/arm/src/nrf52/nrf52_irq.c
+++ b/arch/arm/src/nrf52/nrf52_irq.c
@@ -339,7 +339,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c b/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c
index 0da1e90..527f072 100644
--- a/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c
+++ b/arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.c
@@ -346,7 +346,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c
index 74a6d3b..5534829 100644
--- a/arch/arm/src/sam34/sam_irq.c
+++ b/arch/arm/src/sam34/sam_irq.c
@@ -400,7 +400,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/samd5e5/sam_irq.c b/arch/arm/src/samd5e5/sam_irq.c
index 2927839..71b69b3 100644
--- a/arch/arm/src/samd5e5/sam_irq.c
+++ b/arch/arm/src/samd5e5/sam_irq.c
@@ -478,7 +478,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c
index a954c87..ad4608f 100644
--- a/arch/arm/src/samv7/sam_irq.c
+++ b/arch/arm/src/samv7/sam_irq.c
@@ -396,7 +396,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c
index 24da0cc..2236454 100644
--- a/arch/arm/src/stm32/stm32_irq.c
+++ b/arch/arm/src/stm32/stm32_irq.c
@@ -330,7 +330,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c
index b172375..a5fbb9f 100644
--- a/arch/arm/src/stm32f7/stm32_irq.c
+++ b/arch/arm/src/stm32f7/stm32_irq.c
@@ -429,7 +429,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/stm32h7/stm32_irq.c b/arch/arm/src/stm32h7/stm32_irq.c
index 4bf95a3..290a714 100644
--- a/arch/arm/src/stm32h7/stm32_irq.c
+++ b/arch/arm/src/stm32h7/stm32_irq.c
@@ -454,7 +454,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c
index d53e17a..ffa3fca 100644
--- a/arch/arm/src/stm32l4/stm32l4_irq.c
+++ b/arch/arm/src/stm32l4/stm32l4_irq.c
@@ -318,7 +318,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/arch/arm/src/tiva/common/tiva_irq.c b/arch/arm/src/tiva/common/tiva_irq.c
index 89364fa..dcfe619 100644
--- a/arch/arm/src/tiva/common/tiva_irq.c
+++ b/arch/arm/src/tiva/common/tiva_irq.c
@@ -430,7 +430,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
#ifdef CONFIG_TIVA_RAMVBAR
diff --git a/arch/arm/src/xmc4/xmc4_irq.c b/arch/arm/src/xmc4/xmc4_irq.c
index 55d5b6b..8f66232 100644
--- a/arch/arm/src/xmc4/xmc4_irq.c
+++ b/arch/arm/src/xmc4/xmc4_irq.c
@@ -368,7 +368,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
- up_ramvec_initialize();
+ arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */
diff --git a/boards/arm/stm32/nucleo-f302r8/src/stm32_highpri.c b/boards/arm/stm32/nucleo-f302r8/src/stm32_highpri.c
index 65aca97..ef2a4de 100644
--- a/boards/arm/stm32/nucleo-f302r8/src/stm32_highpri.c
+++ b/boards/arm/stm32/nucleo-f302r8/src/stm32_highpri.c
@@ -424,10 +424,10 @@ int highpri_main(int argc, char *argv[])
#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
/* Attach ADC12 ram vector if no DMA or injected channels support */
- ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
+ fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
@@ -450,10 +450,10 @@ int highpri_main(int argc, char *argv[])
#ifdef CONFIG_STM32_ADC1_DMA
/* Attach DMA1 CH1 ram vector if DMA */
- ret = up_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
+ fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
diff --git a/boards/arm/stm32/nucleo-f334r8/src/stm32_highpri.c b/boards/arm/stm32/nucleo-f334r8/src/stm32_highpri.c
index 3e3c8be..a357f43 100644
--- a/boards/arm/stm32/nucleo-f334r8/src/stm32_highpri.c
+++ b/boards/arm/stm32/nucleo-f334r8/src/stm32_highpri.c
@@ -460,10 +460,10 @@ int highpri_main(int argc, char *argv[])
#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
/* Attach ADC12 ram vector if no DMA or injected channels support */
- ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
+ fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
@@ -486,10 +486,10 @@ int highpri_main(int argc, char *argv[])
#ifdef CONFIG_STM32_ADC1_DMA
/* Attach DMA1 CH1 ram vector if DMA */
- ret = up_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
+ fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
diff --git a/boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c b/boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c
index 931da66..f2f3305 100644
--- a/boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c
+++ b/boards/arm/stm32/nucleo-f334r8/src/stm32_spwm.c
@@ -569,10 +569,10 @@ static int spwm_hrtim_setup(FAR struct spwm_s *spwm)
/* Attach HRTIM Master TImer IRQ */
- ret = up_ramvec_attach(STM32_IRQ_HRTIMTM, hrtim_master_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_HRTIMTM, hrtim_master_handler);
if (ret < 0)
{
- fprintf(stderr, "spwm_main: ERROR: up_ramvec_attach failed: %d\n",
+ fprintf(stderr, "spwm_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = -1;
goto errout;
@@ -777,10 +777,10 @@ static int spwm_tim6_setup(FAR struct spwm_s *spwm)
/* Attach TIM6 ram vector */
- ret = up_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
if (ret < 0)
{
- printf("ERROR: up_ramvec_attach failed: %d\n", ret);
+ printf("ERROR: arm_ramvec_attach failed: %d\n", ret);
ret = -1;
goto errout;
}
diff --git a/boards/arm/stm32/stm32f334-disco/src/stm32_smps.c b/boards/arm/stm32/stm32f334-disco/src/stm32_smps.c
index 062411f..8eb5c81 100644
--- a/boards/arm/stm32/stm32f334-disco/src/stm32_smps.c
+++ b/boards/arm/stm32/stm32f334-disco/src/stm32_smps.c
@@ -1107,10 +1107,10 @@ int stm32_smps_setup(void)
/* Attach ADC12 ram vector */
- ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
if (ret < 0)
{
- pwrerr("ERROR: up_ramvec_attach failed: %d\n", ret);
+ pwrerr("ERROR: arm_ramvec_attach failed: %d\n", ret);
ret = EXIT_FAILURE;
goto errout;
}
diff --git a/boards/arm/stm32/stm32f429i-disco/src/stm32_highpri.c b/boards/arm/stm32/stm32f429i-disco/src/stm32_highpri.c
index cf0193c..ed2e8b4 100644
--- a/boards/arm/stm32/stm32f429i-disco/src/stm32_highpri.c
+++ b/boards/arm/stm32/stm32f429i-disco/src/stm32_highpri.c
@@ -409,10 +409,10 @@ int highpri_main(int argc, char *argv[])
#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
/* Attach ADC ram vector if no DMA or injected channels support */
- ret = up_ramvec_attach(STM32_IRQ_ADC, adc_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_ADC, adc_handler);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
+ fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
@@ -435,10 +435,10 @@ int highpri_main(int argc, char *argv[])
#ifdef CONFIG_STM32_ADC1_DMA
/* Attach DMA2 STREAM0 ram vector if DMA */
- ret = up_ramvec_attach(STM32_IRQ_DMA2S0, dma2s0_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_DMA2S0, dma2s0_handler);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
+ fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
diff --git a/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c b/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c
index 5eaa76b..0ff7507 100644
--- a/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c
+++ b/boards/arm/stm32/viewtool-stm32f107/src/stm32_highpri.c
@@ -199,10 +199,10 @@ int highpri_main(int argc, char *argv[])
/* Attach TIM6 ram vector */
- ret = up_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
+ ret = arm_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
if (ret < 0)
{
- fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n", ret);
+ fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n", ret);
return EXIT_FAILURE;
}
diff --git a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c
index 59ab5ea..3da6e14 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c
+++ b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c
@@ -395,10 +395,10 @@ static int spwm_tim6_setup(FAR struct spwm_s *spwm)
/* Attach TIM6 ram vector */
- ret = up_ramvec_attach(STM32L4_IRQ_TIM6, tim6_handler);
+ ret = arm_ramvec_attach(STM32L4_IRQ_TIM6, tim6_handler);
if (ret < 0)
{
- printf("ERROR: up_ramvec_attach failed: %d\n", ret);
+ printf("ERROR: arm_ramvec_attach failed: %d\n", ret);
ret = -1;
goto errout;
}